Configuration registers Register Descriptions Common across all types of flash devices, configuration registers setup the basic operating modes of the controller Offset: 0x0 device_reset Device reset. Controller sends a RESET command to device. Controller resets bit after sending command to device transfer_spare_reg Default data transfer mode. (Ignored during Spare only mode) load_wait_cnt Wait count value for Load operation program_wait_cnt Wait count value for Program operation erase_wait_cnt Wait count value for Erase operation int_mon_cyccnt Interrupt monitor cycle count value rb_pin_enabled Interrupt or polling mode. Ready/Busy pin is enabled from device. multiplane_operation Multiplane transfer mode. Pipelined read, copyback, erase and program commands are transfered in multiplane mode multiplane_read_enable Device supports multiplane read command sequence copyback_disable Device does not support copyback command sequence cache_write_enable Device supports cache write command sequence cache_read_enable Device supports cache read command sequence prefetch_mode Enables read data prefetching to faster performance chip_enable_dont_care Device can work in the chip enable dont care mode ecc_enable Enable controller ECC check bit generation and correction global_int_enable Global Interrupt enable and Error/Timeout disable. twhr2_and_we_2_re tcwaw_and_addr_2_data re_2_we Timing parameter between re high to we low (Trhw) acc_clks Timing parameter from read enable going low to capture read data number_of_planes Number of planes in the device pages_per_block Number of pages in a block device_width I/O width of attached devices device_main_area_size Page main area size of device in bytes device_spare_area_size Page spare area size of device in bytes two_row_addr_cycles Attached device has only 2 ROW address cycles multiplane_addr_restrict Address restriction for multiplane commands ecc_correction Correction capability required read_mode The type of read sequence that the controller will follow for pipe read commands. write_mode The type of write sequence that the controller will follow for pipe write commands. copyback_mode The type of copyback sequence that the controller will follow. rdwr_en_lo_cnt Read/Write Enable low pulse width rdwr_en_hi_cnt Read/Write Enable high pulse width max_rd_delay Max round trip read data delay for data capture cs_setup_cnt Chip select setup time spare_area_skip_bytes Spare area skip bytes spare_area_marker Spare area marker value devices_connected Number of Devices connected on one bank die_mask Indicates the die differentiator in case of NAND devices with stacked dies. first_block_of_next_plane The starting block address of the next plane in a multi plane device. write_protect This register is used to control the assertion/de-assertion of the WP# pin to the device. re_2_re Timing parameter between re high to re low (Trhz) for the next bank por_reset_count The number of cycles the controller waits after reset to issue the first RESET command to the device. watchdog_reset_count The number of cycles the controller waits before flagging a watchdog timeout interrupt.