USB0 Register Descriptions Registers associated with the USB0 master. This master is used to access the registers in USB0. Offset: 0x1e000 fn_mod_bm_iss Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding transactions. ahb_cntl Sets the block issuing capability to one outstanding transaction. Related reference L4 MAIN Register Descriptions L4 SP Register Descriptions L4 MP Register Descriptions L4 OSC1 Register Descriptions L4 SPIM Register Descriptions STM Register Descriptions LWHPS2FPGA Register Descriptions USB1 Register Descriptions NANDDATA Register Descriptions NANDREGS Register Descriptions QSPIDATA Register Descriptions FPGAMGRDATA Register Descriptions HPS2FPGA Register Descriptions ACP Register Descriptions Boot ROM Register Descriptions On-chip RAM Register Descriptions