ic_clr_activity

Clears ACTIVITY Interrupt
Module Instance Base Address Register Address
i2c0 0xFFC04000 0xFFC0405C
i2c1 0xFFC05000 0xFFC0505C
i2c2 0xFFC06000 0xFFC0605C
i2c3 0xFFC07000 0xFFC0705C

Offset: 0x5C

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

clr_activity

RO 0x0

ic_clr_activity Fields

Bit Name Description Access Reset
0 clr_activity

Reading this register clears the ACTIVITY interrupt if the I2C is not active anymore. If the I2C module is still active on the bus, the ACTIVITY interrupt bit continues to be set. It is automatically cleared by hardware if the module is disabled and if there is no further activity on the bus. The value read from this register to get status of the ACTIVITY interrupt (bit 8) of the ic_raw_intr_stat register.

RO 0x0