intr_en1

Enables corresponding interrupt bit in interrupt register for bank 1
Module Instance Base Address Register Address
nandregs 0xFFB80000 0xFFB80470

Offset: 0x470

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

page_xfer_inc

RW 0x0

pipe_cmd_err

RW 0x0

rst_comp

RW 0x1

INT_act

RW 0x0

unsup_cmd

RW 0x0

locked_blk

RW 0x0

pipe_cpybck_cmd_comp

RW 0x0

erase_comp

RW 0x0

program_comp

RW 0x0

load_comp

RW 0x0

erase_fail

RW 0x0

program_fail

RW 0x0

time_out

RW 0x0

dma_cmd_comp

RW 0x0

Reserved

ecc_uncor_err

RW 0x0

intr_en1 Fields

Bit Name Description Access Reset
15 page_xfer_inc

For every page of data transfer to or from the device, this bit will be set.

RW 0x0
14 pipe_cmd_err

A pipeline command sequence has been violated. This occurs when Map 01 page read/write address does not match the corresponding expected address from the pipeline commands issued earlier.

RW 0x0
13 rst_comp

A reset command has completed on this bank

RW 0x1
12 INT_act

R/B pin of device transitioned from low to high

RW 0x0
11 unsup_cmd

An unsupported command was received. This interrupt is set when an invalid command is received, or when a command sequence is broken.

RW 0x0
10 locked_blk

The address to program or erase operation is to a locked block and the operation failed due to this reason

RW 0x0
9 pipe_cpybck_cmd_comp

A pipeline command or a copyback bank command has completed on this particular bank

RW 0x0
8 erase_comp

Device erase operation complete

RW 0x0
7 program_comp

Device finished the last issued program command.

RW 0x0
6 load_comp

Device finished the last issued load command.

RW 0x0
5 erase_fail

Erase failure occurred in the device on issuance of a erase command. err_block_addr and err_page_addr contain the block address and page address that failed erase operation.

RW 0x0
4 program_fail

Program failure occurred in the device on issuance of a program command. err_block_addr and err_page_addr contain the block address and page address that failed program operation.

RW 0x0
3 time_out

Watchdog timer has triggered in the controller due to one of the reasons like device not responding or controller state machine did not get back to idle

RW 0x0
2 dma_cmd_comp

A data DMA command has completed on this bank.

RW 0x0
1 RSVD RSVD R 0x0
0 ecc_uncor_err

If set, Controller will interrupt processor when Ecc logic detects uncorrectable error.

RW 0x0