l4mp

Controls security settings for L4 MP peripherals.
Module Instance Base Address Register Address
l3regs 0xFF800000 0xFF800010

Offset: 0x10

Access: WO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

gpio2

WO 0x0

gpio1

WO 0x0

gpio0

WO 0x0

acpidmap

WO 0x0

emac1

WO 0x0

emac0

WO 0x0

sdmmc

WO 0x0

qspiregs

WO 0x0

dap

WO 0x0

fpgamgrregs

WO 0x0

l4mp Fields

Bit Name Description Access Reset
9 gpio2

Controls whether secure or non-secure masters can access the GPIO 2 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
8 gpio1

Controls whether secure or non-secure masters can access the GPIO 1 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
7 gpio0

Controls whether secure or non-secure masters can access the GPIO 0 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
6 acpidmap

Controls whether secure or non-secure masters can access the ACP ID Mapper slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
5 emac1

Controls whether secure or non-secure masters can access the EMAC 1 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
4 emac0

Controls whether secure or non-secure masters can access the EMAC 0 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
3 sdmmc

Controls whether secure or non-secure masters can access the SDMMC slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
2 qspiregs

Controls whether secure or non-secure masters can access the QSPI Registers slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
1 dap

Controls whether secure or non-secure masters can access the DAP slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
0 fpgamgrregs

Controls whether secure or non-secure masters can access the FPGA Manager Register slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0