comp_id_0

Component ID0
Module Instance Base Address Register Address
fpga2hpsregs 0xFF600000 0xFF601FF0

Offset: 0x1FF0

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

preamble

RO 0xD

comp_id_0 Fields

Bit Name Description Access Reset
7:0 preamble

Preamble

RO 0xD