Modern data centers are being transformed to increase networking bandwidth and optimize workloads like artificial intelligence. Data center administrators also expect lower TCO, lower power, and new services. Intel accelerators are helping customers meet these demands.
For versatile multifunction acceleration with the ease of use of the Acceleration Stack for Intel® Xeon® Scalable processor with integrated FPGA, the Intel® Programmable Acceleration Card (Intel® PAC) delivers.
The Intel® Visual Compute Accelerator 2 (Intel® VCA 2) is built to address the surging growth of video creation and delivery, data center and cloud graphics, and new immersive media experiences. Built for telecommunication service providers, OTT content providers, and IT administrators, Intel® VCA 2 offers advanced workload acceleration on the Intel® Xeon® Scalable processor and Intel® Xeon® processor E5-based servers.
Intel has an extensive developer base in the data center. These developers, who are very familiar with the Intel® Xeon® processor and the Intel® architecture, have access to the broadest portfolio of accelerators – graphics, compression, encryption, and multifunction.
Ease of use and time to market are key challenges for application developers. Intel is enabling Intel® architecture users, OS developers, open language users, and other ecosystem developers with tools built around industry standards. Unlike other solutions, developers using the Intel acceleration portfolio can use the tool, SDK, or OS they're comfortable with, without learning a new language.
Intel® FPGA Programmable Acceleration Card (Intel® FPGA PAC) D5005 (previously known as Intel PAC with Intel Stratix® 10 SX FPGA) is a high-performance PCI Express* (PCIe*)-based FPGA acceleration card for data centers, which supports both inline and lookaside acceleration. Expanding on the Intel® FPGA Programmable Acceleration Card (Intel® FPGA PAC) portfolio, it offers inline high-speed interfaces up to 100 Gbps. It provides the performance and versatility of FPGA acceleration and is one of several platforms supported by the Acceleration Stack for Intel® Xeon® CPUs with FPGAs. This acceleration stack provides a common interface for both application and accelerator function developers, and includes drivers, application programming interfaces (APIs), and an FPGA Interface Manager. Together with Acceleration Libraries and development tools, the acceleration stack saves developer's time and enables code reuse across multiple Intel® FPGA platforms. The versatile Intel® FPGA PAC D5005 can be implemented in many market segments, such as streaming analytics, video transcoding, financial, artificial intelligence, and genomics.
The Intel® Xeon® Scalable processor with integrated Intel® Arria® 10 Field Programmable Gate Array (FPGA) is now available to select customers. This marks the first production release of an Intel® Xeon® processor with a coherently interfaced FPGA – an important result of Intel's acquisition of Altera®. The combination of these industry-leading FPGA solutions with Intel's world-class processors enables customers to create the next-generation of data center systems with flexible workload-optimized performance and power efficiency. Fujitsu, a lead partner, plans to deliver systems based on the Intel® Xeon® processor with integrated FPGA and Intel's OVS reference design. This solution is being demonstrated this week at the Fujitsu Forum in Tokyo.
Tuesday, October 17, 2017
Market-specific Accelerator Functions are now available through the expansion of the global Intel® FPGA Design Solutions Network (DSN) program. These DSN members are delivering new Accelerator Functions-specific software IP that can speed up complex computations. In combination with the Intel® Programmable Acceleration Card (Intel® PAC) with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA), these ‘drop-in’ Accelerator Functions provide unique solutions that accelerate big data applications such as AI inference, real-time data analytics, cybersecurity, genomics and more, helping customers to supercharge server and data center performance and while lowering their total cost of ownership.
Monday, October 2, 2017
Intel has announced the first in a family of Intel® Programmable Acceleration Card (Intel® PAC), the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA). This is the first FPGA-based acceleration platform to support the Acceleration Stack for Intel® Xeon® CPU with FPGAs. In the near future, Intel will also offer Intel® Xeon® processors with Integrated FPGA for a high-bandwidth, cache-coherent, low-latency solution.
Monday, September 4, 2017
Intel has announced a new set of software tools to make FPGA programming accessible to mainstream developers. The Acceleration Stack for Intel® Xeon® CPU with FPGAs makes it easier to develop and deploy Intel® FPGAs for workload optimization in the data center. As part of this announcement, Intel has released the Open Programmable Acceleration Engine (OPAE) on GitHub* to foster an open ecosystem and encourage the use of FPGA acceleration in the data center.
OpenCL và biểu trưng OpenCL là thương hiệu của Apple Inc. được sử dụng với sự cho phép của Khronos.