Intel® Agilex™ FPGA and SoC
Intel® Agilex™ FPGA devices leverage heterogeneous 3D system-in-package (SiP) technology to integrate Intel’s first FPGA fabric built on 10nm SuperFin Technology and 2nd Gen Intel® Hyperflex™ FPGA Architecture to deliver up to 45% higher performance (geomean vs. Intel® Stratix® 10)1 or up to 40% lower power1 for applications in data center, networking, and edge compute. When compared to our competition’s 7nm FPGA portfolio, Intel® Agilex™ delivers ~2X better fabric performance per watt.1 Intel® Agilex™ SoC FPGA devices also integrate the quad-core Arm* Cortex-A53 processor to provide high system integration.
Intel® Agilex™ FPGA and SoC
Coming Soon - Intel® Agilex™ M-Series SoC FPGAs
Optimized for compute and memory intensive applications. With Coherent attach to Intel® Xeon® processors, HBM integration, hardened DDR5 controller, and Intel® Optane™ DC persistent memory support the Intel® Agilex™ M-Series SoC FPGAs are optimized for data-intensive applications which need massive memory in addition to high bandwidth.
New Intel® Agilex™ FPGA Devices Target Infrastructure Processing Units (IPUs), SmartNICs, and 5G Networks
From the edge to the cloud, security challenges in the form of cyberattacks and data breaches loom ever larger as attacks on high-speed networks multiply. Massive amounts of data are at risk but so are physical resources including critical physical infrastructure. Cryptography and authentication represent potent countermeasures to these attacks. The latest members of the Intel® Agilex™ FPGA and SoC FPGA families (AGF023/AGF019 and AGI023/AGI019) now feature hardened, high-speed cryptographic engines paired with MACsec soft IP to help mitigate the risks and limit the effects of these cyberattacks.
Features
Network Security
Intel® Agilex™ FPGA devices with 200G (half-duplex) hard crypto blocks with MACSec IP for Physical and Data Link Layer protection capabilities to meet the growing demand for securing every node in a network system.
Transceiver Leadership
Intel® Agilex™ FPGA and SoC family delivers accelerated transceiver innovation with data rates up to 116Gbps and support for PCI Express* up to Gen 5. Intel® Agilex™ FPGA and SoC family will allow customers to choose from a comprehensive transceiver portfolio of 28.3Gbps, 58Gbps, and 116Gbps transceiver tiles. Decoupling the transceiver development accelerates product innovation.
DSP Innovation
Intel® Agilex™ FPGA and SoC family offers a configurable DSP engine which features hardened support for single-precision FP32, half-precision FP16, BFLOAT16, and INT8 calculations. Intel® Agilex™ FPGA and SoC family also supports low-precision configurations from INT7 to INT2 for maximum flexibility. Intel® Agilex™ FPGA programmability, coupled with the innovations in the DSP blocks is ideal for evolving AI workloads.
Hardened Protocol Support
Intel® Agilex™ FPGA and SoC family delivers optimal power, performance, and logic utilization efficiency by integrating hardened protocols for many popular functions including 100/200/400G Ethernet, PCIe* Gen 4/5 interface, Interlaken, CPRI, JESD204B/C, and many more.
Compute Express Link (CXL)
With the CXL, Intel® Agilex™ FPGA, and SoC family offers the industry’s first Cache and Memory coherent interconnect to Intel® Xeon® processors. This revolutionary FPGA interconnect will provide low latency and performance gains for memory intensive applications with massive data processing needs.
Architecture
Continuous improvements to the acclaimed Intel® Hyperflex™ architecture deliver improved performance compared to Intel® Stratix® 10 device designs. The 2nd Gen Intel® Hyperflex™ architecture will be extended to all densities and variants of Intel® Agilex™ FPGA and SoC family and thus greatly improve the productivity of customers and reduce time-to-market.
Heterogeneous 3D SiP Technology
With the proven Embedded multi-die Interconnect Bridge (EMIB) technology, Intel® Agilex™ FPGA, and SoC family offers high density die-to-die interconnect for heterogeneous chips and delivers high performance at low cost. A large library of tiles including transceivers, custom IO, custom compute, and Intel® eASIC™ device tiles provide the agility, flexibility, and customization needed for a variety of applications.
Memory Integration
Intel® Agilex™ FPGA and SoC family features the industry’s first FPGA support for Intel® Optane™ DC persistent memory. In addition to this, HBM integration allows up to 16GB of external memory to be offered in-package affording up to 512 GB/s of peak memory bandwidth. Dedicated DDR5/4 hard memory controllers will support further on-board DRAM memory expansion.
Videos
Intel® Agilex™ Performance Video
Intel® Agilex™ FPGA devices deliver ~2X better fabric performance per watt versus 7nm FPGAs,1 especially useful for applications needing flexibility, agility, and high performance such as edge computing, networking, and cloud or data-center accelerators.
116G PAM4 Transceivers Video
Intel® Agilex™ FPGA and SoC FPGA devices offer new levels of performance using Intel’s Advanced 10nm SuperFin Technology. 116Gbps serial transceiver links support demanding bandwidth requirements in next-generation data center, enterprise, and networking environments.
Intel® Agilex™ Device PCIe* Gen4 x16 Demo
Watch this demo of PCIe* Gen4 x16 operation in the first Intel® Agilex™ device.
Intel® Agilex™ Device DDR4 Demo
Watch this demo video of the Intel® Agilex™ device with DDR4 in action.
Documentation and Support
Find technical documentation, videos, and training courses for your Intel® Agilex™ device designs.
Samples and Ordering
Learn more about how to buy Intel® Programmable solutions, explore available development kits, and more.
Development Kits
Get information about hardware solutions and tools offered by Intel to accelerate the design process.
Powering FPGAs
See recommended Intel® Enpirion® Power Solutions and resources for powering Intel® FPGAs.
Ordering Codes
Decipher Intel® FPGA part numbers, including the significance of certain prefixes and package codes.
Where to Buy
Contact an Intel® Authorized Distributor today.
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