Industrial Machine Vision

Intel® FPGAs for Intelligent Vision

Cameras and other equipment used in machine vision perform a variety of different tasks, such as Image Signal Processing (ISP), video transport, format conversion, and analytics. Because of the frequent technology improvements to camera sensors, the trend to replace analog cameras with smart Internet Protocol cameras, and the advancement of artificial learning deep learning-based video analytics, FPGAs exceed many of the key requirements needed for vision-based systems:

  • High performance per watt.
  • Low-latency.
  • Determinism.
  • Flexibility.

Combined with Intel® CPUs, FPGA-based accelerator solutions are now available for the architectural redesign of next-generation vision-based equipment.

Machine Vision

Machine vision (MV) uses a combination of high-speed cameras and computers to perform complex inspection tasks in addition to digital image acquisition and analysis. You can use the resulting data for pattern recognition, object sorting, robotic arm control, and more. Intel® FPGAs are ideal for MV cameras, allowing designs to accommodate a wide variety of image sensors as well as MV-specific interfaces. FPGAs can also be used as vision processing accelerators inside the Edge computing platform to harness the power of artificial intelligence deep learning for analysis of the MV data. MV applications include:

  • Defect detection.
  • Gauging.
  • Guidance, part tracking, and identification.
  • Optical character recognition and verification (OCR/OCV).
  • Pattern recognition.
  • Packaging, product, surface, and web inspections.

Intel® FPGAs play a key role in next-generation MV cameras, frame grabbers, and vision controllers:

  • Support for AI deep learning frameworks, models, and topologies to implement FPGA-based convolutional neural network (CNN) inferencing accelerators (read about the Intel® FPGA Deep Learning Acceleration Suite).
  • Flexibility to interface to many types of image sensors and MV system devices.
  • Fast processing to incorporate a full image sensor pipeline (ISP) intellectual property (IP) that includes techniques, such as defect pixel correction, gamma correction, dynamic range correction, and noise reduction.

Intel® FPGA Advantages—Performance, Flexibility, and Connectivity

As illustrated below, FPGAs, such as the Intel® MAX® 10, Cyclone® and Arria® device families enable MV designers like you to:

  • Achieve high-performance image preprocessing on frame grabber boards (using protocols such as Camera Link), approaching real-time frame rates.
  • Integrate real-time functions into the camera system for pixel-oriented gain control, compensation of defective pixels, increased dynamic range, and more.
  • Capitalize on the flexibility of FPGAs to support evolving camera interfaces.
  • Implement various bus interfaces, such as PCI*, PCIe*, Gbps Ethernet, USB, CoaxPress and others.
  • Integrate a wide range of functions such as image capture, camera interfaces, preprocessing, and communication functions, all within a single FPGA.
  • Using SoC FPGAs such as the Cyclone® V SoC, combine your image signal processing pipeline with machine vision algorithms executing the ARM* A9 hard processor system to build complete machine vision systems on chip.
  • Use Simulink and Embedded Coder from The MathWorks* to generate C/C++ code for Cyclone V SoCs. When used in combination with Intel SoC support from HDL Coder, this solution can be utilized in a hardware/software workflow spanning simulation, prototyping, verification, and implementation on Intel SoCs. For more information, visit the MathWorks page.

Flexibility—FPGAs Support Different Sensor and MV Interfaces

GigE Vision

GigE Vision provides an open, high-performance, scalable framework for image streaming and device control over Ethernet networks. This interface standard provides an environment for networked machine vision systems based on switched client/server architectures, allowing you to connect multiple cameras to multiple computers.

It includes the following characteristics:

  • Specification managed by the Automated Imaging Association (AIA).
  • Protocol implemented over Ethernet/IP/UDP with data transfer rates up to 1 Gbps using Gbps Ethernet, scalable to 10 Gbps with 10-Gbps Ethernet.
  • Data transfer length up to 100 m with copper.
  • Use of switches, repeaters, or fiber optic converters to increase the data transfer length.
  • Use of low-cost cables (CAT5e or CAT6), standard connectors, and hardware.

GigE Vision Application Example Using Multiple GigE Cameras

Courtesy of Pleora Technologies Inc.

You can obtain several key benefits by implementing GigE Vision applications using FPGAs such as Intel® MAX® 10 FPGA, Cyclone® IV, and Cyclone® V device families:

  • Integration of image capture, camera interfaces, preprocessing, and communications within a single FPGA device.
  • Flexibility to support different camera interfaces and bus interfaces as they evolve.
  • Lower total cost of ownership (TCO) with reduced board size, reduced component count, and minimal hardware re-spins.
  • Reduced risk of obsolescence due to long FPGA life cycles and easy migration to newer FPGA families.

For more information, please contact your local Intel distributor sales office or visit our partners.

Camera Link

Camera Link is a serial communication protocol designed for point-to-point automated vision applications. It is based on the Texas Instruments* (formerly National Semiconductor) Channel Link interface which has been extended to support general-purpose LVDS data transmission.

Maintained by the Automated Imaging Association (AIA), the Camera Link specification standardizes the camera interface, cables, and frame grabbers used to convert and transmit camera data to a computer, usually across PCITM or PCIe* buses. You'll find the Camera Link interface used in applications like machine vision systems and smart cameras.

Benefits of Using FPGAs in Camera Link Applications

As the following figure illustrates, you can take advantage of low-cost FPGAs—such as Cyclone® IV and Cyclone® V devices — to create high-performance Camera Link applications that lower your TCO and increase your return on investment (ROI). If you need an even higher level of performance, use the Intel® Cyclone® 10 FPGA, Intel® Arria® 10 FPGA, or Intel® Stratix® 10 FPGA.

Camera Link Application Example Using a Cyclone® IV FPGA from Intel

USB 3 Vision

The benefits of using USB 3.0 are many: an abundance of USB 3 interfaces on current PCs, low cost, up to 5 Gbps transfer rate, low power and CPU overhead, and combined data and power on a single cable up to 5 meters without active repeaters.


CoaXPress can transmit up to 6.25 Gbps per cable, while enabling up to 130M cable length. Quad link cables and connectors enable up to 25Gbps for very demanding, high bandwidth connections to high performance cameras. Combinations of single, dual, or quad camera support can be managed with cards supporting the quad link CoaXPress interface.

With FPGAs, you can do the following:

  • Accelerate image preprocessing (such as pixel-oriented gain control, compensation for defective pixels, and increased dynamic range) to approach real-time frame rates.
  • Integrate image capturing, camera interfacing, preprocessing, and communications on a single FPGA platform.
  • Support different camera/bus/communication interfaces in your design, as they evolve (with no new hardware required).
  • Reduce your board size and component count, minimize hardware re-spins, get your product to market faster, and keep your product in the market much longer to lower your TCO.

For more information, please contact your local Intel distributor sales office or visit our industrial partners.

Additional Resources

Need Help with Your FPGA Design?

Collaborate with Intel on your next project.

Contact us

Intel® FPGA Industry Applications

Learn how to leverage these application solutions to help meet your design challenges.

View all applications

Intel® FPGA and Programmable Devices

Learn how these powerful devices can be customized to accelerate key workloads and enable design engineers to adapt to emerging standards or changing requirements.

View all devices