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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[1:0] | RW | 0x1 | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL |
[3:2] | ??? | 0x0 | UNDEFINED |
[5:4] | RW | 0x1 | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL |
[7:6] | ??? | 0x0 | UNDEFINED |
[9:8] | RW | 0x1 | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB |
[15:10] | ??? | 0x0 | UNDEFINED |
[17:16] | RW | 0x0 | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW |
[19:18] | ??? | 0x0 | UNDEFINED |
[21:20] | RW | 0x0 | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR |
[23:22] | ??? | 0x0 | UNDEFINED |
[26:24] | RW | 0x0 | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL |
[27] | ??? | 0x0 | UNDEFINED |
[29:28] | RW | 0x1 | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL |
[31:30] | ??? | 0x0 | UNDEFINED |
Field : rom_rtsel | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_LSB 0 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_MSB 1 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_WIDTH 2 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_SET_MSK 0x00000003 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_CLR_MSK 0xfffffffc |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_RESET 0x1 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_GET(value) (((value) & 0x00000003) >> 0) |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_SET(value) (((value) << 0) & 0x00000003) |
Field : rom_ptsel | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_LSB 4 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_MSB 5 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_WIDTH 2 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_SET_MSK 0x00000030 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_CLR_MSK 0xffffffcf |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_RESET 0x1 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_GET(value) (((value) & 0x00000030) >> 4) |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_SET(value) (((value) << 4) & 0x00000030) |
Field : rom_trb | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_LSB 8 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_MSB 9 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_WIDTH 2 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_SET_MSK 0x00000300 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_CLR_MSK 0xfffffcff |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_RESET 0x1 |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_GET(value) (((value) & 0x00000300) >> 8) |
#define | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_SET(value) (((value) << 8) & 0x00000300) |
Field : mpul1_mcw | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_LSB 16 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_MSB 17 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_WIDTH 2 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_SET_MSK 0x00030000 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_CLR_MSK 0xfffcffff |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_RESET 0x0 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_GET(value) (((value) & 0x00030000) >> 16) |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_SET(value) (((value) << 16) & 0x00030000) |
Field : mpul1_mcr | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_LSB 20 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_MSB 21 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_WIDTH 2 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_SET_MSK 0x00300000 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_CLR_MSK 0xffcfffff |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_RESET 0x0 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_GET(value) (((value) & 0x00300000) >> 20) |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_SET(value) (((value) << 20) & 0x00300000) |
Field : mpul2_wtsel | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_LSB 24 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_MSB 26 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_WIDTH 3 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_SET_MSK 0x07000000 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_CLR_MSK 0xf8ffffff |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_RESET 0x0 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_GET(value) (((value) & 0x07000000) >> 24) |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_SET(value) (((value) << 24) & 0x07000000) |
Field : mpul2_rtsel | |
Field Access Macros: | |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_LSB 28 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_MSB 29 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_WIDTH 2 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_SET_MSK 0x30000000 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_CLR_MSK 0xcfffffff |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_RESET 0x1 |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_GET(value) (((value) & 0x30000000) >> 28) |
#define | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_SET(value) (((value) << 28) & 0x30000000) |
Data Structures | |
struct | ALT_SYSMGR_TSMC_TSEL_0_s |
Macros | |
#define | ALT_SYSMGR_TSMC_TSEL_0_RESET 0x10000111 |
#define | ALT_SYSMGR_TSMC_TSEL_0_OFST 0x100 |
Typedefs | |
typedef struct ALT_SYSMGR_TSMC_TSEL_0_s | ALT_SYSMGR_TSMC_TSEL_0_t |
struct ALT_SYSMGR_TSMC_TSEL_0_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SYSMGR_TSMC_TSEL_0.
Data Fields | ||
---|---|---|
uint32_t | rom_rtsel: 2 | ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL |
uint32_t | __pad0__: 2 | UNDEFINED |
uint32_t | rom_ptsel: 2 | ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL |
uint32_t | __pad1__: 2 | UNDEFINED |
uint32_t | rom_trb: 2 | ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB |
uint32_t | __pad2__: 6 | UNDEFINED |
uint32_t | mpul1_mcw: 2 | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW |
uint32_t | __pad3__: 2 | UNDEFINED |
uint32_t | mpul1_mcr: 2 | ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR |
uint32_t | __pad4__: 2 | UNDEFINED |
uint32_t | mpul2_wtsel: 3 | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL |
uint32_t | __pad5__: 1 | UNDEFINED |
uint32_t | mpul2_rtsel: 2 | ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL |
uint32_t | __pad6__: 2 | UNDEFINED |
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_WIDTH 2 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_SET_MSK 0x00000003 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_RESET 0x1 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_ROM_RTSEL register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_WIDTH 2 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_SET_MSK 0x00000030 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_CLR_MSK 0xffffffcf |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_RESET 0x1 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_GET | ( | value | ) | (((value) & 0x00000030) >> 4) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL_SET | ( | value | ) | (((value) << 4) & 0x00000030) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_ROM_PTSEL register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_WIDTH 2 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_SET_MSK 0x00000300 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_CLR_MSK 0xfffffcff |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_RESET 0x1 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_GET | ( | value | ) | (((value) & 0x00000300) >> 8) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB_SET | ( | value | ) | (((value) << 8) & 0x00000300) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_ROM_TRB register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_WIDTH 2 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_SET_MSK 0x00030000 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_CLR_MSK 0xfffcffff |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_RESET 0x0 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_GET | ( | value | ) | (((value) & 0x00030000) >> 16) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW_SET | ( | value | ) | (((value) << 16) & 0x00030000) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCW register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_LSB 20 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_MSB 21 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_WIDTH 2 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_SET_MSK 0x00300000 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_CLR_MSK 0xffcfffff |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_RESET 0x0 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_GET | ( | value | ) | (((value) & 0x00300000) >> 20) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR_SET | ( | value | ) | (((value) << 20) & 0x00300000) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_MPUL1_MCR register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_MSB 26 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_WIDTH 3 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_SET_MSK 0x07000000 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_CLR_MSK 0xf8ffffff |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_RESET 0x0 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_GET | ( | value | ) | (((value) & 0x07000000) >> 24) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL_SET | ( | value | ) | (((value) << 24) & 0x07000000) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_MPUL2_WTSEL register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_LSB 28 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_MSB 29 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_WIDTH 2 |
The width in bits of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_SET_MSK 0x30000000 |
The mask used to set the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_CLR_MSK 0xcfffffff |
The mask used to clear the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field value.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_RESET 0x1 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_GET | ( | value | ) | (((value) & 0x30000000) >> 28) |
Extracts the ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL field value from a register.
#define ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL_SET | ( | value | ) | (((value) << 28) & 0x30000000) |
Produces a ALT_SYSMGR_TSMC_TSEL_0_MPUL2_RTSEL register field value suitable for setting the register.
#define ALT_SYSMGR_TSMC_TSEL_0_RESET 0x10000111 |
The reset value of the ALT_SYSMGR_TSMC_TSEL_0 register.
#define ALT_SYSMGR_TSMC_TSEL_0_OFST 0x100 |
The byte offset of the ALT_SYSMGR_TSMC_TSEL_0 register from the beginning of the component.
typedef struct ALT_SYSMGR_TSMC_TSEL_0_s ALT_SYSMGR_TSMC_TSEL_0_t |
The typedef declaration for register ALT_SYSMGR_TSMC_TSEL_0.