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Register : erase_wait_cnt

Description

Wait count value for Erase operation

Register Layout

Bits Access Reset Description
[15:0] RW 0x1f4 ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE
[31:16] ??? 0x0 UNDEFINED

Field : value

Number of clock cycles after issue of erase operation before NAND Flash Controller polls for status. This values is of relevance for status polling mode of operation and has been provided to minimize redundant polling after issuing a command. After a erase command, the first polling will happen after this many number of cycles have elapsed and then on polling will happen every int_mon_cyccnt cycles. The default values is equal to the default value of int_mon_cyccnt. The controller internally multiplies the value programmed into this register by 16 to provide a wider range for polling.

Field Access Macros:

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_LSB   0
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_MSB   15
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_WIDTH   16
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_SET_MSK   0x0000ffff
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_CLR_MSK   0xffff0000
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_RESET   0x1f4
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_GET(value)   (((value) & 0x0000ffff) >> 0)
 
#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_SET(value)   (((value) << 0) & 0x0000ffff)
 

Data Structures

struct  ALT_NAND_CFG_ERASE_WAIT_CNT_s
 

Macros

#define ALT_NAND_CFG_ERASE_WAIT_CNT_OFST   0x40
 

Typedefs

typedef struct
ALT_NAND_CFG_ERASE_WAIT_CNT_s 
ALT_NAND_CFG_ERASE_WAIT_CNT_t
 

Data Structure Documentation

struct ALT_NAND_CFG_ERASE_WAIT_CNT_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NAND_CFG_ERASE_WAIT_CNT.

Data Fields
uint32_t value: 16 ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE
uint32_t __pad0__: 16 UNDEFINED

Macro Definitions

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_LSB   0

The Least Significant Bit (LSB) position of the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_MSB   15

The Most Significant Bit (MSB) position of the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_WIDTH   16

The width in bits of the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_SET_MSK   0x0000ffff

The mask used to set the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field value.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_CLR_MSK   0xffff0000

The mask used to clear the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field value.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_RESET   0x1f4

The reset value of the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_GET (   value)    (((value) & 0x0000ffff) >> 0)

Extracts the ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE field value from a register.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE_SET (   value)    (((value) << 0) & 0x0000ffff)

Produces a ALT_NAND_CFG_ERASE_WAIT_CNT_VALUE register field value suitable for setting the register.

#define ALT_NAND_CFG_ERASE_WAIT_CNT_OFST   0x40

The byte offset of the ALT_NAND_CFG_ERASE_WAIT_CNT register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_NAND_CFG_ERASE_WAIT_CNT.