Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Peripheral Module Reset Register - permodrst

Description

The PERMODRST register is used by software to trigger module resets (individual module reset signals). Software explicitly asserts and de-asserts module reset signals by writing bits in the appropriate *MODRST register. It is up to software to ensure module reset signals are asserted for the appropriate length of time and are de-asserted in the correct order. It is also up to software to not assert a module reset signal that would prevent software from de-asserting the module reset signal. For example, software should not assert the module reset to the CPU executing the software.

Software writes a bit to 1 to assert the module reset signal and to 0 to de- assert the module reset signal.

All fields are reset by a cold reset.All fields are also reset by a warm reset if not masked by the corresponding PERWARMMASK field.

The reset value of all fields is 1. This holds the corresponding module in reset until software is ready to release the module from reset by writing 0 to its field.

Register Layout

Bits Access Reset Description
[0] RW 0x1 EMAC0
[1] RW 0x1 EMAC1
[2] RW 0x1 USB0
[3] RW 0x1 USB1
[4] RW 0x1 NAND Flash
[5] RW 0x1 QSPI Flash
[6] RW 0x1 L4 Watchdog 0
[7] RW 0x1 L4 Watchdog 1
[8] RW 0x1 OSC1 Timer 0
[9] RW 0x1 OSC1 Timer 1
[10] RW 0x1 SP Timer 0
[11] RW 0x1 SP Timer 1
[12] RW 0x1 I2C0
[13] RW 0x1 I2C1
[14] RW 0x1 I2C2
[15] RW 0x1 I2C3
[16] RW 0x1 UART0
[17] RW 0x1 UART1
[18] RW 0x1 SPIM0
[19] RW 0x1 SPIM1
[20] RW 0x1 SPIS0
[21] RW 0x1 SPIS1
[22] RW 0x1 SD/MMC
[23] RW 0x1 CAN0
[24] RW 0x1 CAN1
[25] RW 0x1 GPIO0
[26] RW 0x1 GPIO1
[27] RW 0x1 GPIO2
[28] RW 0x1 DMA Controller
[29] RW 0x1 SDRAM Controller Subsystem
[31:30] ??? 0x0 UNDEFINED

Field : EMAC0 - emac0

Resets EMAC0

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_EMAC0_LSB   0
 
#define ALT_RSTMGR_PERMODRST_EMAC0_MSB   0
 
#define ALT_RSTMGR_PERMODRST_EMAC0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_EMAC0_SET_MSK   0x00000001
 
#define ALT_RSTMGR_PERMODRST_EMAC0_CLR_MSK   0xfffffffe
 
#define ALT_RSTMGR_PERMODRST_EMAC0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_EMAC0_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_RSTMGR_PERMODRST_EMAC0_SET(value)   (((value) << 0) & 0x00000001)
 

Field : EMAC1 - emac1

Resets EMAC1

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_EMAC1_LSB   1
 
#define ALT_RSTMGR_PERMODRST_EMAC1_MSB   1
 
#define ALT_RSTMGR_PERMODRST_EMAC1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_EMAC1_SET_MSK   0x00000002
 
#define ALT_RSTMGR_PERMODRST_EMAC1_CLR_MSK   0xfffffffd
 
#define ALT_RSTMGR_PERMODRST_EMAC1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_EMAC1_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_RSTMGR_PERMODRST_EMAC1_SET(value)   (((value) << 1) & 0x00000002)
 

Field : USB0 - usb0

Resets USB0

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_USB0_LSB   2
 
#define ALT_RSTMGR_PERMODRST_USB0_MSB   2
 
#define ALT_RSTMGR_PERMODRST_USB0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_USB0_SET_MSK   0x00000004
 
#define ALT_RSTMGR_PERMODRST_USB0_CLR_MSK   0xfffffffb
 
#define ALT_RSTMGR_PERMODRST_USB0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_USB0_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_RSTMGR_PERMODRST_USB0_SET(value)   (((value) << 2) & 0x00000004)
 

Field : USB1 - usb1

Resets USB1

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_USB1_LSB   3
 
#define ALT_RSTMGR_PERMODRST_USB1_MSB   3
 
#define ALT_RSTMGR_PERMODRST_USB1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_USB1_SET_MSK   0x00000008
 
#define ALT_RSTMGR_PERMODRST_USB1_CLR_MSK   0xfffffff7
 
#define ALT_RSTMGR_PERMODRST_USB1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_USB1_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_RSTMGR_PERMODRST_USB1_SET(value)   (((value) << 3) & 0x00000008)
 

Field : NAND Flash - nand

Resets NAND flash controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_NAND_LSB   4
 
#define ALT_RSTMGR_PERMODRST_NAND_MSB   4
 
#define ALT_RSTMGR_PERMODRST_NAND_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_NAND_SET_MSK   0x00000010
 
#define ALT_RSTMGR_PERMODRST_NAND_CLR_MSK   0xffffffef
 
#define ALT_RSTMGR_PERMODRST_NAND_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_NAND_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_RSTMGR_PERMODRST_NAND_SET(value)   (((value) << 4) & 0x00000010)
 

Field : QSPI Flash - qspi

Resets QSPI flash controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_QSPI_LSB   5
 
#define ALT_RSTMGR_PERMODRST_QSPI_MSB   5
 
#define ALT_RSTMGR_PERMODRST_QSPI_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_QSPI_SET_MSK   0x00000020
 
#define ALT_RSTMGR_PERMODRST_QSPI_CLR_MSK   0xffffffdf
 
#define ALT_RSTMGR_PERMODRST_QSPI_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_QSPI_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_RSTMGR_PERMODRST_QSPI_SET(value)   (((value) << 5) & 0x00000020)
 

Field : L4 Watchdog 0 - l4wd0

Resets watchdog 0 connected to L4

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_L4WD0_LSB   6
 
#define ALT_RSTMGR_PERMODRST_L4WD0_MSB   6
 
#define ALT_RSTMGR_PERMODRST_L4WD0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_L4WD0_SET_MSK   0x00000040
 
#define ALT_RSTMGR_PERMODRST_L4WD0_CLR_MSK   0xffffffbf
 
#define ALT_RSTMGR_PERMODRST_L4WD0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_L4WD0_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_RSTMGR_PERMODRST_L4WD0_SET(value)   (((value) << 6) & 0x00000040)
 

Field : L4 Watchdog 1 - l4wd1

Resets watchdog 1 connected to L4

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_L4WD1_LSB   7
 
#define ALT_RSTMGR_PERMODRST_L4WD1_MSB   7
 
#define ALT_RSTMGR_PERMODRST_L4WD1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_L4WD1_SET_MSK   0x00000080
 
#define ALT_RSTMGR_PERMODRST_L4WD1_CLR_MSK   0xffffff7f
 
#define ALT_RSTMGR_PERMODRST_L4WD1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_L4WD1_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_RSTMGR_PERMODRST_L4WD1_SET(value)   (((value) << 7) & 0x00000080)
 

Field : OSC1 Timer 0 - osc1timer0

Resets OSC1 timer 0 connected to L4

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_LSB   8
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_MSB   8
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_SET_MSK   0x00000100
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_CLR_MSK   0xfffffeff
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR0_SET(value)   (((value) << 8) & 0x00000100)
 

Field : OSC1 Timer 1 - osc1timer1

Resets OSC1 timer 1 connected to L4

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_LSB   9
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_MSB   9
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_SET_MSK   0x00000200
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_CLR_MSK   0xfffffdff
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_GET(value)   (((value) & 0x00000200) >> 9)
 
#define ALT_RSTMGR_PERMODRST_OSC1TMR1_SET(value)   (((value) << 9) & 0x00000200)
 

Field : SP Timer 0 - sptimer0

Resets SP timer 0 connected to L4

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SPTMR0_LSB   10
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_MSB   10
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_SET_MSK   0x00000400
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_CLR_MSK   0xfffffbff
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_GET(value)   (((value) & 0x00000400) >> 10)
 
#define ALT_RSTMGR_PERMODRST_SPTMR0_SET(value)   (((value) << 10) & 0x00000400)
 

Field : SP Timer 1 - sptimer1

Resets SP timer 1 connected to L4

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SPTMR1_LSB   11
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_MSB   11
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_SET_MSK   0x00000800
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_CLR_MSK   0xfffff7ff
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_GET(value)   (((value) & 0x00000800) >> 11)
 
#define ALT_RSTMGR_PERMODRST_SPTMR1_SET(value)   (((value) << 11) & 0x00000800)
 

Field : I2C0 - i2c0

Resets I2C0 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_I2C0_LSB   12
 
#define ALT_RSTMGR_PERMODRST_I2C0_MSB   12
 
#define ALT_RSTMGR_PERMODRST_I2C0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_I2C0_SET_MSK   0x00001000
 
#define ALT_RSTMGR_PERMODRST_I2C0_CLR_MSK   0xffffefff
 
#define ALT_RSTMGR_PERMODRST_I2C0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_I2C0_GET(value)   (((value) & 0x00001000) >> 12)
 
#define ALT_RSTMGR_PERMODRST_I2C0_SET(value)   (((value) << 12) & 0x00001000)
 

Field : I2C1 - i2c1

Resets I2C1 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_I2C1_LSB   13
 
#define ALT_RSTMGR_PERMODRST_I2C1_MSB   13
 
#define ALT_RSTMGR_PERMODRST_I2C1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_I2C1_SET_MSK   0x00002000
 
#define ALT_RSTMGR_PERMODRST_I2C1_CLR_MSK   0xffffdfff
 
#define ALT_RSTMGR_PERMODRST_I2C1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_I2C1_GET(value)   (((value) & 0x00002000) >> 13)
 
#define ALT_RSTMGR_PERMODRST_I2C1_SET(value)   (((value) << 13) & 0x00002000)
 

Field : I2C2 - i2c2

Resets I2C2 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_I2C2_LSB   14
 
#define ALT_RSTMGR_PERMODRST_I2C2_MSB   14
 
#define ALT_RSTMGR_PERMODRST_I2C2_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_I2C2_SET_MSK   0x00004000
 
#define ALT_RSTMGR_PERMODRST_I2C2_CLR_MSK   0xffffbfff
 
#define ALT_RSTMGR_PERMODRST_I2C2_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_I2C2_GET(value)   (((value) & 0x00004000) >> 14)
 
#define ALT_RSTMGR_PERMODRST_I2C2_SET(value)   (((value) << 14) & 0x00004000)
 

Field : I2C3 - i2c3

Resets I2C3 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_I2C3_LSB   15
 
#define ALT_RSTMGR_PERMODRST_I2C3_MSB   15
 
#define ALT_RSTMGR_PERMODRST_I2C3_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_I2C3_SET_MSK   0x00008000
 
#define ALT_RSTMGR_PERMODRST_I2C3_CLR_MSK   0xffff7fff
 
#define ALT_RSTMGR_PERMODRST_I2C3_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_I2C3_GET(value)   (((value) & 0x00008000) >> 15)
 
#define ALT_RSTMGR_PERMODRST_I2C3_SET(value)   (((value) << 15) & 0x00008000)
 

Field : UART0 - uart0

Resets UART0

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_UART0_LSB   16
 
#define ALT_RSTMGR_PERMODRST_UART0_MSB   16
 
#define ALT_RSTMGR_PERMODRST_UART0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_UART0_SET_MSK   0x00010000
 
#define ALT_RSTMGR_PERMODRST_UART0_CLR_MSK   0xfffeffff
 
#define ALT_RSTMGR_PERMODRST_UART0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_UART0_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_RSTMGR_PERMODRST_UART0_SET(value)   (((value) << 16) & 0x00010000)
 

Field : UART1 - uart1

Resets UART1

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_UART1_LSB   17
 
#define ALT_RSTMGR_PERMODRST_UART1_MSB   17
 
#define ALT_RSTMGR_PERMODRST_UART1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_UART1_SET_MSK   0x00020000
 
#define ALT_RSTMGR_PERMODRST_UART1_CLR_MSK   0xfffdffff
 
#define ALT_RSTMGR_PERMODRST_UART1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_UART1_GET(value)   (((value) & 0x00020000) >> 17)
 
#define ALT_RSTMGR_PERMODRST_UART1_SET(value)   (((value) << 17) & 0x00020000)
 

Field : SPIM0 - spim0

Resets SPIM0 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SPIM0_LSB   18
 
#define ALT_RSTMGR_PERMODRST_SPIM0_MSB   18
 
#define ALT_RSTMGR_PERMODRST_SPIM0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SPIM0_SET_MSK   0x00040000
 
#define ALT_RSTMGR_PERMODRST_SPIM0_CLR_MSK   0xfffbffff
 
#define ALT_RSTMGR_PERMODRST_SPIM0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SPIM0_GET(value)   (((value) & 0x00040000) >> 18)
 
#define ALT_RSTMGR_PERMODRST_SPIM0_SET(value)   (((value) << 18) & 0x00040000)
 

Field : SPIM1 - spim1

Resets SPIM1 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SPIM1_LSB   19
 
#define ALT_RSTMGR_PERMODRST_SPIM1_MSB   19
 
#define ALT_RSTMGR_PERMODRST_SPIM1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SPIM1_SET_MSK   0x00080000
 
#define ALT_RSTMGR_PERMODRST_SPIM1_CLR_MSK   0xfff7ffff
 
#define ALT_RSTMGR_PERMODRST_SPIM1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SPIM1_GET(value)   (((value) & 0x00080000) >> 19)
 
#define ALT_RSTMGR_PERMODRST_SPIM1_SET(value)   (((value) << 19) & 0x00080000)
 

Field : SPIS0 - spis0

Resets SPIS0 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SPIS0_LSB   20
 
#define ALT_RSTMGR_PERMODRST_SPIS0_MSB   20
 
#define ALT_RSTMGR_PERMODRST_SPIS0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SPIS0_SET_MSK   0x00100000
 
#define ALT_RSTMGR_PERMODRST_SPIS0_CLR_MSK   0xffefffff
 
#define ALT_RSTMGR_PERMODRST_SPIS0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SPIS0_GET(value)   (((value) & 0x00100000) >> 20)
 
#define ALT_RSTMGR_PERMODRST_SPIS0_SET(value)   (((value) << 20) & 0x00100000)
 

Field : SPIS1 - spis1

Resets SPIS1 controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SPIS1_LSB   21
 
#define ALT_RSTMGR_PERMODRST_SPIS1_MSB   21
 
#define ALT_RSTMGR_PERMODRST_SPIS1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SPIS1_SET_MSK   0x00200000
 
#define ALT_RSTMGR_PERMODRST_SPIS1_CLR_MSK   0xffdfffff
 
#define ALT_RSTMGR_PERMODRST_SPIS1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SPIS1_GET(value)   (((value) & 0x00200000) >> 21)
 
#define ALT_RSTMGR_PERMODRST_SPIS1_SET(value)   (((value) << 21) & 0x00200000)
 

Field : SD/MMC - sdmmc

Resets SD/MMC controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SDMMC_LSB   22
 
#define ALT_RSTMGR_PERMODRST_SDMMC_MSB   22
 
#define ALT_RSTMGR_PERMODRST_SDMMC_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SDMMC_SET_MSK   0x00400000
 
#define ALT_RSTMGR_PERMODRST_SDMMC_CLR_MSK   0xffbfffff
 
#define ALT_RSTMGR_PERMODRST_SDMMC_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SDMMC_GET(value)   (((value) & 0x00400000) >> 22)
 
#define ALT_RSTMGR_PERMODRST_SDMMC_SET(value)   (((value) << 22) & 0x00400000)
 

Field : CAN0 - can0

Resets CAN0 controller.

Writes to this field on devices not containing CAN controllers will be ignored.

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_CAN0_LSB   23
 
#define ALT_RSTMGR_PERMODRST_CAN0_MSB   23
 
#define ALT_RSTMGR_PERMODRST_CAN0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_CAN0_SET_MSK   0x00800000
 
#define ALT_RSTMGR_PERMODRST_CAN0_CLR_MSK   0xff7fffff
 
#define ALT_RSTMGR_PERMODRST_CAN0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_CAN0_GET(value)   (((value) & 0x00800000) >> 23)
 
#define ALT_RSTMGR_PERMODRST_CAN0_SET(value)   (((value) << 23) & 0x00800000)
 

Field : CAN1 - can1

Resets CAN1 controller.

Writes to this field on devices not containing CAN controllers will be ignored.

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_CAN1_LSB   24
 
#define ALT_RSTMGR_PERMODRST_CAN1_MSB   24
 
#define ALT_RSTMGR_PERMODRST_CAN1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_CAN1_SET_MSK   0x01000000
 
#define ALT_RSTMGR_PERMODRST_CAN1_CLR_MSK   0xfeffffff
 
#define ALT_RSTMGR_PERMODRST_CAN1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_CAN1_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_RSTMGR_PERMODRST_CAN1_SET(value)   (((value) << 24) & 0x01000000)
 

Field : GPIO0 - gpio0

Resets GPIO0

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_GPIO0_LSB   25
 
#define ALT_RSTMGR_PERMODRST_GPIO0_MSB   25
 
#define ALT_RSTMGR_PERMODRST_GPIO0_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_GPIO0_SET_MSK   0x02000000
 
#define ALT_RSTMGR_PERMODRST_GPIO0_CLR_MSK   0xfdffffff
 
#define ALT_RSTMGR_PERMODRST_GPIO0_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_GPIO0_GET(value)   (((value) & 0x02000000) >> 25)
 
#define ALT_RSTMGR_PERMODRST_GPIO0_SET(value)   (((value) << 25) & 0x02000000)
 

Field : GPIO1 - gpio1

Resets GPIO1

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_GPIO1_LSB   26
 
#define ALT_RSTMGR_PERMODRST_GPIO1_MSB   26
 
#define ALT_RSTMGR_PERMODRST_GPIO1_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_GPIO1_SET_MSK   0x04000000
 
#define ALT_RSTMGR_PERMODRST_GPIO1_CLR_MSK   0xfbffffff
 
#define ALT_RSTMGR_PERMODRST_GPIO1_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_GPIO1_GET(value)   (((value) & 0x04000000) >> 26)
 
#define ALT_RSTMGR_PERMODRST_GPIO1_SET(value)   (((value) << 26) & 0x04000000)
 

Field : GPIO2 - gpio2

Resets GPIO2

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_GPIO2_LSB   27
 
#define ALT_RSTMGR_PERMODRST_GPIO2_MSB   27
 
#define ALT_RSTMGR_PERMODRST_GPIO2_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_GPIO2_SET_MSK   0x08000000
 
#define ALT_RSTMGR_PERMODRST_GPIO2_CLR_MSK   0xf7ffffff
 
#define ALT_RSTMGR_PERMODRST_GPIO2_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_GPIO2_GET(value)   (((value) & 0x08000000) >> 27)
 
#define ALT_RSTMGR_PERMODRST_GPIO2_SET(value)   (((value) << 27) & 0x08000000)
 

Field : DMA Controller - dma

Resets DMA controller

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_DMA_LSB   28
 
#define ALT_RSTMGR_PERMODRST_DMA_MSB   28
 
#define ALT_RSTMGR_PERMODRST_DMA_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_DMA_SET_MSK   0x10000000
 
#define ALT_RSTMGR_PERMODRST_DMA_CLR_MSK   0xefffffff
 
#define ALT_RSTMGR_PERMODRST_DMA_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_DMA_GET(value)   (((value) & 0x10000000) >> 28)
 
#define ALT_RSTMGR_PERMODRST_DMA_SET(value)   (((value) << 28) & 0x10000000)
 

Field : SDRAM Controller Subsystem - sdr

Resets SDRAM Controller Subsystem affected by a warm or cold reset.

Field Access Macros:

#define ALT_RSTMGR_PERMODRST_SDR_LSB   29
 
#define ALT_RSTMGR_PERMODRST_SDR_MSB   29
 
#define ALT_RSTMGR_PERMODRST_SDR_WIDTH   1
 
#define ALT_RSTMGR_PERMODRST_SDR_SET_MSK   0x20000000
 
#define ALT_RSTMGR_PERMODRST_SDR_CLR_MSK   0xdfffffff
 
#define ALT_RSTMGR_PERMODRST_SDR_RESET   0x1
 
#define ALT_RSTMGR_PERMODRST_SDR_GET(value)   (((value) & 0x20000000) >> 29)
 
#define ALT_RSTMGR_PERMODRST_SDR_SET(value)   (((value) << 29) & 0x20000000)
 

Data Structures

struct  ALT_RSTMGR_PERMODRST_s
 

Macros

#define ALT_RSTMGR_PERMODRST_OFST   0x14
 

Typedefs

typedef struct
ALT_RSTMGR_PERMODRST_s 
ALT_RSTMGR_PERMODRST_t
 

Data Structure Documentation

struct ALT_RSTMGR_PERMODRST_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_RSTMGR_PERMODRST.

Data Fields
uint32_t emac0: 1 EMAC0
uint32_t emac1: 1 EMAC1
uint32_t usb0: 1 USB0
uint32_t usb1: 1 USB1
uint32_t nand: 1 NAND Flash
uint32_t qspi: 1 QSPI Flash
uint32_t l4wd0: 1 L4 Watchdog 0
uint32_t l4wd1: 1 L4 Watchdog 1
uint32_t osc1timer0: 1 OSC1 Timer 0
uint32_t osc1timer1: 1 OSC1 Timer 1
uint32_t sptimer0: 1 SP Timer 0
uint32_t sptimer1: 1 SP Timer 1
uint32_t i2c0: 1 I2C0
uint32_t i2c1: 1 I2C1
uint32_t i2c2: 1 I2C2
uint32_t i2c3: 1 I2C3
uint32_t uart0: 1 UART0
uint32_t uart1: 1 UART1
uint32_t spim0: 1 SPIM0
uint32_t spim1: 1 SPIM1
uint32_t spis0: 1 SPIS0
uint32_t spis1: 1 SPIS1
uint32_t sdmmc: 1 SD/MMC
uint32_t can0: 1 CAN0
uint32_t can1: 1 CAN1
uint32_t gpio0: 1 GPIO0
uint32_t gpio1: 1 GPIO1
uint32_t gpio2: 1 GPIO2
uint32_t dma: 1 DMA Controller
uint32_t sdr: 1 SDRAM Controller Subsystem
uint32_t __pad0__: 2 UNDEFINED

Macro Definitions

#define ALT_RSTMGR_PERMODRST_EMAC0_LSB   0

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_EMAC0 register field.

#define ALT_RSTMGR_PERMODRST_EMAC0_MSB   0

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_EMAC0 register field.

#define ALT_RSTMGR_PERMODRST_EMAC0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_EMAC0 register field.

#define ALT_RSTMGR_PERMODRST_EMAC0_SET_MSK   0x00000001

The mask used to set the ALT_RSTMGR_PERMODRST_EMAC0 register field value.

#define ALT_RSTMGR_PERMODRST_EMAC0_CLR_MSK   0xfffffffe

The mask used to clear the ALT_RSTMGR_PERMODRST_EMAC0 register field value.

#define ALT_RSTMGR_PERMODRST_EMAC0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_EMAC0 register field.

#define ALT_RSTMGR_PERMODRST_EMAC0_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_RSTMGR_PERMODRST_EMAC0 field value from a register.

#define ALT_RSTMGR_PERMODRST_EMAC0_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_RSTMGR_PERMODRST_EMAC0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_EMAC1_LSB   1

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_EMAC1 register field.

#define ALT_RSTMGR_PERMODRST_EMAC1_MSB   1

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_EMAC1 register field.

#define ALT_RSTMGR_PERMODRST_EMAC1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_EMAC1 register field.

#define ALT_RSTMGR_PERMODRST_EMAC1_SET_MSK   0x00000002

The mask used to set the ALT_RSTMGR_PERMODRST_EMAC1 register field value.

#define ALT_RSTMGR_PERMODRST_EMAC1_CLR_MSK   0xfffffffd

The mask used to clear the ALT_RSTMGR_PERMODRST_EMAC1 register field value.

#define ALT_RSTMGR_PERMODRST_EMAC1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_EMAC1 register field.

#define ALT_RSTMGR_PERMODRST_EMAC1_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_RSTMGR_PERMODRST_EMAC1 field value from a register.

#define ALT_RSTMGR_PERMODRST_EMAC1_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_RSTMGR_PERMODRST_EMAC1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_USB0_LSB   2

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_USB0 register field.

#define ALT_RSTMGR_PERMODRST_USB0_MSB   2

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_USB0 register field.

#define ALT_RSTMGR_PERMODRST_USB0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_USB0 register field.

#define ALT_RSTMGR_PERMODRST_USB0_SET_MSK   0x00000004

The mask used to set the ALT_RSTMGR_PERMODRST_USB0 register field value.

#define ALT_RSTMGR_PERMODRST_USB0_CLR_MSK   0xfffffffb

The mask used to clear the ALT_RSTMGR_PERMODRST_USB0 register field value.

#define ALT_RSTMGR_PERMODRST_USB0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_USB0 register field.

#define ALT_RSTMGR_PERMODRST_USB0_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_RSTMGR_PERMODRST_USB0 field value from a register.

#define ALT_RSTMGR_PERMODRST_USB0_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_RSTMGR_PERMODRST_USB0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_USB1_LSB   3

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_USB1 register field.

#define ALT_RSTMGR_PERMODRST_USB1_MSB   3

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_USB1 register field.

#define ALT_RSTMGR_PERMODRST_USB1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_USB1 register field.

#define ALT_RSTMGR_PERMODRST_USB1_SET_MSK   0x00000008

The mask used to set the ALT_RSTMGR_PERMODRST_USB1 register field value.

#define ALT_RSTMGR_PERMODRST_USB1_CLR_MSK   0xfffffff7

The mask used to clear the ALT_RSTMGR_PERMODRST_USB1 register field value.

#define ALT_RSTMGR_PERMODRST_USB1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_USB1 register field.

#define ALT_RSTMGR_PERMODRST_USB1_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_RSTMGR_PERMODRST_USB1 field value from a register.

#define ALT_RSTMGR_PERMODRST_USB1_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_RSTMGR_PERMODRST_USB1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_NAND_LSB   4

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_NAND register field.

#define ALT_RSTMGR_PERMODRST_NAND_MSB   4

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_NAND register field.

#define ALT_RSTMGR_PERMODRST_NAND_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_NAND register field.

#define ALT_RSTMGR_PERMODRST_NAND_SET_MSK   0x00000010

The mask used to set the ALT_RSTMGR_PERMODRST_NAND register field value.

#define ALT_RSTMGR_PERMODRST_NAND_CLR_MSK   0xffffffef

The mask used to clear the ALT_RSTMGR_PERMODRST_NAND register field value.

#define ALT_RSTMGR_PERMODRST_NAND_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_NAND register field.

#define ALT_RSTMGR_PERMODRST_NAND_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_RSTMGR_PERMODRST_NAND field value from a register.

#define ALT_RSTMGR_PERMODRST_NAND_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_RSTMGR_PERMODRST_NAND register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_QSPI_LSB   5

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_QSPI register field.

#define ALT_RSTMGR_PERMODRST_QSPI_MSB   5

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_QSPI register field.

#define ALT_RSTMGR_PERMODRST_QSPI_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_QSPI register field.

#define ALT_RSTMGR_PERMODRST_QSPI_SET_MSK   0x00000020

The mask used to set the ALT_RSTMGR_PERMODRST_QSPI register field value.

#define ALT_RSTMGR_PERMODRST_QSPI_CLR_MSK   0xffffffdf

The mask used to clear the ALT_RSTMGR_PERMODRST_QSPI register field value.

#define ALT_RSTMGR_PERMODRST_QSPI_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_QSPI register field.

#define ALT_RSTMGR_PERMODRST_QSPI_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_RSTMGR_PERMODRST_QSPI field value from a register.

#define ALT_RSTMGR_PERMODRST_QSPI_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_RSTMGR_PERMODRST_QSPI register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_L4WD0_LSB   6

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_L4WD0 register field.

#define ALT_RSTMGR_PERMODRST_L4WD0_MSB   6

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_L4WD0 register field.

#define ALT_RSTMGR_PERMODRST_L4WD0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_L4WD0 register field.

#define ALT_RSTMGR_PERMODRST_L4WD0_SET_MSK   0x00000040

The mask used to set the ALT_RSTMGR_PERMODRST_L4WD0 register field value.

#define ALT_RSTMGR_PERMODRST_L4WD0_CLR_MSK   0xffffffbf

The mask used to clear the ALT_RSTMGR_PERMODRST_L4WD0 register field value.

#define ALT_RSTMGR_PERMODRST_L4WD0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_L4WD0 register field.

#define ALT_RSTMGR_PERMODRST_L4WD0_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_RSTMGR_PERMODRST_L4WD0 field value from a register.

#define ALT_RSTMGR_PERMODRST_L4WD0_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_RSTMGR_PERMODRST_L4WD0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_L4WD1_LSB   7

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_L4WD1 register field.

#define ALT_RSTMGR_PERMODRST_L4WD1_MSB   7

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_L4WD1 register field.

#define ALT_RSTMGR_PERMODRST_L4WD1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_L4WD1 register field.

#define ALT_RSTMGR_PERMODRST_L4WD1_SET_MSK   0x00000080

The mask used to set the ALT_RSTMGR_PERMODRST_L4WD1 register field value.

#define ALT_RSTMGR_PERMODRST_L4WD1_CLR_MSK   0xffffff7f

The mask used to clear the ALT_RSTMGR_PERMODRST_L4WD1 register field value.

#define ALT_RSTMGR_PERMODRST_L4WD1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_L4WD1 register field.

#define ALT_RSTMGR_PERMODRST_L4WD1_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_RSTMGR_PERMODRST_L4WD1 field value from a register.

#define ALT_RSTMGR_PERMODRST_L4WD1_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_RSTMGR_PERMODRST_L4WD1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_LSB   8

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_OSC1TMR0 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_MSB   8

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_OSC1TMR0 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_OSC1TMR0 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_SET_MSK   0x00000100

The mask used to set the ALT_RSTMGR_PERMODRST_OSC1TMR0 register field value.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_CLR_MSK   0xfffffeff

The mask used to clear the ALT_RSTMGR_PERMODRST_OSC1TMR0 register field value.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_OSC1TMR0 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_RSTMGR_PERMODRST_OSC1TMR0 field value from a register.

#define ALT_RSTMGR_PERMODRST_OSC1TMR0_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_RSTMGR_PERMODRST_OSC1TMR0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_LSB   9

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_OSC1TMR1 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_MSB   9

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_OSC1TMR1 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_OSC1TMR1 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_SET_MSK   0x00000200

The mask used to set the ALT_RSTMGR_PERMODRST_OSC1TMR1 register field value.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_CLR_MSK   0xfffffdff

The mask used to clear the ALT_RSTMGR_PERMODRST_OSC1TMR1 register field value.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_OSC1TMR1 register field.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_GET (   value)    (((value) & 0x00000200) >> 9)

Extracts the ALT_RSTMGR_PERMODRST_OSC1TMR1 field value from a register.

#define ALT_RSTMGR_PERMODRST_OSC1TMR1_SET (   value)    (((value) << 9) & 0x00000200)

Produces a ALT_RSTMGR_PERMODRST_OSC1TMR1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SPTMR0_LSB   10

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SPTMR0 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR0_MSB   10

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SPTMR0 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SPTMR0 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR0_SET_MSK   0x00000400

The mask used to set the ALT_RSTMGR_PERMODRST_SPTMR0 register field value.

#define ALT_RSTMGR_PERMODRST_SPTMR0_CLR_MSK   0xfffffbff

The mask used to clear the ALT_RSTMGR_PERMODRST_SPTMR0 register field value.

#define ALT_RSTMGR_PERMODRST_SPTMR0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SPTMR0 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR0_GET (   value)    (((value) & 0x00000400) >> 10)

Extracts the ALT_RSTMGR_PERMODRST_SPTMR0 field value from a register.

#define ALT_RSTMGR_PERMODRST_SPTMR0_SET (   value)    (((value) << 10) & 0x00000400)

Produces a ALT_RSTMGR_PERMODRST_SPTMR0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SPTMR1_LSB   11

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SPTMR1 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR1_MSB   11

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SPTMR1 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SPTMR1 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR1_SET_MSK   0x00000800

The mask used to set the ALT_RSTMGR_PERMODRST_SPTMR1 register field value.

#define ALT_RSTMGR_PERMODRST_SPTMR1_CLR_MSK   0xfffff7ff

The mask used to clear the ALT_RSTMGR_PERMODRST_SPTMR1 register field value.

#define ALT_RSTMGR_PERMODRST_SPTMR1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SPTMR1 register field.

#define ALT_RSTMGR_PERMODRST_SPTMR1_GET (   value)    (((value) & 0x00000800) >> 11)

Extracts the ALT_RSTMGR_PERMODRST_SPTMR1 field value from a register.

#define ALT_RSTMGR_PERMODRST_SPTMR1_SET (   value)    (((value) << 11) & 0x00000800)

Produces a ALT_RSTMGR_PERMODRST_SPTMR1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_I2C0_LSB   12

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_I2C0 register field.

#define ALT_RSTMGR_PERMODRST_I2C0_MSB   12

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_I2C0 register field.

#define ALT_RSTMGR_PERMODRST_I2C0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_I2C0 register field.

#define ALT_RSTMGR_PERMODRST_I2C0_SET_MSK   0x00001000

The mask used to set the ALT_RSTMGR_PERMODRST_I2C0 register field value.

#define ALT_RSTMGR_PERMODRST_I2C0_CLR_MSK   0xffffefff

The mask used to clear the ALT_RSTMGR_PERMODRST_I2C0 register field value.

#define ALT_RSTMGR_PERMODRST_I2C0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_I2C0 register field.

#define ALT_RSTMGR_PERMODRST_I2C0_GET (   value)    (((value) & 0x00001000) >> 12)

Extracts the ALT_RSTMGR_PERMODRST_I2C0 field value from a register.

#define ALT_RSTMGR_PERMODRST_I2C0_SET (   value)    (((value) << 12) & 0x00001000)

Produces a ALT_RSTMGR_PERMODRST_I2C0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_I2C1_LSB   13

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_I2C1 register field.

#define ALT_RSTMGR_PERMODRST_I2C1_MSB   13

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_I2C1 register field.

#define ALT_RSTMGR_PERMODRST_I2C1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_I2C1 register field.

#define ALT_RSTMGR_PERMODRST_I2C1_SET_MSK   0x00002000

The mask used to set the ALT_RSTMGR_PERMODRST_I2C1 register field value.

#define ALT_RSTMGR_PERMODRST_I2C1_CLR_MSK   0xffffdfff

The mask used to clear the ALT_RSTMGR_PERMODRST_I2C1 register field value.

#define ALT_RSTMGR_PERMODRST_I2C1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_I2C1 register field.

#define ALT_RSTMGR_PERMODRST_I2C1_GET (   value)    (((value) & 0x00002000) >> 13)

Extracts the ALT_RSTMGR_PERMODRST_I2C1 field value from a register.

#define ALT_RSTMGR_PERMODRST_I2C1_SET (   value)    (((value) << 13) & 0x00002000)

Produces a ALT_RSTMGR_PERMODRST_I2C1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_I2C2_LSB   14

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_I2C2 register field.

#define ALT_RSTMGR_PERMODRST_I2C2_MSB   14

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_I2C2 register field.

#define ALT_RSTMGR_PERMODRST_I2C2_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_I2C2 register field.

#define ALT_RSTMGR_PERMODRST_I2C2_SET_MSK   0x00004000

The mask used to set the ALT_RSTMGR_PERMODRST_I2C2 register field value.

#define ALT_RSTMGR_PERMODRST_I2C2_CLR_MSK   0xffffbfff

The mask used to clear the ALT_RSTMGR_PERMODRST_I2C2 register field value.

#define ALT_RSTMGR_PERMODRST_I2C2_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_I2C2 register field.

#define ALT_RSTMGR_PERMODRST_I2C2_GET (   value)    (((value) & 0x00004000) >> 14)

Extracts the ALT_RSTMGR_PERMODRST_I2C2 field value from a register.

#define ALT_RSTMGR_PERMODRST_I2C2_SET (   value)    (((value) << 14) & 0x00004000)

Produces a ALT_RSTMGR_PERMODRST_I2C2 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_I2C3_LSB   15

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_I2C3 register field.

#define ALT_RSTMGR_PERMODRST_I2C3_MSB   15

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_I2C3 register field.

#define ALT_RSTMGR_PERMODRST_I2C3_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_I2C3 register field.

#define ALT_RSTMGR_PERMODRST_I2C3_SET_MSK   0x00008000

The mask used to set the ALT_RSTMGR_PERMODRST_I2C3 register field value.

#define ALT_RSTMGR_PERMODRST_I2C3_CLR_MSK   0xffff7fff

The mask used to clear the ALT_RSTMGR_PERMODRST_I2C3 register field value.

#define ALT_RSTMGR_PERMODRST_I2C3_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_I2C3 register field.

#define ALT_RSTMGR_PERMODRST_I2C3_GET (   value)    (((value) & 0x00008000) >> 15)

Extracts the ALT_RSTMGR_PERMODRST_I2C3 field value from a register.

#define ALT_RSTMGR_PERMODRST_I2C3_SET (   value)    (((value) << 15) & 0x00008000)

Produces a ALT_RSTMGR_PERMODRST_I2C3 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_UART0_LSB   16

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_UART0 register field.

#define ALT_RSTMGR_PERMODRST_UART0_MSB   16

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_UART0 register field.

#define ALT_RSTMGR_PERMODRST_UART0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_UART0 register field.

#define ALT_RSTMGR_PERMODRST_UART0_SET_MSK   0x00010000

The mask used to set the ALT_RSTMGR_PERMODRST_UART0 register field value.

#define ALT_RSTMGR_PERMODRST_UART0_CLR_MSK   0xfffeffff

The mask used to clear the ALT_RSTMGR_PERMODRST_UART0 register field value.

#define ALT_RSTMGR_PERMODRST_UART0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_UART0 register field.

#define ALT_RSTMGR_PERMODRST_UART0_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_RSTMGR_PERMODRST_UART0 field value from a register.

#define ALT_RSTMGR_PERMODRST_UART0_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_RSTMGR_PERMODRST_UART0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_UART1_LSB   17

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_UART1 register field.

#define ALT_RSTMGR_PERMODRST_UART1_MSB   17

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_UART1 register field.

#define ALT_RSTMGR_PERMODRST_UART1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_UART1 register field.

#define ALT_RSTMGR_PERMODRST_UART1_SET_MSK   0x00020000

The mask used to set the ALT_RSTMGR_PERMODRST_UART1 register field value.

#define ALT_RSTMGR_PERMODRST_UART1_CLR_MSK   0xfffdffff

The mask used to clear the ALT_RSTMGR_PERMODRST_UART1 register field value.

#define ALT_RSTMGR_PERMODRST_UART1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_UART1 register field.

#define ALT_RSTMGR_PERMODRST_UART1_GET (   value)    (((value) & 0x00020000) >> 17)

Extracts the ALT_RSTMGR_PERMODRST_UART1 field value from a register.

#define ALT_RSTMGR_PERMODRST_UART1_SET (   value)    (((value) << 17) & 0x00020000)

Produces a ALT_RSTMGR_PERMODRST_UART1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SPIM0_LSB   18

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SPIM0 register field.

#define ALT_RSTMGR_PERMODRST_SPIM0_MSB   18

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SPIM0 register field.

#define ALT_RSTMGR_PERMODRST_SPIM0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SPIM0 register field.

#define ALT_RSTMGR_PERMODRST_SPIM0_SET_MSK   0x00040000

The mask used to set the ALT_RSTMGR_PERMODRST_SPIM0 register field value.

#define ALT_RSTMGR_PERMODRST_SPIM0_CLR_MSK   0xfffbffff

The mask used to clear the ALT_RSTMGR_PERMODRST_SPIM0 register field value.

#define ALT_RSTMGR_PERMODRST_SPIM0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SPIM0 register field.

#define ALT_RSTMGR_PERMODRST_SPIM0_GET (   value)    (((value) & 0x00040000) >> 18)

Extracts the ALT_RSTMGR_PERMODRST_SPIM0 field value from a register.

#define ALT_RSTMGR_PERMODRST_SPIM0_SET (   value)    (((value) << 18) & 0x00040000)

Produces a ALT_RSTMGR_PERMODRST_SPIM0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SPIM1_LSB   19

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SPIM1 register field.

#define ALT_RSTMGR_PERMODRST_SPIM1_MSB   19

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SPIM1 register field.

#define ALT_RSTMGR_PERMODRST_SPIM1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SPIM1 register field.

#define ALT_RSTMGR_PERMODRST_SPIM1_SET_MSK   0x00080000

The mask used to set the ALT_RSTMGR_PERMODRST_SPIM1 register field value.

#define ALT_RSTMGR_PERMODRST_SPIM1_CLR_MSK   0xfff7ffff

The mask used to clear the ALT_RSTMGR_PERMODRST_SPIM1 register field value.

#define ALT_RSTMGR_PERMODRST_SPIM1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SPIM1 register field.

#define ALT_RSTMGR_PERMODRST_SPIM1_GET (   value)    (((value) & 0x00080000) >> 19)

Extracts the ALT_RSTMGR_PERMODRST_SPIM1 field value from a register.

#define ALT_RSTMGR_PERMODRST_SPIM1_SET (   value)    (((value) << 19) & 0x00080000)

Produces a ALT_RSTMGR_PERMODRST_SPIM1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SPIS0_LSB   20

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SPIS0 register field.

#define ALT_RSTMGR_PERMODRST_SPIS0_MSB   20

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SPIS0 register field.

#define ALT_RSTMGR_PERMODRST_SPIS0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SPIS0 register field.

#define ALT_RSTMGR_PERMODRST_SPIS0_SET_MSK   0x00100000

The mask used to set the ALT_RSTMGR_PERMODRST_SPIS0 register field value.

#define ALT_RSTMGR_PERMODRST_SPIS0_CLR_MSK   0xffefffff

The mask used to clear the ALT_RSTMGR_PERMODRST_SPIS0 register field value.

#define ALT_RSTMGR_PERMODRST_SPIS0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SPIS0 register field.

#define ALT_RSTMGR_PERMODRST_SPIS0_GET (   value)    (((value) & 0x00100000) >> 20)

Extracts the ALT_RSTMGR_PERMODRST_SPIS0 field value from a register.

#define ALT_RSTMGR_PERMODRST_SPIS0_SET (   value)    (((value) << 20) & 0x00100000)

Produces a ALT_RSTMGR_PERMODRST_SPIS0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SPIS1_LSB   21

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SPIS1 register field.

#define ALT_RSTMGR_PERMODRST_SPIS1_MSB   21

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SPIS1 register field.

#define ALT_RSTMGR_PERMODRST_SPIS1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SPIS1 register field.

#define ALT_RSTMGR_PERMODRST_SPIS1_SET_MSK   0x00200000

The mask used to set the ALT_RSTMGR_PERMODRST_SPIS1 register field value.

#define ALT_RSTMGR_PERMODRST_SPIS1_CLR_MSK   0xffdfffff

The mask used to clear the ALT_RSTMGR_PERMODRST_SPIS1 register field value.

#define ALT_RSTMGR_PERMODRST_SPIS1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SPIS1 register field.

#define ALT_RSTMGR_PERMODRST_SPIS1_GET (   value)    (((value) & 0x00200000) >> 21)

Extracts the ALT_RSTMGR_PERMODRST_SPIS1 field value from a register.

#define ALT_RSTMGR_PERMODRST_SPIS1_SET (   value)    (((value) << 21) & 0x00200000)

Produces a ALT_RSTMGR_PERMODRST_SPIS1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SDMMC_LSB   22

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SDMMC register field.

#define ALT_RSTMGR_PERMODRST_SDMMC_MSB   22

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SDMMC register field.

#define ALT_RSTMGR_PERMODRST_SDMMC_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SDMMC register field.

#define ALT_RSTMGR_PERMODRST_SDMMC_SET_MSK   0x00400000

The mask used to set the ALT_RSTMGR_PERMODRST_SDMMC register field value.

#define ALT_RSTMGR_PERMODRST_SDMMC_CLR_MSK   0xffbfffff

The mask used to clear the ALT_RSTMGR_PERMODRST_SDMMC register field value.

#define ALT_RSTMGR_PERMODRST_SDMMC_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SDMMC register field.

#define ALT_RSTMGR_PERMODRST_SDMMC_GET (   value)    (((value) & 0x00400000) >> 22)

Extracts the ALT_RSTMGR_PERMODRST_SDMMC field value from a register.

#define ALT_RSTMGR_PERMODRST_SDMMC_SET (   value)    (((value) << 22) & 0x00400000)

Produces a ALT_RSTMGR_PERMODRST_SDMMC register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_CAN0_LSB   23

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_CAN0 register field.

#define ALT_RSTMGR_PERMODRST_CAN0_MSB   23

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_CAN0 register field.

#define ALT_RSTMGR_PERMODRST_CAN0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_CAN0 register field.

#define ALT_RSTMGR_PERMODRST_CAN0_SET_MSK   0x00800000

The mask used to set the ALT_RSTMGR_PERMODRST_CAN0 register field value.

#define ALT_RSTMGR_PERMODRST_CAN0_CLR_MSK   0xff7fffff

The mask used to clear the ALT_RSTMGR_PERMODRST_CAN0 register field value.

#define ALT_RSTMGR_PERMODRST_CAN0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_CAN0 register field.

#define ALT_RSTMGR_PERMODRST_CAN0_GET (   value)    (((value) & 0x00800000) >> 23)

Extracts the ALT_RSTMGR_PERMODRST_CAN0 field value from a register.

#define ALT_RSTMGR_PERMODRST_CAN0_SET (   value)    (((value) << 23) & 0x00800000)

Produces a ALT_RSTMGR_PERMODRST_CAN0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_CAN1_LSB   24

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_CAN1 register field.

#define ALT_RSTMGR_PERMODRST_CAN1_MSB   24

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_CAN1 register field.

#define ALT_RSTMGR_PERMODRST_CAN1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_CAN1 register field.

#define ALT_RSTMGR_PERMODRST_CAN1_SET_MSK   0x01000000

The mask used to set the ALT_RSTMGR_PERMODRST_CAN1 register field value.

#define ALT_RSTMGR_PERMODRST_CAN1_CLR_MSK   0xfeffffff

The mask used to clear the ALT_RSTMGR_PERMODRST_CAN1 register field value.

#define ALT_RSTMGR_PERMODRST_CAN1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_CAN1 register field.

#define ALT_RSTMGR_PERMODRST_CAN1_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_RSTMGR_PERMODRST_CAN1 field value from a register.

#define ALT_RSTMGR_PERMODRST_CAN1_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_RSTMGR_PERMODRST_CAN1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_GPIO0_LSB   25

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_GPIO0 register field.

#define ALT_RSTMGR_PERMODRST_GPIO0_MSB   25

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_GPIO0 register field.

#define ALT_RSTMGR_PERMODRST_GPIO0_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_GPIO0 register field.

#define ALT_RSTMGR_PERMODRST_GPIO0_SET_MSK   0x02000000

The mask used to set the ALT_RSTMGR_PERMODRST_GPIO0 register field value.

#define ALT_RSTMGR_PERMODRST_GPIO0_CLR_MSK   0xfdffffff

The mask used to clear the ALT_RSTMGR_PERMODRST_GPIO0 register field value.

#define ALT_RSTMGR_PERMODRST_GPIO0_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_GPIO0 register field.

#define ALT_RSTMGR_PERMODRST_GPIO0_GET (   value)    (((value) & 0x02000000) >> 25)

Extracts the ALT_RSTMGR_PERMODRST_GPIO0 field value from a register.

#define ALT_RSTMGR_PERMODRST_GPIO0_SET (   value)    (((value) << 25) & 0x02000000)

Produces a ALT_RSTMGR_PERMODRST_GPIO0 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_GPIO1_LSB   26

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_GPIO1 register field.

#define ALT_RSTMGR_PERMODRST_GPIO1_MSB   26

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_GPIO1 register field.

#define ALT_RSTMGR_PERMODRST_GPIO1_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_GPIO1 register field.

#define ALT_RSTMGR_PERMODRST_GPIO1_SET_MSK   0x04000000

The mask used to set the ALT_RSTMGR_PERMODRST_GPIO1 register field value.

#define ALT_RSTMGR_PERMODRST_GPIO1_CLR_MSK   0xfbffffff

The mask used to clear the ALT_RSTMGR_PERMODRST_GPIO1 register field value.

#define ALT_RSTMGR_PERMODRST_GPIO1_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_GPIO1 register field.

#define ALT_RSTMGR_PERMODRST_GPIO1_GET (   value)    (((value) & 0x04000000) >> 26)

Extracts the ALT_RSTMGR_PERMODRST_GPIO1 field value from a register.

#define ALT_RSTMGR_PERMODRST_GPIO1_SET (   value)    (((value) << 26) & 0x04000000)

Produces a ALT_RSTMGR_PERMODRST_GPIO1 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_GPIO2_LSB   27

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_GPIO2 register field.

#define ALT_RSTMGR_PERMODRST_GPIO2_MSB   27

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_GPIO2 register field.

#define ALT_RSTMGR_PERMODRST_GPIO2_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_GPIO2 register field.

#define ALT_RSTMGR_PERMODRST_GPIO2_SET_MSK   0x08000000

The mask used to set the ALT_RSTMGR_PERMODRST_GPIO2 register field value.

#define ALT_RSTMGR_PERMODRST_GPIO2_CLR_MSK   0xf7ffffff

The mask used to clear the ALT_RSTMGR_PERMODRST_GPIO2 register field value.

#define ALT_RSTMGR_PERMODRST_GPIO2_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_GPIO2 register field.

#define ALT_RSTMGR_PERMODRST_GPIO2_GET (   value)    (((value) & 0x08000000) >> 27)

Extracts the ALT_RSTMGR_PERMODRST_GPIO2 field value from a register.

#define ALT_RSTMGR_PERMODRST_GPIO2_SET (   value)    (((value) << 27) & 0x08000000)

Produces a ALT_RSTMGR_PERMODRST_GPIO2 register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_DMA_LSB   28

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_DMA register field.

#define ALT_RSTMGR_PERMODRST_DMA_MSB   28

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_DMA register field.

#define ALT_RSTMGR_PERMODRST_DMA_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_DMA register field.

#define ALT_RSTMGR_PERMODRST_DMA_SET_MSK   0x10000000

The mask used to set the ALT_RSTMGR_PERMODRST_DMA register field value.

#define ALT_RSTMGR_PERMODRST_DMA_CLR_MSK   0xefffffff

The mask used to clear the ALT_RSTMGR_PERMODRST_DMA register field value.

#define ALT_RSTMGR_PERMODRST_DMA_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_DMA register field.

#define ALT_RSTMGR_PERMODRST_DMA_GET (   value)    (((value) & 0x10000000) >> 28)

Extracts the ALT_RSTMGR_PERMODRST_DMA field value from a register.

#define ALT_RSTMGR_PERMODRST_DMA_SET (   value)    (((value) << 28) & 0x10000000)

Produces a ALT_RSTMGR_PERMODRST_DMA register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_SDR_LSB   29

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PERMODRST_SDR register field.

#define ALT_RSTMGR_PERMODRST_SDR_MSB   29

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PERMODRST_SDR register field.

#define ALT_RSTMGR_PERMODRST_SDR_WIDTH   1

The width in bits of the ALT_RSTMGR_PERMODRST_SDR register field.

#define ALT_RSTMGR_PERMODRST_SDR_SET_MSK   0x20000000

The mask used to set the ALT_RSTMGR_PERMODRST_SDR register field value.

#define ALT_RSTMGR_PERMODRST_SDR_CLR_MSK   0xdfffffff

The mask used to clear the ALT_RSTMGR_PERMODRST_SDR register field value.

#define ALT_RSTMGR_PERMODRST_SDR_RESET   0x1

The reset value of the ALT_RSTMGR_PERMODRST_SDR register field.

#define ALT_RSTMGR_PERMODRST_SDR_GET (   value)    (((value) & 0x20000000) >> 29)

Extracts the ALT_RSTMGR_PERMODRST_SDR field value from a register.

#define ALT_RSTMGR_PERMODRST_SDR_SET (   value)    (((value) << 29) & 0x20000000)

Produces a ALT_RSTMGR_PERMODRST_SDR register field value suitable for setting the register.

#define ALT_RSTMGR_PERMODRST_OFST   0x14

The byte offset of the ALT_RSTMGR_PERMODRST register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_RSTMGR_PERMODRST.