Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Interrupt Enable Register - intren

Description

Contain fields that enable the interrupt.

Fields are only reset by a cold reset.

Register Layout

Bits Access Reset Description
[0] RW 0x0 Main PLL Achieved Lock Interrupt Enable
[1] RW 0x0 Peripheral PLL Achieved Lock Interrupt Enable
[2] RW 0x0 SDRAM PLL Achieved Lock Interrupt Enable
[3] RW 0x0 Main PLL Achieved Lock Interrupt Enable
[4] RW 0x0 Peripheral PLL Achieved Lock Interrupt Enable
[5] RW 0x0 SDRAM PLL Achieved Lock Interrupt Enable
[31:6] ??? 0x0 UNDEFINED

Field : Main PLL Achieved Lock Interrupt Enable - mainpllachieved

When set to 1, the Main PLL achieved lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Main PLL achieved lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_LSB   0
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_MSB   0
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_WIDTH   1
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_SET_MSK   0x00000001
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_CLR_MSK   0xfffffffe
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_RESET   0x0
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Peripheral PLL Achieved Lock Interrupt Enable - perpllachieved

When set to 1, the Peripheral PLL achieved lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Peripheral PLL achieved lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_LSB   1
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_MSB   1
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_WIDTH   1
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_SET_MSK   0x00000002
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_CLR_MSK   0xfffffffd
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_RESET   0x0
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_SET(value)   (((value) << 1) & 0x00000002)
 

Field : SDRAM PLL Achieved Lock Interrupt Enable - sdrpllachieved

When set to 1, the SDRAM PLL achieved lock bit is ORed into the Clock Manager interrupt output. When set to 0 the SDRAM PLL achieved lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_LSB   2
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_MSB   2
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_WIDTH   1
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_SET_MSK   0x00000004
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_CLR_MSK   0xfffffffb
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_RESET   0x0
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_SET(value)   (((value) << 2) & 0x00000004)
 

Field : Main PLL Achieved Lock Interrupt Enable - mainplllost

When set to 1, the Main PLL lost lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Main PLL lost lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_INTREN_MAINPLLLOST_LSB   3
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_MSB   3
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_WIDTH   1
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_SET_MSK   0x00000008
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_CLR_MSK   0xfffffff7
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_RESET   0x0
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_CLKMGR_INTREN_MAINPLLLOST_SET(value)   (((value) << 3) & 0x00000008)
 

Field : Peripheral PLL Achieved Lock Interrupt Enable - perplllost

When set to 1, the Peripheral PLL lost lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Peripheral PLL lost lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_INTREN_PERPLLLOST_LSB   4
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_MSB   4
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_WIDTH   1
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_SET_MSK   0x00000010
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_CLR_MSK   0xffffffef
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_RESET   0x0
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_CLKMGR_INTREN_PERPLLLOST_SET(value)   (((value) << 4) & 0x00000010)
 

Field : SDRAM PLL Achieved Lock Interrupt Enable - sdrplllost

When set to 1, the SDRAM PLL lost lock bit is ORed into the Clock Manager interrupt output. When set to 0 the SDRAM PLL lost lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_INTREN_SDRPLLLOST_LSB   5
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_MSB   5
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_WIDTH   1
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_SET_MSK   0x00000020
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_CLR_MSK   0xffffffdf
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_RESET   0x0
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_CLKMGR_INTREN_SDRPLLLOST_SET(value)   (((value) << 5) & 0x00000020)
 

Data Structures

struct  ALT_CLKMGR_INTREN_s
 

Macros

#define ALT_CLKMGR_INTREN_OFST   0xc
 

Typedefs

typedef struct ALT_CLKMGR_INTREN_s ALT_CLKMGR_INTREN_t
 

Data Structure Documentation

struct ALT_CLKMGR_INTREN_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_CLKMGR_INTREN.

Data Fields
uint32_t mainpllachieved: 1 Main PLL Achieved Lock Interrupt Enable
uint32_t perpllachieved: 1 Peripheral PLL Achieved Lock Interrupt Enable
uint32_t sdrpllachieved: 1 SDRAM PLL Achieved Lock Interrupt Enable
uint32_t mainplllost: 1 Main PLL Achieved Lock Interrupt Enable
uint32_t perplllost: 1 Peripheral PLL Achieved Lock Interrupt Enable
uint32_t sdrplllost: 1 SDRAM PLL Achieved Lock Interrupt Enable
uint32_t __pad0__: 26 UNDEFINED

Macro Definitions

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_LSB   0

The Least Significant Bit (LSB) position of the ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_MSB   0

The Most Significant Bit (MSB) position of the ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_WIDTH   1

The width in bits of the ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_SET_MSK   0x00000001

The mask used to set the ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field value.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_CLR_MSK   0xfffffffe

The mask used to clear the ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field value.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_RESET   0x0

The reset value of the ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_CLKMGR_INTREN_MAINPLLACHIEVED field value from a register.

#define ALT_CLKMGR_INTREN_MAINPLLACHIEVED_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_CLKMGR_INTREN_MAINPLLACHIEVED register field value suitable for setting the register.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_LSB   1

The Least Significant Bit (LSB) position of the ALT_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_MSB   1

The Most Significant Bit (MSB) position of the ALT_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_WIDTH   1

The width in bits of the ALT_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_SET_MSK   0x00000002

The mask used to set the ALT_CLKMGR_INTREN_PERPLLACHIEVED register field value.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_CLR_MSK   0xfffffffd

The mask used to clear the ALT_CLKMGR_INTREN_PERPLLACHIEVED register field value.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_RESET   0x0

The reset value of the ALT_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_CLKMGR_INTREN_PERPLLACHIEVED field value from a register.

#define ALT_CLKMGR_INTREN_PERPLLACHIEVED_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_CLKMGR_INTREN_PERPLLACHIEVED register field value suitable for setting the register.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_LSB   2

The Least Significant Bit (LSB) position of the ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_MSB   2

The Most Significant Bit (MSB) position of the ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_WIDTH   1

The width in bits of the ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_SET_MSK   0x00000004

The mask used to set the ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field value.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_CLR_MSK   0xfffffffb

The mask used to clear the ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field value.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_RESET   0x0

The reset value of the ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_CLKMGR_INTREN_SDRPLLACHIEVED field value from a register.

#define ALT_CLKMGR_INTREN_SDRPLLACHIEVED_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_CLKMGR_INTREN_SDRPLLACHIEVED register field value suitable for setting the register.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_LSB   3

The Least Significant Bit (LSB) position of the ALT_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_MSB   3

The Most Significant Bit (MSB) position of the ALT_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_WIDTH   1

The width in bits of the ALT_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_SET_MSK   0x00000008

The mask used to set the ALT_CLKMGR_INTREN_MAINPLLLOST register field value.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_CLR_MSK   0xfffffff7

The mask used to clear the ALT_CLKMGR_INTREN_MAINPLLLOST register field value.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_RESET   0x0

The reset value of the ALT_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_CLKMGR_INTREN_MAINPLLLOST field value from a register.

#define ALT_CLKMGR_INTREN_MAINPLLLOST_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_CLKMGR_INTREN_MAINPLLLOST register field value suitable for setting the register.

#define ALT_CLKMGR_INTREN_PERPLLLOST_LSB   4

The Least Significant Bit (LSB) position of the ALT_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_INTREN_PERPLLLOST_MSB   4

The Most Significant Bit (MSB) position of the ALT_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_INTREN_PERPLLLOST_WIDTH   1

The width in bits of the ALT_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_INTREN_PERPLLLOST_SET_MSK   0x00000010

The mask used to set the ALT_CLKMGR_INTREN_PERPLLLOST register field value.

#define ALT_CLKMGR_INTREN_PERPLLLOST_CLR_MSK   0xffffffef

The mask used to clear the ALT_CLKMGR_INTREN_PERPLLLOST register field value.

#define ALT_CLKMGR_INTREN_PERPLLLOST_RESET   0x0

The reset value of the ALT_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_INTREN_PERPLLLOST_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_CLKMGR_INTREN_PERPLLLOST field value from a register.

#define ALT_CLKMGR_INTREN_PERPLLLOST_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_CLKMGR_INTREN_PERPLLLOST register field value suitable for setting the register.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_LSB   5

The Least Significant Bit (LSB) position of the ALT_CLKMGR_INTREN_SDRPLLLOST register field.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_MSB   5

The Most Significant Bit (MSB) position of the ALT_CLKMGR_INTREN_SDRPLLLOST register field.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_WIDTH   1

The width in bits of the ALT_CLKMGR_INTREN_SDRPLLLOST register field.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_SET_MSK   0x00000020

The mask used to set the ALT_CLKMGR_INTREN_SDRPLLLOST register field value.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_CLR_MSK   0xffffffdf

The mask used to clear the ALT_CLKMGR_INTREN_SDRPLLLOST register field value.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_RESET   0x0

The reset value of the ALT_CLKMGR_INTREN_SDRPLLLOST register field.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_CLKMGR_INTREN_SDRPLLLOST field value from a register.

#define ALT_CLKMGR_INTREN_SDRPLLLOST_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_CLKMGR_INTREN_SDRPLLLOST register field value suitable for setting the register.

#define ALT_CLKMGR_INTREN_OFST   0xc

The byte offset of the ALT_CLKMGR_INTREN register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_CLKMGR_INTREN.