Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : DMA Control - ic_dma_cr

Description

The register is used to enable the DMA Controller interface operation. There is a separate bit for transmit and receive. This can be programmed regardless of the state of IC_ENABLE.

Register Layout

Bits Access Reset Description
[0] RW 0x0 Receive DMA Enable Bit
[1] RW 0x0 Transmit DMA Enable Bit
[31:2] ??? 0x0 UNDEFINED

Field : Receive DMA Enable Bit - rdmae

This bit enables/disables the receive FIFO DMA channel.

Field Enumeration Values:

Enum Value Description
ALT_I2C_DMA_CR_RDMAE_E_DIS 0x0 Receive DMA disable
ALT_I2C_DMA_CR_RDMAE_E_EN 0x1 Receive DMA enabled

Field Access Macros:

#define ALT_I2C_DMA_CR_RDMAE_E_DIS   0x0
 
#define ALT_I2C_DMA_CR_RDMAE_E_EN   0x1
 
#define ALT_I2C_DMA_CR_RDMAE_LSB   0
 
#define ALT_I2C_DMA_CR_RDMAE_MSB   0
 
#define ALT_I2C_DMA_CR_RDMAE_WIDTH   1
 
#define ALT_I2C_DMA_CR_RDMAE_SET_MSK   0x00000001
 
#define ALT_I2C_DMA_CR_RDMAE_CLR_MSK   0xfffffffe
 
#define ALT_I2C_DMA_CR_RDMAE_RESET   0x0
 
#define ALT_I2C_DMA_CR_RDMAE_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_I2C_DMA_CR_RDMAE_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Transmit DMA Enable Bit - tdmae

This bit enables/disables the transmit FIFO DMA channel.

Field Enumeration Values:

Enum Value Description
ALT_I2C_DMA_CR_TDMAE_E_DIS 0x0 Transmit DMA disable
ALT_I2C_DMA_CR_TDMAE_E_EN 0x1 Transmit DMA enabled

Field Access Macros:

#define ALT_I2C_DMA_CR_TDMAE_E_DIS   0x0
 
#define ALT_I2C_DMA_CR_TDMAE_E_EN   0x1
 
#define ALT_I2C_DMA_CR_TDMAE_LSB   1
 
#define ALT_I2C_DMA_CR_TDMAE_MSB   1
 
#define ALT_I2C_DMA_CR_TDMAE_WIDTH   1
 
#define ALT_I2C_DMA_CR_TDMAE_SET_MSK   0x00000002
 
#define ALT_I2C_DMA_CR_TDMAE_CLR_MSK   0xfffffffd
 
#define ALT_I2C_DMA_CR_TDMAE_RESET   0x0
 
#define ALT_I2C_DMA_CR_TDMAE_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_I2C_DMA_CR_TDMAE_SET(value)   (((value) << 1) & 0x00000002)
 

Data Structures

struct  ALT_I2C_DMA_CR_s
 

Macros

#define ALT_I2C_DMA_CR_OFST   0x88
 
#define ALT_I2C_DMA_CR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_CR_OFST))
 

Typedefs

typedef struct ALT_I2C_DMA_CR_s ALT_I2C_DMA_CR_t
 

Data Structure Documentation

struct ALT_I2C_DMA_CR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_I2C_DMA_CR.

Data Fields
uint32_t rdmae: 1 Receive DMA Enable Bit
uint32_t tdmae: 1 Transmit DMA Enable Bit
uint32_t __pad0__: 30 UNDEFINED

Macro Definitions

#define ALT_I2C_DMA_CR_RDMAE_E_DIS   0x0

Enumerated value for register field ALT_I2C_DMA_CR_RDMAE

Receive DMA disable

#define ALT_I2C_DMA_CR_RDMAE_E_EN   0x1

Enumerated value for register field ALT_I2C_DMA_CR_RDMAE

Receive DMA enabled

#define ALT_I2C_DMA_CR_RDMAE_LSB   0

The Least Significant Bit (LSB) position of the ALT_I2C_DMA_CR_RDMAE register field.

#define ALT_I2C_DMA_CR_RDMAE_MSB   0

The Most Significant Bit (MSB) position of the ALT_I2C_DMA_CR_RDMAE register field.

#define ALT_I2C_DMA_CR_RDMAE_WIDTH   1

The width in bits of the ALT_I2C_DMA_CR_RDMAE register field.

#define ALT_I2C_DMA_CR_RDMAE_SET_MSK   0x00000001

The mask used to set the ALT_I2C_DMA_CR_RDMAE register field value.

#define ALT_I2C_DMA_CR_RDMAE_CLR_MSK   0xfffffffe

The mask used to clear the ALT_I2C_DMA_CR_RDMAE register field value.

#define ALT_I2C_DMA_CR_RDMAE_RESET   0x0

The reset value of the ALT_I2C_DMA_CR_RDMAE register field.

#define ALT_I2C_DMA_CR_RDMAE_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_I2C_DMA_CR_RDMAE field value from a register.

#define ALT_I2C_DMA_CR_RDMAE_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_I2C_DMA_CR_RDMAE register field value suitable for setting the register.

#define ALT_I2C_DMA_CR_TDMAE_E_DIS   0x0

Enumerated value for register field ALT_I2C_DMA_CR_TDMAE

Transmit DMA disable

#define ALT_I2C_DMA_CR_TDMAE_E_EN   0x1

Enumerated value for register field ALT_I2C_DMA_CR_TDMAE

Transmit DMA enabled

#define ALT_I2C_DMA_CR_TDMAE_LSB   1

The Least Significant Bit (LSB) position of the ALT_I2C_DMA_CR_TDMAE register field.

#define ALT_I2C_DMA_CR_TDMAE_MSB   1

The Most Significant Bit (MSB) position of the ALT_I2C_DMA_CR_TDMAE register field.

#define ALT_I2C_DMA_CR_TDMAE_WIDTH   1

The width in bits of the ALT_I2C_DMA_CR_TDMAE register field.

#define ALT_I2C_DMA_CR_TDMAE_SET_MSK   0x00000002

The mask used to set the ALT_I2C_DMA_CR_TDMAE register field value.

#define ALT_I2C_DMA_CR_TDMAE_CLR_MSK   0xfffffffd

The mask used to clear the ALT_I2C_DMA_CR_TDMAE register field value.

#define ALT_I2C_DMA_CR_TDMAE_RESET   0x0

The reset value of the ALT_I2C_DMA_CR_TDMAE register field.

#define ALT_I2C_DMA_CR_TDMAE_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_I2C_DMA_CR_TDMAE field value from a register.

#define ALT_I2C_DMA_CR_TDMAE_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_I2C_DMA_CR_TDMAE register field value suitable for setting the register.

#define ALT_I2C_DMA_CR_OFST   0x88

The byte offset of the ALT_I2C_DMA_CR register from the beginning of the component.

#define ALT_I2C_DMA_CR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_CR_OFST))

The address of the ALT_I2C_DMA_CR register.

Typedef Documentation

The typedef declaration for register ALT_I2C_DMA_CR.