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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Device Configuration Register
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[1:0] | RW | 0x0 | ALT_USB_DEV_DCFG_DEVSPD |
[2] | RW | 0x0 | ALT_USB_DEV_DCFG_NZSTSOUTHSHK |
[3] | RW | 0x0 | ALT_USB_DEV_DCFG_ENA32KHZSUSP |
[10:4] | RW | 0x0 | ALT_USB_DEV_DCFG_DEVADDR |
[12:11] | RW | 0x0 | ALT_USB_DEV_DCFG_PERFRINT |
[13] | RW | 0x0 | ALT_USB_DEV_DCFG_ENDEVOUTNAK |
[14] | RW | 0x0 | ALT_USB_DEV_DCFG_XCVRDLY |
[15] | RW | 0x0 | ALT_USB_DEV_DCFG_ERRATICINTMSK |
[22:16] | ??? | 0x20 | UNDEFINED |
[23] | RW | 0x0 | ALT_USB_DEV_DCFG_DESCDMA |
[25:24] | RW | 0x0 | ALT_USB_DEV_DCFG_PERSCHINTVL |
[31:26] | RW | 0x2 | ALT_USB_DEV_DCFG_RESVALID |
Field : devspd | ||||||||||||||||
Device Speed (DevSpd) Indicates the speed at which the application requires the core to enumerate, or the maximum speed the application can support. However, the actual bus speed is determined only after the chirp sequence is completed, and is based on the speed of the USB host to which the core is connected. See “Device Initialization” 2'b00: High speed (USB 2.0 PHY clock is 30 MHz or 60 MHz) 2'b01: Full speed (USB 2.0 PHY clock is 30 MHz or 60 MHz) 2'b10: Low speed (USB 1.1 transceiver clock is 6 MHz). If you select 6 MHz LS mode, you must do a soft reset. 2'b11: Full speed (USB 1.1 transceiver clock is 48 MHz) Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_E_USBHS20 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_E_USBFS20 0x1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_E_USBLS116 0x2 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_E_USBLS1148 0x3 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_LSB 0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_MSB 1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_WIDTH 2 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_SET_MSK 0x00000003 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_CLR_MSK 0xfffffffc | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_RESET 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_GET(value) (((value) & 0x00000003) >> 0) | |||||||||||||||
#define | ALT_USB_DEV_DCFG_DEVSPD_SET(value) (((value) << 0) & 0x00000003) | |||||||||||||||
Field : nzstsouthshk | |||||||||||||||||||
Non-Zero-Length Status OUT Handshake (NZStsOUTHShk) The application can use this field to select the handshake the core sends on receiving a nonzero-length data packet during the OUT transaction of a control transfer's Status stage. 1'b1: Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application. 1'b0: Send the received OUT packet to the application (zerolength or nonzero-length) and send a handshake based on the NAK and STALL bits For the endpoint in the Device Endpoint Control register. Field Enumeration Values:
Field Access Macros: | |||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDOUT 0x0 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDSTALL 0x1 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_LSB 2 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_MSB 2 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_WIDTH 1 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_SET_MSK 0x00000004 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_CLR_MSK 0xfffffffb | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_RESET 0x0 | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_GET(value) (((value) & 0x00000004) >> 2) | ||||||||||||||||||
#define | ALT_USB_DEV_DCFG_NZSTSOUTHSHK_SET(value) (((value) << 2) & 0x00000004) | ||||||||||||||||||
Field : ena32khzsusp | ||||||||||||||||
Enable 32 KHz Suspend mode (Ena32KHzSusp) This bit can be set only if FS PHY interface is selected. Else, this bit needs to be set to zero. When FS PHY interface is chosen and this bit is set, the core expects that the PHY clock during Suspend is switched from 48 MHz to 32 KHz. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_DISD 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_END 0x1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_LSB 3 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_MSB 3 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_WIDTH 1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_SET_MSK 0x00000008 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_CLR_MSK 0xfffffff7 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_RESET 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_GET(value) (((value) & 0x00000008) >> 3) | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENA32KHZSUSP_SET(value) (((value) << 3) & 0x00000008) | |||||||||||||||
Field : devaddr | |
Device Address (DevAddr) The application must program this field after every SetAddress control command. Field Access Macros: | |
#define | ALT_USB_DEV_DCFG_DEVADDR_LSB 4 |
#define | ALT_USB_DEV_DCFG_DEVADDR_MSB 10 |
#define | ALT_USB_DEV_DCFG_DEVADDR_WIDTH 7 |
#define | ALT_USB_DEV_DCFG_DEVADDR_SET_MSK 0x000007f0 |
#define | ALT_USB_DEV_DCFG_DEVADDR_CLR_MSK 0xfffff80f |
#define | ALT_USB_DEV_DCFG_DEVADDR_RESET 0x0 |
#define | ALT_USB_DEV_DCFG_DEVADDR_GET(value) (((value) & 0x000007f0) >> 4) |
#define | ALT_USB_DEV_DCFG_DEVADDR_SET(value) (((value) << 4) & 0x000007f0) |
Field : perfrint | ||||||||||||||||
Periodic Frame Interval (PerFrInt) Indicates the time within a (micro)frame at which the application must be notified using the End Of Periodic Frame Interrupt. This can be used to determine If all the isochronous traffic For that (micro)frame is complete. 2'b00: 80% of the (micro)frame interval 2'b01: 85% 2'b10: 90% 2'b11: 95% Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_E_EOPF80 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_E_EOPF85 0x1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_E_EOPF90 0x2 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_E_EOPF95 0x3 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_LSB 11 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_MSB 12 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_WIDTH 2 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_SET_MSK 0x00001800 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_CLR_MSK 0xffffe7ff | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_RESET 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_GET(value) (((value) & 0x00001800) >> 11) | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERFRINT_SET(value) (((value) << 11) & 0x00001800) | |||||||||||||||
Field : endevoutnak | ||||||||||||||||
Enable Device OUT NAK (EnDevOutNak) This bit enables setting NAK for Bulk OUT endpoints after the transfer is completed for Device mode Descriptor DMA 1'b0 : The core does not set NAK after Bulk OUT transfer complete 1'b1 : The core sets NAK after Bulk OUT transfer complete It is one time programmable after reset like any other DCFG register bits. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_DISD 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_END 0x1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_LSB 13 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_MSB 13 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_WIDTH 1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_SET_MSK 0x00002000 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_CLR_MSK 0xffffdfff | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_RESET 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_GET(value) (((value) & 0x00002000) >> 13) | |||||||||||||||
#define | ALT_USB_DEV_DCFG_ENDEVOUTNAK_SET(value) (((value) << 13) & 0x00002000) | |||||||||||||||
Field : xcvrdly | |
1'b1: Enable delay between xcvr_sel and txvalid during Device chirp 1'b0: No delay between xcvr_sel and txvalid during Device chirp Field Access Macros: | |
#define | ALT_USB_DEV_DCFG_XCVRDLY_LSB 14 |
#define | ALT_USB_DEV_DCFG_XCVRDLY_MSB 14 |
#define | ALT_USB_DEV_DCFG_XCVRDLY_WIDTH 1 |
#define | ALT_USB_DEV_DCFG_XCVRDLY_SET_MSK 0x00004000 |
#define | ALT_USB_DEV_DCFG_XCVRDLY_CLR_MSK 0xffffbfff |
#define | ALT_USB_DEV_DCFG_XCVRDLY_RESET 0x0 |
#define | ALT_USB_DEV_DCFG_XCVRDLY_GET(value) (((value) & 0x00004000) >> 14) |
#define | ALT_USB_DEV_DCFG_XCVRDLY_SET(value) (((value) << 14) & 0x00004000) |
Field : erraticintmsk | |
Erratic Error Interrupt Mask 1'b1: Mask early suspend interrupt on erratic error 1'b0: Early suspend interrupt is generated on erratic error Field Access Macros: | |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_LSB 15 |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_MSB 15 |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_WIDTH 1 |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_SET_MSK 0x00008000 |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_CLR_MSK 0xffff7fff |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_RESET 0x0 |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_GET(value) (((value) & 0x00008000) >> 15) |
#define | ALT_USB_DEV_DCFG_ERRATICINTMSK_SET(value) (((value) << 15) & 0x00008000) |
Field : descdma | ||||||||||
Enable Scatter/gather DMA in device mode (DescDMA). When the Scatter/Gather DMA option selected during configuration of the RTL, the application can Set this bit during initialization to enable the Scatter/Gather DMA operation. NOTE: This bit must be modified only once after a reset. The following combinations are available For programming: GAHBCFG.DMAEn=0,DCFG.DescDMA=0 => Slave mode GAHBCFG.DMAEn=0,DCFG.DescDMA=1 => Invalid GAHBCFG.DMAEn=1,DCFG.DescDMA=0 => Buffered DMA mode GAHBCFG.DMAEn=1,DCFG.DescDMA=1 => Scatter/Gather DMA mode Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_E_DISD 0x0 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_E_END 0x1 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_LSB 23 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_MSB 23 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_WIDTH 1 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_SET_MSK 0x00800000 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_CLR_MSK 0xff7fffff | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_RESET 0x0 | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_GET(value) (((value) & 0x00800000) >> 23) | |||||||||
#define | ALT_USB_DEV_DCFG_DESCDMA_SET(value) (((value) << 23) & 0x00800000) | |||||||||
Field : perschintvl | ||||||||||||||||
Periodic Scheduling Interval (PerSchIntvl) PerSchIntvl must be programmed only For Scatter/Gather DMA mode. Description: This field specifies the amount of time the Internal DMA engine must allocate For fetching periodic IN endpoint data. Based on the number of periodic endpoints, this value must be specified as 25,50 or 75% of (micro)frame. When any periodic endpoints are active, the internal DMA engine allocates the specified amount of time in fetching periodic IN endpoint data . When no periodic endpoints are active, Then the internal DMA engine services non-periodic endpoints, ignoring this field. After the specified time within a (micro)frame, the DMA switches to fetching For non-periodic endpoints. 2'b00: 25% of (micro)frame. 2'b01: 50% of (micro)frame. 2'b10: 75% of (micro)frame. 2'b11: Reserved. Reset: 2'b00 Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF25 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF50 0x1 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF75 0x2 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_E_RSVD 0x3 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_LSB 24 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_MSB 25 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_WIDTH 2 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_SET_MSK 0x03000000 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_CLR_MSK 0xfcffffff | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_RESET 0x0 | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_GET(value) (((value) & 0x03000000) >> 24) | |||||||||||||||
#define | ALT_USB_DEV_DCFG_PERSCHINTVL_SET(value) (((value) << 24) & 0x03000000) | |||||||||||||||
Field : resvalid | |
Resume Validation Period (ResValid) This field is effective only when DCFG.Ena32KHzSusp is set. It will control the resume period when the core resumes from suspend. The core counts for “ResValid” number of clock cycles to detect a valid resume when this is set Field Access Macros: | |
#define | ALT_USB_DEV_DCFG_RESVALID_LSB 26 |
#define | ALT_USB_DEV_DCFG_RESVALID_MSB 31 |
#define | ALT_USB_DEV_DCFG_RESVALID_WIDTH 6 |
#define | ALT_USB_DEV_DCFG_RESVALID_SET_MSK 0xfc000000 |
#define | ALT_USB_DEV_DCFG_RESVALID_CLR_MSK 0x03ffffff |
#define | ALT_USB_DEV_DCFG_RESVALID_RESET 0x2 |
#define | ALT_USB_DEV_DCFG_RESVALID_GET(value) (((value) & 0xfc000000) >> 26) |
#define | ALT_USB_DEV_DCFG_RESVALID_SET(value) (((value) << 26) & 0xfc000000) |
Data Structures | |
struct | ALT_USB_DEV_DCFG_s |
Macros | |
#define | ALT_USB_DEV_DCFG_RESET 0x08200000 |
#define | ALT_USB_DEV_DCFG_OFST 0x0 |
#define | ALT_USB_DEV_DCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DCFG_OFST)) |
Typedefs | |
typedef struct ALT_USB_DEV_DCFG_s | ALT_USB_DEV_DCFG_t |
struct ALT_USB_DEV_DCFG_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_USB_DEV_DCFG.
Data Fields | ||
---|---|---|
uint32_t | devspd: 2 | ALT_USB_DEV_DCFG_DEVSPD |
uint32_t | nzstsouthshk: 1 | ALT_USB_DEV_DCFG_NZSTSOUTHSHK |
uint32_t | ena32khzsusp: 1 | ALT_USB_DEV_DCFG_ENA32KHZSUSP |
uint32_t | devaddr: 7 | ALT_USB_DEV_DCFG_DEVADDR |
uint32_t | perfrint: 2 | ALT_USB_DEV_DCFG_PERFRINT |
uint32_t | endevoutnak: 1 | ALT_USB_DEV_DCFG_ENDEVOUTNAK |
uint32_t | xcvrdly: 1 | ALT_USB_DEV_DCFG_XCVRDLY |
uint32_t | erraticintmsk: 1 | ALT_USB_DEV_DCFG_ERRATICINTMSK |
uint32_t | __pad0__: 7 | UNDEFINED |
uint32_t | descdma: 1 | ALT_USB_DEV_DCFG_DESCDMA |
uint32_t | perschintvl: 2 | ALT_USB_DEV_DCFG_PERSCHINTVL |
uint32_t | resvalid: 6 | ALT_USB_DEV_DCFG_RESVALID |
#define ALT_USB_DEV_DCFG_DEVSPD_E_USBHS20 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
High speed USB 2.0 PHY clock is 30 MHz or 60 MHz
#define ALT_USB_DEV_DCFG_DEVSPD_E_USBFS20 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
Full speed USB 2.0 PHY clock is 30 MHz or 60 MHz
#define ALT_USB_DEV_DCFG_DEVSPD_E_USBLS116 0x2 |
Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
Low speed USB 1.1 transceiver clock is 6 MHz
#define ALT_USB_DEV_DCFG_DEVSPD_E_USBLS1148 0x3 |
Enumerated value for register field ALT_USB_DEV_DCFG_DEVSPD
Full speed USB 1.1 transceiver clock is 48 MHz
#define ALT_USB_DEV_DCFG_DEVSPD_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_DEVSPD register field.
#define ALT_USB_DEV_DCFG_DEVSPD_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_DEVSPD register field.
#define ALT_USB_DEV_DCFG_DEVSPD_WIDTH 2 |
The width in bits of the ALT_USB_DEV_DCFG_DEVSPD register field.
#define ALT_USB_DEV_DCFG_DEVSPD_SET_MSK 0x00000003 |
The mask used to set the ALT_USB_DEV_DCFG_DEVSPD register field value.
#define ALT_USB_DEV_DCFG_DEVSPD_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_USB_DEV_DCFG_DEVSPD register field value.
#define ALT_USB_DEV_DCFG_DEVSPD_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_DEVSPD register field.
#define ALT_USB_DEV_DCFG_DEVSPD_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_USB_DEV_DCFG_DEVSPD field value from a register.
#define ALT_USB_DEV_DCFG_DEVSPD_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_USB_DEV_DCFG_DEVSPD register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDOUT 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_NZSTSOUTHSHK
Send the received OUT packet to the application zerolength
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_E_SENDSTALL 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_NZSTSOUTHSHK
Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_SET_MSK 0x00000004 |
The mask used to set the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field value.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field value.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_USB_DEV_DCFG_NZSTSOUTHSHK field value from a register.
#define ALT_USB_DEV_DCFG_NZSTSOUTHSHK_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_USB_DEV_DCFG_NZSTSOUTHSHK register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_DISD 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_ENA32KHZSUSP
USB 1.1 Full-Speed Serial Transceiver not selected
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_E_END 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_ENA32KHZSUSP
USB 1.1 Full-Speed Serial Transceiver Interface selected
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_SET_MSK 0x00000008 |
The mask used to set the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field value.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field value.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_ENA32KHZSUSP register field.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_USB_DEV_DCFG_ENA32KHZSUSP field value from a register.
#define ALT_USB_DEV_DCFG_ENA32KHZSUSP_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_USB_DEV_DCFG_ENA32KHZSUSP register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_DEVADDR_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_DEVADDR register field.
#define ALT_USB_DEV_DCFG_DEVADDR_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_DEVADDR register field.
#define ALT_USB_DEV_DCFG_DEVADDR_WIDTH 7 |
The width in bits of the ALT_USB_DEV_DCFG_DEVADDR register field.
#define ALT_USB_DEV_DCFG_DEVADDR_SET_MSK 0x000007f0 |
The mask used to set the ALT_USB_DEV_DCFG_DEVADDR register field value.
#define ALT_USB_DEV_DCFG_DEVADDR_CLR_MSK 0xfffff80f |
The mask used to clear the ALT_USB_DEV_DCFG_DEVADDR register field value.
#define ALT_USB_DEV_DCFG_DEVADDR_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_DEVADDR register field.
#define ALT_USB_DEV_DCFG_DEVADDR_GET | ( | value | ) | (((value) & 0x000007f0) >> 4) |
Extracts the ALT_USB_DEV_DCFG_DEVADDR field value from a register.
#define ALT_USB_DEV_DCFG_DEVADDR_SET | ( | value | ) | (((value) << 4) & 0x000007f0) |
Produces a ALT_USB_DEV_DCFG_DEVADDR register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF80 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
80% of the (micro)frame interval
#define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF85 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
85% of the (micro)frame interval
#define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF90 0x2 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
90% of the (micro)frame interval
#define ALT_USB_DEV_DCFG_PERFRINT_E_EOPF95 0x3 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERFRINT
95% of the (micro)frame interval
#define ALT_USB_DEV_DCFG_PERFRINT_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_PERFRINT register field.
#define ALT_USB_DEV_DCFG_PERFRINT_MSB 12 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_PERFRINT register field.
#define ALT_USB_DEV_DCFG_PERFRINT_WIDTH 2 |
The width in bits of the ALT_USB_DEV_DCFG_PERFRINT register field.
#define ALT_USB_DEV_DCFG_PERFRINT_SET_MSK 0x00001800 |
The mask used to set the ALT_USB_DEV_DCFG_PERFRINT register field value.
#define ALT_USB_DEV_DCFG_PERFRINT_CLR_MSK 0xffffe7ff |
The mask used to clear the ALT_USB_DEV_DCFG_PERFRINT register field value.
#define ALT_USB_DEV_DCFG_PERFRINT_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_PERFRINT register field.
#define ALT_USB_DEV_DCFG_PERFRINT_GET | ( | value | ) | (((value) & 0x00001800) >> 11) |
Extracts the ALT_USB_DEV_DCFG_PERFRINT field value from a register.
#define ALT_USB_DEV_DCFG_PERFRINT_SET | ( | value | ) | (((value) << 11) & 0x00001800) |
Produces a ALT_USB_DEV_DCFG_PERFRINT register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_DISD 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_ENDEVOUTNAK
The core does not set NAK after Bulk OUT transfer complete
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_E_END 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_ENDEVOUTNAK
The core sets NAK after Bulk OUT transfer complete
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_LSB 13 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_MSB 13 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_SET_MSK 0x00002000 |
The mask used to set the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field value.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_CLR_MSK 0xffffdfff |
The mask used to clear the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field value.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_ENDEVOUTNAK register field.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_GET | ( | value | ) | (((value) & 0x00002000) >> 13) |
Extracts the ALT_USB_DEV_DCFG_ENDEVOUTNAK field value from a register.
#define ALT_USB_DEV_DCFG_ENDEVOUTNAK_SET | ( | value | ) | (((value) << 13) & 0x00002000) |
Produces a ALT_USB_DEV_DCFG_ENDEVOUTNAK register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_XCVRDLY_LSB 14 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_XCVRDLY register field.
#define ALT_USB_DEV_DCFG_XCVRDLY_MSB 14 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_XCVRDLY register field.
#define ALT_USB_DEV_DCFG_XCVRDLY_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DCFG_XCVRDLY register field.
#define ALT_USB_DEV_DCFG_XCVRDLY_SET_MSK 0x00004000 |
The mask used to set the ALT_USB_DEV_DCFG_XCVRDLY register field value.
#define ALT_USB_DEV_DCFG_XCVRDLY_CLR_MSK 0xffffbfff |
The mask used to clear the ALT_USB_DEV_DCFG_XCVRDLY register field value.
#define ALT_USB_DEV_DCFG_XCVRDLY_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_XCVRDLY register field.
#define ALT_USB_DEV_DCFG_XCVRDLY_GET | ( | value | ) | (((value) & 0x00004000) >> 14) |
Extracts the ALT_USB_DEV_DCFG_XCVRDLY field value from a register.
#define ALT_USB_DEV_DCFG_XCVRDLY_SET | ( | value | ) | (((value) << 14) & 0x00004000) |
Produces a ALT_USB_DEV_DCFG_XCVRDLY register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_LSB 15 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_ERRATICINTMSK register field.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_ERRATICINTMSK register field.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DCFG_ERRATICINTMSK register field.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_SET_MSK 0x00008000 |
The mask used to set the ALT_USB_DEV_DCFG_ERRATICINTMSK register field value.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_CLR_MSK 0xffff7fff |
The mask used to clear the ALT_USB_DEV_DCFG_ERRATICINTMSK register field value.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_ERRATICINTMSK register field.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_GET | ( | value | ) | (((value) & 0x00008000) >> 15) |
Extracts the ALT_USB_DEV_DCFG_ERRATICINTMSK field value from a register.
#define ALT_USB_DEV_DCFG_ERRATICINTMSK_SET | ( | value | ) | (((value) << 15) & 0x00008000) |
Produces a ALT_USB_DEV_DCFG_ERRATICINTMSK register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_DESCDMA_E_DISD 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_DESCDMA
Disable Scatter gather DMA
#define ALT_USB_DEV_DCFG_DESCDMA_E_END 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_DESCDMA
Enable Scatter gather DMA
#define ALT_USB_DEV_DCFG_DESCDMA_LSB 23 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_DESCDMA register field.
#define ALT_USB_DEV_DCFG_DESCDMA_MSB 23 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_DESCDMA register field.
#define ALT_USB_DEV_DCFG_DESCDMA_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DCFG_DESCDMA register field.
#define ALT_USB_DEV_DCFG_DESCDMA_SET_MSK 0x00800000 |
The mask used to set the ALT_USB_DEV_DCFG_DESCDMA register field value.
#define ALT_USB_DEV_DCFG_DESCDMA_CLR_MSK 0xff7fffff |
The mask used to clear the ALT_USB_DEV_DCFG_DESCDMA register field value.
#define ALT_USB_DEV_DCFG_DESCDMA_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_DESCDMA register field.
#define ALT_USB_DEV_DCFG_DESCDMA_GET | ( | value | ) | (((value) & 0x00800000) >> 23) |
Extracts the ALT_USB_DEV_DCFG_DESCDMA field value from a register.
#define ALT_USB_DEV_DCFG_DESCDMA_SET | ( | value | ) | (((value) << 23) & 0x00800000) |
Produces a ALT_USB_DEV_DCFG_DESCDMA register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF25 0x0 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
25% of (micro)frame
#define ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF50 0x1 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
50% of (micro)frame
#define ALT_USB_DEV_DCFG_PERSCHINTVL_E_MF75 0x2 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
75% of (micro)frame
#define ALT_USB_DEV_DCFG_PERSCHINTVL_E_RSVD 0x3 |
Enumerated value for register field ALT_USB_DEV_DCFG_PERSCHINTVL
Reserved
#define ALT_USB_DEV_DCFG_PERSCHINTVL_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_PERSCHINTVL register field.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_MSB 25 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_PERSCHINTVL register field.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_WIDTH 2 |
The width in bits of the ALT_USB_DEV_DCFG_PERSCHINTVL register field.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_SET_MSK 0x03000000 |
The mask used to set the ALT_USB_DEV_DCFG_PERSCHINTVL register field value.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_CLR_MSK 0xfcffffff |
The mask used to clear the ALT_USB_DEV_DCFG_PERSCHINTVL register field value.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_RESET 0x0 |
The reset value of the ALT_USB_DEV_DCFG_PERSCHINTVL register field.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_GET | ( | value | ) | (((value) & 0x03000000) >> 24) |
Extracts the ALT_USB_DEV_DCFG_PERSCHINTVL field value from a register.
#define ALT_USB_DEV_DCFG_PERSCHINTVL_SET | ( | value | ) | (((value) << 24) & 0x03000000) |
Produces a ALT_USB_DEV_DCFG_PERSCHINTVL register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_RESVALID_LSB 26 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCFG_RESVALID register field.
#define ALT_USB_DEV_DCFG_RESVALID_MSB 31 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCFG_RESVALID register field.
#define ALT_USB_DEV_DCFG_RESVALID_WIDTH 6 |
The width in bits of the ALT_USB_DEV_DCFG_RESVALID register field.
#define ALT_USB_DEV_DCFG_RESVALID_SET_MSK 0xfc000000 |
The mask used to set the ALT_USB_DEV_DCFG_RESVALID register field value.
#define ALT_USB_DEV_DCFG_RESVALID_CLR_MSK 0x03ffffff |
The mask used to clear the ALT_USB_DEV_DCFG_RESVALID register field value.
#define ALT_USB_DEV_DCFG_RESVALID_RESET 0x2 |
The reset value of the ALT_USB_DEV_DCFG_RESVALID register field.
#define ALT_USB_DEV_DCFG_RESVALID_GET | ( | value | ) | (((value) & 0xfc000000) >> 26) |
Extracts the ALT_USB_DEV_DCFG_RESVALID field value from a register.
#define ALT_USB_DEV_DCFG_RESVALID_SET | ( | value | ) | (((value) << 26) & 0xfc000000) |
Produces a ALT_USB_DEV_DCFG_RESVALID register field value suitable for setting the register.
#define ALT_USB_DEV_DCFG_RESET 0x08200000 |
The reset value of the ALT_USB_DEV_DCFG register.
#define ALT_USB_DEV_DCFG_OFST 0x0 |
The byte offset of the ALT_USB_DEV_DCFG register from the beginning of the component.
#define ALT_USB_DEV_DCFG_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DCFG_OFST)) |
The address of the ALT_USB_DEV_DCFG register.
typedef struct ALT_USB_DEV_DCFG_s ALT_USB_DEV_DCFG_t |
The typedef declaration for register ALT_USB_DEV_DCFG.