Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : status

Description

Status Register

Register Layout

Bits Access Reset Description
[0] R 0x0 ALT_SDMMC_STAT_FIFO_RX_WATERMARK
[1] R 0x1 ALT_SDMMC_STAT_FIFO_TX_WATERMARK
[2] R 0x1 ALT_SDMMC_STAT_FIFO_EMPTY
[3] R 0x0 ALT_SDMMC_STAT_FIFO_FULL
[7:4] R 0x0 ALT_SDMMC_STAT_CMD_FSM_STATES
[8] R 0x1 ALT_SDMMC_STAT_DATA_3_STAT
[9] R 0x0 ALT_SDMMC_STAT_DATA_BUSY
[10] R 0x0 ALT_SDMMC_STAT_DATA_STATE_MC_BUSY
[16:11] R 0x0 ALT_SDMMC_STAT_RESPONSE_INDEX
[29:17] R 0x0 ALT_SDMMC_STAT_FIFO_COUNT
[30] R 0x0 ALT_SDMMC_STAT_DMA_ACK
[31] R 0x0 ALT_SDMMC_STAT_DMA_REQ

Field : fifo_rx_watermark

FIFO reached Receive watermark level; not qualified with data

transfer.

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_FIFO_RX_WATERMARK_E_RXWATERMARK 0x0 FIFO reached watermark level; not qualified with
: data transfer.
ALT_SDMMC_STAT_FIFO_RX_WATERMARK_E_NORXWATERMARK 0x1 FIFO not at watermark Level

Field Access Macros:

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_E_RXWATERMARK   0x0
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_E_NORXWATERMARK   0x1
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_LSB   0
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_MSB   0
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_WIDTH   1
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_SET_MSK   0x00000001
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_CLR_MSK   0xfffffffe
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_RESET   0x0
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_SET(value)   (((value) << 0) & 0x00000001)
 

Field : fifo_tx_watermark

FIFO reached Transmit watermark level; not qualified with data

transfer.

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_FIFO_TX_WATERMARK_E_NOTXWATERMARK 0x0 FIFO not at transmit watermark Level
ALT_SDMMC_STAT_FIFO_TX_WATERMARK_E_TXWATERMARK 0x1 FIFO reached transmit watermark level: not
: qualified with data transfer.

Field Access Macros:

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_E_NOTXWATERMARK   0x0
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_E_TXWATERMARK   0x1
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_LSB   1
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_MSB   1
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_WIDTH   1
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_SET_MSK   0x00000002
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_CLR_MSK   0xfffffffd
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_RESET   0x1
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_SET(value)   (((value) << 1) & 0x00000002)
 

Field : fifo_empty

FIFO is empty status

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_FIFO_EMPTY_E_FIFONOTEMPTY 0x0 FIFO not empty
ALT_SDMMC_STAT_FIFO_EMPTY_E_FIFOEMPTY 0x1 FIFO is empty

Field Access Macros:

#define ALT_SDMMC_STAT_FIFO_EMPTY_E_FIFONOTEMPTY   0x0
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_E_FIFOEMPTY   0x1
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_LSB   2
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_MSB   2
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_WIDTH   1
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_SET_MSK   0x00000004
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_CLR_MSK   0xfffffffb
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_RESET   0x1
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_SDMMC_STAT_FIFO_EMPTY_SET(value)   (((value) << 2) & 0x00000004)
 

Field : fifo_full

FIFO is full status

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_FIFO_FULL_E_FIFONOTFULL 0x0 FIFO is not full
ALT_SDMMC_STAT_FIFO_FULL_E_FIFOFULL 0x1 FIFO is full

Field Access Macros:

#define ALT_SDMMC_STAT_FIFO_FULL_E_FIFONOTFULL   0x0
 
#define ALT_SDMMC_STAT_FIFO_FULL_E_FIFOFULL   0x1
 
#define ALT_SDMMC_STAT_FIFO_FULL_LSB   3
 
#define ALT_SDMMC_STAT_FIFO_FULL_MSB   3
 
#define ALT_SDMMC_STAT_FIFO_FULL_WIDTH   1
 
#define ALT_SDMMC_STAT_FIFO_FULL_SET_MSK   0x00000008
 
#define ALT_SDMMC_STAT_FIFO_FULL_CLR_MSK   0xfffffff7
 
#define ALT_SDMMC_STAT_FIFO_FULL_RESET   0x0
 
#define ALT_SDMMC_STAT_FIFO_FULL_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_SDMMC_STAT_FIFO_FULL_SET(value)   (((value) << 3) & 0x00000008)
 

Field : command_fsm_states

Command FSM states:

0 Idle

1 Send init sequence

2 Tx cmd start bit

3 Tx cmd tx bit

4 Tx cmd index + arg

5 Tx cmd crc7

6 Tx cmd end bit

7 Rx resp start bit

8 Rx resp IRQ response

9 Rx resp tx bit

10 Rx resp cmd idx

11 Rx resp data

12 Rx resp crc7

13 Rx resp end bit

14 Cmd path wait NCC

15 Wait; CMD-to-response turnaround

NOTE: The command FSM state is represented using 19 bits. The STATUS Register(7:4) has 4 bits to represent the command FSM states. Using these 4 bits, only 16 states can be represented. Thus three states cannot be represented in the STATUS(7:4) register. The three states that are not represented in the STATUS Register(7:4) are:

  • Bit 16 Wait for CCS
  • Bit 17 Send CCSD
  • Bit 18 Boot Mode

Due to this, while command FSM is in “Wait for CCS state” or “Send CCSD” or “Boot Mode”, the Status register indicates status as 0 for the bit field 7:4.

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_CMD_FSM_STATES_E_IDLEANDOTHERS 0x0 Idle, Wait for CCS, Send CCSD, or Boot Mode
ALT_SDMMC_STAT_CMD_FSM_STATES_E_SENDINITSEQ 0x1 Send init sequence
ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDSTART 0x2 Tx cmd start bit
ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDTXBIT 0x3 Tx cmd tx bit
ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDINDXARG 0x4 Tx cmd index + arg
ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDCRC7 0x5 Tx cmd crc7
ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDEND 0x6 Tx cmd end bit
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPSTART 0x7 Rx resp start bit
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPIRQ 0x8 Rx resp IRQ response
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPTX 0x9 Rx resp tx bit
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPCMDIDX 0xa Rx resp cmd idx
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPDATA 0xb Rx resp data
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPCRC7 0xc Rx resp crc7
ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPEND 0xd Rx resp end bit
ALT_SDMMC_STAT_CMD_FSM_STATES_E_CMDPATHWAIT 0xe Cmd path wait NCC
ALT_SDMMC_STAT_CMD_FSM_STATES_E_WAITCMDTURN 0xf Wait: CMD-to-reponse turnaround

Field Access Macros:

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_IDLEANDOTHERS   0x0
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_SENDINITSEQ   0x1
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDSTART   0x2
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDTXBIT   0x3
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDINDXARG   0x4
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDCRC7   0x5
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDEND   0x6
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPSTART   0x7
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPIRQ   0x8
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPTX   0x9
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPCMDIDX   0xa
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPDATA   0xb
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPCRC7   0xc
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPEND   0xd
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_CMDPATHWAIT   0xe
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_WAITCMDTURN   0xf
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_LSB   4
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_MSB   7
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_WIDTH   4
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_SET_MSK   0x000000f0
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_CLR_MSK   0xffffff0f
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_RESET   0x0
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_GET(value)   (((value) & 0x000000f0) >> 4)
 
#define ALT_SDMMC_STAT_CMD_FSM_STATES_SET(value)   (((value) << 4) & 0x000000f0)
 

Field : data_3_status

Raw selected card_data[3]; checks whether card is present

0-card not present

1-card present

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_DATA_3_STAT_E_CARDNOTPRESENT 0x0 Card Not Present
ALT_SDMMC_STAT_DATA_3_STAT_E_CARDPRESENT 0x1 Card Present

Field Access Macros:

#define ALT_SDMMC_STAT_DATA_3_STAT_E_CARDNOTPRESENT   0x0
 
#define ALT_SDMMC_STAT_DATA_3_STAT_E_CARDPRESENT   0x1
 
#define ALT_SDMMC_STAT_DATA_3_STAT_LSB   8
 
#define ALT_SDMMC_STAT_DATA_3_STAT_MSB   8
 
#define ALT_SDMMC_STAT_DATA_3_STAT_WIDTH   1
 
#define ALT_SDMMC_STAT_DATA_3_STAT_SET_MSK   0x00000100
 
#define ALT_SDMMC_STAT_DATA_3_STAT_CLR_MSK   0xfffffeff
 
#define ALT_SDMMC_STAT_DATA_3_STAT_RESET   0x1
 
#define ALT_SDMMC_STAT_DATA_3_STAT_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_SDMMC_STAT_DATA_3_STAT_SET(value)   (((value) << 8) & 0x00000100)
 

Field : data_busy

Inverted version of raw selected card_data[0]

0-card data not busy

1-card data busy

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_DATA_BUSY_E_CARDNOTBUSY 0x0 card data not busy
ALT_SDMMC_STAT_DATA_BUSY_E_CARDBUSY 0x1 card data busy

Field Access Macros:

#define ALT_SDMMC_STAT_DATA_BUSY_E_CARDNOTBUSY   0x0
 
#define ALT_SDMMC_STAT_DATA_BUSY_E_CARDBUSY   0x1
 
#define ALT_SDMMC_STAT_DATA_BUSY_LSB   9
 
#define ALT_SDMMC_STAT_DATA_BUSY_MSB   9
 
#define ALT_SDMMC_STAT_DATA_BUSY_WIDTH   1
 
#define ALT_SDMMC_STAT_DATA_BUSY_SET_MSK   0x00000200
 
#define ALT_SDMMC_STAT_DATA_BUSY_CLR_MSK   0xfffffdff
 
#define ALT_SDMMC_STAT_DATA_BUSY_RESET   0x0
 
#define ALT_SDMMC_STAT_DATA_BUSY_GET(value)   (((value) & 0x00000200) >> 9)
 
#define ALT_SDMMC_STAT_DATA_BUSY_SET(value)   (((value) << 9) & 0x00000200)
 

Field : data_state_mc_busy

Data transmit or receive state-machine is busy

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_E_DATASTATENOTBSY 0x0 Data State MC not busy
ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_E_DATASTATEBSY 0x1 Data State MC busy

Field Access Macros:

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_E_DATASTATENOTBSY   0x0
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_E_DATASTATEBSY   0x1
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_LSB   10
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_MSB   10
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_WIDTH   1
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_SET_MSK   0x00000400
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_CLR_MSK   0xfffffbff
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_RESET   0x0
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_GET(value)   (((value) & 0x00000400) >> 10)
 
#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_SET(value)   (((value) << 10) & 0x00000400)
 

Field : response_index

Index of previous response, including any auto-stop sent by core

Field Access Macros:

#define ALT_SDMMC_STAT_RESPONSE_INDEX_LSB   11
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_MSB   16
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_WIDTH   6
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_SET_MSK   0x0001f800
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_CLR_MSK   0xfffe07ff
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_RESET   0x0
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_GET(value)   (((value) & 0x0001f800) >> 11)
 
#define ALT_SDMMC_STAT_RESPONSE_INDEX_SET(value)   (((value) << 11) & 0x0001f800)
 

Field : fifo_count

FIFO count Number of filled locations in FIFO

Field Access Macros:

#define ALT_SDMMC_STAT_FIFO_COUNT_LSB   17
 
#define ALT_SDMMC_STAT_FIFO_COUNT_MSB   29
 
#define ALT_SDMMC_STAT_FIFO_COUNT_WIDTH   13
 
#define ALT_SDMMC_STAT_FIFO_COUNT_SET_MSK   0x3ffe0000
 
#define ALT_SDMMC_STAT_FIFO_COUNT_CLR_MSK   0xc001ffff
 
#define ALT_SDMMC_STAT_FIFO_COUNT_RESET   0x0
 
#define ALT_SDMMC_STAT_FIFO_COUNT_GET(value)   (((value) & 0x3ffe0000) >> 17)
 
#define ALT_SDMMC_STAT_FIFO_COUNT_SET(value)   (((value) << 17) & 0x3ffe0000)
 

Field : dma_ack

DMA acknowledge signal state; either dw_dma_ack or

ge_dma_ack, depending on DW-DMA or Generic-DMA selection.

Field Access Macros:

#define ALT_SDMMC_STAT_DMA_ACK_LSB   30
 
#define ALT_SDMMC_STAT_DMA_ACK_MSB   30
 
#define ALT_SDMMC_STAT_DMA_ACK_WIDTH   1
 
#define ALT_SDMMC_STAT_DMA_ACK_SET_MSK   0x40000000
 
#define ALT_SDMMC_STAT_DMA_ACK_CLR_MSK   0xbfffffff
 
#define ALT_SDMMC_STAT_DMA_ACK_RESET   0x0
 
#define ALT_SDMMC_STAT_DMA_ACK_GET(value)   (((value) & 0x40000000) >> 30)
 
#define ALT_SDMMC_STAT_DMA_ACK_SET(value)   (((value) << 30) & 0x40000000)
 

Field : dma_req

DMA request signal state; either dw_dma_req or ge_dma_req,

depending on DW-DMA or Generic-DMA selection.

Field Access Macros:

#define ALT_SDMMC_STAT_DMA_REQ_LSB   31
 
#define ALT_SDMMC_STAT_DMA_REQ_MSB   31
 
#define ALT_SDMMC_STAT_DMA_REQ_WIDTH   1
 
#define ALT_SDMMC_STAT_DMA_REQ_SET_MSK   0x80000000
 
#define ALT_SDMMC_STAT_DMA_REQ_CLR_MSK   0x7fffffff
 
#define ALT_SDMMC_STAT_DMA_REQ_RESET   0x0
 
#define ALT_SDMMC_STAT_DMA_REQ_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_SDMMC_STAT_DMA_REQ_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_SDMMC_STAT_s
 

Macros

#define ALT_SDMMC_STAT_RESET   0x00000106
 
#define ALT_SDMMC_STAT_OFST   0x48
 

Typedefs

typedef struct ALT_SDMMC_STAT_s ALT_SDMMC_STAT_t
 

Data Structure Documentation

struct ALT_SDMMC_STAT_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SDMMC_STAT.

Data Fields
const uint32_t fifo_rx_watermark: 1 ALT_SDMMC_STAT_FIFO_RX_WATERMARK
const uint32_t fifo_tx_watermark: 1 ALT_SDMMC_STAT_FIFO_TX_WATERMARK
const uint32_t fifo_empty: 1 ALT_SDMMC_STAT_FIFO_EMPTY
const uint32_t fifo_full: 1 ALT_SDMMC_STAT_FIFO_FULL
const uint32_t command_fsm_states: 4 ALT_SDMMC_STAT_CMD_FSM_STATES
const uint32_t data_3_status: 1 ALT_SDMMC_STAT_DATA_3_STAT
const uint32_t data_busy: 1 ALT_SDMMC_STAT_DATA_BUSY
const uint32_t data_state_mc_busy: 1 ALT_SDMMC_STAT_DATA_STATE_MC_BUSY
const uint32_t response_index: 6 ALT_SDMMC_STAT_RESPONSE_INDEX
const uint32_t fifo_count: 13 ALT_SDMMC_STAT_FIFO_COUNT
const uint32_t dma_ack: 1 ALT_SDMMC_STAT_DMA_ACK
const uint32_t dma_req: 1 ALT_SDMMC_STAT_DMA_REQ

Macro Definitions

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_E_RXWATERMARK   0x0

Enumerated value for register field ALT_SDMMC_STAT_FIFO_RX_WATERMARK

FIFO reached watermark level; not qualified with data transfer.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_E_NORXWATERMARK   0x1

Enumerated value for register field ALT_SDMMC_STAT_FIFO_RX_WATERMARK

FIFO not at watermark Level

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_LSB   0

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_MSB   0

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_SET_MSK   0x00000001

The mask used to set the ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field value.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field value.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_RESET   0x0

The reset value of the ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SDMMC_STAT_FIFO_RX_WATERMARK field value from a register.

#define ALT_SDMMC_STAT_FIFO_RX_WATERMARK_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SDMMC_STAT_FIFO_RX_WATERMARK register field value suitable for setting the register.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_E_NOTXWATERMARK   0x0

Enumerated value for register field ALT_SDMMC_STAT_FIFO_TX_WATERMARK

FIFO not at transmit watermark Level

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_E_TXWATERMARK   0x1

Enumerated value for register field ALT_SDMMC_STAT_FIFO_TX_WATERMARK

FIFO reached transmit watermark level: not qualified with data transfer.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_LSB   1

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_MSB   1

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_SET_MSK   0x00000002

The mask used to set the ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field value.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field value.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_RESET   0x1

The reset value of the ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SDMMC_STAT_FIFO_TX_WATERMARK field value from a register.

#define ALT_SDMMC_STAT_FIFO_TX_WATERMARK_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SDMMC_STAT_FIFO_TX_WATERMARK register field value suitable for setting the register.

#define ALT_SDMMC_STAT_FIFO_EMPTY_E_FIFONOTEMPTY   0x0

Enumerated value for register field ALT_SDMMC_STAT_FIFO_EMPTY

FIFO not empty

#define ALT_SDMMC_STAT_FIFO_EMPTY_E_FIFOEMPTY   0x1

Enumerated value for register field ALT_SDMMC_STAT_FIFO_EMPTY

FIFO is empty

#define ALT_SDMMC_STAT_FIFO_EMPTY_LSB   2

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_FIFO_EMPTY register field.

#define ALT_SDMMC_STAT_FIFO_EMPTY_MSB   2

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_FIFO_EMPTY register field.

#define ALT_SDMMC_STAT_FIFO_EMPTY_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_FIFO_EMPTY register field.

#define ALT_SDMMC_STAT_FIFO_EMPTY_SET_MSK   0x00000004

The mask used to set the ALT_SDMMC_STAT_FIFO_EMPTY register field value.

#define ALT_SDMMC_STAT_FIFO_EMPTY_CLR_MSK   0xfffffffb

The mask used to clear the ALT_SDMMC_STAT_FIFO_EMPTY register field value.

#define ALT_SDMMC_STAT_FIFO_EMPTY_RESET   0x1

The reset value of the ALT_SDMMC_STAT_FIFO_EMPTY register field.

#define ALT_SDMMC_STAT_FIFO_EMPTY_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_SDMMC_STAT_FIFO_EMPTY field value from a register.

#define ALT_SDMMC_STAT_FIFO_EMPTY_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_SDMMC_STAT_FIFO_EMPTY register field value suitable for setting the register.

#define ALT_SDMMC_STAT_FIFO_FULL_E_FIFONOTFULL   0x0

Enumerated value for register field ALT_SDMMC_STAT_FIFO_FULL

FIFO is not full

#define ALT_SDMMC_STAT_FIFO_FULL_E_FIFOFULL   0x1

Enumerated value for register field ALT_SDMMC_STAT_FIFO_FULL

FIFO is full

#define ALT_SDMMC_STAT_FIFO_FULL_LSB   3

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_FIFO_FULL register field.

#define ALT_SDMMC_STAT_FIFO_FULL_MSB   3

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_FIFO_FULL register field.

#define ALT_SDMMC_STAT_FIFO_FULL_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_FIFO_FULL register field.

#define ALT_SDMMC_STAT_FIFO_FULL_SET_MSK   0x00000008

The mask used to set the ALT_SDMMC_STAT_FIFO_FULL register field value.

#define ALT_SDMMC_STAT_FIFO_FULL_CLR_MSK   0xfffffff7

The mask used to clear the ALT_SDMMC_STAT_FIFO_FULL register field value.

#define ALT_SDMMC_STAT_FIFO_FULL_RESET   0x0

The reset value of the ALT_SDMMC_STAT_FIFO_FULL register field.

#define ALT_SDMMC_STAT_FIFO_FULL_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_SDMMC_STAT_FIFO_FULL field value from a register.

#define ALT_SDMMC_STAT_FIFO_FULL_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_SDMMC_STAT_FIFO_FULL register field value suitable for setting the register.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_IDLEANDOTHERS   0x0

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Idle, Wait for CCS, Send CCSD, or Boot Mode

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_SENDINITSEQ   0x1

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Send init sequence

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDSTART   0x2

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Tx cmd start bit

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDTXBIT   0x3

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Tx cmd tx bit

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDINDXARG   0x4

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Tx cmd index + arg

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDCRC7   0x5

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Tx cmd crc7

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_TXCMDEND   0x6

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Tx cmd end bit

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPSTART   0x7

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp start bit

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPIRQ   0x8

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp IRQ response

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPTX   0x9

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp tx bit

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPCMDIDX   0xa

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp cmd idx

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPDATA   0xb

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp data

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPCRC7   0xc

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp crc7

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_RXRESPEND   0xd

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Rx resp end bit

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_CMDPATHWAIT   0xe

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Cmd path wait NCC

#define ALT_SDMMC_STAT_CMD_FSM_STATES_E_WAITCMDTURN   0xf

Enumerated value for register field ALT_SDMMC_STAT_CMD_FSM_STATES

Wait: CMD-to-reponse turnaround

#define ALT_SDMMC_STAT_CMD_FSM_STATES_LSB   4

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_CMD_FSM_STATES register field.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_MSB   7

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_CMD_FSM_STATES register field.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_WIDTH   4

The width in bits of the ALT_SDMMC_STAT_CMD_FSM_STATES register field.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_SET_MSK   0x000000f0

The mask used to set the ALT_SDMMC_STAT_CMD_FSM_STATES register field value.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_CLR_MSK   0xffffff0f

The mask used to clear the ALT_SDMMC_STAT_CMD_FSM_STATES register field value.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_RESET   0x0

The reset value of the ALT_SDMMC_STAT_CMD_FSM_STATES register field.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_GET (   value)    (((value) & 0x000000f0) >> 4)

Extracts the ALT_SDMMC_STAT_CMD_FSM_STATES field value from a register.

#define ALT_SDMMC_STAT_CMD_FSM_STATES_SET (   value)    (((value) << 4) & 0x000000f0)

Produces a ALT_SDMMC_STAT_CMD_FSM_STATES register field value suitable for setting the register.

#define ALT_SDMMC_STAT_DATA_3_STAT_E_CARDNOTPRESENT   0x0

Enumerated value for register field ALT_SDMMC_STAT_DATA_3_STAT

Card Not Present

#define ALT_SDMMC_STAT_DATA_3_STAT_E_CARDPRESENT   0x1

Enumerated value for register field ALT_SDMMC_STAT_DATA_3_STAT

Card Present

#define ALT_SDMMC_STAT_DATA_3_STAT_LSB   8

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_DATA_3_STAT register field.

#define ALT_SDMMC_STAT_DATA_3_STAT_MSB   8

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_DATA_3_STAT register field.

#define ALT_SDMMC_STAT_DATA_3_STAT_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_DATA_3_STAT register field.

#define ALT_SDMMC_STAT_DATA_3_STAT_SET_MSK   0x00000100

The mask used to set the ALT_SDMMC_STAT_DATA_3_STAT register field value.

#define ALT_SDMMC_STAT_DATA_3_STAT_CLR_MSK   0xfffffeff

The mask used to clear the ALT_SDMMC_STAT_DATA_3_STAT register field value.

#define ALT_SDMMC_STAT_DATA_3_STAT_RESET   0x1

The reset value of the ALT_SDMMC_STAT_DATA_3_STAT register field.

#define ALT_SDMMC_STAT_DATA_3_STAT_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_SDMMC_STAT_DATA_3_STAT field value from a register.

#define ALT_SDMMC_STAT_DATA_3_STAT_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_SDMMC_STAT_DATA_3_STAT register field value suitable for setting the register.

#define ALT_SDMMC_STAT_DATA_BUSY_E_CARDNOTBUSY   0x0

Enumerated value for register field ALT_SDMMC_STAT_DATA_BUSY

card data not busy

#define ALT_SDMMC_STAT_DATA_BUSY_E_CARDBUSY   0x1

Enumerated value for register field ALT_SDMMC_STAT_DATA_BUSY

card data busy

#define ALT_SDMMC_STAT_DATA_BUSY_LSB   9

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_DATA_BUSY register field.

#define ALT_SDMMC_STAT_DATA_BUSY_MSB   9

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_DATA_BUSY register field.

#define ALT_SDMMC_STAT_DATA_BUSY_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_DATA_BUSY register field.

#define ALT_SDMMC_STAT_DATA_BUSY_SET_MSK   0x00000200

The mask used to set the ALT_SDMMC_STAT_DATA_BUSY register field value.

#define ALT_SDMMC_STAT_DATA_BUSY_CLR_MSK   0xfffffdff

The mask used to clear the ALT_SDMMC_STAT_DATA_BUSY register field value.

#define ALT_SDMMC_STAT_DATA_BUSY_RESET   0x0

The reset value of the ALT_SDMMC_STAT_DATA_BUSY register field.

#define ALT_SDMMC_STAT_DATA_BUSY_GET (   value)    (((value) & 0x00000200) >> 9)

Extracts the ALT_SDMMC_STAT_DATA_BUSY field value from a register.

#define ALT_SDMMC_STAT_DATA_BUSY_SET (   value)    (((value) << 9) & 0x00000200)

Produces a ALT_SDMMC_STAT_DATA_BUSY register field value suitable for setting the register.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_E_DATASTATENOTBSY   0x0

Enumerated value for register field ALT_SDMMC_STAT_DATA_STATE_MC_BUSY

Data State MC not busy

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_E_DATASTATEBSY   0x1

Enumerated value for register field ALT_SDMMC_STAT_DATA_STATE_MC_BUSY

Data State MC busy

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_LSB   10

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_MSB   10

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_SET_MSK   0x00000400

The mask used to set the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field value.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_CLR_MSK   0xfffffbff

The mask used to clear the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field value.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_RESET   0x0

The reset value of the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_GET (   value)    (((value) & 0x00000400) >> 10)

Extracts the ALT_SDMMC_STAT_DATA_STATE_MC_BUSY field value from a register.

#define ALT_SDMMC_STAT_DATA_STATE_MC_BUSY_SET (   value)    (((value) << 10) & 0x00000400)

Produces a ALT_SDMMC_STAT_DATA_STATE_MC_BUSY register field value suitable for setting the register.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_LSB   11

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_RESPONSE_INDEX register field.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_MSB   16

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_RESPONSE_INDEX register field.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_WIDTH   6

The width in bits of the ALT_SDMMC_STAT_RESPONSE_INDEX register field.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_SET_MSK   0x0001f800

The mask used to set the ALT_SDMMC_STAT_RESPONSE_INDEX register field value.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_CLR_MSK   0xfffe07ff

The mask used to clear the ALT_SDMMC_STAT_RESPONSE_INDEX register field value.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_RESET   0x0

The reset value of the ALT_SDMMC_STAT_RESPONSE_INDEX register field.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_GET (   value)    (((value) & 0x0001f800) >> 11)

Extracts the ALT_SDMMC_STAT_RESPONSE_INDEX field value from a register.

#define ALT_SDMMC_STAT_RESPONSE_INDEX_SET (   value)    (((value) << 11) & 0x0001f800)

Produces a ALT_SDMMC_STAT_RESPONSE_INDEX register field value suitable for setting the register.

#define ALT_SDMMC_STAT_FIFO_COUNT_LSB   17

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_FIFO_COUNT register field.

#define ALT_SDMMC_STAT_FIFO_COUNT_MSB   29

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_FIFO_COUNT register field.

#define ALT_SDMMC_STAT_FIFO_COUNT_WIDTH   13

The width in bits of the ALT_SDMMC_STAT_FIFO_COUNT register field.

#define ALT_SDMMC_STAT_FIFO_COUNT_SET_MSK   0x3ffe0000

The mask used to set the ALT_SDMMC_STAT_FIFO_COUNT register field value.

#define ALT_SDMMC_STAT_FIFO_COUNT_CLR_MSK   0xc001ffff

The mask used to clear the ALT_SDMMC_STAT_FIFO_COUNT register field value.

#define ALT_SDMMC_STAT_FIFO_COUNT_RESET   0x0

The reset value of the ALT_SDMMC_STAT_FIFO_COUNT register field.

#define ALT_SDMMC_STAT_FIFO_COUNT_GET (   value)    (((value) & 0x3ffe0000) >> 17)

Extracts the ALT_SDMMC_STAT_FIFO_COUNT field value from a register.

#define ALT_SDMMC_STAT_FIFO_COUNT_SET (   value)    (((value) << 17) & 0x3ffe0000)

Produces a ALT_SDMMC_STAT_FIFO_COUNT register field value suitable for setting the register.

#define ALT_SDMMC_STAT_DMA_ACK_LSB   30

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_DMA_ACK register field.

#define ALT_SDMMC_STAT_DMA_ACK_MSB   30

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_DMA_ACK register field.

#define ALT_SDMMC_STAT_DMA_ACK_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_DMA_ACK register field.

#define ALT_SDMMC_STAT_DMA_ACK_SET_MSK   0x40000000

The mask used to set the ALT_SDMMC_STAT_DMA_ACK register field value.

#define ALT_SDMMC_STAT_DMA_ACK_CLR_MSK   0xbfffffff

The mask used to clear the ALT_SDMMC_STAT_DMA_ACK register field value.

#define ALT_SDMMC_STAT_DMA_ACK_RESET   0x0

The reset value of the ALT_SDMMC_STAT_DMA_ACK register field.

#define ALT_SDMMC_STAT_DMA_ACK_GET (   value)    (((value) & 0x40000000) >> 30)

Extracts the ALT_SDMMC_STAT_DMA_ACK field value from a register.

#define ALT_SDMMC_STAT_DMA_ACK_SET (   value)    (((value) << 30) & 0x40000000)

Produces a ALT_SDMMC_STAT_DMA_ACK register field value suitable for setting the register.

#define ALT_SDMMC_STAT_DMA_REQ_LSB   31

The Least Significant Bit (LSB) position of the ALT_SDMMC_STAT_DMA_REQ register field.

#define ALT_SDMMC_STAT_DMA_REQ_MSB   31

The Most Significant Bit (MSB) position of the ALT_SDMMC_STAT_DMA_REQ register field.

#define ALT_SDMMC_STAT_DMA_REQ_WIDTH   1

The width in bits of the ALT_SDMMC_STAT_DMA_REQ register field.

#define ALT_SDMMC_STAT_DMA_REQ_SET_MSK   0x80000000

The mask used to set the ALT_SDMMC_STAT_DMA_REQ register field value.

#define ALT_SDMMC_STAT_DMA_REQ_CLR_MSK   0x7fffffff

The mask used to clear the ALT_SDMMC_STAT_DMA_REQ register field value.

#define ALT_SDMMC_STAT_DMA_REQ_RESET   0x0

The reset value of the ALT_SDMMC_STAT_DMA_REQ register field.

#define ALT_SDMMC_STAT_DMA_REQ_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_SDMMC_STAT_DMA_REQ field value from a register.

#define ALT_SDMMC_STAT_DMA_REQ_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_SDMMC_STAT_DMA_REQ register field value suitable for setting the register.

#define ALT_SDMMC_STAT_RESET   0x00000106

The reset value of the ALT_SDMMC_STAT register.

#define ALT_SDMMC_STAT_OFST   0x48

The byte offset of the ALT_SDMMC_STAT register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SDMMC_STAT.