Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Control Register - ctrl

Description

The CTRL register is used by software to control reset behavior.It includes fields for software to initiate the cold and warm reset.

Register Layout

Bits Access Reset Description
[0] RW 0x0 Software Cold Reset Request
[1] RW 0x0 Software Warm Reset Request
[31:2] ??? Unknown UNDEFINED

Field : Software Cold Reset Request - swcoldrstreq

This is a one-shot bit written by software to 1 to trigger a cold reset. It always reads the value 0.

Field Access Macros:

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_LSB   0
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_MSB   0
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_WIDTH   1
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_SET_MSK   0x00000001
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_CLR_MSK   0xfffffffe
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_RESET   0x0
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Software Warm Reset Request - swwarmrstreq

This is a one-shot bit written by software to 1 to trigger a hardware sequenced warm reset. It always reads the value 0.

Field Access Macros:

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_LSB   1
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_MSB   1
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_WIDTH   1
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_SET_MSK   0x00000002
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_CLR_MSK   0xfffffffd
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_RESET   0x0
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_RSTMGR_CTL_SWWARMRSTREQ_SET(value)   (((value) << 1) & 0x00000002)
 

Data Structures

struct  ALT_RSTMGR_CTL_s
 

Macros

#define ALT_RSTMGR_CTL_RESET   0x00100000
 
#define ALT_RSTMGR_CTL_OFST   0xc
 

Typedefs

typedef struct ALT_RSTMGR_CTL_s ALT_RSTMGR_CTL_t
 

Data Structure Documentation

struct ALT_RSTMGR_CTL_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_RSTMGR_CTL.

Data Fields
uint32_t swcoldrstreq: 1 Software Cold Reset Request
uint32_t swwarmrstreq: 1 Software Warm Reset Request
uint32_t __pad0__: 30 UNDEFINED

Macro Definitions

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_LSB   0

The Least Significant Bit (LSB) position of the ALT_RSTMGR_CTL_SWCOLDRSTREQ register field.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_MSB   0

The Most Significant Bit (MSB) position of the ALT_RSTMGR_CTL_SWCOLDRSTREQ register field.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_WIDTH   1

The width in bits of the ALT_RSTMGR_CTL_SWCOLDRSTREQ register field.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_SET_MSK   0x00000001

The mask used to set the ALT_RSTMGR_CTL_SWCOLDRSTREQ register field value.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_CLR_MSK   0xfffffffe

The mask used to clear the ALT_RSTMGR_CTL_SWCOLDRSTREQ register field value.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_RESET   0x0

The reset value of the ALT_RSTMGR_CTL_SWCOLDRSTREQ register field.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_RSTMGR_CTL_SWCOLDRSTREQ field value from a register.

#define ALT_RSTMGR_CTL_SWCOLDRSTREQ_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_RSTMGR_CTL_SWCOLDRSTREQ register field value suitable for setting the register.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_LSB   1

The Least Significant Bit (LSB) position of the ALT_RSTMGR_CTL_SWWARMRSTREQ register field.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_MSB   1

The Most Significant Bit (MSB) position of the ALT_RSTMGR_CTL_SWWARMRSTREQ register field.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_WIDTH   1

The width in bits of the ALT_RSTMGR_CTL_SWWARMRSTREQ register field.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_SET_MSK   0x00000002

The mask used to set the ALT_RSTMGR_CTL_SWWARMRSTREQ register field value.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_CLR_MSK   0xfffffffd

The mask used to clear the ALT_RSTMGR_CTL_SWWARMRSTREQ register field value.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_RESET   0x0

The reset value of the ALT_RSTMGR_CTL_SWWARMRSTREQ register field.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_RSTMGR_CTL_SWWARMRSTREQ field value from a register.

#define ALT_RSTMGR_CTL_SWWARMRSTREQ_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_RSTMGR_CTL_SWWARMRSTREQ register field value suitable for setting the register.

#define ALT_RSTMGR_CTL_RESET   0x00100000

The reset value of the ALT_RSTMGR_CTL register.

#define ALT_RSTMGR_CTL_OFST   0xc

The byte offset of the ALT_RSTMGR_CTL register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_RSTMGR_CTL.