Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : FPGA interface Individual Enable Register - fpgaintf_en_1

Description

Used to disable individual interfaces between the FPGA and HPS.

This register is reset only on a cold reset (ignores warm reset).

Register Layout

Bits Access Reset Description
[3:0] ??? 0xf UNDEFINED
[4] RW 0x1 Trace Interface
[7:5] ??? 0x7 UNDEFINED
[8] RW 0x1 Debug APB Interface
[15:9] ??? 0x7f UNDEFINED
[16] RW 0x1 STM Event Interface
[23:17] ??? 0x7f UNDEFINED
[24] RW 0x1 Cross Trigger Interface (CTI)
[31:25] ??? 0x7f UNDEFINED

Field : Trace Interface - trace

Used to disable the trace interface. This interface allows the HPS debug logic to send trace data to logic in the FPGA fabric.

Field Enumeration Values:

Enum | Value | Description :--------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_1_TRACE_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_1_TRACE_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_LSB   4
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_MSB   4
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_SET_MSK   0x00000010
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_CLR_MSK   0xffffffef
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_RESET   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_SET(value)   (((value) << 4) & 0x00000010)
 

Field : Debug APB Interface - dbgapb

Used to disable the debug APB interface. This interface allows the HPS debug logic to communicate with debug APB slaves in the FPGA fabric.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_LSB   8
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_MSB   8
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_SET_MSK   0x00000100
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_CLR_MSK   0xfffffeff
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_RESET   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_SET(value)   (((value) << 8) & 0x00000100)
 

Field : STM Event Interface - stmevent

Used to disable the STM event interface. This interface allows logic in the FPGA fabric to trigger events to the STM debug module in the HPS.

Field Enumeration Values:

Enum | Value | Description :--------------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_LSB   16
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_MSB   16
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_SET_MSK   0x00010000
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_CLR_MSK   0xfffeffff
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_RESET   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_SET(value)   (((value) << 16) & 0x00010000)
 

Field : Cross Trigger Interface (CTI) - ctmtrigger

Used to disable the FPGA Fabric from sending triggers to HPS debug logic. Note that this doesn't prevent the HPS debug logic from sending triggers to the FPGA Fabric.

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_LSB   24
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_MSB   24
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_SET_MSK   0x01000000
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_CLR_MSK   0xfeffffff
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_RESET   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_SET(value)   (((value) << 24) & 0x01000000)
 

Data Structures

struct  ALT_SYSMGR_FPGAINTF_EN_1_s
 

Macros

#define ALT_SYSMGR_FPGAINTF_EN_1_RESET   0xffffffff
 
#define ALT_SYSMGR_FPGAINTF_EN_1_OFST   0x68
 

Typedefs

typedef struct
ALT_SYSMGR_FPGAINTF_EN_1_s 
ALT_SYSMGR_FPGAINTF_EN_1_t
 

Data Structure Documentation

struct ALT_SYSMGR_FPGAINTF_EN_1_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_FPGAINTF_EN_1.

Data Fields
uint32_t __pad0__: 4 UNDEFINED
uint32_t trace: 1 Trace Interface
uint32_t __pad1__: 3 UNDEFINED
uint32_t dbgapb: 1 Debug APB Interface
uint32_t __pad2__: 7 UNDEFINED
uint32_t stmevent: 1 STM Event Interface
uint32_t __pad3__: 7 UNDEFINED
uint32_t ctmtrigger: 1 Cross Trigger Interface (CTI)
uint32_t __pad4__: 7 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_TRACE

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_TRACE

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_LSB   4

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_MSB   4

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_SET_MSK   0x00000010

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_CLR_MSK   0xffffffef

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_RESET   0x1

The reset value of the ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_SYSMGR_FPGAINTF_EN_1_TRACE field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_1_TRACE_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_SYSMGR_FPGAINTF_EN_1_TRACE register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_LSB   8

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_MSB   8

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_SET_MSK   0x00000100

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_CLR_MSK   0xfffffeff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_RESET   0x1

The reset value of the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_SYSMGR_FPGAINTF_EN_1_DBGAPB register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_LSB   16

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_MSB   16

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_SET_MSK   0x00010000

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_CLR_MSK   0xfffeffff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_RESET   0x1

The reset value of the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_SYSMGR_FPGAINTF_EN_1_STMEVENT register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_LSB   24

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_MSB   24

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_SET_MSK   0x01000000

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_CLR_MSK   0xfeffffff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field value.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_RESET   0x1

The reset value of the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_SYSMGR_FPGAINTF_EN_1_CTMTRIGGER register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_1_RESET   0xffffffff

The reset value of the ALT_SYSMGR_FPGAINTF_EN_1 register.

#define ALT_SYSMGR_FPGAINTF_EN_1_OFST   0x68

The byte offset of the ALT_SYSMGR_FPGAINTF_EN_1 register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_FPGAINTF_EN_1.