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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register has 12 individual interrupt masks for the MON. Controls whether an interrupt on Port A can create an interrupt for the interrupt controller by not masking it. By default, all interrupts bits are unmasked. Whenever a 1 is written to a bit in this register, it masks the interrupt generation capability for this signal; otherwise interrupts are allowed through. The unmasked status can be read as well as the resultant status after masking.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | Interrupt Mask Field (nSTATUS) |
[1] | RW | 0x0 | Interrupt Mask Field (CONF_DONE) |
[2] | RW | 0x0 | Interrupt Mask Field (INIT_DONE) |
[3] | RW | 0x0 | Interrupt Mask Field (CRC_ERROR) |
[4] | RW | 0x0 | Interrupt Mask Field (CVP_CONF_DONE) |
[5] | RW | 0x0 | Interrupt Mask Field (PR_READY) |
[6] | RW | 0x0 | Interrupt Mask Field (PR_ERROR) |
[7] | RW | 0x0 | Interrupt Mask Field (PR_DONE) |
[8] | RW | 0x0 | Interrupt Mask Field (nCONFIG Pin) |
[9] | RW | 0x0 | Interrupt Mask Field (nSTATUS Pin) |
[10] | RW | 0x0 | Interrupt Mask Field (CONF_DONE Pin) |
[11] | RW | 0x0 | Interrupt Mask Field (FPGA_POWER_ON) |
[31:12] | ??? | 0x0 | UNDEFINED |
Field : Interrupt Mask Field (nSTATUS) - ns | ||||||||||
Controls whether an interrupt for nSTATUS can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_NS_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_LSB 0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_MSB 0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_SET_MSK 0x00000001 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_MON_GPIO_INTMSK_NS_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Interrupt Mask Field (CONF_DONE) - cd | ||||||||||
Controls whether an interrupt for CONF_DONE can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_CD_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_LSB 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_MSB 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_SET_MSK 0x00000002 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_CLR_MSK 0xfffffffd | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_GET(value) (((value) & 0x00000002) >> 1) | |||||||||
#define | ALT_MON_GPIO_INTMSK_CD_SET(value) (((value) << 1) & 0x00000002) | |||||||||
Field : Interrupt Mask Field (INIT_DONE) - id | ||||||||||
Controls whether an interrupt for INIT_DONE can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_ID_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_LSB 2 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_MSB 2 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_SET_MSK 0x00000004 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_CLR_MSK 0xfffffffb | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_GET(value) (((value) & 0x00000004) >> 2) | |||||||||
#define | ALT_MON_GPIO_INTMSK_ID_SET(value) (((value) << 2) & 0x00000004) | |||||||||
Field : Interrupt Mask Field (CRC_ERROR) - crc | ||||||||||
Controls whether an interrupt for CRC_ERROR can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_LSB 3 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_MSB 3 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_SET_MSK 0x00000008 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_CLR_MSK 0xfffffff7 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_GET(value) (((value) & 0x00000008) >> 3) | |||||||||
#define | ALT_MON_GPIO_INTMSK_CRC_SET(value) (((value) << 3) & 0x00000008) | |||||||||
Field : Interrupt Mask Field (CVP_CONF_DONE) - ccd | ||||||||||
Controls whether an interrupt for CVP_CONF_DONE can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_LSB 4 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_MSB 4 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_SET_MSK 0x00000010 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_CLR_MSK 0xffffffef | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_GET(value) (((value) & 0x00000010) >> 4) | |||||||||
#define | ALT_MON_GPIO_INTMSK_CCD_SET(value) (((value) << 4) & 0x00000010) | |||||||||
Field : Interrupt Mask Field (PR_READY) - prr | ||||||||||
Controls whether an interrupt for PR_READY can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_LSB 5 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_MSB 5 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_SET_MSK 0x00000020 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_CLR_MSK 0xffffffdf | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_GET(value) (((value) & 0x00000020) >> 5) | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRR_SET(value) (((value) << 5) & 0x00000020) | |||||||||
Field : Interrupt Mask Field (PR_ERROR) - pre | ||||||||||
Controls whether an interrupt for PR_ERROR can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_LSB 6 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_MSB 6 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_SET_MSK 0x00000040 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_CLR_MSK 0xffffffbf | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_GET(value) (((value) & 0x00000040) >> 6) | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRE_SET(value) (((value) << 6) & 0x00000040) | |||||||||
Field : Interrupt Mask Field (PR_DONE) - prd | ||||||||||
Controls whether an interrupt for PR_DONE can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_LSB 7 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_MSB 7 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_SET_MSK 0x00000080 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_CLR_MSK 0xffffff7f | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_GET(value) (((value) & 0x00000080) >> 7) | |||||||||
#define | ALT_MON_GPIO_INTMSK_PRD_SET(value) (((value) << 7) & 0x00000080) | |||||||||
Field : Interrupt Mask Field (nCONFIG Pin) - ncp | ||||||||||
Controls whether an interrupt for nCONFIG Pin can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_LSB 8 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_MSB 8 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_SET_MSK 0x00000100 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_CLR_MSK 0xfffffeff | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_GET(value) (((value) & 0x00000100) >> 8) | |||||||||
#define | ALT_MON_GPIO_INTMSK_NCP_SET(value) (((value) << 8) & 0x00000100) | |||||||||
Field : Interrupt Mask Field (nSTATUS Pin) - nsp | ||||||||||
Controls whether an interrupt for nSTATUS Pin can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_LSB 9 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_MSB 9 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_SET_MSK 0x00000200 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_CLR_MSK 0xfffffdff | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_GET(value) (((value) & 0x00000200) >> 9) | |||||||||
#define | ALT_MON_GPIO_INTMSK_NSP_SET(value) (((value) << 9) & 0x00000200) | |||||||||
Field : Interrupt Mask Field (CONF_DONE Pin) - cdp | ||||||||||
Controls whether an interrupt for CONF_DONE Pin can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_LSB 10 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_MSB 10 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_SET_MSK 0x00000400 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_CLR_MSK 0xfffffbff | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_GET(value) (((value) & 0x00000400) >> 10) | |||||||||
#define | ALT_MON_GPIO_INTMSK_CDP_SET(value) (((value) << 10) & 0x00000400) | |||||||||
Field : Interrupt Mask Field (FPGA_POWER_ON) - fpo | ||||||||||
Controls whether an interrupt for FPGA_POWER_ON can generate an interrupt to the interrupt controller by not masking it. The unmasked status can be read as well as the resultant status after masking. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_E_DIS 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_E_EN 0x1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_LSB 11 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_MSB 11 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_WIDTH 1 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_SET_MSK 0x00000800 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_CLR_MSK 0xfffff7ff | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_RESET 0x0 | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_GET(value) (((value) & 0x00000800) >> 11) | |||||||||
#define | ALT_MON_GPIO_INTMSK_FPO_SET(value) (((value) << 11) & 0x00000800) | |||||||||
Data Structures | |
struct | ALT_MON_GPIO_INTMSK_s |
Macros | |
#define | ALT_MON_GPIO_INTMSK_OFST 0x34 |
#define | ALT_MON_GPIO_INTMSK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_MON_GPIO_INTMSK_OFST)) |
Typedefs | |
typedef struct ALT_MON_GPIO_INTMSK_s | ALT_MON_GPIO_INTMSK_t |
struct ALT_MON_GPIO_INTMSK_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_MON_GPIO_INTMSK.
Data Fields | ||
---|---|---|
uint32_t | ns: 1 | Interrupt Mask Field (nSTATUS) |
uint32_t | cd: 1 | Interrupt Mask Field (CONF_DONE) |
uint32_t | id: 1 | Interrupt Mask Field (INIT_DONE) |
uint32_t | crc: 1 | Interrupt Mask Field (CRC_ERROR) |
uint32_t | ccd: 1 | Interrupt Mask Field (CVP_CONF_DONE) |
uint32_t | prr: 1 | Interrupt Mask Field (PR_READY) |
uint32_t | pre: 1 | Interrupt Mask Field (PR_ERROR) |
uint32_t | prd: 1 | Interrupt Mask Field (PR_DONE) |
uint32_t | ncp: 1 | Interrupt Mask Field (nCONFIG Pin) |
uint32_t | nsp: 1 | Interrupt Mask Field (nSTATUS Pin) |
uint32_t | cdp: 1 | Interrupt Mask Field (CONF_DONE Pin) |
uint32_t | fpo: 1 | Interrupt Mask Field (FPGA_POWER_ON) |
uint32_t | __pad0__: 20 | UNDEFINED |
#define ALT_MON_GPIO_INTMSK_NS_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_NS
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_NS_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_NS
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_NS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_NS register field.
#define ALT_MON_GPIO_INTMSK_NS_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_NS register field.
#define ALT_MON_GPIO_INTMSK_NS_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_NS register field.
#define ALT_MON_GPIO_INTMSK_NS_SET_MSK 0x00000001 |
The mask used to set the ALT_MON_GPIO_INTMSK_NS register field value.
#define ALT_MON_GPIO_INTMSK_NS_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_MON_GPIO_INTMSK_NS register field value.
#define ALT_MON_GPIO_INTMSK_NS_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_NS register field.
#define ALT_MON_GPIO_INTMSK_NS_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_MON_GPIO_INTMSK_NS field value from a register.
#define ALT_MON_GPIO_INTMSK_NS_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_MON_GPIO_INTMSK_NS register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_CD_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CD
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_CD_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CD
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_CD_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_CD register field.
#define ALT_MON_GPIO_INTMSK_CD_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_CD register field.
#define ALT_MON_GPIO_INTMSK_CD_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_CD register field.
#define ALT_MON_GPIO_INTMSK_CD_SET_MSK 0x00000002 |
The mask used to set the ALT_MON_GPIO_INTMSK_CD register field value.
#define ALT_MON_GPIO_INTMSK_CD_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_MON_GPIO_INTMSK_CD register field value.
#define ALT_MON_GPIO_INTMSK_CD_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_CD register field.
#define ALT_MON_GPIO_INTMSK_CD_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_MON_GPIO_INTMSK_CD field value from a register.
#define ALT_MON_GPIO_INTMSK_CD_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_MON_GPIO_INTMSK_CD register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_ID_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_ID
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_ID_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_ID
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_ID_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_ID register field.
#define ALT_MON_GPIO_INTMSK_ID_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_ID register field.
#define ALT_MON_GPIO_INTMSK_ID_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_ID register field.
#define ALT_MON_GPIO_INTMSK_ID_SET_MSK 0x00000004 |
The mask used to set the ALT_MON_GPIO_INTMSK_ID register field value.
#define ALT_MON_GPIO_INTMSK_ID_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_MON_GPIO_INTMSK_ID register field value.
#define ALT_MON_GPIO_INTMSK_ID_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_ID register field.
#define ALT_MON_GPIO_INTMSK_ID_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_MON_GPIO_INTMSK_ID field value from a register.
#define ALT_MON_GPIO_INTMSK_ID_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_MON_GPIO_INTMSK_ID register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_CRC_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CRC
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_CRC_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CRC
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_CRC_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_CRC register field.
#define ALT_MON_GPIO_INTMSK_CRC_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_CRC register field.
#define ALT_MON_GPIO_INTMSK_CRC_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_CRC register field.
#define ALT_MON_GPIO_INTMSK_CRC_SET_MSK 0x00000008 |
The mask used to set the ALT_MON_GPIO_INTMSK_CRC register field value.
#define ALT_MON_GPIO_INTMSK_CRC_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_MON_GPIO_INTMSK_CRC register field value.
#define ALT_MON_GPIO_INTMSK_CRC_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_CRC register field.
#define ALT_MON_GPIO_INTMSK_CRC_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_MON_GPIO_INTMSK_CRC field value from a register.
#define ALT_MON_GPIO_INTMSK_CRC_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_MON_GPIO_INTMSK_CRC register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_CCD_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CCD
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_CCD_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CCD
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_CCD_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_CCD register field.
#define ALT_MON_GPIO_INTMSK_CCD_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_CCD register field.
#define ALT_MON_GPIO_INTMSK_CCD_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_CCD register field.
#define ALT_MON_GPIO_INTMSK_CCD_SET_MSK 0x00000010 |
The mask used to set the ALT_MON_GPIO_INTMSK_CCD register field value.
#define ALT_MON_GPIO_INTMSK_CCD_CLR_MSK 0xffffffef |
The mask used to clear the ALT_MON_GPIO_INTMSK_CCD register field value.
#define ALT_MON_GPIO_INTMSK_CCD_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_CCD register field.
#define ALT_MON_GPIO_INTMSK_CCD_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_MON_GPIO_INTMSK_CCD field value from a register.
#define ALT_MON_GPIO_INTMSK_CCD_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_MON_GPIO_INTMSK_CCD register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_PRR_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_PRR
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_PRR_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_PRR
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_PRR_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_PRR register field.
#define ALT_MON_GPIO_INTMSK_PRR_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_PRR register field.
#define ALT_MON_GPIO_INTMSK_PRR_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_PRR register field.
#define ALT_MON_GPIO_INTMSK_PRR_SET_MSK 0x00000020 |
The mask used to set the ALT_MON_GPIO_INTMSK_PRR register field value.
#define ALT_MON_GPIO_INTMSK_PRR_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_MON_GPIO_INTMSK_PRR register field value.
#define ALT_MON_GPIO_INTMSK_PRR_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_PRR register field.
#define ALT_MON_GPIO_INTMSK_PRR_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_MON_GPIO_INTMSK_PRR field value from a register.
#define ALT_MON_GPIO_INTMSK_PRR_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_MON_GPIO_INTMSK_PRR register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_PRE_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_PRE
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_PRE_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_PRE
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_PRE_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_PRE register field.
#define ALT_MON_GPIO_INTMSK_PRE_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_PRE register field.
#define ALT_MON_GPIO_INTMSK_PRE_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_PRE register field.
#define ALT_MON_GPIO_INTMSK_PRE_SET_MSK 0x00000040 |
The mask used to set the ALT_MON_GPIO_INTMSK_PRE register field value.
#define ALT_MON_GPIO_INTMSK_PRE_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_MON_GPIO_INTMSK_PRE register field value.
#define ALT_MON_GPIO_INTMSK_PRE_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_PRE register field.
#define ALT_MON_GPIO_INTMSK_PRE_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_MON_GPIO_INTMSK_PRE field value from a register.
#define ALT_MON_GPIO_INTMSK_PRE_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_MON_GPIO_INTMSK_PRE register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_PRD_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_PRD
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_PRD_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_PRD
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_PRD_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_PRD register field.
#define ALT_MON_GPIO_INTMSK_PRD_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_PRD register field.
#define ALT_MON_GPIO_INTMSK_PRD_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_PRD register field.
#define ALT_MON_GPIO_INTMSK_PRD_SET_MSK 0x00000080 |
The mask used to set the ALT_MON_GPIO_INTMSK_PRD register field value.
#define ALT_MON_GPIO_INTMSK_PRD_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_MON_GPIO_INTMSK_PRD register field value.
#define ALT_MON_GPIO_INTMSK_PRD_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_PRD register field.
#define ALT_MON_GPIO_INTMSK_PRD_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_MON_GPIO_INTMSK_PRD field value from a register.
#define ALT_MON_GPIO_INTMSK_PRD_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_MON_GPIO_INTMSK_PRD register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_NCP_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_NCP
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_NCP_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_NCP
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_NCP_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_NCP register field.
#define ALT_MON_GPIO_INTMSK_NCP_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_NCP register field.
#define ALT_MON_GPIO_INTMSK_NCP_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_NCP register field.
#define ALT_MON_GPIO_INTMSK_NCP_SET_MSK 0x00000100 |
The mask used to set the ALT_MON_GPIO_INTMSK_NCP register field value.
#define ALT_MON_GPIO_INTMSK_NCP_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_MON_GPIO_INTMSK_NCP register field value.
#define ALT_MON_GPIO_INTMSK_NCP_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_NCP register field.
#define ALT_MON_GPIO_INTMSK_NCP_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_MON_GPIO_INTMSK_NCP field value from a register.
#define ALT_MON_GPIO_INTMSK_NCP_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_MON_GPIO_INTMSK_NCP register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_NSP_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_NSP
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_NSP_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_NSP
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_NSP_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_NSP register field.
#define ALT_MON_GPIO_INTMSK_NSP_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_NSP register field.
#define ALT_MON_GPIO_INTMSK_NSP_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_NSP register field.
#define ALT_MON_GPIO_INTMSK_NSP_SET_MSK 0x00000200 |
The mask used to set the ALT_MON_GPIO_INTMSK_NSP register field value.
#define ALT_MON_GPIO_INTMSK_NSP_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_MON_GPIO_INTMSK_NSP register field value.
#define ALT_MON_GPIO_INTMSK_NSP_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_NSP register field.
#define ALT_MON_GPIO_INTMSK_NSP_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_MON_GPIO_INTMSK_NSP field value from a register.
#define ALT_MON_GPIO_INTMSK_NSP_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_MON_GPIO_INTMSK_NSP register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_CDP_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CDP
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_CDP_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_CDP
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_CDP_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_CDP register field.
#define ALT_MON_GPIO_INTMSK_CDP_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_CDP register field.
#define ALT_MON_GPIO_INTMSK_CDP_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_CDP register field.
#define ALT_MON_GPIO_INTMSK_CDP_SET_MSK 0x00000400 |
The mask used to set the ALT_MON_GPIO_INTMSK_CDP register field value.
#define ALT_MON_GPIO_INTMSK_CDP_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_MON_GPIO_INTMSK_CDP register field value.
#define ALT_MON_GPIO_INTMSK_CDP_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_CDP register field.
#define ALT_MON_GPIO_INTMSK_CDP_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_MON_GPIO_INTMSK_CDP field value from a register.
#define ALT_MON_GPIO_INTMSK_CDP_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_MON_GPIO_INTMSK_CDP register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_FPO_E_DIS 0x0 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_FPO
Unmask Interrupt
#define ALT_MON_GPIO_INTMSK_FPO_E_EN 0x1 |
Enumerated value for register field ALT_MON_GPIO_INTMSK_FPO
Mask Interrupt
#define ALT_MON_GPIO_INTMSK_FPO_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_MON_GPIO_INTMSK_FPO register field.
#define ALT_MON_GPIO_INTMSK_FPO_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_MON_GPIO_INTMSK_FPO register field.
#define ALT_MON_GPIO_INTMSK_FPO_WIDTH 1 |
The width in bits of the ALT_MON_GPIO_INTMSK_FPO register field.
#define ALT_MON_GPIO_INTMSK_FPO_SET_MSK 0x00000800 |
The mask used to set the ALT_MON_GPIO_INTMSK_FPO register field value.
#define ALT_MON_GPIO_INTMSK_FPO_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_MON_GPIO_INTMSK_FPO register field value.
#define ALT_MON_GPIO_INTMSK_FPO_RESET 0x0 |
The reset value of the ALT_MON_GPIO_INTMSK_FPO register field.
#define ALT_MON_GPIO_INTMSK_FPO_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_MON_GPIO_INTMSK_FPO field value from a register.
#define ALT_MON_GPIO_INTMSK_FPO_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_MON_GPIO_INTMSK_FPO register field value suitable for setting the register.
#define ALT_MON_GPIO_INTMSK_OFST 0x34 |
The byte offset of the ALT_MON_GPIO_INTMSK register from the beginning of the component.
#define ALT_MON_GPIO_INTMSK_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_MON_GPIO_INTMSK_OFST)) |
The address of the ALT_MON_GPIO_INTMSK register.
typedef struct ALT_MON_GPIO_INTMSK_s ALT_MON_GPIO_INTMSK_t |
The typedef declaration for register ALT_MON_GPIO_INTMSK.