Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : region0addr

Description

Base and Limit definition for Region 0

Register Layout

Bits Access Reset Description
[5:0] RW 0x0 ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE
[15:6] ??? Unknown UNDEFINED
[21:16] RW 0x0 ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT
[31:22] ??? Unknown UNDEFINED

Field : base

Base defines the 6 bit MSB of the address field. Remaining LSB field is all zeros. Region start address is {base, 12'h000}

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_LSB   0
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_MSB   5
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_WIDTH   6
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_SET_MSK   0x0000003f
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_CLR_MSK   0xffffffc0
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_GET(value)   (((value) & 0x0000003f) >> 0)
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_SET(value)   (((value) << 0) & 0x0000003f)
 

Field : limit

Limit defines the 6 bit MSB of the address field. Remaining LSB field is all ones. Region end address is {limit, 12'hFFF}

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_LSB   16
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_MSB   21
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_WIDTH   6
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_SET_MSK   0x003f0000
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_CLR_MSK   0xffc0ffff
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_GET(value)   (((value) & 0x003f0000) >> 16)
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_SET(value)   (((value) << 16) & 0x003f0000)
 

Data Structures

struct  ALT_NOC_FW_OCRAM_SCR_REG0ADDR_s
 

Macros

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_RESET   0x00000000
 
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_OFST   0xc
 

Typedefs

typedef struct
ALT_NOC_FW_OCRAM_SCR_REG0ADDR_s 
ALT_NOC_FW_OCRAM_SCR_REG0ADDR_t
 

Data Structure Documentation

struct ALT_NOC_FW_OCRAM_SCR_REG0ADDR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_FW_OCRAM_SCR_REG0ADDR.

Data Fields
uint32_t base: 6 ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE
uint32_t __pad0__: 10 UNDEFINED
uint32_t limit: 6 ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT
uint32_t __pad1__: 10 UNDEFINED

Macro Definitions

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_MSB   5

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_WIDTH   6

The width in bits of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_SET_MSK   0x0000003f

The mask used to set the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field value.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_CLR_MSK   0xffffffc0

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field value.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_GET (   value)    (((value) & 0x0000003f) >> 0)

Extracts the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE_SET (   value)    (((value) << 0) & 0x0000003f)

Produces a ALT_NOC_FW_OCRAM_SCR_REG0ADDR_BASE register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_LSB   16

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_MSB   21

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_WIDTH   6

The width in bits of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_SET_MSK   0x003f0000

The mask used to set the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field value.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_CLR_MSK   0xffc0ffff

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field value.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_GET (   value)    (((value) & 0x003f0000) >> 16)

Extracts the ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT_SET (   value)    (((value) << 16) & 0x003f0000)

Produces a ALT_NOC_FW_OCRAM_SCR_REG0ADDR_LIMIT register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_RESET   0x00000000

The reset value of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR register.

#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_OFST   0xc

The byte offset of the ALT_NOC_FW_OCRAM_SCR_REG0ADDR register from the beginning of the component.

Typedef Documentation