Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Scan-Chain Enable Register - en

Description

This register is used to enable one of the 5 scan-chains (0-3 and 7). Only one scan-chain must be enabled at a time. A scan-chain is enabled by writing its corresponding enable field.

Software must use the System Manager to put the corresponding I/O scan-chain into the frozen state before attempting to send I/O configuration data to the I/O scan-chain.

Software must only write to this register when the Scan-Chain Engine is inactive.Writing this field at any other time has unpredictable results. This means that before writing to this field, software must read the STAT register and check that the ACTIVE and WFIFOCNT fields are both zero.

The name of this register in ARM documentation is PSEL.

Register Layout

Bits Access Reset Description
[0] RW 0x0 I/O Scan-Chain 0 Enable
[1] RW 0x0 I/O Scan-Chain 1 Enable
[2] RW 0x0 I/O Scan-Chain 2 Enable
[3] RW 0x0 I/O Scan-Chain 3 Enable
[6:4] ??? 0x0 UNDEFINED
[7] RW 0x0 FPGA JTAG Scan-Chain Enable
[31:8] ??? 0x0 UNDEFINED

Field : I/O Scan-Chain 0 Enable - ioscanchain0

Used to enable or disable I/O Scan-Chain 0

The name of this field in ARM documentation is PSEL0.

Field Enumeration Values:

Enum Value Description
ALT_SCANMGR_EN_IOSCANCHAIN0_E_DIS 0x0 Disable scan-chain
ALT_SCANMGR_EN_IOSCANCHAIN0_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_SCANMGR_EN_IOSCANCHAIN0_E_DIS   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_E_EN   0x1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_LSB   0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_MSB   0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_WIDTH   1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_SET_MSK   0x00000001
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_CLR_MSK   0xfffffffe
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_RESET   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SCANMGR_EN_IOSCANCHAIN0_SET(value)   (((value) << 0) & 0x00000001)
 

Field : I/O Scan-Chain 1 Enable - ioscanchain1

Used to enable or disable I/O Scan-Chain 1

The name of this field in ARM documentation is PSEL1.

Field Enumeration Values:

Enum Value Description
ALT_SCANMGR_EN_IOSCANCHAIN1_E_DIS 0x0 Disable scan-chain
ALT_SCANMGR_EN_IOSCANCHAIN1_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_SCANMGR_EN_IOSCANCHAIN1_E_DIS   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_E_EN   0x1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_LSB   1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_MSB   1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_WIDTH   1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_SET_MSK   0x00000002
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_CLR_MSK   0xfffffffd
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_RESET   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SCANMGR_EN_IOSCANCHAIN1_SET(value)   (((value) << 1) & 0x00000002)
 

Field : I/O Scan-Chain 2 Enable - ioscanchain2

Used to enable or disable I/O Scan-Chain 2

The name of this field in ARM documentation is PSEL2.

Field Enumeration Values:

Enum Value Description
ALT_SCANMGR_EN_IOSCANCHAIN2_E_DIS 0x0 Disable scan-chain
ALT_SCANMGR_EN_IOSCANCHAIN2_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_SCANMGR_EN_IOSCANCHAIN2_E_DIS   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_E_EN   0x1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_LSB   2
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_MSB   2
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_WIDTH   1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_SET_MSK   0x00000004
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_CLR_MSK   0xfffffffb
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_RESET   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_SCANMGR_EN_IOSCANCHAIN2_SET(value)   (((value) << 2) & 0x00000004)
 

Field : I/O Scan-Chain 3 Enable - ioscanchain3

Used to enable or disable I/O Scan-Chain 3

The name of this field in ARM documentation is PSEL3.

Field Enumeration Values:

Enum Value Description
ALT_SCANMGR_EN_IOSCANCHAIN3_E_DIS 0x0 Disable scan-chain
ALT_SCANMGR_EN_IOSCANCHAIN3_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_SCANMGR_EN_IOSCANCHAIN3_E_DIS   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_E_EN   0x1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_LSB   3
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_MSB   3
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_WIDTH   1
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_SET_MSK   0x00000008
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_CLR_MSK   0xfffffff7
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_RESET   0x0
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_SCANMGR_EN_IOSCANCHAIN3_SET(value)   (((value) << 3) & 0x00000008)
 

Field : FPGA JTAG Scan-Chain Enable - fpgajtag

Used to enable or disable FPGA JTAG scan-chain.Software must use the System Manager to enable the Scan Manager to drive the FPGA JTAG before attempting to communicate with the FPGA JTAG via the Scan Manager.

The name of this field in ARM documentation is PSEL7.

Field Enumeration Values:

Enum Value Description
ALT_SCANMGR_EN_FPGAJTAG_E_DIS 0x0 Disable scan-chain
ALT_SCANMGR_EN_FPGAJTAG_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_SCANMGR_EN_FPGAJTAG_E_DIS   0x0
 
#define ALT_SCANMGR_EN_FPGAJTAG_E_EN   0x1
 
#define ALT_SCANMGR_EN_FPGAJTAG_LSB   7
 
#define ALT_SCANMGR_EN_FPGAJTAG_MSB   7
 
#define ALT_SCANMGR_EN_FPGAJTAG_WIDTH   1
 
#define ALT_SCANMGR_EN_FPGAJTAG_SET_MSK   0x00000080
 
#define ALT_SCANMGR_EN_FPGAJTAG_CLR_MSK   0xffffff7f
 
#define ALT_SCANMGR_EN_FPGAJTAG_RESET   0x0
 
#define ALT_SCANMGR_EN_FPGAJTAG_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_SCANMGR_EN_FPGAJTAG_SET(value)   (((value) << 7) & 0x00000080)
 

Data Structures

struct  ALT_SCANMGR_EN_s
 

Macros

#define ALT_SCANMGR_EN_OFST   0x4
 

Typedefs

typedef struct ALT_SCANMGR_EN_s ALT_SCANMGR_EN_t
 

Data Structure Documentation

struct ALT_SCANMGR_EN_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SCANMGR_EN.

Data Fields
uint32_t ioscanchain0: 1 I/O Scan-Chain 0 Enable
uint32_t ioscanchain1: 1 I/O Scan-Chain 1 Enable
uint32_t ioscanchain2: 1 I/O Scan-Chain 2 Enable
uint32_t ioscanchain3: 1 I/O Scan-Chain 3 Enable
uint32_t __pad0__: 3 UNDEFINED
uint32_t fpgajtag: 1 FPGA JTAG Scan-Chain Enable
uint32_t __pad1__: 24 UNDEFINED

Macro Definitions

#define ALT_SCANMGR_EN_IOSCANCHAIN0_E_DIS   0x0

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN0

Disable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN0_E_EN   0x1

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN0

Enable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN0_LSB   0

The Least Significant Bit (LSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN0 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_MSB   0

The Most Significant Bit (MSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN0 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_WIDTH   1

The width in bits of the ALT_SCANMGR_EN_IOSCANCHAIN0 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_SET_MSK   0x00000001

The mask used to set the ALT_SCANMGR_EN_IOSCANCHAIN0 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SCANMGR_EN_IOSCANCHAIN0 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_RESET   0x0

The reset value of the ALT_SCANMGR_EN_IOSCANCHAIN0 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SCANMGR_EN_IOSCANCHAIN0 field value from a register.

#define ALT_SCANMGR_EN_IOSCANCHAIN0_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SCANMGR_EN_IOSCANCHAIN0 register field value suitable for setting the register.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_E_DIS   0x0

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN1

Disable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN1_E_EN   0x1

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN1

Enable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN1_LSB   1

The Least Significant Bit (LSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN1 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_MSB   1

The Most Significant Bit (MSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN1 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_WIDTH   1

The width in bits of the ALT_SCANMGR_EN_IOSCANCHAIN1 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_SET_MSK   0x00000002

The mask used to set the ALT_SCANMGR_EN_IOSCANCHAIN1 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SCANMGR_EN_IOSCANCHAIN1 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_RESET   0x0

The reset value of the ALT_SCANMGR_EN_IOSCANCHAIN1 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SCANMGR_EN_IOSCANCHAIN1 field value from a register.

#define ALT_SCANMGR_EN_IOSCANCHAIN1_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SCANMGR_EN_IOSCANCHAIN1 register field value suitable for setting the register.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_E_DIS   0x0

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN2

Disable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN2_E_EN   0x1

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN2

Enable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN2_LSB   2

The Least Significant Bit (LSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN2 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_MSB   2

The Most Significant Bit (MSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN2 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_WIDTH   1

The width in bits of the ALT_SCANMGR_EN_IOSCANCHAIN2 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_SET_MSK   0x00000004

The mask used to set the ALT_SCANMGR_EN_IOSCANCHAIN2 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_CLR_MSK   0xfffffffb

The mask used to clear the ALT_SCANMGR_EN_IOSCANCHAIN2 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_RESET   0x0

The reset value of the ALT_SCANMGR_EN_IOSCANCHAIN2 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_SCANMGR_EN_IOSCANCHAIN2 field value from a register.

#define ALT_SCANMGR_EN_IOSCANCHAIN2_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_SCANMGR_EN_IOSCANCHAIN2 register field value suitable for setting the register.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_E_DIS   0x0

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN3

Disable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN3_E_EN   0x1

Enumerated value for register field ALT_SCANMGR_EN_IOSCANCHAIN3

Enable scan-chain

#define ALT_SCANMGR_EN_IOSCANCHAIN3_LSB   3

The Least Significant Bit (LSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN3 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_MSB   3

The Most Significant Bit (MSB) position of the ALT_SCANMGR_EN_IOSCANCHAIN3 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_WIDTH   1

The width in bits of the ALT_SCANMGR_EN_IOSCANCHAIN3 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_SET_MSK   0x00000008

The mask used to set the ALT_SCANMGR_EN_IOSCANCHAIN3 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_CLR_MSK   0xfffffff7

The mask used to clear the ALT_SCANMGR_EN_IOSCANCHAIN3 register field value.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_RESET   0x0

The reset value of the ALT_SCANMGR_EN_IOSCANCHAIN3 register field.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_SCANMGR_EN_IOSCANCHAIN3 field value from a register.

#define ALT_SCANMGR_EN_IOSCANCHAIN3_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_SCANMGR_EN_IOSCANCHAIN3 register field value suitable for setting the register.

#define ALT_SCANMGR_EN_FPGAJTAG_E_DIS   0x0

Enumerated value for register field ALT_SCANMGR_EN_FPGAJTAG

Disable scan-chain

#define ALT_SCANMGR_EN_FPGAJTAG_E_EN   0x1

Enumerated value for register field ALT_SCANMGR_EN_FPGAJTAG

Enable scan-chain

#define ALT_SCANMGR_EN_FPGAJTAG_LSB   7

The Least Significant Bit (LSB) position of the ALT_SCANMGR_EN_FPGAJTAG register field.

#define ALT_SCANMGR_EN_FPGAJTAG_MSB   7

The Most Significant Bit (MSB) position of the ALT_SCANMGR_EN_FPGAJTAG register field.

#define ALT_SCANMGR_EN_FPGAJTAG_WIDTH   1

The width in bits of the ALT_SCANMGR_EN_FPGAJTAG register field.

#define ALT_SCANMGR_EN_FPGAJTAG_SET_MSK   0x00000080

The mask used to set the ALT_SCANMGR_EN_FPGAJTAG register field value.

#define ALT_SCANMGR_EN_FPGAJTAG_CLR_MSK   0xffffff7f

The mask used to clear the ALT_SCANMGR_EN_FPGAJTAG register field value.

#define ALT_SCANMGR_EN_FPGAJTAG_RESET   0x0

The reset value of the ALT_SCANMGR_EN_FPGAJTAG register field.

#define ALT_SCANMGR_EN_FPGAJTAG_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_SCANMGR_EN_FPGAJTAG field value from a register.

#define ALT_SCANMGR_EN_FPGAJTAG_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_SCANMGR_EN_FPGAJTAG register field value suitable for setting the register.

#define ALT_SCANMGR_EN_OFST   0x4

The byte offset of the ALT_SCANMGR_EN register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SCANMGR_EN.