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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
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[5:0] | RW | 0x0 | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE |
[31:6] | ??? | Unknown | UNDEFINED |
Field : FILTERS_3_WINDOWSIZE | |
Register WindowSize contains the encoded address mask used to filter packets. The effective Mask value is equal to ~(2max(WindowSize, packet.Len) - 1). A packet is a candidate when packet.Addr & Mask = AddrBase & Mask. This allows filteringof packets having an intersection with the AddrBase/WindowSize burst aligned region, even if the region is smaller than the packet. Field Access Macros: | |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_LSB 0 |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_MSB 5 |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_WIDTH 6 |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_SET_MSK 0x0000003f |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_CLR_MSK 0xffffffc0 |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_RESET 0x0 |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0) |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f) |
Data Structures | |
struct | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_s |
Macros | |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_RESET 0x00000000 |
#define | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_OFST 0x108 |
Typedefs | |
typedef struct ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_s | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_t |
struct ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE.
Data Fields | ||
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uint32_t | FILTERS_3_WINDOWSIZE: 6 | ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE |
uint32_t | __pad0__: 26 | UNDEFINED |
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_WIDTH 6 |
The width in bits of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_SET_MSK 0x0000003f |
The mask used to set the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field value.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_CLR_MSK 0xffffffc0 |
The mask used to clear the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field value.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_RESET 0x0 |
The reset value of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_GET | ( | value | ) | (((value) & 0x0000003f) >> 0) |
Extracts the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE field value from a register.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE_SET | ( | value | ) | (((value) << 0) & 0x0000003f) |
Produces a ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_FLTS_3_WINDOWSIZE register field value suitable for setting the register.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_RESET 0x00000000 |
The reset value of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE register.
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_OFST 0x108 |
The byte offset of the ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE register from the beginning of the component.
The typedef declaration for register ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE.