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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Per-Master Security bit for spi_master0
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 |
[7:1] | ??? | Unknown | UNDEFINED |
[8] | RW | 0x0 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA |
[15:9] | ??? | Unknown | UNDEFINED |
[16] | RW | 0x0 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H |
[23:17] | ??? | Unknown | UNDEFINED |
[24] | RW | 0x0 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP |
[31:25] | ??? | Unknown | UNDEFINED |
Field : mpu_m0 | |
Security bit configuration for transactions from mpu_m0 to spi_master0. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non-Secure transactions are allowed. Field Access Macros: | |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_LSB 0 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_MSB 0 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_WIDTH 1 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_SET_MSK 0x00000001 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_CLR_MSK 0xfffffffe |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_RESET 0x0 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_SET(value) (((value) << 0) & 0x00000001) |
Field : dma | |
Security bit configuration for transactions from dma to spi_master0. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non-Secure transactions are allowed. Field Access Macros: | |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_LSB 8 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_MSB 8 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_WIDTH 1 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_SET_MSK 0x00000100 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_CLR_MSK 0xfffffeff |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_RESET 0x0 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_SET(value) (((value) << 8) & 0x00000100) |
Field : fpga2soc | |
Security bit configuration for transactions from fpga2soc to spi_master0. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non-Secure transactions are allowed. Field Access Macros: | |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_LSB 16 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_MSB 16 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_WIDTH 1 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_SET_MSK 0x00010000 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_CLR_MSK 0xfffeffff |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_RESET 0x0 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_GET(value) (((value) & 0x00010000) >> 16) |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_SET(value) (((value) << 16) & 0x00010000) |
Field : ahb_ap | |
Security bit configuration for transactions from ahb_ap to spi_master0. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non-Secure transactions are allowed. Field Access Macros: | |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_LSB 24 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_MSB 24 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_WIDTH 1 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_SET_MSK 0x01000000 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_CLR_MSK 0xfeffffff |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_RESET 0x0 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_GET(value) (((value) & 0x01000000) >> 24) |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_SET(value) (((value) << 24) & 0x01000000) |
Data Structures | |
struct | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_s |
Macros | |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_RESET 0x00000000 |
#define | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_OFST 0x1c |
Typedefs | |
typedef struct ALT_NOC_FW_L4_PER_SCR_SPI_MST0_s | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_t |
struct ALT_NOC_FW_L4_PER_SCR_SPI_MST0_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NOC_FW_L4_PER_SCR_SPI_MST0.
Data Fields | ||
---|---|---|
uint32_t | mpu_m0: 1 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 |
uint32_t | __pad0__: 7 | UNDEFINED |
uint32_t | dma: 1 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA |
uint32_t | __pad1__: 7 | UNDEFINED |
uint32_t | fpga2soc: 1 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H |
uint32_t | __pad2__: 7 | UNDEFINED |
uint32_t | ahb_ap: 1 | ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP |
uint32_t | __pad3__: 7 | UNDEFINED |
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_WIDTH 1 |
The width in bits of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_SET_MSK 0x00000001 |
The mask used to set the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_RESET 0x0 |
The reset value of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 field value from a register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_NOC_FW_L4_PER_SCR_SPI_MST0_MPU_M0 register field value suitable for setting the register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_WIDTH 1 |
The width in bits of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_SET_MSK 0x00000100 |
The mask used to set the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_RESET 0x0 |
The reset value of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA field value from a register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_NOC_FW_L4_PER_SCR_SPI_MST0_DMA register field value suitable for setting the register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_WIDTH 1 |
The width in bits of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_SET_MSK 0x00010000 |
The mask used to set the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_RESET 0x0 |
The reset value of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H field value from a register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_NOC_FW_L4_PER_SCR_SPI_MST0_F2H register field value suitable for setting the register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_MSB 24 |
The Most Significant Bit (MSB) position of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_WIDTH 1 |
The width in bits of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_SET_MSK 0x01000000 |
The mask used to set the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_CLR_MSK 0xfeffffff |
The mask used to clear the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field value.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_RESET 0x0 |
The reset value of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_GET | ( | value | ) | (((value) & 0x01000000) >> 24) |
Extracts the ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP field value from a register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP_SET | ( | value | ) | (((value) << 24) & 0x01000000) |
Produces a ALT_NOC_FW_L4_PER_SCR_SPI_MST0_AHB_AP register field value suitable for setting the register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_RESET 0x00000000 |
The reset value of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0 register.
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_OFST 0x1c |
The byte offset of the ALT_NOC_FW_L4_PER_SCR_SPI_MST0 register from the beginning of the component.
typedef struct ALT_NOC_FW_L4_PER_SCR_SPI_MST0_s ALT_NOC_FW_L4_PER_SCR_SPI_MST0_t |
The typedef declaration for register ALT_NOC_FW_L4_PER_SCR_SPI_MST0.