Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : onfi_device_no_of_luns

Description

Indicates if the device is an ONFI compliant device and the number of LUNS present in the device

Register Layout

Bits Access Reset Description
[7:0] R 0x0 ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS
[8] RW 0x0 ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE
[31:9] ??? 0x0 UNDEFINED

Field : no_of_luns

Indicates the number of LUNS present in the device

Field Access Macros:

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_LSB   0
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_MSB   7
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_WIDTH   8
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_SET_MSK   0x000000ff
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_CLR_MSK   0xffffff00
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_RESET   0x0
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_GET(value)   (((value) & 0x000000ff) >> 0)
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_SET(value)   (((value) << 0) & 0x000000ff)
 

Field : onfi_device

Indicates if the device is an ONFI compliant device.[list] [*]0 - Non-ONFI compliant device [*]1 - ONFI compliant device[/list]

Field Access Macros:

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_LSB   8
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_MSB   8
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_WIDTH   1
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_SET_MSK   0x00000100
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_CLR_MSK   0xfffffeff
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_RESET   0x0
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_SET(value)   (((value) << 8) & 0x00000100)
 

Data Structures

struct  ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_s
 

Macros

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_OFST   0xc0
 

Typedefs

typedef struct
ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_s 
ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_t
 

Data Structure Documentation

struct ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS.

Data Fields
const uint32_t no_of_luns: 8 ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS
uint32_t onfi_device: 1 ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE
uint32_t __pad0__: 23 UNDEFINED

Macro Definitions

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_LSB   0

The Least Significant Bit (LSB) position of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_MSB   7

The Most Significant Bit (MSB) position of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_WIDTH   8

The width in bits of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_SET_MSK   0x000000ff

The mask used to set the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field value.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_CLR_MSK   0xffffff00

The mask used to clear the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field value.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_RESET   0x0

The reset value of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_GET (   value)    (((value) & 0x000000ff) >> 0)

Extracts the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS field value from a register.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS_SET (   value)    (((value) << 0) & 0x000000ff)

Produces a ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_NO_OF_LUNS register field value suitable for setting the register.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_LSB   8

The Least Significant Bit (LSB) position of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_MSB   8

The Most Significant Bit (MSB) position of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_WIDTH   1

The width in bits of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_SET_MSK   0x00000100

The mask used to set the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field value.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_CLR_MSK   0xfffffeff

The mask used to clear the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field value.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_RESET   0x0

The reset value of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE field value from a register.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ONFI_DEVICE register field value suitable for setting the register.

#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_OFST   0xc0

The byte offset of the ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS register from the beginning of the component.

Typedef Documentation