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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Device Status Register
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | R | 0x0 | ALT_USB_DEV_DSTS_SUSPSTS |
[2:1] | R | 0x1 | ALT_USB_DEV_DSTS_ENUMSPD |
[3] | R | 0x0 | ALT_USB_DEV_DSTS_ERRTICERR |
[7:4] | ??? | 0x0 | UNDEFINED |
[21:8] | R | 0x0 | ALT_USB_DEV_DSTS_SOFFN |
[23:22] | R | 0x0 | ALT_USB_DEV_DSTS_DEVLNSTS |
[31:24] | ??? | 0x0 | UNDEFINED |
Field : suspsts | ||||||||||
Suspend Status (SuspSts) In Device mode, this bit is Set as long as a Suspend condition is detected on the USB. The core enters the Suspended state when there is no activity on the phy_line_state_i signal For an extended period of time. The core comes out of the suspend: When there is any activity on the phy_line_state_i signal When the application writes to the Remote Wakeup Signaling bit in the Device Control register (DCTL.RmtWkUpSig). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_E_INACT 0x0 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_E_ACT 0x1 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_LSB 0 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_MSB 0 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_WIDTH 1 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_SET_MSK 0x00000001 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_RESET 0x0 | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_USB_DEV_DSTS_SUSPSTS_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : enumspd | ||||||||||||||||||||||
Enumerated Speed (EnumSpd) Indicates the speed at which the DWC_otg core has come up after speed detection through a chirp sequence. 2'b00: High speed (PHY clock is running at 30 or 60 MHz) 2'b01: Full speed (PHY clock is running at 30 or 60 MHz) 2'b10: Low speed (PHY clock is running at 6 MHz) 2'b11: Full speed (PHY clock is running at 48 MHz) Low speed is not supported For devices using a UTMI+ PHY. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_E_HS3060 0x0 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_E_FS3060 0x1 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_E_LS6 0x2 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_E_FS48 0x3 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_LSB 1 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_MSB 2 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_WIDTH 2 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_SET_MSK 0x00000006 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_CLR_MSK 0xfffffff9 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_RESET 0x1 | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_GET(value) (((value) & 0x00000006) >> 1) | |||||||||||||||||||||
#define | ALT_USB_DEV_DSTS_ENUMSPD_SET(value) (((value) << 1) & 0x00000006) | |||||||||||||||||||||
Field : errticerr | ||||||||||
Erratic Error (ErrticErr) The core sets this bit to report any erratic errors (phy_rxvalid_i/phy_rxvldh_i or phy_rxactive_i is asserted For at least 2 ms, due to PHY error) seen on the UTMI+ . Due to erratic errors, the DWC_otg core goes into Suspended state and an interrupt is generated to the application with Early Suspend bit of the Core Interrupt register (GINTSTS.ErlySusp). If the early suspend is asserted due to an erratic error, the application can only perform a soft disconnect recover. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_E_INACT 0x0 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_E_ACT 0x1 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_LSB 3 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_MSB 3 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_WIDTH 1 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_SET_MSK 0x00000008 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_CLR_MSK 0xfffffff7 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_RESET 0x0 | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_GET(value) (((value) & 0x00000008) >> 3) | |||||||||
#define | ALT_USB_DEV_DSTS_ERRTICERR_SET(value) (((value) << 3) & 0x00000008) | |||||||||
Field : soffn | |
Frame or Microframe Number of the Received SOF (SOFFN) When the core is operating at high speed, this field contains a microframe number. When the core is operating at full or low speed, this field contains a Frame number. Note: This register may return a non zero value if read immediately after power on reset. In case the register bit reads non zero immediately after power on reset it does not indicate that SOF has been received from the host. The read value of this interrupt is valid only after a valid connection between host and device is established. Field Access Macros: | |
#define | ALT_USB_DEV_DSTS_SOFFN_LSB 8 |
#define | ALT_USB_DEV_DSTS_SOFFN_MSB 21 |
#define | ALT_USB_DEV_DSTS_SOFFN_WIDTH 14 |
#define | ALT_USB_DEV_DSTS_SOFFN_SET_MSK 0x003fff00 |
#define | ALT_USB_DEV_DSTS_SOFFN_CLR_MSK 0xffc000ff |
#define | ALT_USB_DEV_DSTS_SOFFN_RESET 0x0 |
#define | ALT_USB_DEV_DSTS_SOFFN_GET(value) (((value) & 0x003fff00) >> 8) |
#define | ALT_USB_DEV_DSTS_SOFFN_SET(value) (((value) << 8) & 0x003fff00) |
Field : devlnsts | |
Device Line Status (DevLnSts) Indicates the current logic level USB data lines DevLnSts[1]: Logic level of D+ DevLnSts[0]: Logic level of D- Field Access Macros: | |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_LSB 22 |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_MSB 23 |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_WIDTH 2 |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_SET_MSK 0x00c00000 |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_CLR_MSK 0xff3fffff |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_RESET 0x0 |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_GET(value) (((value) & 0x00c00000) >> 22) |
#define | ALT_USB_DEV_DSTS_DEVLNSTS_SET(value) (((value) << 22) & 0x00c00000) |
Data Structures | |
struct | ALT_USB_DEV_DSTS_s |
Macros | |
#define | ALT_USB_DEV_DSTS_RESET 0x00000002 |
#define | ALT_USB_DEV_DSTS_OFST 0x8 |
#define | ALT_USB_DEV_DSTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DSTS_OFST)) |
Typedefs | |
typedef struct ALT_USB_DEV_DSTS_s | ALT_USB_DEV_DSTS_t |
struct ALT_USB_DEV_DSTS_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_USB_DEV_DSTS.
Data Fields | ||
---|---|---|
const uint32_t | suspsts: 1 | ALT_USB_DEV_DSTS_SUSPSTS |
const uint32_t | enumspd: 2 | ALT_USB_DEV_DSTS_ENUMSPD |
const uint32_t | errticerr: 1 | ALT_USB_DEV_DSTS_ERRTICERR |
uint32_t | __pad0__: 4 | UNDEFINED |
const uint32_t | soffn: 14 | ALT_USB_DEV_DSTS_SOFFN |
const uint32_t | devlnsts: 2 | ALT_USB_DEV_DSTS_DEVLNSTS |
uint32_t | __pad1__: 8 | UNDEFINED |
#define ALT_USB_DEV_DSTS_SUSPSTS_E_INACT 0x0 |
Enumerated value for register field ALT_USB_DEV_DSTS_SUSPSTS
No suspend state
#define ALT_USB_DEV_DSTS_SUSPSTS_E_ACT 0x1 |
Enumerated value for register field ALT_USB_DEV_DSTS_SUSPSTS
Suspend state
#define ALT_USB_DEV_DSTS_SUSPSTS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_SUSPSTS register field.
#define ALT_USB_DEV_DSTS_SUSPSTS_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_SUSPSTS register field.
#define ALT_USB_DEV_DSTS_SUSPSTS_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DSTS_SUSPSTS register field.
#define ALT_USB_DEV_DSTS_SUSPSTS_SET_MSK 0x00000001 |
The mask used to set the ALT_USB_DEV_DSTS_SUSPSTS register field value.
#define ALT_USB_DEV_DSTS_SUSPSTS_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_USB_DEV_DSTS_SUSPSTS register field value.
#define ALT_USB_DEV_DSTS_SUSPSTS_RESET 0x0 |
The reset value of the ALT_USB_DEV_DSTS_SUSPSTS register field.
#define ALT_USB_DEV_DSTS_SUSPSTS_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_USB_DEV_DSTS_SUSPSTS field value from a register.
#define ALT_USB_DEV_DSTS_SUSPSTS_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_USB_DEV_DSTS_SUSPSTS register field value suitable for setting the register.
#define ALT_USB_DEV_DSTS_ENUMSPD_E_HS3060 0x0 |
Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
High speed (PHY clock is running at 30 or 60 MHz)
#define ALT_USB_DEV_DSTS_ENUMSPD_E_FS3060 0x1 |
Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
Full speed (PHY clock is running at 30 or 60 MHz)
#define ALT_USB_DEV_DSTS_ENUMSPD_E_LS6 0x2 |
Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
Low speed (PHY clock is running at 6 MHz)
#define ALT_USB_DEV_DSTS_ENUMSPD_E_FS48 0x3 |
Enumerated value for register field ALT_USB_DEV_DSTS_ENUMSPD
Full speed (PHY clock is running at 48 MHz)
#define ALT_USB_DEV_DSTS_ENUMSPD_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_ENUMSPD register field.
#define ALT_USB_DEV_DSTS_ENUMSPD_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_ENUMSPD register field.
#define ALT_USB_DEV_DSTS_ENUMSPD_WIDTH 2 |
The width in bits of the ALT_USB_DEV_DSTS_ENUMSPD register field.
#define ALT_USB_DEV_DSTS_ENUMSPD_SET_MSK 0x00000006 |
The mask used to set the ALT_USB_DEV_DSTS_ENUMSPD register field value.
#define ALT_USB_DEV_DSTS_ENUMSPD_CLR_MSK 0xfffffff9 |
The mask used to clear the ALT_USB_DEV_DSTS_ENUMSPD register field value.
#define ALT_USB_DEV_DSTS_ENUMSPD_RESET 0x1 |
The reset value of the ALT_USB_DEV_DSTS_ENUMSPD register field.
#define ALT_USB_DEV_DSTS_ENUMSPD_GET | ( | value | ) | (((value) & 0x00000006) >> 1) |
Extracts the ALT_USB_DEV_DSTS_ENUMSPD field value from a register.
#define ALT_USB_DEV_DSTS_ENUMSPD_SET | ( | value | ) | (((value) << 1) & 0x00000006) |
Produces a ALT_USB_DEV_DSTS_ENUMSPD register field value suitable for setting the register.
#define ALT_USB_DEV_DSTS_ERRTICERR_E_INACT 0x0 |
Enumerated value for register field ALT_USB_DEV_DSTS_ERRTICERR
No Erratic Error
#define ALT_USB_DEV_DSTS_ERRTICERR_E_ACT 0x1 |
Enumerated value for register field ALT_USB_DEV_DSTS_ERRTICERR
Erratic Error
#define ALT_USB_DEV_DSTS_ERRTICERR_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_ERRTICERR register field.
#define ALT_USB_DEV_DSTS_ERRTICERR_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_ERRTICERR register field.
#define ALT_USB_DEV_DSTS_ERRTICERR_WIDTH 1 |
The width in bits of the ALT_USB_DEV_DSTS_ERRTICERR register field.
#define ALT_USB_DEV_DSTS_ERRTICERR_SET_MSK 0x00000008 |
The mask used to set the ALT_USB_DEV_DSTS_ERRTICERR register field value.
#define ALT_USB_DEV_DSTS_ERRTICERR_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_USB_DEV_DSTS_ERRTICERR register field value.
#define ALT_USB_DEV_DSTS_ERRTICERR_RESET 0x0 |
The reset value of the ALT_USB_DEV_DSTS_ERRTICERR register field.
#define ALT_USB_DEV_DSTS_ERRTICERR_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_USB_DEV_DSTS_ERRTICERR field value from a register.
#define ALT_USB_DEV_DSTS_ERRTICERR_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_USB_DEV_DSTS_ERRTICERR register field value suitable for setting the register.
#define ALT_USB_DEV_DSTS_SOFFN_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_SOFFN register field.
#define ALT_USB_DEV_DSTS_SOFFN_MSB 21 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_SOFFN register field.
#define ALT_USB_DEV_DSTS_SOFFN_WIDTH 14 |
The width in bits of the ALT_USB_DEV_DSTS_SOFFN register field.
#define ALT_USB_DEV_DSTS_SOFFN_SET_MSK 0x003fff00 |
The mask used to set the ALT_USB_DEV_DSTS_SOFFN register field value.
#define ALT_USB_DEV_DSTS_SOFFN_CLR_MSK 0xffc000ff |
The mask used to clear the ALT_USB_DEV_DSTS_SOFFN register field value.
#define ALT_USB_DEV_DSTS_SOFFN_RESET 0x0 |
The reset value of the ALT_USB_DEV_DSTS_SOFFN register field.
#define ALT_USB_DEV_DSTS_SOFFN_GET | ( | value | ) | (((value) & 0x003fff00) >> 8) |
Extracts the ALT_USB_DEV_DSTS_SOFFN field value from a register.
#define ALT_USB_DEV_DSTS_SOFFN_SET | ( | value | ) | (((value) << 8) & 0x003fff00) |
Produces a ALT_USB_DEV_DSTS_SOFFN register field value suitable for setting the register.
#define ALT_USB_DEV_DSTS_DEVLNSTS_LSB 22 |
The Least Significant Bit (LSB) position of the ALT_USB_DEV_DSTS_DEVLNSTS register field.
#define ALT_USB_DEV_DSTS_DEVLNSTS_MSB 23 |
The Most Significant Bit (MSB) position of the ALT_USB_DEV_DSTS_DEVLNSTS register field.
#define ALT_USB_DEV_DSTS_DEVLNSTS_WIDTH 2 |
The width in bits of the ALT_USB_DEV_DSTS_DEVLNSTS register field.
#define ALT_USB_DEV_DSTS_DEVLNSTS_SET_MSK 0x00c00000 |
The mask used to set the ALT_USB_DEV_DSTS_DEVLNSTS register field value.
#define ALT_USB_DEV_DSTS_DEVLNSTS_CLR_MSK 0xff3fffff |
The mask used to clear the ALT_USB_DEV_DSTS_DEVLNSTS register field value.
#define ALT_USB_DEV_DSTS_DEVLNSTS_RESET 0x0 |
The reset value of the ALT_USB_DEV_DSTS_DEVLNSTS register field.
#define ALT_USB_DEV_DSTS_DEVLNSTS_GET | ( | value | ) | (((value) & 0x00c00000) >> 22) |
Extracts the ALT_USB_DEV_DSTS_DEVLNSTS field value from a register.
#define ALT_USB_DEV_DSTS_DEVLNSTS_SET | ( | value | ) | (((value) << 22) & 0x00c00000) |
Produces a ALT_USB_DEV_DSTS_DEVLNSTS register field value suitable for setting the register.
#define ALT_USB_DEV_DSTS_RESET 0x00000002 |
The reset value of the ALT_USB_DEV_DSTS register.
#define ALT_USB_DEV_DSTS_OFST 0x8 |
The byte offset of the ALT_USB_DEV_DSTS register from the beginning of the component.
#define ALT_USB_DEV_DSTS_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DSTS_OFST)) |
The address of the ALT_USB_DEV_DSTS register.
typedef struct ALT_USB_DEV_DSTS_s ALT_USB_DEV_DSTS_t |
The typedef declaration for register ALT_USB_DEV_DSTS.