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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Reports status of transmit and receive.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | R | 0x0 | Data Ready bit |
[1] | R | 0x0 | Overrun error |
[2] | R | 0x0 | Parity Error |
[3] | R | 0x0 | Framing Error |
[4] | R | 0x0 | Break Interrupt |
[5] | R | 0x1 | Transmit Holding Register Empty bit |
[6] | R | 0x1 | Transmitter Empty bit |
[7] | R | 0x0 | Receiver FIFO Error bit |
[31:8] | ??? | 0x0 | UNDEFINED |
Field : Data Ready bit - dr | ||||||||||
This is used to indicate that the receiver contains at least one character in the RBR or the receiver FIFO. This bit is cleared when the RBR is read in the non-FIFO mode, or when the receiver FIFO is empty, in the FIFO mode. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LSR_DR_E_NODATARDY 0x0 | |||||||||
#define | ALT_UART_LSR_DR_E_DATARDY 0x1 | |||||||||
#define | ALT_UART_LSR_DR_LSB 0 | |||||||||
#define | ALT_UART_LSR_DR_MSB 0 | |||||||||
#define | ALT_UART_LSR_DR_WIDTH 1 | |||||||||
#define | ALT_UART_LSR_DR_SET_MSK 0x00000001 | |||||||||
#define | ALT_UART_LSR_DR_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_UART_LSR_DR_RESET 0x0 | |||||||||
#define | ALT_UART_LSR_DR_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_UART_LSR_DR_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Overrun error - oe | ||||||||||
This is used to indicate the occurrence of an overrun error. This occurs if a new data character was received before the previous data was read. In the non- FIFO mode, the OE bit is set when a new character arrives in the receiver before the previous character was read from the RBR. When this happens, the data in the RBR is overwritten. In the FIFO mode, an overrun error occurs when the FIFO is full and new character arrives at the receiver. The data in the FIFO is retained and the data in the receive shift register is lost.Reading the LSR clears the OE bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LSR_OE_E_NOOVERRUN 0x0 | |||||||||
#define | ALT_UART_LSR_OE_E_OVERRUN 0x1 | |||||||||
#define | ALT_UART_LSR_OE_LSB 1 | |||||||||
#define | ALT_UART_LSR_OE_MSB 1 | |||||||||
#define | ALT_UART_LSR_OE_WIDTH 1 | |||||||||
#define | ALT_UART_LSR_OE_SET_MSK 0x00000002 | |||||||||
#define | ALT_UART_LSR_OE_CLR_MSK 0xfffffffd | |||||||||
#define | ALT_UART_LSR_OE_RESET 0x0 | |||||||||
#define | ALT_UART_LSR_OE_GET(value) (((value) & 0x00000002) >> 1) | |||||||||
#define | ALT_UART_LSR_OE_SET(value) (((value) << 1) & 0x00000002) | |||||||||
Field : Parity Error - pe | ||||||||||
This is used to indicate the occurrence of a parity error in the receiver if the Parity Enable (PEN) bit (LCR[3]) is set. Since the parity error is associated with a character received, it is revealed when the character with the parity error arrives at the top of the FIFO. It should be noted that the Parity Error (PE) bit (LSR[2]) will be set if a break interrupt has occurred, as indicated by Break Interrupt (BI) bit (LSR[4]). Reading the LSR clears the PE bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LSR_PE_E_NOPARITYERR 0x0 | |||||||||
#define | ALT_UART_LSR_PE_E_PARITYERR 0x1 | |||||||||
#define | ALT_UART_LSR_PE_LSB 2 | |||||||||
#define | ALT_UART_LSR_PE_MSB 2 | |||||||||
#define | ALT_UART_LSR_PE_WIDTH 1 | |||||||||
#define | ALT_UART_LSR_PE_SET_MSK 0x00000004 | |||||||||
#define | ALT_UART_LSR_PE_CLR_MSK 0xfffffffb | |||||||||
#define | ALT_UART_LSR_PE_RESET 0x0 | |||||||||
#define | ALT_UART_LSR_PE_GET(value) (((value) & 0x00000004) >> 2) | |||||||||
#define | ALT_UART_LSR_PE_SET(value) (((value) << 2) & 0x00000004) | |||||||||
Field : Framing Error - fe | ||||||||||
This is used to indicate the occurrence of a framing error in the receiver. A framing error occurs when the receiver does not detect a valid STOP bit in the received data. In the FIFO mode, since the framing error is associated with a character received, it is revealed when the character with the framing error is at the top of the FIFO. When a framing error occurs the UART will try to resynchronize. It does this by assuming that the error was due to the start bit of the next character and then continues receiving the other bit i.e. data, and/or parity and stop. It should be noted that the Framing Error (FE) bit(LSR[3]) will be set if a break interrupt has occurred, as indicated by a Break Interrupt BIT bit (LSR[4]). Reading the LSR clears the FE bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LSR_FE_E_NOFRMERR 0x0 | |||||||||
#define | ALT_UART_LSR_FE_E_FRMERR 0x1 | |||||||||
#define | ALT_UART_LSR_FE_LSB 3 | |||||||||
#define | ALT_UART_LSR_FE_MSB 3 | |||||||||
#define | ALT_UART_LSR_FE_WIDTH 1 | |||||||||
#define | ALT_UART_LSR_FE_SET_MSK 0x00000008 | |||||||||
#define | ALT_UART_LSR_FE_CLR_MSK 0xfffffff7 | |||||||||
#define | ALT_UART_LSR_FE_RESET 0x0 | |||||||||
#define | ALT_UART_LSR_FE_GET(value) (((value) & 0x00000008) >> 3) | |||||||||
#define | ALT_UART_LSR_FE_SET(value) (((value) << 3) & 0x00000008) | |||||||||
Field : Break Interrupt - bi | |
This is used to indicate the detection of a break sequence on the serial input data. Set whenever the serial input, sin, is held in a logic 0 state for longer than the sum of start time + data bits + parity + stop bits. A break condition on serial input causes one and only one character, consisting of all zeros, to be received by the UART. The character associated with the break condition is carried through the FIFO and is revealed when the character is at the top of the FIFO. Reading the LSR clears the BI bit. Field Access Macros: | |
#define | ALT_UART_LSR_BI_LSB 4 |
#define | ALT_UART_LSR_BI_MSB 4 |
#define | ALT_UART_LSR_BI_WIDTH 1 |
#define | ALT_UART_LSR_BI_SET_MSK 0x00000010 |
#define | ALT_UART_LSR_BI_CLR_MSK 0xffffffef |
#define | ALT_UART_LSR_BI_RESET 0x0 |
#define | ALT_UART_LSR_BI_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_UART_LSR_BI_SET(value) (((value) << 4) & 0x00000010) |
Field : Transmit Holding Register Empty bit - thre | |
If THRE mode is disabled (IER[7] set to zero) this bit indicates that the THR or Tx FIFO is empty. This bit is set whenever data is transferred from the THR or Tx FIFO to the transmitter shift register and no new data has been written to the THR or Tx FIFO. This also causes a THRE Interrupt to occur, if the THRE Interrupt is enabled. If both THRE and FIFOs are enabled, both (IER[7] set to one and FCR[0] set to one respectively), the functionality will indicate the transmitter FIFO is full, and no longer controls THRE interrupts, which are then controlled by the FCR[5:4] thresholdsetting. Field Access Macros: | |
#define | ALT_UART_LSR_THRE_LSB 5 |
#define | ALT_UART_LSR_THRE_MSB 5 |
#define | ALT_UART_LSR_THRE_WIDTH 1 |
#define | ALT_UART_LSR_THRE_SET_MSK 0x00000020 |
#define | ALT_UART_LSR_THRE_CLR_MSK 0xffffffdf |
#define | ALT_UART_LSR_THRE_RESET 0x1 |
#define | ALT_UART_LSR_THRE_GET(value) (((value) & 0x00000020) >> 5) |
#define | ALT_UART_LSR_THRE_SET(value) (((value) << 5) & 0x00000020) |
Field : Transmitter Empty bit - temt | ||||||||||
If in FIFO mode and FIFO's enabled (FCR[0] set to one), this bit is set whenever the Transmitter Shift Register and the FIFO are both empty. If FIFO's are disabled, this bit is set whenever the Transmitter Holding Register and the Transmitter Shift Register are both empty. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LSR_TEMT_E_NOTEMPTY 0x0 | |||||||||
#define | ALT_UART_LSR_TEMT_E_EMPTY 0x1 | |||||||||
#define | ALT_UART_LSR_TEMT_LSB 6 | |||||||||
#define | ALT_UART_LSR_TEMT_MSB 6 | |||||||||
#define | ALT_UART_LSR_TEMT_WIDTH 1 | |||||||||
#define | ALT_UART_LSR_TEMT_SET_MSK 0x00000040 | |||||||||
#define | ALT_UART_LSR_TEMT_CLR_MSK 0xffffffbf | |||||||||
#define | ALT_UART_LSR_TEMT_RESET 0x1 | |||||||||
#define | ALT_UART_LSR_TEMT_GET(value) (((value) & 0x00000040) >> 6) | |||||||||
#define | ALT_UART_LSR_TEMT_SET(value) (((value) << 6) & 0x00000040) | |||||||||
Field : Receiver FIFO Error bit - rfe | ||||||||||
This bit is only relevant when FIFO's are enabled (FCR[0] set to one). This is used to indicate if there is at least one parity error, framing error, or break indication in the FIFO. This bit is cleared when the LSR is read and the character with the error is at the top of the receiver FIFO and there are no subsequent errors in the FIFO. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LSR_RFE_E_NOERR 0x0 | |||||||||
#define | ALT_UART_LSR_RFE_E_ERR 0x1 | |||||||||
#define | ALT_UART_LSR_RFE_LSB 7 | |||||||||
#define | ALT_UART_LSR_RFE_MSB 7 | |||||||||
#define | ALT_UART_LSR_RFE_WIDTH 1 | |||||||||
#define | ALT_UART_LSR_RFE_SET_MSK 0x00000080 | |||||||||
#define | ALT_UART_LSR_RFE_CLR_MSK 0xffffff7f | |||||||||
#define | ALT_UART_LSR_RFE_RESET 0x0 | |||||||||
#define | ALT_UART_LSR_RFE_GET(value) (((value) & 0x00000080) >> 7) | |||||||||
#define | ALT_UART_LSR_RFE_SET(value) (((value) << 7) & 0x00000080) | |||||||||
Data Structures | |
struct | ALT_UART_LSR_s |
Macros | |
#define | ALT_UART_LSR_OFST 0x14 |
#define | ALT_UART_LSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LSR_OFST)) |
Typedefs | |
typedef struct ALT_UART_LSR_s | ALT_UART_LSR_t |
struct ALT_UART_LSR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_UART_LSR.
Data Fields | ||
---|---|---|
const uint32_t | dr: 1 | Data Ready bit |
const uint32_t | oe: 1 | Overrun error |
const uint32_t | pe: 1 | Parity Error |
const uint32_t | fe: 1 | Framing Error |
const uint32_t | bi: 1 | Break Interrupt |
const uint32_t | thre: 1 | Transmit Holding Register Empty bit |
const uint32_t | temt: 1 | Transmitter Empty bit |
const uint32_t | rfe: 1 | Receiver FIFO Error bit |
uint32_t | __pad0__: 24 | UNDEFINED |
#define ALT_UART_LSR_DR_E_NODATARDY 0x0 |
Enumerated value for register field ALT_UART_LSR_DR
no data ready
#define ALT_UART_LSR_DR_E_DATARDY 0x1 |
Enumerated value for register field ALT_UART_LSR_DR
data ready
#define ALT_UART_LSR_DR_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_DR register field.
#define ALT_UART_LSR_DR_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_DR register field.
#define ALT_UART_LSR_DR_WIDTH 1 |
The width in bits of the ALT_UART_LSR_DR register field.
#define ALT_UART_LSR_DR_SET_MSK 0x00000001 |
The mask used to set the ALT_UART_LSR_DR register field value.
#define ALT_UART_LSR_DR_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_UART_LSR_DR register field value.
#define ALT_UART_LSR_DR_RESET 0x0 |
The reset value of the ALT_UART_LSR_DR register field.
#define ALT_UART_LSR_DR_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_UART_LSR_DR field value from a register.
#define ALT_UART_LSR_DR_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_UART_LSR_DR register field value suitable for setting the register.
#define ALT_UART_LSR_OE_E_NOOVERRUN 0x0 |
Enumerated value for register field ALT_UART_LSR_OE
no overrun error
#define ALT_UART_LSR_OE_E_OVERRUN 0x1 |
Enumerated value for register field ALT_UART_LSR_OE
overrun error
#define ALT_UART_LSR_OE_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_OE register field.
#define ALT_UART_LSR_OE_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_OE register field.
#define ALT_UART_LSR_OE_WIDTH 1 |
The width in bits of the ALT_UART_LSR_OE register field.
#define ALT_UART_LSR_OE_SET_MSK 0x00000002 |
The mask used to set the ALT_UART_LSR_OE register field value.
#define ALT_UART_LSR_OE_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_UART_LSR_OE register field value.
#define ALT_UART_LSR_OE_RESET 0x0 |
The reset value of the ALT_UART_LSR_OE register field.
#define ALT_UART_LSR_OE_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_UART_LSR_OE field value from a register.
#define ALT_UART_LSR_OE_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_UART_LSR_OE register field value suitable for setting the register.
#define ALT_UART_LSR_PE_E_NOPARITYERR 0x0 |
Enumerated value for register field ALT_UART_LSR_PE
no parity error
#define ALT_UART_LSR_PE_E_PARITYERR 0x1 |
Enumerated value for register field ALT_UART_LSR_PE
no parity error
#define ALT_UART_LSR_PE_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_PE register field.
#define ALT_UART_LSR_PE_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_PE register field.
#define ALT_UART_LSR_PE_WIDTH 1 |
The width in bits of the ALT_UART_LSR_PE register field.
#define ALT_UART_LSR_PE_SET_MSK 0x00000004 |
The mask used to set the ALT_UART_LSR_PE register field value.
#define ALT_UART_LSR_PE_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_UART_LSR_PE register field value.
#define ALT_UART_LSR_PE_RESET 0x0 |
The reset value of the ALT_UART_LSR_PE register field.
#define ALT_UART_LSR_PE_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_UART_LSR_PE field value from a register.
#define ALT_UART_LSR_PE_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_UART_LSR_PE register field value suitable for setting the register.
#define ALT_UART_LSR_FE_E_NOFRMERR 0x0 |
Enumerated value for register field ALT_UART_LSR_FE
no framing error
#define ALT_UART_LSR_FE_E_FRMERR 0x1 |
Enumerated value for register field ALT_UART_LSR_FE
framing error
#define ALT_UART_LSR_FE_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_FE register field.
#define ALT_UART_LSR_FE_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_FE register field.
#define ALT_UART_LSR_FE_WIDTH 1 |
The width in bits of the ALT_UART_LSR_FE register field.
#define ALT_UART_LSR_FE_SET_MSK 0x00000008 |
The mask used to set the ALT_UART_LSR_FE register field value.
#define ALT_UART_LSR_FE_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_UART_LSR_FE register field value.
#define ALT_UART_LSR_FE_RESET 0x0 |
The reset value of the ALT_UART_LSR_FE register field.
#define ALT_UART_LSR_FE_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_UART_LSR_FE field value from a register.
#define ALT_UART_LSR_FE_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_UART_LSR_FE register field value suitable for setting the register.
#define ALT_UART_LSR_BI_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_BI register field.
#define ALT_UART_LSR_BI_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_BI register field.
#define ALT_UART_LSR_BI_WIDTH 1 |
The width in bits of the ALT_UART_LSR_BI register field.
#define ALT_UART_LSR_BI_SET_MSK 0x00000010 |
The mask used to set the ALT_UART_LSR_BI register field value.
#define ALT_UART_LSR_BI_CLR_MSK 0xffffffef |
The mask used to clear the ALT_UART_LSR_BI register field value.
#define ALT_UART_LSR_BI_RESET 0x0 |
The reset value of the ALT_UART_LSR_BI register field.
#define ALT_UART_LSR_BI_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_UART_LSR_BI field value from a register.
#define ALT_UART_LSR_BI_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_UART_LSR_BI register field value suitable for setting the register.
#define ALT_UART_LSR_THRE_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_THRE register field.
#define ALT_UART_LSR_THRE_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_THRE register field.
#define ALT_UART_LSR_THRE_WIDTH 1 |
The width in bits of the ALT_UART_LSR_THRE register field.
#define ALT_UART_LSR_THRE_SET_MSK 0x00000020 |
The mask used to set the ALT_UART_LSR_THRE register field value.
#define ALT_UART_LSR_THRE_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_UART_LSR_THRE register field value.
#define ALT_UART_LSR_THRE_RESET 0x1 |
The reset value of the ALT_UART_LSR_THRE register field.
#define ALT_UART_LSR_THRE_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_UART_LSR_THRE field value from a register.
#define ALT_UART_LSR_THRE_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_UART_LSR_THRE register field value suitable for setting the register.
#define ALT_UART_LSR_TEMT_E_NOTEMPTY 0x0 |
Enumerated value for register field ALT_UART_LSR_TEMT
Transmit Empty not set
#define ALT_UART_LSR_TEMT_E_EMPTY 0x1 |
Enumerated value for register field ALT_UART_LSR_TEMT
Transmit Empty set
#define ALT_UART_LSR_TEMT_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_TEMT register field.
#define ALT_UART_LSR_TEMT_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_TEMT register field.
#define ALT_UART_LSR_TEMT_WIDTH 1 |
The width in bits of the ALT_UART_LSR_TEMT register field.
#define ALT_UART_LSR_TEMT_SET_MSK 0x00000040 |
The mask used to set the ALT_UART_LSR_TEMT register field value.
#define ALT_UART_LSR_TEMT_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_UART_LSR_TEMT register field value.
#define ALT_UART_LSR_TEMT_RESET 0x1 |
The reset value of the ALT_UART_LSR_TEMT register field.
#define ALT_UART_LSR_TEMT_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_UART_LSR_TEMT field value from a register.
#define ALT_UART_LSR_TEMT_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_UART_LSR_TEMT register field value suitable for setting the register.
#define ALT_UART_LSR_RFE_E_NOERR 0x0 |
Enumerated value for register field ALT_UART_LSR_RFE
no error in Rx FIFO
#define ALT_UART_LSR_RFE_E_ERR 0x1 |
Enumerated value for register field ALT_UART_LSR_RFE
error in Rx FIFO
#define ALT_UART_LSR_RFE_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_UART_LSR_RFE register field.
#define ALT_UART_LSR_RFE_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_UART_LSR_RFE register field.
#define ALT_UART_LSR_RFE_WIDTH 1 |
The width in bits of the ALT_UART_LSR_RFE register field.
#define ALT_UART_LSR_RFE_SET_MSK 0x00000080 |
The mask used to set the ALT_UART_LSR_RFE register field value.
#define ALT_UART_LSR_RFE_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_UART_LSR_RFE register field value.
#define ALT_UART_LSR_RFE_RESET 0x0 |
The reset value of the ALT_UART_LSR_RFE register field.
#define ALT_UART_LSR_RFE_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_UART_LSR_RFE field value from a register.
#define ALT_UART_LSR_RFE_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_UART_LSR_RFE register field value suitable for setting the register.
#define ALT_UART_LSR_OFST 0x14 |
The byte offset of the ALT_UART_LSR register from the beginning of the component.
#define ALT_UART_LSR_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LSR_OFST)) |
The address of the ALT_UART_LSR register.
typedef struct ALT_UART_LSR_s ALT_UART_LSR_t |
The typedef declaration for register ALT_UART_LSR.