Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Software Reset Register - srr

Description

Provides Software Resets for Tx/Rx FIFO's and the uart.

Register Layout

Bits Access Reset Description
[0] W 0x0 UART Reset
[1] W 0x0 Rx FIFO Reset
[2] W 0x0 Tx FIFO Reset
[31:3] ??? 0x0 UNDEFINED

Field : UART Reset - ur

This asynchronously resets the UART and synchronously removes the reset assertion.

Field Enumeration Values:

Enum Value Description
ALT_UART_SRR_UR_E_NORST 0x0 No reset Uart
ALT_UART_SRR_UR_E_RST 0x1 Reset Uart

Field Access Macros:

#define ALT_UART_SRR_UR_E_NORST   0x0
 
#define ALT_UART_SRR_UR_E_RST   0x1
 
#define ALT_UART_SRR_UR_LSB   0
 
#define ALT_UART_SRR_UR_MSB   0
 
#define ALT_UART_SRR_UR_WIDTH   1
 
#define ALT_UART_SRR_UR_SET_MSK   0x00000001
 
#define ALT_UART_SRR_UR_CLR_MSK   0xfffffffe
 
#define ALT_UART_SRR_UR_RESET   0x0
 
#define ALT_UART_SRR_UR_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_UART_SRR_UR_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Rx FIFO Reset - rfr

This is a shadow register for the Rx FIFO Reset bit (FCR[1]). This can be used to remove the burden on software having to store previously written FCR values (which are pretty static) just to reset the receive FIFO. This resets the control portion of the receive FIFO and treats the FIFO as empty. This will also de-assert the DMA Rx request and single signals. Note that this bit is 'self- clearing' and it is not necessary to clear this bit.

Field Enumeration Values:

Enum Value Description
ALT_UART_SRR_RFR_E_NORST 0x0 No reset Rx FIFO
ALT_UART_SRR_RFR_E_RST 0x1 Reset Rx FIFO

Field Access Macros:

#define ALT_UART_SRR_RFR_E_NORST   0x0
 
#define ALT_UART_SRR_RFR_E_RST   0x1
 
#define ALT_UART_SRR_RFR_LSB   1
 
#define ALT_UART_SRR_RFR_MSB   1
 
#define ALT_UART_SRR_RFR_WIDTH   1
 
#define ALT_UART_SRR_RFR_SET_MSK   0x00000002
 
#define ALT_UART_SRR_RFR_CLR_MSK   0xfffffffd
 
#define ALT_UART_SRR_RFR_RESET   0x0
 
#define ALT_UART_SRR_RFR_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_UART_SRR_RFR_SET(value)   (((value) << 1) & 0x00000002)
 

Field : Tx FIFO Reset - xfr

This is a shadow register forthe Tx FIFO Reset bit (FCR[2]). This can be used to remove the burden on software having to store previously written FCR values (which are pretty static) just to reset the transmit FIFO.This resets the control portion of the transmit FIFO and treats the FIFO as empty. This will also de-assert the DMA Tx request and single signals.

Field Enumeration Values:

Enum Value Description
ALT_UART_SRR_XFR_E_NORST 0x0 No reset Tx FIFO
ALT_UART_SRR_XFR_E_RST 0x1 Reset Tx FIFO

Field Access Macros:

#define ALT_UART_SRR_XFR_E_NORST   0x0
 
#define ALT_UART_SRR_XFR_E_RST   0x1
 
#define ALT_UART_SRR_XFR_LSB   2
 
#define ALT_UART_SRR_XFR_MSB   2
 
#define ALT_UART_SRR_XFR_WIDTH   1
 
#define ALT_UART_SRR_XFR_SET_MSK   0x00000004
 
#define ALT_UART_SRR_XFR_CLR_MSK   0xfffffffb
 
#define ALT_UART_SRR_XFR_RESET   0x0
 
#define ALT_UART_SRR_XFR_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_UART_SRR_XFR_SET(value)   (((value) << 2) & 0x00000004)
 

Data Structures

struct  ALT_UART_SRR_s
 

Macros

#define ALT_UART_SRR_OFST   0x88
 
#define ALT_UART_SRR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRR_OFST))
 

Typedefs

typedef struct ALT_UART_SRR_s ALT_UART_SRR_t
 

Data Structure Documentation

struct ALT_UART_SRR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_UART_SRR.

Data Fields
uint32_t ur: 1 UART Reset
uint32_t rfr: 1 Rx FIFO Reset
uint32_t xfr: 1 Tx FIFO Reset
uint32_t __pad0__: 29 UNDEFINED

Macro Definitions

#define ALT_UART_SRR_UR_E_NORST   0x0

Enumerated value for register field ALT_UART_SRR_UR

No reset Uart

#define ALT_UART_SRR_UR_E_RST   0x1

Enumerated value for register field ALT_UART_SRR_UR

Reset Uart

#define ALT_UART_SRR_UR_LSB   0

The Least Significant Bit (LSB) position of the ALT_UART_SRR_UR register field.

#define ALT_UART_SRR_UR_MSB   0

The Most Significant Bit (MSB) position of the ALT_UART_SRR_UR register field.

#define ALT_UART_SRR_UR_WIDTH   1

The width in bits of the ALT_UART_SRR_UR register field.

#define ALT_UART_SRR_UR_SET_MSK   0x00000001

The mask used to set the ALT_UART_SRR_UR register field value.

#define ALT_UART_SRR_UR_CLR_MSK   0xfffffffe

The mask used to clear the ALT_UART_SRR_UR register field value.

#define ALT_UART_SRR_UR_RESET   0x0

The reset value of the ALT_UART_SRR_UR register field.

#define ALT_UART_SRR_UR_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_UART_SRR_UR field value from a register.

#define ALT_UART_SRR_UR_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_UART_SRR_UR register field value suitable for setting the register.

#define ALT_UART_SRR_RFR_E_NORST   0x0

Enumerated value for register field ALT_UART_SRR_RFR

No reset Rx FIFO

#define ALT_UART_SRR_RFR_E_RST   0x1

Enumerated value for register field ALT_UART_SRR_RFR

Reset Rx FIFO

#define ALT_UART_SRR_RFR_LSB   1

The Least Significant Bit (LSB) position of the ALT_UART_SRR_RFR register field.

#define ALT_UART_SRR_RFR_MSB   1

The Most Significant Bit (MSB) position of the ALT_UART_SRR_RFR register field.

#define ALT_UART_SRR_RFR_WIDTH   1

The width in bits of the ALT_UART_SRR_RFR register field.

#define ALT_UART_SRR_RFR_SET_MSK   0x00000002

The mask used to set the ALT_UART_SRR_RFR register field value.

#define ALT_UART_SRR_RFR_CLR_MSK   0xfffffffd

The mask used to clear the ALT_UART_SRR_RFR register field value.

#define ALT_UART_SRR_RFR_RESET   0x0

The reset value of the ALT_UART_SRR_RFR register field.

#define ALT_UART_SRR_RFR_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_UART_SRR_RFR field value from a register.

#define ALT_UART_SRR_RFR_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_UART_SRR_RFR register field value suitable for setting the register.

#define ALT_UART_SRR_XFR_E_NORST   0x0

Enumerated value for register field ALT_UART_SRR_XFR

No reset Tx FIFO

#define ALT_UART_SRR_XFR_E_RST   0x1

Enumerated value for register field ALT_UART_SRR_XFR

Reset Tx FIFO

#define ALT_UART_SRR_XFR_LSB   2

The Least Significant Bit (LSB) position of the ALT_UART_SRR_XFR register field.

#define ALT_UART_SRR_XFR_MSB   2

The Most Significant Bit (MSB) position of the ALT_UART_SRR_XFR register field.

#define ALT_UART_SRR_XFR_WIDTH   1

The width in bits of the ALT_UART_SRR_XFR register field.

#define ALT_UART_SRR_XFR_SET_MSK   0x00000004

The mask used to set the ALT_UART_SRR_XFR register field value.

#define ALT_UART_SRR_XFR_CLR_MSK   0xfffffffb

The mask used to clear the ALT_UART_SRR_XFR register field value.

#define ALT_UART_SRR_XFR_RESET   0x0

The reset value of the ALT_UART_SRR_XFR register field.

#define ALT_UART_SRR_XFR_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_UART_SRR_XFR field value from a register.

#define ALT_UART_SRR_XFR_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_UART_SRR_XFR register field value suitable for setting the register.

#define ALT_UART_SRR_OFST   0x88

The byte offset of the ALT_UART_SRR register from the beginning of the component.

#define ALT_UART_SRR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRR_OFST))

The address of the ALT_UART_SRR register.

Typedef Documentation

The typedef declaration for register ALT_UART_SRR.