Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : gmacgrp_genpio

Description

Register 56 (General Purpose IO Register)

This register provides the control to drive up to 4 bits of output ports (GPO) and the status of up to 4 input

ports (GPIS). It also provides the control to generate interrupts on events occurring on the gpi_i pin.

Register Layout

Bits Access Reset Description
[0] R 0x0 ALT_EMAC_GMAC_GENPIO_GPIS
[7:1] R 0x0 ALT_EMAC_GMAC_GENPIO_RSVD_7_X
[8] RW 0x0 ALT_EMAC_GMAC_GENPIO_GPO
[15:9] R 0x0 ALT_EMAC_GMAC_GENPIO_RSVD_15_X
[16] RW 0x0 ALT_EMAC_GMAC_GENPIO_GPIE
[23:17] R 0x0 ALT_EMAC_GMAC_GENPIO_RSVD_23_X
[24] RW 0x0 ALT_EMAC_GMAC_GENPIO_GPIT
[31:25] R 0x0 ALT_EMAC_GMAC_GENPIO_RSVD_31_X

Field : gpis

General Purpose Input Status

This field gives the status of the signals connected to the gpi_i input ports. This field is of the following types based on the setting of the corresponding GPIT field of this register:

  • Latched-low (LL): This field is cleared when the corresponding gpi_i input becomes low. This field remains low until the host reads this field. After this, this field reflects the current value of the gpi_i input.
  • Latched-high (LH): This field is set when the corresponding gpi_i input becomes high. This field remains high until the host reads this field. After this, this field reflects the current value of the gpi_i input.


The number of bits available in this field depend on the GP Input Signal Width option. Other bits are not used (reserved and always reset).

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_GPIS_LSB   0
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_MSB   0
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_WIDTH   1
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_SET_MSK   0x00000001
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_CLR_MSK   0xfffffffe
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_EMAC_GMAC_GENPIO_GPIS_SET(value)   (((value) << 0) & 0x00000001)
 

Field : reserved_7_x

Reserved

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_LSB   1
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_MSB   7
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_WIDTH   7
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_SET_MSK   0x000000fe
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_CLR_MSK   0xffffff01
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_GET(value)   (((value) & 0x000000fe) >> 1)
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_SET(value)   (((value) << 1) & 0x000000fe)
 

Field : gpo

General Purpose Output

When this bit is set, it directly drives the gpo_o output ports. When this bit is reset, it does not directly drive the gpo_o output ports.

The number of bits available in this field depend on the GP Output Signal Width option. Other bits are not used (reserved and always reset).

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_GPO_LSB   8
 
#define ALT_EMAC_GMAC_GENPIO_GPO_MSB   8
 
#define ALT_EMAC_GMAC_GENPIO_GPO_WIDTH   1
 
#define ALT_EMAC_GMAC_GENPIO_GPO_SET_MSK   0x00000100
 
#define ALT_EMAC_GMAC_GENPIO_GPO_CLR_MSK   0xfffffeff
 
#define ALT_EMAC_GMAC_GENPIO_GPO_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_GPO_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_EMAC_GMAC_GENPIO_GPO_SET(value)   (((value) << 8) & 0x00000100)
 

Field : reserved_15_x

Reserved

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_LSB   9
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_MSB   15
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_WIDTH   7
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_SET_MSK   0x0000fe00
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_CLR_MSK   0xffff01ff
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_GET(value)   (((value) & 0x0000fe00) >> 9)
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_SET(value)   (((value) << 9) & 0x0000fe00)
 

Field : gpie

GPI Interrupt Enable

When this bit is set and the programmed event (LL or LH) occurs on the corresponding GPIS bit, Bit 11 (GPIIS) of Register 14 (Interrupt Status Register) is set. Accordingly, the interrupt is generated on the mci_intr_o or sbd_intr_o. The GPIIS bit is cleared when the host reads the Bits[7:0] of this register.

When reset, Bit 11 (GPIIS) of Register 14 (Interrupt Status Register) is not set when any event occurs on the corresponding GPIS bits.

The number of bits available in this field depend on the GP Input Signal Width option. Other bits are not used (reserved and always reset).

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_GPIE_LSB   16
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_MSB   16
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_WIDTH   1
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_SET_MSK   0x00010000
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_CLR_MSK   0xfffeffff
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_EMAC_GMAC_GENPIO_GPIE_SET(value)   (((value) << 16) & 0x00010000)
 

Field : reserved_23_x

Reserved

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_LSB   17
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_MSB   23
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_WIDTH   7
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_SET_MSK   0x00fe0000
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_CLR_MSK   0xff01ffff
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_GET(value)   (((value) & 0x00fe0000) >> 17)
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_SET(value)   (((value) << 17) & 0x00fe0000)
 

Field : gpit

GPI Type

When set, this bit indicates that the corresponding GPIS is of latched-low (LL) type. When reset, this bit indicates that the corresponding GPIS is of latched- high (LH) type.

The number of bits available in this field depend on the GP Input Signal Width option. Other bits are not used (reserved and always reset).

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_GPIT_LSB   24
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_MSB   24
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_WIDTH   1
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_SET_MSK   0x01000000
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_CLR_MSK   0xfeffffff
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_EMAC_GMAC_GENPIO_GPIT_SET(value)   (((value) << 24) & 0x01000000)
 

Field : reserved_31_x

Reserved

Field Access Macros:

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_LSB   25
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_MSB   31
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_WIDTH   7
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_SET_MSK   0xfe000000
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_CLR_MSK   0x01ffffff
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_RESET   0x0
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_GET(value)   (((value) & 0xfe000000) >> 25)
 
#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_SET(value)   (((value) << 25) & 0xfe000000)
 

Data Structures

struct  ALT_EMAC_GMAC_GENPIO_s
 

Macros

#define ALT_EMAC_GMAC_GENPIO_RESET   0x00000000
 
#define ALT_EMAC_GMAC_GENPIO_OFST   0xe0
 
#define ALT_EMAC_GMAC_GENPIO_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_GENPIO_OFST))
 

Typedefs

typedef struct
ALT_EMAC_GMAC_GENPIO_s 
ALT_EMAC_GMAC_GENPIO_t
 

Data Structure Documentation

struct ALT_EMAC_GMAC_GENPIO_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_GMAC_GENPIO.

Data Fields
const uint32_t gpis: 1 ALT_EMAC_GMAC_GENPIO_GPIS
const uint32_t reserved_7_x: 7 ALT_EMAC_GMAC_GENPIO_RSVD_7_X
uint32_t gpo: 1 ALT_EMAC_GMAC_GENPIO_GPO
const uint32_t reserved_15_x: 7 ALT_EMAC_GMAC_GENPIO_RSVD_15_X
uint32_t gpie: 1 ALT_EMAC_GMAC_GENPIO_GPIE
const uint32_t reserved_23_x: 7 ALT_EMAC_GMAC_GENPIO_RSVD_23_X
uint32_t gpit: 1 ALT_EMAC_GMAC_GENPIO_GPIT
const uint32_t reserved_31_x: 7 ALT_EMAC_GMAC_GENPIO_RSVD_31_X

Macro Definitions

#define ALT_EMAC_GMAC_GENPIO_GPIS_LSB   0

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_GPIS register field.

#define ALT_EMAC_GMAC_GENPIO_GPIS_MSB   0

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_GPIS register field.

#define ALT_EMAC_GMAC_GENPIO_GPIS_WIDTH   1

The width in bits of the ALT_EMAC_GMAC_GENPIO_GPIS register field.

#define ALT_EMAC_GMAC_GENPIO_GPIS_SET_MSK   0x00000001

The mask used to set the ALT_EMAC_GMAC_GENPIO_GPIS register field value.

#define ALT_EMAC_GMAC_GENPIO_GPIS_CLR_MSK   0xfffffffe

The mask used to clear the ALT_EMAC_GMAC_GENPIO_GPIS register field value.

#define ALT_EMAC_GMAC_GENPIO_GPIS_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_GPIS register field.

#define ALT_EMAC_GMAC_GENPIO_GPIS_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_EMAC_GMAC_GENPIO_GPIS field value from a register.

#define ALT_EMAC_GMAC_GENPIO_GPIS_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_EMAC_GMAC_GENPIO_GPIS register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_LSB   1

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_MSB   7

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_WIDTH   7

The width in bits of the ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_SET_MSK   0x000000fe

The mask used to set the ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_CLR_MSK   0xffffff01

The mask used to clear the ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_GET (   value)    (((value) & 0x000000fe) >> 1)

Extracts the ALT_EMAC_GMAC_GENPIO_RSVD_7_X field value from a register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_7_X_SET (   value)    (((value) << 1) & 0x000000fe)

Produces a ALT_EMAC_GMAC_GENPIO_RSVD_7_X register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_GPO_LSB   8

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_GPO register field.

#define ALT_EMAC_GMAC_GENPIO_GPO_MSB   8

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_GPO register field.

#define ALT_EMAC_GMAC_GENPIO_GPO_WIDTH   1

The width in bits of the ALT_EMAC_GMAC_GENPIO_GPO register field.

#define ALT_EMAC_GMAC_GENPIO_GPO_SET_MSK   0x00000100

The mask used to set the ALT_EMAC_GMAC_GENPIO_GPO register field value.

#define ALT_EMAC_GMAC_GENPIO_GPO_CLR_MSK   0xfffffeff

The mask used to clear the ALT_EMAC_GMAC_GENPIO_GPO register field value.

#define ALT_EMAC_GMAC_GENPIO_GPO_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_GPO register field.

#define ALT_EMAC_GMAC_GENPIO_GPO_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_EMAC_GMAC_GENPIO_GPO field value from a register.

#define ALT_EMAC_GMAC_GENPIO_GPO_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_EMAC_GMAC_GENPIO_GPO register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_LSB   9

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_MSB   15

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_WIDTH   7

The width in bits of the ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_SET_MSK   0x0000fe00

The mask used to set the ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_CLR_MSK   0xffff01ff

The mask used to clear the ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_GET (   value)    (((value) & 0x0000fe00) >> 9)

Extracts the ALT_EMAC_GMAC_GENPIO_RSVD_15_X field value from a register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_15_X_SET (   value)    (((value) << 9) & 0x0000fe00)

Produces a ALT_EMAC_GMAC_GENPIO_RSVD_15_X register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_GPIE_LSB   16

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_GPIE register field.

#define ALT_EMAC_GMAC_GENPIO_GPIE_MSB   16

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_GPIE register field.

#define ALT_EMAC_GMAC_GENPIO_GPIE_WIDTH   1

The width in bits of the ALT_EMAC_GMAC_GENPIO_GPIE register field.

#define ALT_EMAC_GMAC_GENPIO_GPIE_SET_MSK   0x00010000

The mask used to set the ALT_EMAC_GMAC_GENPIO_GPIE register field value.

#define ALT_EMAC_GMAC_GENPIO_GPIE_CLR_MSK   0xfffeffff

The mask used to clear the ALT_EMAC_GMAC_GENPIO_GPIE register field value.

#define ALT_EMAC_GMAC_GENPIO_GPIE_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_GPIE register field.

#define ALT_EMAC_GMAC_GENPIO_GPIE_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_EMAC_GMAC_GENPIO_GPIE field value from a register.

#define ALT_EMAC_GMAC_GENPIO_GPIE_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_EMAC_GMAC_GENPIO_GPIE register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_LSB   17

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_MSB   23

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_WIDTH   7

The width in bits of the ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_SET_MSK   0x00fe0000

The mask used to set the ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_CLR_MSK   0xff01ffff

The mask used to clear the ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_GET (   value)    (((value) & 0x00fe0000) >> 17)

Extracts the ALT_EMAC_GMAC_GENPIO_RSVD_23_X field value from a register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_23_X_SET (   value)    (((value) << 17) & 0x00fe0000)

Produces a ALT_EMAC_GMAC_GENPIO_RSVD_23_X register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_GPIT_LSB   24

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_GPIT register field.

#define ALT_EMAC_GMAC_GENPIO_GPIT_MSB   24

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_GPIT register field.

#define ALT_EMAC_GMAC_GENPIO_GPIT_WIDTH   1

The width in bits of the ALT_EMAC_GMAC_GENPIO_GPIT register field.

#define ALT_EMAC_GMAC_GENPIO_GPIT_SET_MSK   0x01000000

The mask used to set the ALT_EMAC_GMAC_GENPIO_GPIT register field value.

#define ALT_EMAC_GMAC_GENPIO_GPIT_CLR_MSK   0xfeffffff

The mask used to clear the ALT_EMAC_GMAC_GENPIO_GPIT register field value.

#define ALT_EMAC_GMAC_GENPIO_GPIT_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_GPIT register field.

#define ALT_EMAC_GMAC_GENPIO_GPIT_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_EMAC_GMAC_GENPIO_GPIT field value from a register.

#define ALT_EMAC_GMAC_GENPIO_GPIT_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_EMAC_GMAC_GENPIO_GPIT register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_LSB   25

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_MSB   31

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_WIDTH   7

The width in bits of the ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_SET_MSK   0xfe000000

The mask used to set the ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_CLR_MSK   0x01ffffff

The mask used to clear the ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field value.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_RESET   0x0

The reset value of the ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_GET (   value)    (((value) & 0xfe000000) >> 25)

Extracts the ALT_EMAC_GMAC_GENPIO_RSVD_31_X field value from a register.

#define ALT_EMAC_GMAC_GENPIO_RSVD_31_X_SET (   value)    (((value) << 25) & 0xfe000000)

Produces a ALT_EMAC_GMAC_GENPIO_RSVD_31_X register field value suitable for setting the register.

#define ALT_EMAC_GMAC_GENPIO_RESET   0x00000000

The reset value of the ALT_EMAC_GMAC_GENPIO register.

#define ALT_EMAC_GMAC_GENPIO_OFST   0xe0

The byte offset of the ALT_EMAC_GMAC_GENPIO register from the beginning of the component.

#define ALT_EMAC_GMAC_GENPIO_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_GENPIO_OFST))

The address of the ALT_EMAC_GMAC_GENPIO register.

Typedef Documentation

The typedef declaration for register ALT_EMAC_GMAC_GENPIO.