Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : FPGA interface Individual Enable Register - fpgaintf_en_3

Description

Used to disable individual interfaces between the FPGA and HPS.

This register is reset only on a cold reset (ignores warm reset).

Register Layout

Bits Access Reset Description
[0] RW 0x0 EMAC Module
[3:1] ??? 0x0 UNDEFINED
[4] RW 0x0 EMAC Module
[7:5] ??? 0x0 UNDEFINED
[8] RW 0x0 EMAC Module
[11:9] ??? 0x0 UNDEFINED
[12] RW 0x0 EMAC Module
[15:13] ??? 0x0 UNDEFINED
[16] RW 0x0 EMAC Module
[19:17] ??? 0x0 UNDEFINED
[20] RW 0x0 EMAC Module
[31:21] ??? 0x0 UNDEFINED

Field : EMAC Module - emac_0

Used to disable signals from the FPGA fabric to the EMAC modules that could potentially interfere with their normal operation.

The array index corresponds to the EMAC module instance.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_LSB   0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_MSB   0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SET_MSK   0x00000001
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_CLR_MSK   0xfffffffe
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_RESET   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SET(value)   (((value) << 0) & 0x00000001)
 

Field : EMAC Module - emac_0_switch

EMAC FPGA interface switch Enable

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_LSB   4
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_MSB   4
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_SET_MSK   0x00000010
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_CLR_MSK   0xffffffef
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_RESET   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_SET(value)   (((value) << 4) & 0x00000010)
 

Field : EMAC Module - emac_1

Used to disable signals from the FPGA fabric to the EMAC modules that could potentially interfere with their normal operation.

The array index corresponds to the EMAC module instance.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_LSB   8
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_MSB   8
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SET_MSK   0x00000100
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_CLR_MSK   0xfffffeff
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_RESET   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SET(value)   (((value) << 8) & 0x00000100)
 

Field : EMAC Module - emac_1_switch

EMAC FPGA interface switch Enable

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_LSB   12
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_MSB   12
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_SET_MSK   0x00001000
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_CLR_MSK   0xffffefff
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_RESET   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_GET(value)   (((value) & 0x00001000) >> 12)
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_SET(value)   (((value) << 12) & 0x00001000)
 

Field : EMAC Module - emac_2

Used to disable signals from the FPGA fabric to the EMAC modules that could potentially interfere with their normal operation.

The array index corresponds to the EMAC module instance.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_LSB   16
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_MSB   16
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SET_MSK   0x00010000
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_CLR_MSK   0xfffeffff
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_RESET   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SET(value)   (((value) << 16) & 0x00010000)
 

Field : EMAC Module - emac_2_switch

EMAC FPGA interface switch Enable

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_E_DIS | 0x0 | ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_E_EN | 0x1 |

Field Access Macros:

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_E_DIS   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_E_EN   0x1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_LSB   20
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_MSB   20
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_WIDTH   1
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_SET_MSK   0x00100000
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_CLR_MSK   0xffefffff
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_RESET   0x0
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_GET(value)   (((value) & 0x00100000) >> 20)
 
#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_SET(value)   (((value) << 20) & 0x00100000)
 

Data Structures

struct  ALT_SYSMGR_FPGAINTF_EN_3_s
 

Macros

#define ALT_SYSMGR_FPGAINTF_EN_3_RESET   0x00000000
 
#define ALT_SYSMGR_FPGAINTF_EN_3_OFST   0x70
 

Typedefs

typedef struct
ALT_SYSMGR_FPGAINTF_EN_3_s 
ALT_SYSMGR_FPGAINTF_EN_3_t
 

Data Structure Documentation

struct ALT_SYSMGR_FPGAINTF_EN_3_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_FPGAINTF_EN_3.

Data Fields
uint32_t emac_0: 1 EMAC Module
uint32_t __pad0__: 3 UNDEFINED
uint32_t emac_0_switch: 1 EMAC Module
uint32_t __pad1__: 3 UNDEFINED
uint32_t emac_1: 1 EMAC Module
uint32_t __pad2__: 3 UNDEFINED
uint32_t emac_1_switch: 1 EMAC Module
uint32_t __pad3__: 3 UNDEFINED
uint32_t emac_2: 1 EMAC Module
uint32_t __pad4__: 3 UNDEFINED
uint32_t emac_2_switch: 1 EMAC Module
uint32_t __pad5__: 11 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_MSB   0

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SET_MSK   0x00000001

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_RESET   0x0

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0 register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_LSB   4

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_MSB   4

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_SET_MSK   0x00000010

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_CLR_MSK   0xffffffef

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_RESET   0x0

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_SYSMGR_FPGAINTF_EN_3_EMAC_0_SWITCH register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_LSB   8

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_MSB   8

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SET_MSK   0x00000100

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_CLR_MSK   0xfffffeff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_RESET   0x0

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1 register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_LSB   12

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_MSB   12

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_SET_MSK   0x00001000

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_CLR_MSK   0xffffefff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_RESET   0x0

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_GET (   value)    (((value) & 0x00001000) >> 12)

Extracts the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH_SET (   value)    (((value) << 12) & 0x00001000)

Produces a ALT_SYSMGR_FPGAINTF_EN_3_EMAC_1_SWITCH register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_LSB   16

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_MSB   16

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SET_MSK   0x00010000

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_CLR_MSK   0xfffeffff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_RESET   0x0

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2 register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_E_DIS   0x0

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_E_EN   0x1

Enumerated value for register field ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_LSB   20

The Least Significant Bit (LSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_MSB   20

The Most Significant Bit (MSB) position of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_WIDTH   1

The width in bits of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_SET_MSK   0x00100000

The mask used to set the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_CLR_MSK   0xffefffff

The mask used to clear the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field value.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_RESET   0x0

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_GET (   value)    (((value) & 0x00100000) >> 20)

Extracts the ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH field value from a register.

#define ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH_SET (   value)    (((value) << 20) & 0x00100000)

Produces a ALT_SYSMGR_FPGAINTF_EN_3_EMAC_2_SWITCH register field value suitable for setting the register.

#define ALT_SYSMGR_FPGAINTF_EN_3_RESET   0x00000000

The reset value of the ALT_SYSMGR_FPGAINTF_EN_3 register.

#define ALT_SYSMGR_FPGAINTF_EN_3_OFST   0x70

The byte offset of the ALT_SYSMGR_FPGAINTF_EN_3 register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_FPGAINTF_EN_3.