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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
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[1:0] | RW | 0x3 | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD |
[31:2] | ??? | Unknown | UNDEFINED |
Field : MODE | |
0 = Programmable mode: a programmed priority is assigned to each read or write, 1 = Bandwidth Limiter Mode: a hard limit restricts throughput, 2 = Bypass mode: (<See SoC-specific QoS generator documentation>), 3 = Bandwidth Regulator mode: priority decreases when throughput exceeds a threshold. Field Access Macros: | |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_LSB 0 |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_MSB 1 |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_WIDTH 2 |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_SET_MSK 0x00000003 |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_CLR_MSK 0xfffffffc |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_RESET 0x3 |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_GET(value) (((value) & 0x00000003) >> 0) |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_SET(value) (((value) << 0) & 0x00000003) |
Data Structures | |
struct | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_s |
Macros | |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_RESET 0x00000003 |
#define | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_OFST 0xc |
Typedefs | |
typedef struct ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_s | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_t |
struct ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD.
Data Fields | ||
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uint32_t | MODE: 2 | ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD |
uint32_t | __pad0__: 30 | UNDEFINED |
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_WIDTH 2 |
The width in bits of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_SET_MSK 0x00000003 |
The mask used to set the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field value.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field value.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_RESET 0x3 |
The reset value of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD field value from a register.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_MOD register field value suitable for setting the register.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_RESET 0x00000003 |
The reset value of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD register.
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_OFST 0xc |
The byte offset of the ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD register from the beginning of the component.
The typedef declaration for register ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD.