Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Test Register - CTR

Description

The Test Mode is entered by setting bit CCTRL.Test to one. In Test Mode the bits EXL, Tx1, Tx0, LBack and Silent in the Test Register are writable. Bit Rx monitors the state of pin CAN_RXD and therefore is only readable. All Test Register functions are disabled when bit Test is reset to zero.

Loop Back Mode and CAN_TXD Control Mode are hardware test modes, not to be used by application programs.

Note: This register is only writable if bit CCTRL.Test is set.

Register Layout

Bits Access Reset Description
[2:0] ??? 0x0 UNDEFINED
[3] RW 0x0 Silent Mode
[4] RW 0x0 Loop Back Mode
[6:5] RW 0x0 Transmit Pin
[7] R Unknown Receive Pin
[31:8] ??? 0x0 UNDEFINED

Field : Silent Mode - Silent

Silent Mode

Field Enumeration Values:

Enum Value Description
ALT_CAN_PROTO_CTR_SILENT_E_NORMAL 0x0 Normal operation.
ALT_CAN_PROTO_CTR_SILENT_E_SILENT 0x1 The CAN is in Silent Mode.

Field Access Macros:

#define ALT_CAN_PROTO_CTR_SILENT_E_NORMAL   0x0
 
#define ALT_CAN_PROTO_CTR_SILENT_E_SILENT   0x1
 
#define ALT_CAN_PROTO_CTR_SILENT_LSB   3
 
#define ALT_CAN_PROTO_CTR_SILENT_MSB   3
 
#define ALT_CAN_PROTO_CTR_SILENT_WIDTH   1
 
#define ALT_CAN_PROTO_CTR_SILENT_SET_MSK   0x00000008
 
#define ALT_CAN_PROTO_CTR_SILENT_CLR_MSK   0xfffffff7
 
#define ALT_CAN_PROTO_CTR_SILENT_RESET   0x0
 
#define ALT_CAN_PROTO_CTR_SILENT_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_CAN_PROTO_CTR_SILENT_SET(value)   (((value) << 3) & 0x00000008)
 

Field : Loop Back Mode - LBack

Loop Back Mode

Field Enumeration Values:

Enum Value Description
ALT_CAN_PROTO_CTR_LBACK_E_DISD 0x0 Loop Back Mode is disabled.
ALT_CAN_PROTO_CTR_LBACK_E_END 0x1 Loop Back Mode is enabled.

Field Access Macros:

#define ALT_CAN_PROTO_CTR_LBACK_E_DISD   0x0
 
#define ALT_CAN_PROTO_CTR_LBACK_E_END   0x1
 
#define ALT_CAN_PROTO_CTR_LBACK_LSB   4
 
#define ALT_CAN_PROTO_CTR_LBACK_MSB   4
 
#define ALT_CAN_PROTO_CTR_LBACK_WIDTH   1
 
#define ALT_CAN_PROTO_CTR_LBACK_SET_MSK   0x00000010
 
#define ALT_CAN_PROTO_CTR_LBACK_CLR_MSK   0xffffffef
 
#define ALT_CAN_PROTO_CTR_LBACK_RESET   0x0
 
#define ALT_CAN_PROTO_CTR_LBACK_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_CAN_PROTO_CTR_LBACK_SET(value)   (((value) << 4) & 0x00000010)
 

Field : Transmit Pin - Tx

Controls CAN_TXD pin. Setting to non-zero disturbs message transfer.

Field Enumeration Values:

Enum Value Description
ALT_CAN_PROTO_CTR_TX_E_RST 0x0 Reset value, CAN_TXD is controlled by the
: CAN_Core.
ALT_CAN_PROTO_CTR_TX_E_SMPL 0x1 Sample Point can be monitored at CAN_TXD pin.
ALT_CAN_PROTO_CTR_TX_E_DOMINANT 0x2 CAN_TXD pin drives a dominant (0) value.
ALT_CAN_PROTO_CTR_TX_E_RECESSIVE 0x3 CAN_TXD pin drives a recessive (1) value.

Field Access Macros:

#define ALT_CAN_PROTO_CTR_TX_E_RST   0x0
 
#define ALT_CAN_PROTO_CTR_TX_E_SMPL   0x1
 
#define ALT_CAN_PROTO_CTR_TX_E_DOMINANT   0x2
 
#define ALT_CAN_PROTO_CTR_TX_E_RECESSIVE   0x3
 
#define ALT_CAN_PROTO_CTR_TX_LSB   5
 
#define ALT_CAN_PROTO_CTR_TX_MSB   6
 
#define ALT_CAN_PROTO_CTR_TX_WIDTH   2
 
#define ALT_CAN_PROTO_CTR_TX_SET_MSK   0x00000060
 
#define ALT_CAN_PROTO_CTR_TX_CLR_MSK   0xffffff9f
 
#define ALT_CAN_PROTO_CTR_TX_RESET   0x0
 
#define ALT_CAN_PROTO_CTR_TX_GET(value)   (((value) & 0x00000060) >> 5)
 
#define ALT_CAN_PROTO_CTR_TX_SET(value)   (((value) << 5) & 0x00000060)
 

Field : Receive Pin - Rx

Monitors the actual value of the CAN_RXD pin.

Field Enumeration Values:

Enum Value Description
ALT_CAN_PROTO_CTR_RX_E_DOMINANT 0x0 The CAN bus is dominant (CAN_RXD = 0).
ALT_CAN_PROTO_CTR_RX_E_RECESSIVE 0x1 The CAN bus is recessive (CAN_RXD = 1).

Field Access Macros:

#define ALT_CAN_PROTO_CTR_RX_E_DOMINANT   0x0
 
#define ALT_CAN_PROTO_CTR_RX_E_RECESSIVE   0x1
 
#define ALT_CAN_PROTO_CTR_RX_LSB   7
 
#define ALT_CAN_PROTO_CTR_RX_MSB   7
 
#define ALT_CAN_PROTO_CTR_RX_WIDTH   1
 
#define ALT_CAN_PROTO_CTR_RX_SET_MSK   0x00000080
 
#define ALT_CAN_PROTO_CTR_RX_CLR_MSK   0xffffff7f
 
#define ALT_CAN_PROTO_CTR_RX_RESET   0x0
 
#define ALT_CAN_PROTO_CTR_RX_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_CAN_PROTO_CTR_RX_SET(value)   (((value) << 7) & 0x00000080)
 

Data Structures

struct  ALT_CAN_PROTO_CTR_s
 

Macros

#define ALT_CAN_PROTO_CTR_OFST   0x14
 
#define ALT_CAN_PROTO_CTR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_CAN_PROTO_CTR_OFST))
 

Typedefs

typedef struct ALT_CAN_PROTO_CTR_s ALT_CAN_PROTO_CTR_t
 

Data Structure Documentation

struct ALT_CAN_PROTO_CTR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_CAN_PROTO_CTR.

Data Fields
uint32_t __pad0__: 3 UNDEFINED
uint32_t Silent: 1 Silent Mode
uint32_t LBack: 1 Loop Back Mode
uint32_t Tx: 2 Transmit Pin
const uint32_t Rx: 1 Receive Pin
uint32_t __pad1__: 24 UNDEFINED

Macro Definitions

#define ALT_CAN_PROTO_CTR_SILENT_E_NORMAL   0x0

Enumerated value for register field ALT_CAN_PROTO_CTR_SILENT

Normal operation.

#define ALT_CAN_PROTO_CTR_SILENT_E_SILENT   0x1

Enumerated value for register field ALT_CAN_PROTO_CTR_SILENT

The CAN is in Silent Mode.

#define ALT_CAN_PROTO_CTR_SILENT_LSB   3

The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CTR_SILENT register field.

#define ALT_CAN_PROTO_CTR_SILENT_MSB   3

The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CTR_SILENT register field.

#define ALT_CAN_PROTO_CTR_SILENT_WIDTH   1

The width in bits of the ALT_CAN_PROTO_CTR_SILENT register field.

#define ALT_CAN_PROTO_CTR_SILENT_SET_MSK   0x00000008

The mask used to set the ALT_CAN_PROTO_CTR_SILENT register field value.

#define ALT_CAN_PROTO_CTR_SILENT_CLR_MSK   0xfffffff7

The mask used to clear the ALT_CAN_PROTO_CTR_SILENT register field value.

#define ALT_CAN_PROTO_CTR_SILENT_RESET   0x0

The reset value of the ALT_CAN_PROTO_CTR_SILENT register field.

#define ALT_CAN_PROTO_CTR_SILENT_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_CAN_PROTO_CTR_SILENT field value from a register.

#define ALT_CAN_PROTO_CTR_SILENT_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_CAN_PROTO_CTR_SILENT register field value suitable for setting the register.

#define ALT_CAN_PROTO_CTR_LBACK_E_DISD   0x0

Enumerated value for register field ALT_CAN_PROTO_CTR_LBACK

Loop Back Mode is disabled.

#define ALT_CAN_PROTO_CTR_LBACK_E_END   0x1

Enumerated value for register field ALT_CAN_PROTO_CTR_LBACK

Loop Back Mode is enabled.

#define ALT_CAN_PROTO_CTR_LBACK_LSB   4

The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CTR_LBACK register field.

#define ALT_CAN_PROTO_CTR_LBACK_MSB   4

The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CTR_LBACK register field.

#define ALT_CAN_PROTO_CTR_LBACK_WIDTH   1

The width in bits of the ALT_CAN_PROTO_CTR_LBACK register field.

#define ALT_CAN_PROTO_CTR_LBACK_SET_MSK   0x00000010

The mask used to set the ALT_CAN_PROTO_CTR_LBACK register field value.

#define ALT_CAN_PROTO_CTR_LBACK_CLR_MSK   0xffffffef

The mask used to clear the ALT_CAN_PROTO_CTR_LBACK register field value.

#define ALT_CAN_PROTO_CTR_LBACK_RESET   0x0

The reset value of the ALT_CAN_PROTO_CTR_LBACK register field.

#define ALT_CAN_PROTO_CTR_LBACK_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_CAN_PROTO_CTR_LBACK field value from a register.

#define ALT_CAN_PROTO_CTR_LBACK_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_CAN_PROTO_CTR_LBACK register field value suitable for setting the register.

#define ALT_CAN_PROTO_CTR_TX_E_RST   0x0

Enumerated value for register field ALT_CAN_PROTO_CTR_TX

Reset value, CAN_TXD is controlled by the CAN_Core.

#define ALT_CAN_PROTO_CTR_TX_E_SMPL   0x1

Enumerated value for register field ALT_CAN_PROTO_CTR_TX

Sample Point can be monitored at CAN_TXD pin.

#define ALT_CAN_PROTO_CTR_TX_E_DOMINANT   0x2

Enumerated value for register field ALT_CAN_PROTO_CTR_TX

CAN_TXD pin drives a dominant (0) value.

#define ALT_CAN_PROTO_CTR_TX_E_RECESSIVE   0x3

Enumerated value for register field ALT_CAN_PROTO_CTR_TX

CAN_TXD pin drives a recessive (1) value.

#define ALT_CAN_PROTO_CTR_TX_LSB   5

The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CTR_TX register field.

#define ALT_CAN_PROTO_CTR_TX_MSB   6

The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CTR_TX register field.

#define ALT_CAN_PROTO_CTR_TX_WIDTH   2

The width in bits of the ALT_CAN_PROTO_CTR_TX register field.

#define ALT_CAN_PROTO_CTR_TX_SET_MSK   0x00000060

The mask used to set the ALT_CAN_PROTO_CTR_TX register field value.

#define ALT_CAN_PROTO_CTR_TX_CLR_MSK   0xffffff9f

The mask used to clear the ALT_CAN_PROTO_CTR_TX register field value.

#define ALT_CAN_PROTO_CTR_TX_RESET   0x0

The reset value of the ALT_CAN_PROTO_CTR_TX register field.

#define ALT_CAN_PROTO_CTR_TX_GET (   value)    (((value) & 0x00000060) >> 5)

Extracts the ALT_CAN_PROTO_CTR_TX field value from a register.

#define ALT_CAN_PROTO_CTR_TX_SET (   value)    (((value) << 5) & 0x00000060)

Produces a ALT_CAN_PROTO_CTR_TX register field value suitable for setting the register.

#define ALT_CAN_PROTO_CTR_RX_E_DOMINANT   0x0

Enumerated value for register field ALT_CAN_PROTO_CTR_RX

The CAN bus is dominant (CAN_RXD = 0).

#define ALT_CAN_PROTO_CTR_RX_E_RECESSIVE   0x1

Enumerated value for register field ALT_CAN_PROTO_CTR_RX

The CAN bus is recessive (CAN_RXD = 1).

#define ALT_CAN_PROTO_CTR_RX_LSB   7

The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CTR_RX register field.

#define ALT_CAN_PROTO_CTR_RX_MSB   7

The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CTR_RX register field.

#define ALT_CAN_PROTO_CTR_RX_WIDTH   1

The width in bits of the ALT_CAN_PROTO_CTR_RX register field.

#define ALT_CAN_PROTO_CTR_RX_SET_MSK   0x00000080

The mask used to set the ALT_CAN_PROTO_CTR_RX register field value.

#define ALT_CAN_PROTO_CTR_RX_CLR_MSK   0xffffff7f

The mask used to clear the ALT_CAN_PROTO_CTR_RX register field value.

#define ALT_CAN_PROTO_CTR_RX_RESET   0x0

The reset value of the ALT_CAN_PROTO_CTR_RX register field is UNKNOWN.

#define ALT_CAN_PROTO_CTR_RX_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_CAN_PROTO_CTR_RX field value from a register.

#define ALT_CAN_PROTO_CTR_RX_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_CAN_PROTO_CTR_RX register field value suitable for setting the register.

#define ALT_CAN_PROTO_CTR_OFST   0x14

The byte offset of the ALT_CAN_PROTO_CTR register from the beginning of the component.

#define ALT_CAN_PROTO_CTR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_CAN_PROTO_CTR_OFST))

The address of the ALT_CAN_PROTO_CTR register.

Typedef Documentation

The typedef declaration for register ALT_CAN_PROTO_CTR.