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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Indicates the die differentiator in case of NAND devices with stacked dies.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[7:0] | RW | 0x0 | ALT_NAND_CFG_DIE_MSK_VALUE |
[31:8] | ??? | 0x0 | UNDEFINED |
Field : value | |
The die_mask register information will be used for devices having address restrictions. For example, in certain Samsung devices, when the first address in a two-plane command is being sent, it is expected that the address is all zeros. But if the NAND device internally has multiple dies stacked, the die information (MSB of final row address) has to be sent. The value programmed in this register will be used to mask the address while sending out the last row address. Field Access Macros: | |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_LSB 0 |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_MSB 7 |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_WIDTH 8 |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_SET_MSK 0x000000ff |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_CLR_MSK 0xffffff00 |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_RESET 0x0 |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_GET(value) (((value) & 0x000000ff) >> 0) |
#define | ALT_NAND_CFG_DIE_MSK_VALUE_SET(value) (((value) << 0) & 0x000000ff) |
Data Structures | |
struct | ALT_NAND_CFG_DIE_MSK_s |
Macros | |
#define | ALT_NAND_CFG_DIE_MSK_OFST 0x260 |
Typedefs | |
typedef struct ALT_NAND_CFG_DIE_MSK_s | ALT_NAND_CFG_DIE_MSK_t |
struct ALT_NAND_CFG_DIE_MSK_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NAND_CFG_DIE_MSK.
Data Fields | ||
---|---|---|
uint32_t | value: 8 | ALT_NAND_CFG_DIE_MSK_VALUE |
uint32_t | __pad0__: 24 | UNDEFINED |
#define ALT_NAND_CFG_DIE_MSK_VALUE_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NAND_CFG_DIE_MSK_VALUE register field.
#define ALT_NAND_CFG_DIE_MSK_VALUE_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_NAND_CFG_DIE_MSK_VALUE register field.
#define ALT_NAND_CFG_DIE_MSK_VALUE_WIDTH 8 |
The width in bits of the ALT_NAND_CFG_DIE_MSK_VALUE register field.
#define ALT_NAND_CFG_DIE_MSK_VALUE_SET_MSK 0x000000ff |
The mask used to set the ALT_NAND_CFG_DIE_MSK_VALUE register field value.
#define ALT_NAND_CFG_DIE_MSK_VALUE_CLR_MSK 0xffffff00 |
The mask used to clear the ALT_NAND_CFG_DIE_MSK_VALUE register field value.
#define ALT_NAND_CFG_DIE_MSK_VALUE_RESET 0x0 |
The reset value of the ALT_NAND_CFG_DIE_MSK_VALUE register field.
#define ALT_NAND_CFG_DIE_MSK_VALUE_GET | ( | value | ) | (((value) & 0x000000ff) >> 0) |
Extracts the ALT_NAND_CFG_DIE_MSK_VALUE field value from a register.
#define ALT_NAND_CFG_DIE_MSK_VALUE_SET | ( | value | ) | (((value) << 0) & 0x000000ff) |
Produces a ALT_NAND_CFG_DIE_MSK_VALUE register field value suitable for setting the register.
#define ALT_NAND_CFG_DIE_MSK_OFST 0x260 |
The byte offset of the ALT_NAND_CFG_DIE_MSK register from the beginning of the component.
typedef struct ALT_NAND_CFG_DIE_MSK_s ALT_NAND_CFG_DIE_MSK_t |
The typedef declaration for register ALT_NAND_CFG_DIE_MSK.