Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Register 451 (System Time - Nanoseconds Register) - System_Time_Nanoseconds

Description

The value in this field has the sub second representation of time, with an accuracy of 0.46 ns. When TSCTRLSSR is set, each bit represents 1 ns and the maximum value is 0x3B9A_C9FF, after which it rolls-over to zero.

Register Layout

Bits Access Reset Description
[30:0] R 0x0 Timestamp Sub Seconds
[31] ??? 0x0 UNDEFINED

Field : Timestamp Sub Seconds - tsss

The value in this field has the sub second representation of time, with an accuracy of 0.46 ns. When bit 9 (TSCTRLSSR) is set in Register 448 (Timestamp Control Register), each bit represents 1 ns and the maximum value is 0x3B9A_C9FF, after which it rolls-over to zero.

Field Access Macros:

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_LSB   0
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_MSB   30
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_WIDTH   31
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_SET_MSK   0x7fffffff
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_CLR_MSK   0x80000000
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_RESET   0x0
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_GET(value)   (((value) & 0x7fffffff) >> 0)
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_SET(value)   (((value) << 0) & 0x7fffffff)
 

Data Structures

struct  ALT_EMAC_GMAC_SYS_TIME_NANOSECS_s
 

Macros

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_OFST   0x70c
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_SYS_TIME_NANOSECS_OFST))
 

Typedefs

typedef struct
ALT_EMAC_GMAC_SYS_TIME_NANOSECS_s 
ALT_EMAC_GMAC_SYS_TIME_NANOSECS_t
 

Data Structure Documentation

struct ALT_EMAC_GMAC_SYS_TIME_NANOSECS_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_GMAC_SYS_TIME_NANOSECS.

Data Fields
const uint32_t tsss: 31 Timestamp Sub Seconds
uint32_t __pad0__: 1 UNDEFINED

Macro Definitions

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_LSB   0

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_MSB   30

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_WIDTH   31

The width in bits of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_SET_MSK   0x7fffffff

The mask used to set the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field value.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_CLR_MSK   0x80000000

The mask used to clear the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field value.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_RESET   0x0

The reset value of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_GET (   value)    (((value) & 0x7fffffff) >> 0)

Extracts the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS field value from a register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS_SET (   value)    (((value) << 0) & 0x7fffffff)

Produces a ALT_EMAC_GMAC_SYS_TIME_NANOSECS_TSSS register field value suitable for setting the register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_OFST   0x70c

The byte offset of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS register from the beginning of the component.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_SYS_TIME_NANOSECS_OFST))

The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS register.

Typedef Documentation