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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS |
[1] | RW | 0x0 | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL |
[31:2] | ??? | 0x0 | UNDEFINED |
Field : phy_cal_success | |
This bit will be set to 1 if the PHY was able to successfully calibrate. Field Access Macros: | |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_LSB 0 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_MSB 0 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_WIDTH 1 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_SET_MSK 0x00000001 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_CLR_MSK 0xfffffffe |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_RESET 0x0 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_SET(value) (((value) << 0) & 0x00000001) |
Field : phy_cal_fail | |
This bit will be set to 1 if the PHY was unable to calibrate. Field Access Macros: | |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_LSB 1 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_MSB 1 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_WIDTH 1 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_SET_MSK 0x00000002 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_CLR_MSK 0xfffffffd |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_RESET 0x0 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_SET(value) (((value) << 1) & 0x00000002) |
Data Structures | |
struct | ALT_IO48_HMC_MMR_DRAMSTS_s |
Macros | |
#define | ALT_IO48_HMC_MMR_DRAMSTS_RESET 0x00000000 |
#define | ALT_IO48_HMC_MMR_DRAMSTS_OFST 0xec |
Typedefs | |
typedef struct ALT_IO48_HMC_MMR_DRAMSTS_s | ALT_IO48_HMC_MMR_DRAMSTS_t |
struct ALT_IO48_HMC_MMR_DRAMSTS_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_IO48_HMC_MMR_DRAMSTS.
Data Fields | ||
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uint32_t | phy_cal_success: 1 | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS |
uint32_t | phy_cal_fail: 1 | ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL |
uint32_t | __pad0__: 30 | UNDEFINED |
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_WIDTH 1 |
The width in bits of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_SET_MSK 0x00000001 |
The mask used to set the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field value.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field value.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_RESET 0x0 |
The reset value of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS field value from a register.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_SUCCESS register field value suitable for setting the register.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_WIDTH 1 |
The width in bits of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_SET_MSK 0x00000002 |
The mask used to set the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field value.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field value.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_RESET 0x0 |
The reset value of the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL field value from a register.
#define ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_IO48_HMC_MMR_DRAMSTS_PHY_CAL_FAIL register field value suitable for setting the register.
#define ALT_IO48_HMC_MMR_DRAMSTS_RESET 0x00000000 |
The reset value of the ALT_IO48_HMC_MMR_DRAMSTS register.
#define ALT_IO48_HMC_MMR_DRAMSTS_OFST 0xec |
The byte offset of the ALT_IO48_HMC_MMR_DRAMSTS register from the beginning of the component.
typedef struct ALT_IO48_HMC_MMR_DRAMSTS_s ALT_IO48_HMC_MMR_DRAMSTS_t |
The typedef declaration for register ALT_IO48_HMC_MMR_DRAMSTS.