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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Baud Rate Select.
This register is valid only when the DW_apb_ssi is configured as a master
device. When the DW_apb_ssi is configured as a serial slave, writing to
this location has no effect; reading from this location returns 0. The
register derives the frequency of the serial clock that regulates the data
transfer. The 16-bit field in this register defines the ssi_clk divider
value. It is impossible to write to this register when the DW_apb_ssi is
enabled. The DW_apb_ssi is enabled and disabled by writing to the SSIENR
register.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[15:0] | RW | 0x0 | ALT_SPIM_BAUDR_SCKDV |
[31:16] | ??? | 0x0 | UNDEFINED |
Field : sckdv | |
SSI Clock Divider. The LSB for this field is always set to 0 and is unaffected by a write operation, which ensures an even value is held in this register. If the value is 0, the serial output clock (sclk_out) is disabled. The frequency of the sclk_out is derived from the following equation: Fsclk_out = Fssi_clk/SCKDV where SCKDV is any even value between 2 and 65534. For example: for Fssi_clk = 3.6864MHz and SCKDV =2 Fsclk_out = 3.6864/2 = 1.8432MHz Field Access Macros: | |
#define | ALT_SPIM_BAUDR_SCKDV_LSB 0 |
#define | ALT_SPIM_BAUDR_SCKDV_MSB 15 |
#define | ALT_SPIM_BAUDR_SCKDV_WIDTH 16 |
#define | ALT_SPIM_BAUDR_SCKDV_SET_MSK 0x0000ffff |
#define | ALT_SPIM_BAUDR_SCKDV_CLR_MSK 0xffff0000 |
#define | ALT_SPIM_BAUDR_SCKDV_RESET 0x0 |
#define | ALT_SPIM_BAUDR_SCKDV_GET(value) (((value) & 0x0000ffff) >> 0) |
#define | ALT_SPIM_BAUDR_SCKDV_SET(value) (((value) << 0) & 0x0000ffff) |
Data Structures | |
struct | ALT_SPIM_BAUDR_s |
Macros | |
#define | ALT_SPIM_BAUDR_RESET 0x00000000 |
#define | ALT_SPIM_BAUDR_OFST 0x14 |
#define | ALT_SPIM_BAUDR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_BAUDR_OFST)) |
Typedefs | |
typedef struct ALT_SPIM_BAUDR_s | ALT_SPIM_BAUDR_t |
struct ALT_SPIM_BAUDR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SPIM_BAUDR.
Data Fields | ||
---|---|---|
uint32_t | sckdv: 16 | ALT_SPIM_BAUDR_SCKDV |
uint32_t | __pad0__: 16 | UNDEFINED |
#define ALT_SPIM_BAUDR_SCKDV_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SPIM_BAUDR_SCKDV register field.
#define ALT_SPIM_BAUDR_SCKDV_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_SPIM_BAUDR_SCKDV register field.
#define ALT_SPIM_BAUDR_SCKDV_WIDTH 16 |
The width in bits of the ALT_SPIM_BAUDR_SCKDV register field.
#define ALT_SPIM_BAUDR_SCKDV_SET_MSK 0x0000ffff |
The mask used to set the ALT_SPIM_BAUDR_SCKDV register field value.
#define ALT_SPIM_BAUDR_SCKDV_CLR_MSK 0xffff0000 |
The mask used to clear the ALT_SPIM_BAUDR_SCKDV register field value.
#define ALT_SPIM_BAUDR_SCKDV_RESET 0x0 |
The reset value of the ALT_SPIM_BAUDR_SCKDV register field.
#define ALT_SPIM_BAUDR_SCKDV_GET | ( | value | ) | (((value) & 0x0000ffff) >> 0) |
Extracts the ALT_SPIM_BAUDR_SCKDV field value from a register.
#define ALT_SPIM_BAUDR_SCKDV_SET | ( | value | ) | (((value) << 0) & 0x0000ffff) |
Produces a ALT_SPIM_BAUDR_SCKDV register field value suitable for setting the register.
#define ALT_SPIM_BAUDR_RESET 0x00000000 |
The reset value of the ALT_SPIM_BAUDR register.
#define ALT_SPIM_BAUDR_OFST 0x14 |
The byte offset of the ALT_SPIM_BAUDR register from the beginning of the component.
#define ALT_SPIM_BAUDR_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_BAUDR_OFST)) |
The address of the ALT_SPIM_BAUDR register.
typedef struct ALT_SPIM_BAUDR_s ALT_SPIM_BAUDR_t |
The typedef declaration for register ALT_SPIM_BAUDR.