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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Error Interrupt reset.
Register Layout
Bits | Access | Reset | Description |
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[0] | RW | 0x0 | ALT_ECC_QSPI_ERRINTENR_SERRINTR |
[31:1] | ??? | 0x0 | UNDEFINED |
Field : SERRINTR | |
This bit is used to reset the single-bit error interrupt bit. • Reads reflect SERRINTEN. 1’b0: Writing of zero has no effect. 1’b1: By writing one, this bit will reset SERRINTEN bit to 0. This is performing a bitwise writing of this feature. Field Access Macros: | |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_LSB 0 |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_MSB 0 |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_WIDTH 1 |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_SET_MSK 0x00000001 |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_CLR_MSK 0xfffffffe |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_RESET 0x0 |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_ECC_QSPI_ERRINTENR_SERRINTR_SET(value) (((value) << 0) & 0x00000001) |
Data Structures | |
struct | ALT_ECC_QSPI_ERRINTENR_s |
Macros | |
#define | ALT_ECC_QSPI_ERRINTENR_RESET 0x00000000 |
#define | ALT_ECC_QSPI_ERRINTENR_OFST 0x18 |
Typedefs | |
typedef struct ALT_ECC_QSPI_ERRINTENR_s | ALT_ECC_QSPI_ERRINTENR_t |
struct ALT_ECC_QSPI_ERRINTENR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_ECC_QSPI_ERRINTENR.
Data Fields | ||
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uint32_t | SERRINTR: 1 | ALT_ECC_QSPI_ERRINTENR_SERRINTR |
uint32_t | __pad0__: 31 | UNDEFINED |
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_ECC_QSPI_ERRINTENR_SERRINTR register field.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_ECC_QSPI_ERRINTENR_SERRINTR register field.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_WIDTH 1 |
The width in bits of the ALT_ECC_QSPI_ERRINTENR_SERRINTR register field.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_SET_MSK 0x00000001 |
The mask used to set the ALT_ECC_QSPI_ERRINTENR_SERRINTR register field value.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_ECC_QSPI_ERRINTENR_SERRINTR register field value.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_RESET 0x0 |
The reset value of the ALT_ECC_QSPI_ERRINTENR_SERRINTR register field.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_ECC_QSPI_ERRINTENR_SERRINTR field value from a register.
#define ALT_ECC_QSPI_ERRINTENR_SERRINTR_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_ECC_QSPI_ERRINTENR_SERRINTR register field value suitable for setting the register.
#define ALT_ECC_QSPI_ERRINTENR_RESET 0x00000000 |
The reset value of the ALT_ECC_QSPI_ERRINTENR register.
#define ALT_ECC_QSPI_ERRINTENR_OFST 0x18 |
The byte offset of the ALT_ECC_QSPI_ERRINTENR register from the beginning of the component.
typedef struct ALT_ECC_QSPI_ERRINTENR_s ALT_ECC_QSPI_ERRINTENR_t |
The typedef declaration for register ALT_ECC_QSPI_ERRINTENR.