Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Peripheral ID0 Register - periph_id_0

Description

Peripheral ID0

Register Layout

Bits Access Reset Description
[7:0] R 0x1 Part Number [7:0]
[31:8] ??? 0x0 UNDEFINED

Field : Part Number [7:0] - pn7to0

Part Number [7:0]

Field Access Macros:

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_LSB   0
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_MSB   7
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_WIDTH   8
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET_MSK   0x000000ff
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_CLR_MSK   0xffffff00
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_RESET   0x1
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_GET(value)   (((value) & 0x000000ff) >> 0)
 
#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET(value)   (((value) << 0) & 0x000000ff)
 

Data Structures

struct  ALT_L3_ID_PERIPH_ID_0_s
 

Macros

#define ALT_L3_ID_PERIPH_ID_0_OFST   0xfe0
 

Typedefs

typedef struct
ALT_L3_ID_PERIPH_ID_0_s 
ALT_L3_ID_PERIPH_ID_0_t
 

Data Structure Documentation

struct ALT_L3_ID_PERIPH_ID_0_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_L3_ID_PERIPH_ID_0.

Data Fields
const uint32_t pn7to0: 8 Part Number [7:0]
uint32_t __pad0__: 24 UNDEFINED

Macro Definitions

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_LSB   0

The Least Significant Bit (LSB) position of the ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_MSB   7

The Most Significant Bit (MSB) position of the ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_WIDTH   8

The width in bits of the ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET_MSK   0x000000ff

The mask used to set the ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field value.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_CLR_MSK   0xffffff00

The mask used to clear the ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field value.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_RESET   0x1

The reset value of the ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_GET (   value)    (((value) & 0x000000ff) >> 0)

Extracts the ALT_L3_ID_PERIPH_ID_0_PN7TO0 field value from a register.

#define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET (   value)    (((value) << 0) & 0x000000ff)

Produces a ALT_L3_ID_PERIPH_ID_0_PN7TO0 register field value suitable for setting the register.

#define ALT_L3_ID_PERIPH_ID_0_OFST   0xfe0

The byte offset of the ALT_L3_ID_PERIPH_ID_0 register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_L3_ID_PERIPH_ID_0.