Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Flash Command Address Registers - flashcmdaddr

Description

Register Layout

Bits Access Reset Description
[31:0] RW 0x0 Command Address

Field : Command Address - addr

This should be setup before triggering the command with execute field (bit 0) of the Flash Command Control register. It is the address used by the command specified in the opcode field (bits 31:24) of the Flash Command Control register.

Field Access Macros:

#define ALT_QSPI_FLSHCMDADDR_ADDR_LSB   0
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_MSB   31
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_WIDTH   32
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_SET_MSK   0xffffffff
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_CLR_MSK   0x00000000
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_RESET   0x0
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_GET(value)   (((value) & 0xffffffff) >> 0)
 
#define ALT_QSPI_FLSHCMDADDR_ADDR_SET(value)   (((value) << 0) & 0xffffffff)
 

Data Structures

struct  ALT_QSPI_FLSHCMDADDR_s
 

Macros

#define ALT_QSPI_FLSHCMDADDR_RESET   0x00000000
 
#define ALT_QSPI_FLSHCMDADDR_OFST   0x94
 

Typedefs

typedef struct
ALT_QSPI_FLSHCMDADDR_s 
ALT_QSPI_FLSHCMDADDR_t
 

Data Structure Documentation

struct ALT_QSPI_FLSHCMDADDR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_QSPI_FLSHCMDADDR.

Data Fields
uint32_t addr: 32 Command Address

Macro Definitions

#define ALT_QSPI_FLSHCMDADDR_ADDR_LSB   0

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMDADDR_ADDR register field.

#define ALT_QSPI_FLSHCMDADDR_ADDR_MSB   31

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMDADDR_ADDR register field.

#define ALT_QSPI_FLSHCMDADDR_ADDR_WIDTH   32

The width in bits of the ALT_QSPI_FLSHCMDADDR_ADDR register field.

#define ALT_QSPI_FLSHCMDADDR_ADDR_SET_MSK   0xffffffff

The mask used to set the ALT_QSPI_FLSHCMDADDR_ADDR register field value.

#define ALT_QSPI_FLSHCMDADDR_ADDR_CLR_MSK   0x00000000

The mask used to clear the ALT_QSPI_FLSHCMDADDR_ADDR register field value.

#define ALT_QSPI_FLSHCMDADDR_ADDR_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMDADDR_ADDR register field.

#define ALT_QSPI_FLSHCMDADDR_ADDR_GET (   value)    (((value) & 0xffffffff) >> 0)

Extracts the ALT_QSPI_FLSHCMDADDR_ADDR field value from a register.

#define ALT_QSPI_FLSHCMDADDR_ADDR_SET (   value)    (((value) << 0) & 0xffffffff)

Produces a ALT_QSPI_FLSHCMDADDR_ADDR register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMDADDR_RESET   0x00000000

The reset value of the ALT_QSPI_FLSHCMDADDR register.

#define ALT_QSPI_FLSHCMDADDR_OFST   0x94

The byte offset of the ALT_QSPI_FLSHCMDADDR register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_QSPI_FLSHCMDADDR.