Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Data Register - dr

Description

The data register is a 16-bit read/write buffer for the transmit/receive FIFOs. When the register is read, data in the receive FIFO buffer is accessed. When it is written to, data are moved into the transmit FIFO buffer; a write can occur only when SPI_EN = 1. FIFOs are reset when SPI_EN = 0.

Register Layout

Bits Access Reset Description
[15:0] RW 0x0 Data
[31:16] ??? 0x0 UNDEFINED

Field : Data - dr

When writing to this register, you must right-justify the data. Read data are automatically right-justified.

Read = Receive FIFO buffer

Write = Transmit FIFO buffer

Field Access Macros:

#define ALT_SPIS_DR_DR_LSB   0
 
#define ALT_SPIS_DR_DR_MSB   15
 
#define ALT_SPIS_DR_DR_WIDTH   16
 
#define ALT_SPIS_DR_DR_SET_MSK   0x0000ffff
 
#define ALT_SPIS_DR_DR_CLR_MSK   0xffff0000
 
#define ALT_SPIS_DR_DR_RESET   0x0
 
#define ALT_SPIS_DR_DR_GET(value)   (((value) & 0x0000ffff) >> 0)
 
#define ALT_SPIS_DR_DR_SET(value)   (((value) << 0) & 0x0000ffff)
 

Data Structures

struct  ALT_SPIS_DR_s
 

Macros

#define ALT_SPIS_DR_OFST   0x60
 
#define ALT_SPIS_DR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_DR_OFST))
 

Typedefs

typedef struct ALT_SPIS_DR_s ALT_SPIS_DR_t
 

Data Structure Documentation

struct ALT_SPIS_DR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SPIS_DR.

Data Fields
uint32_t dr: 16 Data
uint32_t __pad0__: 16 UNDEFINED

Macro Definitions

#define ALT_SPIS_DR_DR_LSB   0

The Least Significant Bit (LSB) position of the ALT_SPIS_DR_DR register field.

#define ALT_SPIS_DR_DR_MSB   15

The Most Significant Bit (MSB) position of the ALT_SPIS_DR_DR register field.

#define ALT_SPIS_DR_DR_WIDTH   16

The width in bits of the ALT_SPIS_DR_DR register field.

#define ALT_SPIS_DR_DR_SET_MSK   0x0000ffff

The mask used to set the ALT_SPIS_DR_DR register field value.

#define ALT_SPIS_DR_DR_CLR_MSK   0xffff0000

The mask used to clear the ALT_SPIS_DR_DR register field value.

#define ALT_SPIS_DR_DR_RESET   0x0

The reset value of the ALT_SPIS_DR_DR register field.

#define ALT_SPIS_DR_DR_GET (   value)    (((value) & 0x0000ffff) >> 0)

Extracts the ALT_SPIS_DR_DR field value from a register.

#define ALT_SPIS_DR_DR_SET (   value)    (((value) << 0) & 0x0000ffff)

Produces a ALT_SPIS_DR_DR register field value suitable for setting the register.

#define ALT_SPIS_DR_OFST   0x60

The byte offset of the ALT_SPIS_DR register from the beginning of the component.

#define ALT_SPIS_DR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_DR_OFST))

The address of the ALT_SPIS_DR register.

Typedef Documentation

typedef struct ALT_SPIS_DR_s ALT_SPIS_DR_t

The typedef declaration for register ALT_SPIS_DR.