Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Register 327 (Hash Table Register 7) - Hash_Table_Reg7

Description

This register contains the eighth 32 bits of the hash table.

Register Layout

Bits Access Reset Description
[31:0] RW 0x0 Eighth 32 bits of Hash Table

Field : Eighth 32 bits of Hash Table - ht255t224

This field contains the eighth 32 Bits (255:224) of the Hash table.

Field Access Macros:

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_LSB   0
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_MSB   31
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_WIDTH   32
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_SET_MSK   0xffffffff
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_CLR_MSK   0x00000000
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_RESET   0x0
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_GET(value)   (((value) & 0xffffffff) >> 0)
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_SET(value)   (((value) << 0) & 0xffffffff)
 

Data Structures

struct  ALT_EMAC_GMAC_HASH_TABLE_REG7_s
 

Macros

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_OFST   0x51c
 
#define ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_HASH_TABLE_REG7_OFST))
 

Typedefs

typedef struct
ALT_EMAC_GMAC_HASH_TABLE_REG7_s 
ALT_EMAC_GMAC_HASH_TABLE_REG7_t
 

Data Structure Documentation

struct ALT_EMAC_GMAC_HASH_TABLE_REG7_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_GMAC_HASH_TABLE_REG7.

Data Fields
uint32_t ht255t224: 32 Eighth 32 bits of Hash Table

Macro Definitions

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_LSB   0

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_MSB   31

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_WIDTH   32

The width in bits of the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_SET_MSK   0xffffffff

The mask used to set the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field value.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_CLR_MSK   0x00000000

The mask used to clear the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field value.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_RESET   0x0

The reset value of the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_GET (   value)    (((value) & 0xffffffff) >> 0)

Extracts the ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 field value from a register.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224_SET (   value)    (((value) << 0) & 0xffffffff)

Produces a ALT_EMAC_GMAC_HASH_TABLE_REG7_HT255T224 register field value suitable for setting the register.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_OFST   0x51c

The byte offset of the ALT_EMAC_GMAC_HASH_TABLE_REG7 register from the beginning of the component.

#define ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_HASH_TABLE_REG7_OFST))

The address of the ALT_EMAC_GMAC_HASH_TABLE_REG7 register.

Typedef Documentation