Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : ERRINTENR

Description

Error Interrupt reset.

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR
[1] RW 0x0 ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR
[2] RW 0x0 ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR
[31:3] ??? 0x0 UNDEFINED

Field : SERRINTR

This bit is used to reset the single-bit error interrupt bit.

Reads reflect SERRINTEN.

1’b0: Writing of zero has no effect.

1’b1: By writing one, this bit will reset SERRINTEN bit to 0.

This is performing a bitwise writing of this feature.

Field Access Macros:

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_LSB   0
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_MSB   0
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_WIDTH   1
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_SET_MSK   0x00000001
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_CLR_MSK   0xfffffffe
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_RESET   0x0
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_SET(value)   (((value) << 0) & 0x00000001)
 

Field : DERRINTR

This bit is used to reset the double-bit error interrupt bit.

Reads reflect DERRINTEN.

1’b0: Writing of zero has no effect.

1’b1: By writing one, this bit will reset DERRINTEN bit to 0.

This is performing a bitwise writing of this feature.

Field Access Macros:

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_LSB   1
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_MSB   1
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_WIDTH   1
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_SET_MSK   0x00000002
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_CLR_MSK   0xfffffffd
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_RESET   0x0
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_SET(value)   (((value) << 1) & 0x00000002)
 

Field : HMI_INTRR

This bit is used to reset the general purpose HMI interrupt error interrupt to system manager

1’b0: Writing of zero has no effect.

1’b1: By writing one, this bit will reset HMI_INTREN bit to 0.

This is performing a bitwise writing of this feature.

Field Access Macros:

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_LSB   2
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_MSB   2
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_WIDTH   1
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_SET_MSK   0x00000004
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_CLR_MSK   0xfffffffb
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_RESET   0x0
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_SET(value)   (((value) << 2) & 0x00000004)
 

Data Structures

struct  ALT_ECC_HMC_OCP_ERRINTENR_s
 

Macros

#define ALT_ECC_HMC_OCP_ERRINTENR_RESET   0x00000000
 
#define ALT_ECC_HMC_OCP_ERRINTENR_OFST   0x118
 

Typedefs

typedef struct
ALT_ECC_HMC_OCP_ERRINTENR_s 
ALT_ECC_HMC_OCP_ERRINTENR_t
 

Data Structure Documentation

struct ALT_ECC_HMC_OCP_ERRINTENR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_ECC_HMC_OCP_ERRINTENR.

Data Fields
uint32_t SERRINTR: 1 ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR
uint32_t DERRINTR: 1 ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR
uint32_t HMI_INTRR: 1 ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR
uint32_t __pad0__: 29 UNDEFINED

Macro Definitions

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_LSB   0

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_MSB   0

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_SET_MSK   0x00000001

The mask used to set the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field value.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_CLR_MSK   0xfffffffe

The mask used to clear the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field value.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR field value from a register.

#define ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_ECC_HMC_OCP_ERRINTENR_SERRINTR register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_LSB   1

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_MSB   1

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_SET_MSK   0x00000002

The mask used to set the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field value.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_CLR_MSK   0xfffffffd

The mask used to clear the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field value.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR field value from a register.

#define ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_ECC_HMC_OCP_ERRINTENR_DERRINTR register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_LSB   2

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_MSB   2

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_SET_MSK   0x00000004

The mask used to set the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field value.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_CLR_MSK   0xfffffffb

The mask used to clear the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field value.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR field value from a register.

#define ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_ECC_HMC_OCP_ERRINTENR_HMI_INTRR register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_ERRINTENR_RESET   0x00000000

The reset value of the ALT_ECC_HMC_OCP_ERRINTENR register.

#define ALT_ECC_HMC_OCP_ERRINTENR_OFST   0x118

The byte offset of the ALT_ECC_HMC_OCP_ERRINTENR register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_ECC_HMC_OCP_ERRINTENR.