Altera SoCAL
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hps.h
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/***********************************************************************************
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* *
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* Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
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* *
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* Redistribution and use in source and binary forms, with or without *
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* modification, are permitted provided that the following conditions are met: *
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* *
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* 1. Redistributions of source code must retain the above copyright notice, *
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* this list of conditions and the following disclaimer. *
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* *
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* 2. Redistributions in binary form must reproduce the above copyright notice, *
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* this list of conditions and the following disclaimer in the documentation *
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* and/or other materials provided with the distribution. *
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* *
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* 3. Neither the name of the copyright holder nor the names of its contributors *
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* may be used to endorse or promote products derived from this software without *
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* specific prior written permission. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" *
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE *
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE *
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE *
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF *
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS *
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN *
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) *
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE *
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* POSSIBILITY OF SUCH DAMAGE. *
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* *
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***********************************************************************************/
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#ifndef __ALT_SOCAL_HPS_H__
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#define __ALT_SOCAL_HPS_H__
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#include <cstdint>
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extern
"C"
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{
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#else
/* __cplusplus */
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#include <stdint.h>
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#endif
/* __cplusplus */
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#endif
/* __ASSEMBLY__ */
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#define ALT_HPS_ADDR 0
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#define ALT_FPGA_BRIDGE_H2F128_OFST 0xc0000000
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#define ALT_FPGA_BRIDGE_H2F128_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_H2F128_OFST))
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#define ALT_FPGA_BRIDGE_H2F128_LB_ADDR ALT_FPGA_BRIDGE_H2F128_ADDR
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#define ALT_FPGA_BRIDGE_H2F128_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_H2F128_ADDR) + 0x3c000000) - 1))
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#define ALT_FPGA_BRIDGE_LWH2F_OFST 0xff200000
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#define ALT_FPGA_BRIDGE_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGA_BRIDGE_LWH2F_OFST))
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#define ALT_FPGA_BRIDGE_LWH2F_LB_ADDR ALT_FPGA_BRIDGE_LWH2F_ADDR
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#define ALT_FPGA_BRIDGE_LWH2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGA_BRIDGE_LWH2F_ADDR) + 0x200000) - 1))
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#define ALT_EMAC0_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_WDOG_TMO_ADDR ALT_EMAC_GMAC_WDOG_TMO_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_GENPIO_ADDR ALT_EMAC_GMAC_GENPIO_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
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#define ALT_EMAC0_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC0_ADDR)
358
359
#define ALT_EMAC0_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC0_ADDR)
360
361
#define ALT_EMAC0_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC0_ADDR)
362
363
#define ALT_EMAC0_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC0_ADDR)
364
365
#define ALT_EMAC0_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC0_ADDR)
366
367
#define ALT_EMAC0_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC0_ADDR)
368
369
#define ALT_EMAC0_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC0_ADDR)
370
371
#define ALT_EMAC0_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC0_ADDR)
372
373
#define ALT_EMAC0_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC0_ADDR)
374
375
#define ALT_EMAC0_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC0_ADDR)
376
377
#define ALT_EMAC0_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC0_ADDR)
378
379
#define ALT_EMAC0_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC0_ADDR)
380
381
#define ALT_EMAC0_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC0_ADDR)
382
383
#define ALT_EMAC0_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC0_ADDR)
384
385
#define ALT_EMAC0_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC0_ADDR)
386
387
#define ALT_EMAC0_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC0_ADDR)
388
389
#define ALT_EMAC0_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC0_ADDR)
390
391
#define ALT_EMAC0_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC0_ADDR)
392
393
#define ALT_EMAC0_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC0_ADDR)
394
395
#define ALT_EMAC0_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC0_ADDR)
396
397
#define ALT_EMAC0_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC0_ADDR)
398
399
#define ALT_EMAC0_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC0_ADDR)
400
401
#define ALT_EMAC0_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC0_ADDR)
402
403
#define ALT_EMAC0_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC0_ADDR)
404
405
#define ALT_EMAC0_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC0_ADDR)
406
407
#define ALT_EMAC0_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC0_ADDR)
408
409
#define ALT_EMAC0_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC0_ADDR)
410
411
#define ALT_EMAC0_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC0_ADDR)
412
413
#define ALT_EMAC0_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC0_ADDR)
414
415
#define ALT_EMAC0_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC0_ADDR)
416
417
#define ALT_EMAC0_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC0_ADDR)
418
419
#define ALT_EMAC0_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC0_ADDR)
420
421
#define ALT_EMAC0_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC0_ADDR)
422
423
#define ALT_EMAC0_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC0_ADDR)
424
425
#define ALT_EMAC0_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC0_ADDR)
426
427
#define ALT_EMAC0_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC0_ADDR)
428
429
#define ALT_EMAC0_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC0_ADDR)
430
431
#define ALT_EMAC0_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC0_ADDR)
432
433
#define ALT_EMAC0_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC0_ADDR)
434
435
#define ALT_EMAC0_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC0_ADDR)
436
437
#define ALT_EMAC0_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC0_ADDR)
438
439
#define ALT_EMAC0_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC0_ADDR)
440
441
#define ALT_EMAC0_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC0_ADDR)
442
443
#define ALT_EMAC0_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC0_ADDR)
444
445
#define ALT_EMAC0_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC0_ADDR)
446
447
#define ALT_EMAC0_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC0_ADDR)
448
449
#define ALT_EMAC0_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC0_ADDR)
450
451
#define ALT_EMAC0_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC0_ADDR)
452
453
#define ALT_EMAC0_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC0_ADDR)
454
455
#define ALT_EMAC0_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC0_ADDR)
456
457
#define ALT_EMAC0_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC0_ADDR)
458
459
#define ALT_EMAC0_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC0_ADDR)
460
461
#define ALT_EMAC0_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC0_ADDR)
462
463
#define ALT_EMAC0_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC0_ADDR)
464
465
#define ALT_EMAC0_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC0_ADDR)
466
467
#define ALT_EMAC0_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC0_ADDR)
468
469
#define ALT_EMAC0_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC0_ADDR)
470
471
#define ALT_EMAC0_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC0_ADDR)
472
473
#define ALT_EMAC0_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC0_ADDR)
474
475
#define ALT_EMAC0_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC0_ADDR)
476
477
#define ALT_EMAC0_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC0_ADDR)
478
479
#define ALT_EMAC0_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC0_ADDR)
480
481
#define ALT_EMAC0_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC0_ADDR)
482
483
#define ALT_EMAC0_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC0_ADDR)
484
485
#define ALT_EMAC0_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC0_ADDR)
486
487
#define ALT_EMAC0_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC0_ADDR)
488
489
#define ALT_EMAC0_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC0_ADDR)
490
491
#define ALT_EMAC0_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC0_ADDR)
492
493
#define ALT_EMAC0_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC0_ADDR)
494
495
#define ALT_EMAC0_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC0_ADDR)
496
497
#define ALT_EMAC0_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC0_ADDR)
498
499
#define ALT_EMAC0_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC0_ADDR)
500
501
#define ALT_EMAC0_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC0_ADDR)
502
503
#define ALT_EMAC0_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC0_ADDR)
504
505
#define ALT_EMAC0_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC0_ADDR)
506
507
#define ALT_EMAC0_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC0_ADDR)
508
509
#define ALT_EMAC0_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC0_ADDR)
510
511
#define ALT_EMAC0_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC0_ADDR)
512
513
#define ALT_EMAC0_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC0_ADDR)
514
515
#define ALT_EMAC0_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC0_ADDR)
516
517
#define ALT_EMAC0_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC0_ADDR)
518
519
#define ALT_EMAC0_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC0_ADDR)
520
521
#define ALT_EMAC0_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC0_ADDR)
522
523
#define ALT_EMAC0_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC0_ADDR)
524
525
#define ALT_EMAC0_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC0_ADDR)
526
527
#define ALT_EMAC0_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC0_ADDR)
528
529
#define ALT_EMAC0_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC0_ADDR)
530
531
#define ALT_EMAC0_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC0_ADDR)
532
533
#define ALT_EMAC0_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC0_ADDR)
534
535
#define ALT_EMAC0_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC0_ADDR)
536
537
#define ALT_EMAC0_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC0_ADDR)
538
539
#define ALT_EMAC0_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC0_ADDR)
540
541
#define ALT_EMAC0_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC0_ADDR)
542
543
#define ALT_EMAC0_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC0_ADDR)
544
545
#define ALT_EMAC0_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC0_ADDR)
546
547
#define ALT_EMAC0_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC0_ADDR)
548
549
#define ALT_EMAC0_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC0_ADDR)
550
551
#define ALT_EMAC0_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC0_ADDR)
552
553
#define ALT_EMAC0_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC0_ADDR)
554
555
#define ALT_EMAC0_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC0_ADDR)
556
557
#define ALT_EMAC0_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC0_ADDR)
558
559
#define ALT_EMAC0_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC0_ADDR)
560
561
#define ALT_EMAC0_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC0_ADDR)
562
563
#define ALT_EMAC0_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC0_ADDR)
564
565
#define ALT_EMAC0_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC0_ADDR)
566
567
#define ALT_EMAC0_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC0_ADDR)
568
569
#define ALT_EMAC0_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC0_ADDR)
570
571
#define ALT_EMAC0_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC0_ADDR)
572
573
#define ALT_EMAC0_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC0_ADDR)
574
575
#define ALT_EMAC0_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC0_ADDR)
576
577
#define ALT_EMAC0_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC0_ADDR)
578
579
#define ALT_EMAC0_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC0_ADDR)
580
581
#define ALT_EMAC0_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC0_ADDR)
582
583
#define ALT_EMAC0_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC0_ADDR)
584
585
#define ALT_EMAC0_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC0_ADDR)
586
587
#define ALT_EMAC0_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC0_ADDR)
588
589
#define ALT_EMAC0_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC0_ADDR)
590
591
#define ALT_EMAC0_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC0_ADDR)
592
593
#define ALT_EMAC0_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC0_ADDR)
594
595
#define ALT_EMAC0_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC0_ADDR)
596
597
#define ALT_EMAC0_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC0_ADDR)
598
599
#define ALT_EMAC0_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC0_ADDR)
600
601
#define ALT_EMAC0_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC0_ADDR)
602
603
#define ALT_EMAC0_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC0_ADDR)
604
605
#define ALT_EMAC0_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC0_ADDR)
606
607
#define ALT_EMAC0_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC0_ADDR)
608
609
#define ALT_EMAC0_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC0_ADDR)
610
611
#define ALT_EMAC0_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC0_ADDR)
612
613
#define ALT_EMAC0_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC0_ADDR)
614
615
#define ALT_EMAC0_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC0_ADDR)
616
617
#define ALT_EMAC0_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC0_ADDR)
618
619
#define ALT_EMAC0_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC0_ADDR)
620
621
#define ALT_EMAC0_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC0_ADDR)
622
623
#define ALT_EMAC0_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC0_ADDR)
624
625
#define ALT_EMAC0_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC0_ADDR)
626
627
#define ALT_EMAC0_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC0_ADDR)
628
629
#define ALT_EMAC0_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC0_ADDR)
630
631
#define ALT_EMAC0_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC0_ADDR)
632
633
#define ALT_EMAC0_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC0_ADDR)
634
635
#define ALT_EMAC0_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC0_ADDR)
636
637
#define ALT_EMAC0_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC0_ADDR)
638
639
#define ALT_EMAC0_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC0_ADDR)
640
641
#define ALT_EMAC0_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC0_ADDR)
642
643
#define ALT_EMAC0_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC0_ADDR)
644
645
#define ALT_EMAC0_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC0_ADDR)
646
647
#define ALT_EMAC0_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC0_ADDR)
648
649
#define ALT_EMAC0_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC0_ADDR)
650
651
#define ALT_EMAC0_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC0_ADDR)
652
653
#define ALT_EMAC0_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC0_ADDR)
654
655
#define ALT_EMAC0_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC0_ADDR)
656
657
#define ALT_EMAC0_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC0_ADDR)
658
659
#define ALT_EMAC0_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC0_ADDR)
660
661
#define ALT_EMAC0_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC0_ADDR)
662
663
#define ALT_EMAC0_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC0_ADDR)
664
665
#define ALT_EMAC0_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC0_ADDR)
666
667
#define ALT_EMAC0_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC0_ADDR)
668
669
#define ALT_EMAC0_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC0_ADDR)
670
671
#define ALT_EMAC0_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC0_ADDR)
672
673
#define ALT_EMAC0_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC0_ADDR)
674
675
#define ALT_EMAC0_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC0_ADDR)
676
677
#define ALT_EMAC0_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC0_ADDR)
678
679
#define ALT_EMAC0_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC0_ADDR)
680
681
#define ALT_EMAC0_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC0_ADDR)
682
683
#define ALT_EMAC0_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC0_ADDR)
684
685
#define ALT_EMAC0_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC0_ADDR)
686
687
#define ALT_EMAC0_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC0_ADDR)
688
689
#define ALT_EMAC0_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC0_ADDR)
690
691
#define ALT_EMAC0_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC0_ADDR)
692
693
#define ALT_EMAC0_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC0_ADDR)
694
695
#define ALT_EMAC0_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC0_ADDR)
696
697
#define ALT_EMAC0_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC0_ADDR)
698
699
#define ALT_EMAC0_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC0_ADDR)
700
701
#define ALT_EMAC0_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC0_ADDR)
702
703
#define ALT_EMAC0_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC0_ADDR)
704
705
#define ALT_EMAC0_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC0_ADDR)
706
707
#define ALT_EMAC0_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC0_ADDR)
708
709
#define ALT_EMAC0_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC0_ADDR)
710
711
#define ALT_EMAC0_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC0_ADDR)
712
713
#define ALT_EMAC0_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC0_ADDR)
714
715
#define ALT_EMAC0_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC0_ADDR)
716
717
#define ALT_EMAC0_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC0_ADDR)
718
719
#define ALT_EMAC0_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC0_ADDR)
720
721
#define ALT_EMAC0_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC0_ADDR)
722
723
#define ALT_EMAC0_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC0_ADDR)
724
725
#define ALT_EMAC0_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC0_ADDR)
726
727
#define ALT_EMAC0_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC0_ADDR)
728
729
#define ALT_EMAC0_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC0_ADDR)
730
731
#define ALT_EMAC0_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC0_ADDR)
732
733
#define ALT_EMAC0_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC0_ADDR)
734
735
#define ALT_EMAC0_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC0_ADDR)
736
737
#define ALT_EMAC0_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC0_ADDR)
738
739
#define ALT_EMAC0_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC0_ADDR)
740
741
#define ALT_EMAC0_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC0_ADDR)
742
743
#define ALT_EMAC0_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC0_ADDR)
744
745
#define ALT_EMAC0_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC0_ADDR)
746
747
#define ALT_EMAC0_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC0_ADDR)
748
749
#define ALT_EMAC0_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC0_ADDR)
750
751
#define ALT_EMAC0_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC0_ADDR)
752
753
#define ALT_EMAC0_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC0_ADDR)
754
755
#define ALT_EMAC0_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC0_ADDR)
756
757
#define ALT_EMAC0_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC0_ADDR)
758
759
#define ALT_EMAC0_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC0_ADDR)
760
761
#define ALT_EMAC0_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC0_ADDR)
762
763
#define ALT_EMAC0_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC0_ADDR)
764
765
#define ALT_EMAC0_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC0_ADDR)
766
767
#define ALT_EMAC0_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC0_ADDR)
768
769
#define ALT_EMAC0_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC0_ADDR)
770
771
#define ALT_EMAC0_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC0_ADDR)
772
773
#define ALT_EMAC0_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC0_ADDR)
774
775
#define ALT_EMAC0_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC0_ADDR)
776
777
#define ALT_EMAC0_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC0_ADDR)
778
779
#define ALT_EMAC0_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC0_ADDR)
780
781
#define ALT_EMAC0_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC0_ADDR)
782
783
#define ALT_EMAC0_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC0_ADDR)
784
785
#define ALT_EMAC0_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC0_ADDR)
786
787
#define ALT_EMAC0_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC0_ADDR)
788
789
#define ALT_EMAC0_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC0_ADDR)
790
791
#define ALT_EMAC0_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC0_ADDR)
792
793
#define ALT_EMAC0_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC0_ADDR)
794
795
#define ALT_EMAC0_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC0_ADDR)
796
797
#define ALT_EMAC0_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC0_ADDR)
798
799
#define ALT_EMAC0_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC0_ADDR)
800
801
#define ALT_EMAC0_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC0_ADDR)
802
803
#define ALT_EMAC0_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC0_ADDR)
804
805
#define ALT_EMAC0_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC0_ADDR)
806
807
#define ALT_EMAC0_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC0_ADDR)
808
809
#define ALT_EMAC0_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC0_ADDR)
810
811
#define ALT_EMAC0_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC0_ADDR)
812
813
#define ALT_EMAC0_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC0_ADDR)
814
815
#define ALT_EMAC0_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC0_ADDR)
816
817
#define ALT_EMAC0_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC0_ADDR)
818
819
#define ALT_EMAC0_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC0_ADDR)
820
821
#define ALT_EMAC0_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC0_ADDR)
822
823
#define ALT_EMAC0_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC0_ADDR)
824
825
#define ALT_EMAC0_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC0_ADDR)
826
827
#define ALT_EMAC0_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC0_ADDR)
828
829
#define ALT_EMAC0_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC0_ADDR)
830
831
#define ALT_EMAC0_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC0_ADDR)
832
833
#define ALT_EMAC0_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC0_ADDR)
834
835
#define ALT_EMAC0_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC0_ADDR)
836
837
#define ALT_EMAC0_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC0_ADDR)
838
839
#define ALT_EMAC0_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC0_ADDR)
840
841
#define ALT_EMAC0_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC0_ADDR)
842
843
#define ALT_EMAC0_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC0_ADDR)
844
845
#define ALT_EMAC0_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC0_ADDR)
846
847
#define ALT_EMAC0_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC0_ADDR)
848
849
#define ALT_EMAC0_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC0_ADDR)
850
851
#define ALT_EMAC0_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC0_ADDR)
852
853
#define ALT_EMAC0_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC0_ADDR)
854
855
#define ALT_EMAC0_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC0_ADDR)
856
857
#define ALT_EMAC0_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC0_ADDR)
858
859
#define ALT_EMAC0_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC0_ADDR)
860
861
#define ALT_EMAC0_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC0_ADDR)
862
863
#define ALT_EMAC0_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC0_ADDR)
864
865
#define ALT_EMAC0_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC0_ADDR)
866
867
#define ALT_EMAC0_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC0_ADDR)
868
869
#define ALT_EMAC0_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC0_ADDR)
870
871
#define ALT_EMAC0_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC0_ADDR)
872
873
#define ALT_EMAC0_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC0_ADDR)
874
875
#define ALT_EMAC0_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC0_ADDR)
876
877
#define ALT_EMAC0_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC0_ADDR)
878
879
#define ALT_EMAC0_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC0_ADDR)
880
881
#define ALT_EMAC0_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC0_ADDR)
882
883
#define ALT_EMAC0_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC0_ADDR)
884
885
#define ALT_EMAC0_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC0_ADDR)
886
887
#define ALT_EMAC0_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC0_ADDR)
888
889
#define ALT_EMAC0_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC0_ADDR)
890
891
#define ALT_EMAC0_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC0_ADDR)
892
893
#define ALT_EMAC0_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC0_ADDR)
894
895
#define ALT_EMAC0_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC0_ADDR)
896
897
#define ALT_EMAC0_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC0_ADDR)
898
899
#define ALT_EMAC0_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC0_ADDR)
900
901
#define ALT_EMAC0_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC0_ADDR)
902
903
#define ALT_EMAC0_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC0_ADDR)
904
905
#define ALT_EMAC0_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC0_ADDR)
906
907
#define ALT_EMAC0_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC0_ADDR)
908
909
#define ALT_EMAC0_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC0_ADDR)
910
911
#define ALT_EMAC0_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC0_ADDR)
912
913
#define ALT_EMAC0_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC0_ADDR)
914
915
#define ALT_EMAC0_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC0_ADDR)
916
917
#define ALT_EMAC0_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC0_ADDR)
918
919
#define ALT_EMAC0_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC0_ADDR)
920
921
#define ALT_EMAC0_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC0_ADDR)
922
923
#define ALT_EMAC0_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC0_ADDR)
924
925
#define ALT_EMAC0_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC0_ADDR)
926
927
#define ALT_EMAC0_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC0_ADDR)
928
929
#define ALT_EMAC0_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC0_ADDR)
930
931
#define ALT_EMAC0_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC0_ADDR)
932
933
#define ALT_EMAC0_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC0_ADDR)
934
935
#define ALT_EMAC0_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC0_ADDR)
936
937
#define ALT_EMAC0_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC0_ADDR)
938
939
#define ALT_EMAC0_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC0_ADDR)
940
941
#define ALT_EMAC0_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC0_ADDR)
942
943
#define ALT_EMAC0_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC0_ADDR)
944
945
#define ALT_EMAC0_OFST 0xff800000
946
947
#define ALT_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC0_OFST))
948
949
#define ALT_EMAC0_LB_ADDR ALT_EMAC0_ADDR
950
951
#define ALT_EMAC0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC0_ADDR) + 0x105c) - 1))
952
962
#define ALT_EMAC1_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC1_ADDR)
963
964
#define ALT_EMAC1_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC1_ADDR)
965
966
#define ALT_EMAC1_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC1_ADDR)
967
968
#define ALT_EMAC1_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC1_ADDR)
969
970
#define ALT_EMAC1_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC1_ADDR)
971
972
#define ALT_EMAC1_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC1_ADDR)
973
974
#define ALT_EMAC1_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC1_ADDR)
975
976
#define ALT_EMAC1_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC1_ADDR)
977
978
#define ALT_EMAC1_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC1_ADDR)
979
980
#define ALT_EMAC1_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC1_ADDR)
981
982
#define ALT_EMAC1_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC1_ADDR)
983
984
#define ALT_EMAC1_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC1_ADDR)
985
986
#define ALT_EMAC1_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC1_ADDR)
987
988
#define ALT_EMAC1_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC1_ADDR)
989
990
#define ALT_EMAC1_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC1_ADDR)
991
992
#define ALT_EMAC1_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC1_ADDR)
993
994
#define ALT_EMAC1_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC1_ADDR)
995
996
#define ALT_EMAC1_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC1_ADDR)
997
998
#define ALT_EMAC1_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC1_ADDR)
999
1000
#define ALT_EMAC1_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC1_ADDR)
1001
1002
#define ALT_EMAC1_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC1_ADDR)
1003
1004
#define ALT_EMAC1_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC1_ADDR)
1005
1006
#define ALT_EMAC1_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC1_ADDR)
1007
1008
#define ALT_EMAC1_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC1_ADDR)
1009
1010
#define ALT_EMAC1_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC1_ADDR)
1011
1012
#define ALT_EMAC1_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC1_ADDR)
1013
1014
#define ALT_EMAC1_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC1_ADDR)
1015
1016
#define ALT_EMAC1_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC1_ADDR)
1017
1018
#define ALT_EMAC1_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC1_ADDR)
1019
1020
#define ALT_EMAC1_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC1_ADDR)
1021
1022
#define ALT_EMAC1_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC1_ADDR)
1023
1024
#define ALT_EMAC1_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC1_ADDR)
1025
1026
#define ALT_EMAC1_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC1_ADDR)
1027
1028
#define ALT_EMAC1_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC1_ADDR)
1029
1030
#define ALT_EMAC1_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC1_ADDR)
1031
1032
#define ALT_EMAC1_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC1_ADDR)
1033
1034
#define ALT_EMAC1_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC1_ADDR)
1035
1036
#define ALT_EMAC1_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC1_ADDR)
1037
1038
#define ALT_EMAC1_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC1_ADDR)
1039
1040
#define ALT_EMAC1_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC1_ADDR)
1041
1042
#define ALT_EMAC1_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC1_ADDR)
1043
1044
#define ALT_EMAC1_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC1_ADDR)
1045
1046
#define ALT_EMAC1_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC1_ADDR)
1047
1048
#define ALT_EMAC1_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC1_ADDR)
1049
1050
#define ALT_EMAC1_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC1_ADDR)
1051
1052
#define ALT_EMAC1_GMAC_WDOG_TMO_ADDR ALT_EMAC_GMAC_WDOG_TMO_ADDR(ALT_EMAC1_ADDR)
1053
1054
#define ALT_EMAC1_GMAC_GENPIO_ADDR ALT_EMAC_GMAC_GENPIO_ADDR(ALT_EMAC1_ADDR)
1055
1056
#define ALT_EMAC1_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC1_ADDR)
1057
1058
#define ALT_EMAC1_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC1_ADDR)
1059
1060
#define ALT_EMAC1_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC1_ADDR)
1061
1062
#define ALT_EMAC1_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC1_ADDR)
1063
1064
#define ALT_EMAC1_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC1_ADDR)
1065
1066
#define ALT_EMAC1_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1067
1068
#define ALT_EMAC1_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1069
1070
#define ALT_EMAC1_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1071
1072
#define ALT_EMAC1_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1073
1074
#define ALT_EMAC1_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1075
1076
#define ALT_EMAC1_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1077
1078
#define ALT_EMAC1_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1079
1080
#define ALT_EMAC1_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1081
1082
#define ALT_EMAC1_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1083
1084
#define ALT_EMAC1_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1085
1086
#define ALT_EMAC1_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1087
1088
#define ALT_EMAC1_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1089
1090
#define ALT_EMAC1_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1091
1092
#define ALT_EMAC1_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC1_ADDR)
1093
1094
#define ALT_EMAC1_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC1_ADDR)
1095
1096
#define ALT_EMAC1_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC1_ADDR)
1097
1098
#define ALT_EMAC1_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC1_ADDR)
1099
1100
#define ALT_EMAC1_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC1_ADDR)
1101
1102
#define ALT_EMAC1_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC1_ADDR)
1103
1104
#define ALT_EMAC1_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC1_ADDR)
1105
1106
#define ALT_EMAC1_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC1_ADDR)
1107
1108
#define ALT_EMAC1_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC1_ADDR)
1109
1110
#define ALT_EMAC1_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC1_ADDR)
1111
1112
#define ALT_EMAC1_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC1_ADDR)
1113
1114
#define ALT_EMAC1_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC1_ADDR)
1115
1116
#define ALT_EMAC1_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC1_ADDR)
1117
1118
#define ALT_EMAC1_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1119
1120
#define ALT_EMAC1_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC1_ADDR)
1121
1122
#define ALT_EMAC1_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC1_ADDR)
1123
1124
#define ALT_EMAC1_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1125
1126
#define ALT_EMAC1_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1127
1128
#define ALT_EMAC1_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC1_ADDR)
1129
1130
#define ALT_EMAC1_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC1_ADDR)
1131
1132
#define ALT_EMAC1_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC1_ADDR)
1133
1134
#define ALT_EMAC1_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC1_ADDR)
1135
1136
#define ALT_EMAC1_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC1_ADDR)
1137
1138
#define ALT_EMAC1_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC1_ADDR)
1139
1140
#define ALT_EMAC1_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1141
1142
#define ALT_EMAC1_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1143
1144
#define ALT_EMAC1_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1145
1146
#define ALT_EMAC1_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1147
1148
#define ALT_EMAC1_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1149
1150
#define ALT_EMAC1_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_ADDR)
1151
1152
#define ALT_EMAC1_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC1_ADDR)
1153
1154
#define ALT_EMAC1_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC1_ADDR)
1155
1156
#define ALT_EMAC1_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC1_ADDR)
1157
1158
#define ALT_EMAC1_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC1_ADDR)
1159
1160
#define ALT_EMAC1_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC1_ADDR)
1161
1162
#define ALT_EMAC1_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC1_ADDR)
1163
1164
#define ALT_EMAC1_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC1_ADDR)
1165
1166
#define ALT_EMAC1_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC1_ADDR)
1167
1168
#define ALT_EMAC1_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC1_ADDR)
1169
1170
#define ALT_EMAC1_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC1_ADDR)
1171
1172
#define ALT_EMAC1_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC1_ADDR)
1173
1174
#define ALT_EMAC1_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1175
1176
#define ALT_EMAC1_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1177
1178
#define ALT_EMAC1_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC1_ADDR)
1179
1180
#define ALT_EMAC1_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC1_ADDR)
1181
1182
#define ALT_EMAC1_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC1_ADDR)
1183
1184
#define ALT_EMAC1_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1185
1186
#define ALT_EMAC1_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1187
1188
#define ALT_EMAC1_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC1_ADDR)
1189
1190
#define ALT_EMAC1_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1191
1192
#define ALT_EMAC1_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1193
1194
#define ALT_EMAC1_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1195
1196
#define ALT_EMAC1_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1197
1198
#define ALT_EMAC1_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC1_ADDR)
1199
1200
#define ALT_EMAC1_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC1_ADDR)
1201
1202
#define ALT_EMAC1_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1203
1204
#define ALT_EMAC1_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1205
1206
#define ALT_EMAC1_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC1_ADDR)
1207
1208
#define ALT_EMAC1_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC1_ADDR)
1209
1210
#define ALT_EMAC1_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC1_ADDR)
1211
1212
#define ALT_EMAC1_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1213
1214
#define ALT_EMAC1_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1215
1216
#define ALT_EMAC1_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC1_ADDR)
1217
1218
#define ALT_EMAC1_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1219
1220
#define ALT_EMAC1_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1221
1222
#define ALT_EMAC1_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1223
1224
#define ALT_EMAC1_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC1_ADDR)
1225
1226
#define ALT_EMAC1_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC1_ADDR)
1227
1228
#define ALT_EMAC1_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC1_ADDR)
1229
1230
#define ALT_EMAC1_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC1_ADDR)
1231
1232
#define ALT_EMAC1_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC1_ADDR)
1233
1234
#define ALT_EMAC1_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC1_ADDR)
1235
1236
#define ALT_EMAC1_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC1_ADDR)
1237
1238
#define ALT_EMAC1_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC1_ADDR)
1239
1240
#define ALT_EMAC1_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC1_ADDR)
1241
1242
#define ALT_EMAC1_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC1_ADDR)
1243
1244
#define ALT_EMAC1_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC1_ADDR)
1245
1246
#define ALT_EMAC1_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC1_ADDR)
1247
1248
#define ALT_EMAC1_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC1_ADDR)
1249
1250
#define ALT_EMAC1_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC1_ADDR)
1251
1252
#define ALT_EMAC1_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC1_ADDR)
1253
1254
#define ALT_EMAC1_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC1_ADDR)
1255
1256
#define ALT_EMAC1_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC1_ADDR)
1257
1258
#define ALT_EMAC1_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC1_ADDR)
1259
1260
#define ALT_EMAC1_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC1_ADDR)
1261
1262
#define ALT_EMAC1_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC1_ADDR)
1263
1264
#define ALT_EMAC1_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC1_ADDR)
1265
1266
#define ALT_EMAC1_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC1_ADDR)
1267
1268
#define ALT_EMAC1_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC1_ADDR)
1269
1270
#define ALT_EMAC1_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC1_ADDR)
1271
1272
#define ALT_EMAC1_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC1_ADDR)
1273
1274
#define ALT_EMAC1_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC1_ADDR)
1275
1276
#define ALT_EMAC1_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC1_ADDR)
1277
1278
#define ALT_EMAC1_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC1_ADDR)
1279
1280
#define ALT_EMAC1_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC1_ADDR)
1281
1282
#define ALT_EMAC1_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC1_ADDR)
1283
1284
#define ALT_EMAC1_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC1_ADDR)
1285
1286
#define ALT_EMAC1_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC1_ADDR)
1287
1288
#define ALT_EMAC1_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC1_ADDR)
1289
1290
#define ALT_EMAC1_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC1_ADDR)
1291
1292
#define ALT_EMAC1_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC1_ADDR)
1293
1294
#define ALT_EMAC1_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC1_ADDR)
1295
1296
#define ALT_EMAC1_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC1_ADDR)
1297
1298
#define ALT_EMAC1_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC1_ADDR)
1299
1300
#define ALT_EMAC1_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC1_ADDR)
1301
1302
#define ALT_EMAC1_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC1_ADDR)
1303
1304
#define ALT_EMAC1_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC1_ADDR)
1305
1306
#define ALT_EMAC1_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC1_ADDR)
1307
1308
#define ALT_EMAC1_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC1_ADDR)
1309
1310
#define ALT_EMAC1_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC1_ADDR)
1311
1312
#define ALT_EMAC1_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC1_ADDR)
1313
1314
#define ALT_EMAC1_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC1_ADDR)
1315
1316
#define ALT_EMAC1_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC1_ADDR)
1317
1318
#define ALT_EMAC1_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC1_ADDR)
1319
1320
#define ALT_EMAC1_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC1_ADDR)
1321
1322
#define ALT_EMAC1_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC1_ADDR)
1323
1324
#define ALT_EMAC1_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC1_ADDR)
1325
1326
#define ALT_EMAC1_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC1_ADDR)
1327
1328
#define ALT_EMAC1_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC1_ADDR)
1329
1330
#define ALT_EMAC1_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC1_ADDR)
1331
1332
#define ALT_EMAC1_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC1_ADDR)
1333
1334
#define ALT_EMAC1_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC1_ADDR)
1335
1336
#define ALT_EMAC1_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC1_ADDR)
1337
1338
#define ALT_EMAC1_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC1_ADDR)
1339
1340
#define ALT_EMAC1_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC1_ADDR)
1341
1342
#define ALT_EMAC1_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC1_ADDR)
1343
1344
#define ALT_EMAC1_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC1_ADDR)
1345
1346
#define ALT_EMAC1_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC1_ADDR)
1347
1348
#define ALT_EMAC1_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC1_ADDR)
1349
1350
#define ALT_EMAC1_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC1_ADDR)
1351
1352
#define ALT_EMAC1_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC1_ADDR)
1353
1354
#define ALT_EMAC1_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC1_ADDR)
1355
1356
#define ALT_EMAC1_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC1_ADDR)
1357
1358
#define ALT_EMAC1_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC1_ADDR)
1359
1360
#define ALT_EMAC1_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC1_ADDR)
1361
1362
#define ALT_EMAC1_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC1_ADDR)
1363
1364
#define ALT_EMAC1_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC1_ADDR)
1365
1366
#define ALT_EMAC1_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC1_ADDR)
1367
1368
#define ALT_EMAC1_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC1_ADDR)
1369
1370
#define ALT_EMAC1_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC1_ADDR)
1371
1372
#define ALT_EMAC1_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC1_ADDR)
1373
1374
#define ALT_EMAC1_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC1_ADDR)
1375
1376
#define ALT_EMAC1_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC1_ADDR)
1377
1378
#define ALT_EMAC1_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC1_ADDR)
1379
1380
#define ALT_EMAC1_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC1_ADDR)
1381
1382
#define ALT_EMAC1_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC1_ADDR)
1383
1384
#define ALT_EMAC1_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC1_ADDR)
1385
1386
#define ALT_EMAC1_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC1_ADDR)
1387
1388
#define ALT_EMAC1_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC1_ADDR)
1389
1390
#define ALT_EMAC1_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC1_ADDR)
1391
1392
#define ALT_EMAC1_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC1_ADDR)
1393
1394
#define ALT_EMAC1_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC1_ADDR)
1395
1396
#define ALT_EMAC1_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC1_ADDR)
1397
1398
#define ALT_EMAC1_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC1_ADDR)
1399
1400
#define ALT_EMAC1_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC1_ADDR)
1401
1402
#define ALT_EMAC1_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC1_ADDR)
1403
1404
#define ALT_EMAC1_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC1_ADDR)
1405
1406
#define ALT_EMAC1_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC1_ADDR)
1407
1408
#define ALT_EMAC1_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC1_ADDR)
1409
1410
#define ALT_EMAC1_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC1_ADDR)
1411
1412
#define ALT_EMAC1_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC1_ADDR)
1413
1414
#define ALT_EMAC1_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC1_ADDR)
1415
1416
#define ALT_EMAC1_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC1_ADDR)
1417
1418
#define ALT_EMAC1_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC1_ADDR)
1419
1420
#define ALT_EMAC1_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC1_ADDR)
1421
1422
#define ALT_EMAC1_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC1_ADDR)
1423
1424
#define ALT_EMAC1_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC1_ADDR)
1425
1426
#define ALT_EMAC1_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC1_ADDR)
1427
1428
#define ALT_EMAC1_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC1_ADDR)
1429
1430
#define ALT_EMAC1_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC1_ADDR)
1431
1432
#define ALT_EMAC1_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC1_ADDR)
1433
1434
#define ALT_EMAC1_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC1_ADDR)
1435
1436
#define ALT_EMAC1_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC1_ADDR)
1437
1438
#define ALT_EMAC1_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC1_ADDR)
1439
1440
#define ALT_EMAC1_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC1_ADDR)
1441
1442
#define ALT_EMAC1_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC1_ADDR)
1443
1444
#define ALT_EMAC1_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC1_ADDR)
1445
1446
#define ALT_EMAC1_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC1_ADDR)
1447
1448
#define ALT_EMAC1_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC1_ADDR)
1449
1450
#define ALT_EMAC1_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC1_ADDR)
1451
1452
#define ALT_EMAC1_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC1_ADDR)
1453
1454
#define ALT_EMAC1_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC1_ADDR)
1455
1456
#define ALT_EMAC1_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC1_ADDR)
1457
1458
#define ALT_EMAC1_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC1_ADDR)
1459
1460
#define ALT_EMAC1_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC1_ADDR)
1461
1462
#define ALT_EMAC1_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC1_ADDR)
1463
1464
#define ALT_EMAC1_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC1_ADDR)
1465
1466
#define ALT_EMAC1_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC1_ADDR)
1467
1468
#define ALT_EMAC1_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC1_ADDR)
1469
1470
#define ALT_EMAC1_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC1_ADDR)
1471
1472
#define ALT_EMAC1_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC1_ADDR)
1473
1474
#define ALT_EMAC1_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC1_ADDR)
1475
1476
#define ALT_EMAC1_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC1_ADDR)
1477
1478
#define ALT_EMAC1_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC1_ADDR)
1479
1480
#define ALT_EMAC1_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC1_ADDR)
1481
1482
#define ALT_EMAC1_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC1_ADDR)
1483
1484
#define ALT_EMAC1_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC1_ADDR)
1485
1486
#define ALT_EMAC1_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC1_ADDR)
1487
1488
#define ALT_EMAC1_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC1_ADDR)
1489
1490
#define ALT_EMAC1_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC1_ADDR)
1491
1492
#define ALT_EMAC1_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC1_ADDR)
1493
1494
#define ALT_EMAC1_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC1_ADDR)
1495
1496
#define ALT_EMAC1_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC1_ADDR)
1497
1498
#define ALT_EMAC1_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC1_ADDR)
1499
1500
#define ALT_EMAC1_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC1_ADDR)
1501
1502
#define ALT_EMAC1_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC1_ADDR)
1503
1504
#define ALT_EMAC1_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC1_ADDR)
1505
1506
#define ALT_EMAC1_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC1_ADDR)
1507
1508
#define ALT_EMAC1_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC1_ADDR)
1509
1510
#define ALT_EMAC1_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC1_ADDR)
1511
1512
#define ALT_EMAC1_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC1_ADDR)
1513
1514
#define ALT_EMAC1_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC1_ADDR)
1515
1516
#define ALT_EMAC1_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC1_ADDR)
1517
1518
#define ALT_EMAC1_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC1_ADDR)
1519
1520
#define ALT_EMAC1_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC1_ADDR)
1521
1522
#define ALT_EMAC1_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC1_ADDR)
1523
1524
#define ALT_EMAC1_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC1_ADDR)
1525
1526
#define ALT_EMAC1_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC1_ADDR)
1527
1528
#define ALT_EMAC1_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC1_ADDR)
1529
1530
#define ALT_EMAC1_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC1_ADDR)
1531
1532
#define ALT_EMAC1_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC1_ADDR)
1533
1534
#define ALT_EMAC1_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC1_ADDR)
1535
1536
#define ALT_EMAC1_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC1_ADDR)
1537
1538
#define ALT_EMAC1_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC1_ADDR)
1539
1540
#define ALT_EMAC1_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC1_ADDR)
1541
1542
#define ALT_EMAC1_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC1_ADDR)
1543
1544
#define ALT_EMAC1_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC1_ADDR)
1545
1546
#define ALT_EMAC1_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC1_ADDR)
1547
1548
#define ALT_EMAC1_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC1_ADDR)
1549
1550
#define ALT_EMAC1_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC1_ADDR)
1551
1552
#define ALT_EMAC1_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC1_ADDR)
1553
1554
#define ALT_EMAC1_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC1_ADDR)
1555
1556
#define ALT_EMAC1_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC1_ADDR)
1557
1558
#define ALT_EMAC1_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC1_ADDR)
1559
1560
#define ALT_EMAC1_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC1_ADDR)
1561
1562
#define ALT_EMAC1_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC1_ADDR)
1563
1564
#define ALT_EMAC1_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC1_ADDR)
1565
1566
#define ALT_EMAC1_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC1_ADDR)
1567
1568
#define ALT_EMAC1_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC1_ADDR)
1569
1570
#define ALT_EMAC1_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC1_ADDR)
1571
1572
#define ALT_EMAC1_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC1_ADDR)
1573
1574
#define ALT_EMAC1_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC1_ADDR)
1575
1576
#define ALT_EMAC1_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC1_ADDR)
1577
1578
#define ALT_EMAC1_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC1_ADDR)
1579
1580
#define ALT_EMAC1_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC1_ADDR)
1581
1582
#define ALT_EMAC1_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC1_ADDR)
1583
1584
#define ALT_EMAC1_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC1_ADDR)
1585
1586
#define ALT_EMAC1_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC1_ADDR)
1587
1588
#define ALT_EMAC1_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC1_ADDR)
1589
1590
#define ALT_EMAC1_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC1_ADDR)
1591
1592
#define ALT_EMAC1_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC1_ADDR)
1593
1594
#define ALT_EMAC1_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC1_ADDR)
1595
1596
#define ALT_EMAC1_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC1_ADDR)
1597
1598
#define ALT_EMAC1_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC1_ADDR)
1599
1600
#define ALT_EMAC1_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC1_ADDR)
1601
1602
#define ALT_EMAC1_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC1_ADDR)
1603
1604
#define ALT_EMAC1_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC1_ADDR)
1605
1606
#define ALT_EMAC1_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC1_ADDR)
1607
1608
#define ALT_EMAC1_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC1_ADDR)
1609
1610
#define ALT_EMAC1_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC1_ADDR)
1611
1612
#define ALT_EMAC1_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC1_ADDR)
1613
1614
#define ALT_EMAC1_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC1_ADDR)
1615
1616
#define ALT_EMAC1_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC1_ADDR)
1617
1618
#define ALT_EMAC1_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC1_ADDR)
1619
1620
#define ALT_EMAC1_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC1_ADDR)
1621
1622
#define ALT_EMAC1_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC1_ADDR)
1623
1624
#define ALT_EMAC1_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC1_ADDR)
1625
1626
#define ALT_EMAC1_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC1_ADDR)
1627
1628
#define ALT_EMAC1_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC1_ADDR)
1629
1630
#define ALT_EMAC1_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC1_ADDR)
1631
1632
#define ALT_EMAC1_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC1_ADDR)
1633
1634
#define ALT_EMAC1_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC1_ADDR)
1635
1636
#define ALT_EMAC1_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC1_ADDR)
1637
1638
#define ALT_EMAC1_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC1_ADDR)
1639
1640
#define ALT_EMAC1_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC1_ADDR)
1641
1642
#define ALT_EMAC1_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC1_ADDR)
1643
1644
#define ALT_EMAC1_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC1_ADDR)
1645
1646
#define ALT_EMAC1_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC1_ADDR)
1647
1648
#define ALT_EMAC1_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC1_ADDR)
1649
1650
#define ALT_EMAC1_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC1_ADDR)
1651
1652
#define ALT_EMAC1_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC1_ADDR)
1653
1654
#define ALT_EMAC1_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC1_ADDR)
1655
1656
#define ALT_EMAC1_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC1_ADDR)
1657
1658
#define ALT_EMAC1_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC1_ADDR)
1659
1660
#define ALT_EMAC1_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC1_ADDR)
1661
1662
#define ALT_EMAC1_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC1_ADDR)
1663
1664
#define ALT_EMAC1_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC1_ADDR)
1665
1666
#define ALT_EMAC1_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC1_ADDR)
1667
1668
#define ALT_EMAC1_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC1_ADDR)
1669
1670
#define ALT_EMAC1_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC1_ADDR)
1671
1672
#define ALT_EMAC1_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC1_ADDR)
1673
1674
#define ALT_EMAC1_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC1_ADDR)
1675
1676
#define ALT_EMAC1_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC1_ADDR)
1677
1678
#define ALT_EMAC1_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC1_ADDR)
1679
1680
#define ALT_EMAC1_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC1_ADDR)
1681
1682
#define ALT_EMAC1_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC1_ADDR)
1683
1684
#define ALT_EMAC1_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC1_ADDR)
1685
1686
#define ALT_EMAC1_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC1_ADDR)
1687
1688
#define ALT_EMAC1_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC1_ADDR)
1689
1690
#define ALT_EMAC1_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC1_ADDR)
1691
1692
#define ALT_EMAC1_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC1_ADDR)
1693
1694
#define ALT_EMAC1_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC1_ADDR)
1695
1696
#define ALT_EMAC1_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC1_ADDR)
1697
1698
#define ALT_EMAC1_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC1_ADDR)
1699
1700
#define ALT_EMAC1_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC1_ADDR)
1701
1702
#define ALT_EMAC1_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC1_ADDR)
1703
1704
#define ALT_EMAC1_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC1_ADDR)
1705
1706
#define ALT_EMAC1_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC1_ADDR)
1707
1708
#define ALT_EMAC1_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC1_ADDR)
1709
1710
#define ALT_EMAC1_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC1_ADDR)
1711
1712
#define ALT_EMAC1_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC1_ADDR)
1713
1714
#define ALT_EMAC1_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC1_ADDR)
1715
1716
#define ALT_EMAC1_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC1_ADDR)
1717
1718
#define ALT_EMAC1_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC1_ADDR)
1719
1720
#define ALT_EMAC1_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC1_ADDR)
1721
1722
#define ALT_EMAC1_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC1_ADDR)
1723
1724
#define ALT_EMAC1_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC1_ADDR)
1725
1726
#define ALT_EMAC1_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC1_ADDR)
1727
1728
#define ALT_EMAC1_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC1_ADDR)
1729
1730
#define ALT_EMAC1_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC1_ADDR)
1731
1732
#define ALT_EMAC1_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC1_ADDR)
1733
1734
#define ALT_EMAC1_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC1_ADDR)
1735
1736
#define ALT_EMAC1_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC1_ADDR)
1737
1738
#define ALT_EMAC1_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC1_ADDR)
1739
1740
#define ALT_EMAC1_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC1_ADDR)
1741
1742
#define ALT_EMAC1_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC1_ADDR)
1743
1744
#define ALT_EMAC1_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC1_ADDR)
1745
1746
#define ALT_EMAC1_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC1_ADDR)
1747
1748
#define ALT_EMAC1_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC1_ADDR)
1749
1750
#define ALT_EMAC1_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC1_ADDR)
1751
1752
#define ALT_EMAC1_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC1_ADDR)
1753
1754
#define ALT_EMAC1_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC1_ADDR)
1755
1756
#define ALT_EMAC1_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC1_ADDR)
1757
1758
#define ALT_EMAC1_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC1_ADDR)
1759
1760
#define ALT_EMAC1_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC1_ADDR)
1761
1762
#define ALT_EMAC1_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC1_ADDR)
1763
1764
#define ALT_EMAC1_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC1_ADDR)
1765
1766
#define ALT_EMAC1_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC1_ADDR)
1767
1768
#define ALT_EMAC1_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC1_ADDR)
1769
1770
#define ALT_EMAC1_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC1_ADDR)
1771
1772
#define ALT_EMAC1_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC1_ADDR)
1773
1774
#define ALT_EMAC1_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC1_ADDR)
1775
1776
#define ALT_EMAC1_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC1_ADDR)
1777
1778
#define ALT_EMAC1_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC1_ADDR)
1779
1780
#define ALT_EMAC1_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC1_ADDR)
1781
1782
#define ALT_EMAC1_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC1_ADDR)
1783
1784
#define ALT_EMAC1_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC1_ADDR)
1785
1786
#define ALT_EMAC1_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC1_ADDR)
1787
1788
#define ALT_EMAC1_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC1_ADDR)
1789
1790
#define ALT_EMAC1_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC1_ADDR)
1791
1792
#define ALT_EMAC1_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC1_ADDR)
1793
1794
#define ALT_EMAC1_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC1_ADDR)
1795
1796
#define ALT_EMAC1_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC1_ADDR)
1797
1798
#define ALT_EMAC1_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC1_ADDR)
1799
1800
#define ALT_EMAC1_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC1_ADDR)
1801
1802
#define ALT_EMAC1_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC1_ADDR)
1803
1804
#define ALT_EMAC1_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC1_ADDR)
1805
1806
#define ALT_EMAC1_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC1_ADDR)
1807
1808
#define ALT_EMAC1_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC1_ADDR)
1809
1810
#define ALT_EMAC1_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC1_ADDR)
1811
1812
#define ALT_EMAC1_OFST 0xff802000
1813
1814
#define ALT_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC1_OFST))
1815
1816
#define ALT_EMAC1_LB_ADDR ALT_EMAC1_ADDR
1817
1818
#define ALT_EMAC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC1_ADDR) + 0x105c) - 1))
1819
1829
#define ALT_EMAC2_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC2_ADDR)
1830
1831
#define ALT_EMAC2_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC2_ADDR)
1832
1833
#define ALT_EMAC2_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC2_ADDR)
1834
1835
#define ALT_EMAC2_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC2_ADDR)
1836
1837
#define ALT_EMAC2_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC2_ADDR)
1838
1839
#define ALT_EMAC2_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC2_ADDR)
1840
1841
#define ALT_EMAC2_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC2_ADDR)
1842
1843
#define ALT_EMAC2_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC2_ADDR)
1844
1845
#define ALT_EMAC2_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC2_ADDR)
1846
1847
#define ALT_EMAC2_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC2_ADDR)
1848
1849
#define ALT_EMAC2_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC2_ADDR)
1850
1851
#define ALT_EMAC2_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC2_ADDR)
1852
1853
#define ALT_EMAC2_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC2_ADDR)
1854
1855
#define ALT_EMAC2_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC2_ADDR)
1856
1857
#define ALT_EMAC2_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC2_ADDR)
1858
1859
#define ALT_EMAC2_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC2_ADDR)
1860
1861
#define ALT_EMAC2_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC2_ADDR)
1862
1863
#define ALT_EMAC2_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC2_ADDR)
1864
1865
#define ALT_EMAC2_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC2_ADDR)
1866
1867
#define ALT_EMAC2_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC2_ADDR)
1868
1869
#define ALT_EMAC2_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC2_ADDR)
1870
1871
#define ALT_EMAC2_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC2_ADDR)
1872
1873
#define ALT_EMAC2_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC2_ADDR)
1874
1875
#define ALT_EMAC2_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC2_ADDR)
1876
1877
#define ALT_EMAC2_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC2_ADDR)
1878
1879
#define ALT_EMAC2_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC2_ADDR)
1880
1881
#define ALT_EMAC2_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC2_ADDR)
1882
1883
#define ALT_EMAC2_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC2_ADDR)
1884
1885
#define ALT_EMAC2_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC2_ADDR)
1886
1887
#define ALT_EMAC2_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC2_ADDR)
1888
1889
#define ALT_EMAC2_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC2_ADDR)
1890
1891
#define ALT_EMAC2_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC2_ADDR)
1892
1893
#define ALT_EMAC2_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC2_ADDR)
1894
1895
#define ALT_EMAC2_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC2_ADDR)
1896
1897
#define ALT_EMAC2_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC2_ADDR)
1898
1899
#define ALT_EMAC2_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC2_ADDR)
1900
1901
#define ALT_EMAC2_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC2_ADDR)
1902
1903
#define ALT_EMAC2_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC2_ADDR)
1904
1905
#define ALT_EMAC2_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC2_ADDR)
1906
1907
#define ALT_EMAC2_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC2_ADDR)
1908
1909
#define ALT_EMAC2_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC2_ADDR)
1910
1911
#define ALT_EMAC2_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC2_ADDR)
1912
1913
#define ALT_EMAC2_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC2_ADDR)
1914
1915
#define ALT_EMAC2_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC2_ADDR)
1916
1917
#define ALT_EMAC2_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC2_ADDR)
1918
1919
#define ALT_EMAC2_GMAC_WDOG_TMO_ADDR ALT_EMAC_GMAC_WDOG_TMO_ADDR(ALT_EMAC2_ADDR)
1920
1921
#define ALT_EMAC2_GMAC_GENPIO_ADDR ALT_EMAC_GMAC_GENPIO_ADDR(ALT_EMAC2_ADDR)
1922
1923
#define ALT_EMAC2_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC2_ADDR)
1924
1925
#define ALT_EMAC2_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC2_ADDR)
1926
1927
#define ALT_EMAC2_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC2_ADDR)
1928
1929
#define ALT_EMAC2_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC2_ADDR)
1930
1931
#define ALT_EMAC2_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC2_ADDR)
1932
1933
#define ALT_EMAC2_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1934
1935
#define ALT_EMAC2_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1936
1937
#define ALT_EMAC2_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1938
1939
#define ALT_EMAC2_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1940
1941
#define ALT_EMAC2_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1942
1943
#define ALT_EMAC2_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1944
1945
#define ALT_EMAC2_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1946
1947
#define ALT_EMAC2_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1948
1949
#define ALT_EMAC2_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1950
1951
#define ALT_EMAC2_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC2_ADDR)
1952
1953
#define ALT_EMAC2_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC2_ADDR)
1954
1955
#define ALT_EMAC2_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC2_ADDR)
1956
1957
#define ALT_EMAC2_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC2_ADDR)
1958
1959
#define ALT_EMAC2_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC2_ADDR)
1960
1961
#define ALT_EMAC2_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC2_ADDR)
1962
1963
#define ALT_EMAC2_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC2_ADDR)
1964
1965
#define ALT_EMAC2_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC2_ADDR)
1966
1967
#define ALT_EMAC2_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC2_ADDR)
1968
1969
#define ALT_EMAC2_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC2_ADDR)
1970
1971
#define ALT_EMAC2_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC2_ADDR)
1972
1973
#define ALT_EMAC2_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC2_ADDR)
1974
1975
#define ALT_EMAC2_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC2_ADDR)
1976
1977
#define ALT_EMAC2_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC2_ADDR)
1978
1979
#define ALT_EMAC2_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC2_ADDR)
1980
1981
#define ALT_EMAC2_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC2_ADDR)
1982
1983
#define ALT_EMAC2_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC2_ADDR)
1984
1985
#define ALT_EMAC2_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1986
1987
#define ALT_EMAC2_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC2_ADDR)
1988
1989
#define ALT_EMAC2_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC2_ADDR)
1990
1991
#define ALT_EMAC2_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1992
1993
#define ALT_EMAC2_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
1994
1995
#define ALT_EMAC2_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC2_ADDR)
1996
1997
#define ALT_EMAC2_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC2_ADDR)
1998
1999
#define ALT_EMAC2_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC2_ADDR)
2000
2001
#define ALT_EMAC2_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC2_ADDR)
2002
2003
#define ALT_EMAC2_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC2_ADDR)
2004
2005
#define ALT_EMAC2_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC2_ADDR)
2006
2007
#define ALT_EMAC2_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2008
2009
#define ALT_EMAC2_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2010
2011
#define ALT_EMAC2_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2012
2013
#define ALT_EMAC2_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2014
2015
#define ALT_EMAC2_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2016
2017
#define ALT_EMAC2_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC2_ADDR)
2018
2019
#define ALT_EMAC2_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC2_ADDR)
2020
2021
#define ALT_EMAC2_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC2_ADDR)
2022
2023
#define ALT_EMAC2_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC2_ADDR)
2024
2025
#define ALT_EMAC2_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC2_ADDR)
2026
2027
#define ALT_EMAC2_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC2_ADDR)
2028
2029
#define ALT_EMAC2_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC2_ADDR)
2030
2031
#define ALT_EMAC2_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC2_ADDR)
2032
2033
#define ALT_EMAC2_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC2_ADDR)
2034
2035
#define ALT_EMAC2_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC2_ADDR)
2036
2037
#define ALT_EMAC2_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC2_ADDR)
2038
2039
#define ALT_EMAC2_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC2_ADDR)
2040
2041
#define ALT_EMAC2_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2042
2043
#define ALT_EMAC2_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2044
2045
#define ALT_EMAC2_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC2_ADDR)
2046
2047
#define ALT_EMAC2_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC2_ADDR)
2048
2049
#define ALT_EMAC2_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC2_ADDR)
2050
2051
#define ALT_EMAC2_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2052
2053
#define ALT_EMAC2_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2054
2055
#define ALT_EMAC2_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC2_ADDR)
2056
2057
#define ALT_EMAC2_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2058
2059
#define ALT_EMAC2_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2060
2061
#define ALT_EMAC2_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2062
2063
#define ALT_EMAC2_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2064
2065
#define ALT_EMAC2_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC2_ADDR)
2066
2067
#define ALT_EMAC2_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC2_ADDR)
2068
2069
#define ALT_EMAC2_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2070
2071
#define ALT_EMAC2_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2072
2073
#define ALT_EMAC2_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC2_ADDR)
2074
2075
#define ALT_EMAC2_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC2_ADDR)
2076
2077
#define ALT_EMAC2_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC2_ADDR)
2078
2079
#define ALT_EMAC2_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2080
2081
#define ALT_EMAC2_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2082
2083
#define ALT_EMAC2_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC2_ADDR)
2084
2085
#define ALT_EMAC2_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2086
2087
#define ALT_EMAC2_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2088
2089
#define ALT_EMAC2_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2090
2091
#define ALT_EMAC2_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC2_ADDR)
2092
2093
#define ALT_EMAC2_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC2_ADDR)
2094
2095
#define ALT_EMAC2_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC2_ADDR)
2096
2097
#define ALT_EMAC2_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC2_ADDR)
2098
2099
#define ALT_EMAC2_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC2_ADDR)
2100
2101
#define ALT_EMAC2_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC2_ADDR)
2102
2103
#define ALT_EMAC2_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC2_ADDR)
2104
2105
#define ALT_EMAC2_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC2_ADDR)
2106
2107
#define ALT_EMAC2_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC2_ADDR)
2108
2109
#define ALT_EMAC2_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC2_ADDR)
2110
2111
#define ALT_EMAC2_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC2_ADDR)
2112
2113
#define ALT_EMAC2_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC2_ADDR)
2114
2115
#define ALT_EMAC2_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC2_ADDR)
2116
2117
#define ALT_EMAC2_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC2_ADDR)
2118
2119
#define ALT_EMAC2_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC2_ADDR)
2120
2121
#define ALT_EMAC2_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC2_ADDR)
2122
2123
#define ALT_EMAC2_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC2_ADDR)
2124
2125
#define ALT_EMAC2_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC2_ADDR)
2126
2127
#define ALT_EMAC2_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC2_ADDR)
2128
2129
#define ALT_EMAC2_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC2_ADDR)
2130
2131
#define ALT_EMAC2_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC2_ADDR)
2132
2133
#define ALT_EMAC2_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC2_ADDR)
2134
2135
#define ALT_EMAC2_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC2_ADDR)
2136
2137
#define ALT_EMAC2_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC2_ADDR)
2138
2139
#define ALT_EMAC2_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC2_ADDR)
2140
2141
#define ALT_EMAC2_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC2_ADDR)
2142
2143
#define ALT_EMAC2_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC2_ADDR)
2144
2145
#define ALT_EMAC2_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC2_ADDR)
2146
2147
#define ALT_EMAC2_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC2_ADDR)
2148
2149
#define ALT_EMAC2_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC2_ADDR)
2150
2151
#define ALT_EMAC2_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC2_ADDR)
2152
2153
#define ALT_EMAC2_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC2_ADDR)
2154
2155
#define ALT_EMAC2_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC2_ADDR)
2156
2157
#define ALT_EMAC2_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC2_ADDR)
2158
2159
#define ALT_EMAC2_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC2_ADDR)
2160
2161
#define ALT_EMAC2_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC2_ADDR)
2162
2163
#define ALT_EMAC2_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC2_ADDR)
2164
2165
#define ALT_EMAC2_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC2_ADDR)
2166
2167
#define ALT_EMAC2_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC2_ADDR)
2168
2169
#define ALT_EMAC2_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC2_ADDR)
2170
2171
#define ALT_EMAC2_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC2_ADDR)
2172
2173
#define ALT_EMAC2_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC2_ADDR)
2174
2175
#define ALT_EMAC2_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC2_ADDR)
2176
2177
#define ALT_EMAC2_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC2_ADDR)
2178
2179
#define ALT_EMAC2_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC2_ADDR)
2180
2181
#define ALT_EMAC2_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC2_ADDR)
2182
2183
#define ALT_EMAC2_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC2_ADDR)
2184
2185
#define ALT_EMAC2_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC2_ADDR)
2186
2187
#define ALT_EMAC2_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC2_ADDR)
2188
2189
#define ALT_EMAC2_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC2_ADDR)
2190
2191
#define ALT_EMAC2_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC2_ADDR)
2192
2193
#define ALT_EMAC2_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC2_ADDR)
2194
2195
#define ALT_EMAC2_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC2_ADDR)
2196
2197
#define ALT_EMAC2_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC2_ADDR)
2198
2199
#define ALT_EMAC2_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC2_ADDR)
2200
2201
#define ALT_EMAC2_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC2_ADDR)
2202
2203
#define ALT_EMAC2_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC2_ADDR)
2204
2205
#define ALT_EMAC2_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC2_ADDR)
2206
2207
#define ALT_EMAC2_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC2_ADDR)
2208
2209
#define ALT_EMAC2_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC2_ADDR)
2210
2211
#define ALT_EMAC2_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC2_ADDR)
2212
2213
#define ALT_EMAC2_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC2_ADDR)
2214
2215
#define ALT_EMAC2_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC2_ADDR)
2216
2217
#define ALT_EMAC2_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC2_ADDR)
2218
2219
#define ALT_EMAC2_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC2_ADDR)
2220
2221
#define ALT_EMAC2_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC2_ADDR)
2222
2223
#define ALT_EMAC2_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC2_ADDR)
2224
2225
#define ALT_EMAC2_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC2_ADDR)
2226
2227
#define ALT_EMAC2_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC2_ADDR)
2228
2229
#define ALT_EMAC2_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC2_ADDR)
2230
2231
#define ALT_EMAC2_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC2_ADDR)
2232
2233
#define ALT_EMAC2_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC2_ADDR)
2234
2235
#define ALT_EMAC2_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC2_ADDR)
2236
2237
#define ALT_EMAC2_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC2_ADDR)
2238
2239
#define ALT_EMAC2_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC2_ADDR)
2240
2241
#define ALT_EMAC2_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC2_ADDR)
2242
2243
#define ALT_EMAC2_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC2_ADDR)
2244
2245
#define ALT_EMAC2_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC2_ADDR)
2246
2247
#define ALT_EMAC2_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC2_ADDR)
2248
2249
#define ALT_EMAC2_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC2_ADDR)
2250
2251
#define ALT_EMAC2_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC2_ADDR)
2252
2253
#define ALT_EMAC2_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC2_ADDR)
2254
2255
#define ALT_EMAC2_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC2_ADDR)
2256
2257
#define ALT_EMAC2_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC2_ADDR)
2258
2259
#define ALT_EMAC2_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC2_ADDR)
2260
2261
#define ALT_EMAC2_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC2_ADDR)
2262
2263
#define ALT_EMAC2_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC2_ADDR)
2264
2265
#define ALT_EMAC2_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC2_ADDR)
2266
2267
#define ALT_EMAC2_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC2_ADDR)
2268
2269
#define ALT_EMAC2_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC2_ADDR)
2270
2271
#define ALT_EMAC2_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC2_ADDR)
2272
2273
#define ALT_EMAC2_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC2_ADDR)
2274
2275
#define ALT_EMAC2_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC2_ADDR)
2276
2277
#define ALT_EMAC2_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC2_ADDR)
2278
2279
#define ALT_EMAC2_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC2_ADDR)
2280
2281
#define ALT_EMAC2_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC2_ADDR)
2282
2283
#define ALT_EMAC2_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC2_ADDR)
2284
2285
#define ALT_EMAC2_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC2_ADDR)
2286
2287
#define ALT_EMAC2_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC2_ADDR)
2288
2289
#define ALT_EMAC2_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC2_ADDR)
2290
2291
#define ALT_EMAC2_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC2_ADDR)
2292
2293
#define ALT_EMAC2_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC2_ADDR)
2294
2295
#define ALT_EMAC2_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC2_ADDR)
2296
2297
#define ALT_EMAC2_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC2_ADDR)
2298
2299
#define ALT_EMAC2_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC2_ADDR)
2300
2301
#define ALT_EMAC2_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC2_ADDR)
2302
2303
#define ALT_EMAC2_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC2_ADDR)
2304
2305
#define ALT_EMAC2_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC2_ADDR)
2306
2307
#define ALT_EMAC2_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC2_ADDR)
2308
2309
#define ALT_EMAC2_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC2_ADDR)
2310
2311
#define ALT_EMAC2_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC2_ADDR)
2312
2313
#define ALT_EMAC2_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC2_ADDR)
2314
2315
#define ALT_EMAC2_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC2_ADDR)
2316
2317
#define ALT_EMAC2_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC2_ADDR)
2318
2319
#define ALT_EMAC2_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC2_ADDR)
2320
2321
#define ALT_EMAC2_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC2_ADDR)
2322
2323
#define ALT_EMAC2_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC2_ADDR)
2324
2325
#define ALT_EMAC2_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC2_ADDR)
2326
2327
#define ALT_EMAC2_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC2_ADDR)
2328
2329
#define ALT_EMAC2_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC2_ADDR)
2330
2331
#define ALT_EMAC2_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC2_ADDR)
2332
2333
#define ALT_EMAC2_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC2_ADDR)
2334
2335
#define ALT_EMAC2_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC2_ADDR)
2336
2337
#define ALT_EMAC2_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC2_ADDR)
2338
2339
#define ALT_EMAC2_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC2_ADDR)
2340
2341
#define ALT_EMAC2_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC2_ADDR)
2342
2343
#define ALT_EMAC2_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC2_ADDR)
2344
2345
#define ALT_EMAC2_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC2_ADDR)
2346
2347
#define ALT_EMAC2_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC2_ADDR)
2348
2349
#define ALT_EMAC2_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC2_ADDR)
2350
2351
#define ALT_EMAC2_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC2_ADDR)
2352
2353
#define ALT_EMAC2_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC2_ADDR)
2354
2355
#define ALT_EMAC2_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC2_ADDR)
2356
2357
#define ALT_EMAC2_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC2_ADDR)
2358
2359
#define ALT_EMAC2_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC2_ADDR)
2360
2361
#define ALT_EMAC2_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC2_ADDR)
2362
2363
#define ALT_EMAC2_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC2_ADDR)
2364
2365
#define ALT_EMAC2_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC2_ADDR)
2366
2367
#define ALT_EMAC2_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC2_ADDR)
2368
2369
#define ALT_EMAC2_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC2_ADDR)
2370
2371
#define ALT_EMAC2_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC2_ADDR)
2372
2373
#define ALT_EMAC2_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC2_ADDR)
2374
2375
#define ALT_EMAC2_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC2_ADDR)
2376
2377
#define ALT_EMAC2_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC2_ADDR)
2378
2379
#define ALT_EMAC2_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC2_ADDR)
2380
2381
#define ALT_EMAC2_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC2_ADDR)
2382
2383
#define ALT_EMAC2_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC2_ADDR)
2384
2385
#define ALT_EMAC2_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC2_ADDR)
2386
2387
#define ALT_EMAC2_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC2_ADDR)
2388
2389
#define ALT_EMAC2_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC2_ADDR)
2390
2391
#define ALT_EMAC2_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC2_ADDR)
2392
2393
#define ALT_EMAC2_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC2_ADDR)
2394
2395
#define ALT_EMAC2_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC2_ADDR)
2396
2397
#define ALT_EMAC2_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC2_ADDR)
2398
2399
#define ALT_EMAC2_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC2_ADDR)
2400
2401
#define ALT_EMAC2_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC2_ADDR)
2402
2403
#define ALT_EMAC2_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC2_ADDR)
2404
2405
#define ALT_EMAC2_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC2_ADDR)
2406
2407
#define ALT_EMAC2_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC2_ADDR)
2408
2409
#define ALT_EMAC2_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC2_ADDR)
2410
2411
#define ALT_EMAC2_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC2_ADDR)
2412
2413
#define ALT_EMAC2_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC2_ADDR)
2414
2415
#define ALT_EMAC2_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC2_ADDR)
2416
2417
#define ALT_EMAC2_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC2_ADDR)
2418
2419
#define ALT_EMAC2_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC2_ADDR)
2420
2421
#define ALT_EMAC2_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC2_ADDR)
2422
2423
#define ALT_EMAC2_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC2_ADDR)
2424
2425
#define ALT_EMAC2_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC2_ADDR)
2426
2427
#define ALT_EMAC2_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC2_ADDR)
2428
2429
#define ALT_EMAC2_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC2_ADDR)
2430
2431
#define ALT_EMAC2_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC2_ADDR)
2432
2433
#define ALT_EMAC2_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC2_ADDR)
2434
2435
#define ALT_EMAC2_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC2_ADDR)
2436
2437
#define ALT_EMAC2_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC2_ADDR)
2438
2439
#define ALT_EMAC2_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC2_ADDR)
2440
2441
#define ALT_EMAC2_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC2_ADDR)
2442
2443
#define ALT_EMAC2_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC2_ADDR)
2444
2445
#define ALT_EMAC2_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC2_ADDR)
2446
2447
#define ALT_EMAC2_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC2_ADDR)
2448
2449
#define ALT_EMAC2_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC2_ADDR)
2450
2451
#define ALT_EMAC2_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC2_ADDR)
2452
2453
#define ALT_EMAC2_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC2_ADDR)
2454
2455
#define ALT_EMAC2_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC2_ADDR)
2456
2457
#define ALT_EMAC2_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC2_ADDR)
2458
2459
#define ALT_EMAC2_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC2_ADDR)
2460
2461
#define ALT_EMAC2_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC2_ADDR)
2462
2463
#define ALT_EMAC2_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC2_ADDR)
2464
2465
#define ALT_EMAC2_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC2_ADDR)
2466
2467
#define ALT_EMAC2_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC2_ADDR)
2468
2469
#define ALT_EMAC2_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC2_ADDR)
2470
2471
#define ALT_EMAC2_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC2_ADDR)
2472
2473
#define ALT_EMAC2_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC2_ADDR)
2474
2475
#define ALT_EMAC2_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC2_ADDR)
2476
2477
#define ALT_EMAC2_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC2_ADDR)
2478
2479
#define ALT_EMAC2_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC2_ADDR)
2480
2481
#define ALT_EMAC2_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC2_ADDR)
2482
2483
#define ALT_EMAC2_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC2_ADDR)
2484
2485
#define ALT_EMAC2_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC2_ADDR)
2486
2487
#define ALT_EMAC2_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC2_ADDR)
2488
2489
#define ALT_EMAC2_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC2_ADDR)
2490
2491
#define ALT_EMAC2_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC2_ADDR)
2492
2493
#define ALT_EMAC2_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC2_ADDR)
2494
2495
#define ALT_EMAC2_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC2_ADDR)
2496
2497
#define ALT_EMAC2_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC2_ADDR)
2498
2499
#define ALT_EMAC2_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC2_ADDR)
2500
2501
#define ALT_EMAC2_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC2_ADDR)
2502
2503
#define ALT_EMAC2_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC2_ADDR)
2504
2505
#define ALT_EMAC2_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC2_ADDR)
2506
2507
#define ALT_EMAC2_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC2_ADDR)
2508
2509
#define ALT_EMAC2_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC2_ADDR)
2510
2511
#define ALT_EMAC2_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC2_ADDR)
2512
2513
#define ALT_EMAC2_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC2_ADDR)
2514
2515
#define ALT_EMAC2_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC2_ADDR)
2516
2517
#define ALT_EMAC2_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC2_ADDR)
2518
2519
#define ALT_EMAC2_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC2_ADDR)
2520
2521
#define ALT_EMAC2_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC2_ADDR)
2522
2523
#define ALT_EMAC2_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC2_ADDR)
2524
2525
#define ALT_EMAC2_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC2_ADDR)
2526
2527
#define ALT_EMAC2_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC2_ADDR)
2528
2529
#define ALT_EMAC2_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC2_ADDR)
2530
2531
#define ALT_EMAC2_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC2_ADDR)
2532
2533
#define ALT_EMAC2_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC2_ADDR)
2534
2535
#define ALT_EMAC2_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC2_ADDR)
2536
2537
#define ALT_EMAC2_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC2_ADDR)
2538
2539
#define ALT_EMAC2_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC2_ADDR)
2540
2541
#define ALT_EMAC2_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC2_ADDR)
2542
2543
#define ALT_EMAC2_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC2_ADDR)
2544
2545
#define ALT_EMAC2_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC2_ADDR)
2546
2547
#define ALT_EMAC2_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC2_ADDR)
2548
2549
#define ALT_EMAC2_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC2_ADDR)
2550
2551
#define ALT_EMAC2_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC2_ADDR)
2552
2553
#define ALT_EMAC2_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC2_ADDR)
2554
2555
#define ALT_EMAC2_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC2_ADDR)
2556
2557
#define ALT_EMAC2_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC2_ADDR)
2558
2559
#define ALT_EMAC2_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC2_ADDR)
2560
2561
#define ALT_EMAC2_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC2_ADDR)
2562
2563
#define ALT_EMAC2_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC2_ADDR)
2564
2565
#define ALT_EMAC2_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC2_ADDR)
2566
2567
#define ALT_EMAC2_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC2_ADDR)
2568
2569
#define ALT_EMAC2_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC2_ADDR)
2570
2571
#define ALT_EMAC2_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC2_ADDR)
2572
2573
#define ALT_EMAC2_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC2_ADDR)
2574
2575
#define ALT_EMAC2_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC2_ADDR)
2576
2577
#define ALT_EMAC2_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC2_ADDR)
2578
2579
#define ALT_EMAC2_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC2_ADDR)
2580
2581
#define ALT_EMAC2_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC2_ADDR)
2582
2583
#define ALT_EMAC2_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC2_ADDR)
2584
2585
#define ALT_EMAC2_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC2_ADDR)
2586
2587
#define ALT_EMAC2_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC2_ADDR)
2588
2589
#define ALT_EMAC2_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC2_ADDR)
2590
2591
#define ALT_EMAC2_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC2_ADDR)
2592
2593
#define ALT_EMAC2_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC2_ADDR)
2594
2595
#define ALT_EMAC2_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC2_ADDR)
2596
2597
#define ALT_EMAC2_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC2_ADDR)
2598
2599
#define ALT_EMAC2_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC2_ADDR)
2600
2601
#define ALT_EMAC2_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC2_ADDR)
2602
2603
#define ALT_EMAC2_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC2_ADDR)
2604
2605
#define ALT_EMAC2_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC2_ADDR)
2606
2607
#define ALT_EMAC2_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC2_ADDR)
2608
2609
#define ALT_EMAC2_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC2_ADDR)
2610
2611
#define ALT_EMAC2_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC2_ADDR)
2612
2613
#define ALT_EMAC2_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC2_ADDR)
2614
2615
#define ALT_EMAC2_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC2_ADDR)
2616
2617
#define ALT_EMAC2_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC2_ADDR)
2618
2619
#define ALT_EMAC2_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC2_ADDR)
2620
2621
#define ALT_EMAC2_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC2_ADDR)
2622
2623
#define ALT_EMAC2_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC2_ADDR)
2624
2625
#define ALT_EMAC2_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC2_ADDR)
2626
2627
#define ALT_EMAC2_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC2_ADDR)
2628
2629
#define ALT_EMAC2_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC2_ADDR)
2630
2631
#define ALT_EMAC2_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC2_ADDR)
2632
2633
#define ALT_EMAC2_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC2_ADDR)
2634
2635
#define ALT_EMAC2_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC2_ADDR)
2636
2637
#define ALT_EMAC2_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC2_ADDR)
2638
2639
#define ALT_EMAC2_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC2_ADDR)
2640
2641
#define ALT_EMAC2_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC2_ADDR)
2642
2643
#define ALT_EMAC2_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC2_ADDR)
2644
2645
#define ALT_EMAC2_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC2_ADDR)
2646
2647
#define ALT_EMAC2_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC2_ADDR)
2648
2649
#define ALT_EMAC2_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC2_ADDR)
2650
2651
#define ALT_EMAC2_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC2_ADDR)
2652
2653
#define ALT_EMAC2_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC2_ADDR)
2654
2655
#define ALT_EMAC2_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC2_ADDR)
2656
2657
#define ALT_EMAC2_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC2_ADDR)
2658
2659
#define ALT_EMAC2_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC2_ADDR)
2660
2661
#define ALT_EMAC2_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC2_ADDR)
2662
2663
#define ALT_EMAC2_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC2_ADDR)
2664
2665
#define ALT_EMAC2_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC2_ADDR)
2666
2667
#define ALT_EMAC2_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC2_ADDR)
2668
2669
#define ALT_EMAC2_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC2_ADDR)
2670
2671
#define ALT_EMAC2_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC2_ADDR)
2672
2673
#define ALT_EMAC2_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC2_ADDR)
2674
2675
#define ALT_EMAC2_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC2_ADDR)
2676
2677
#define ALT_EMAC2_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC2_ADDR)
2678
2679
#define ALT_EMAC2_OFST 0xff804000
2680
2681
#define ALT_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC2_OFST))
2682
2683
#define ALT_EMAC2_LB_ADDR ALT_EMAC2_ADDR
2684
2685
#define ALT_EMAC2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC2_ADDR) + 0x105c) - 1))
2686
2696
#define ALT_SDMMC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CTL_OFST))
2697
2698
#define ALT_SDMMC_PWREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_PWREN_OFST))
2699
2700
#define ALT_SDMMC_CLKDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKDIV_OFST))
2701
2702
#define ALT_SDMMC_CLKSRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKSRC_OFST))
2703
2704
#define ALT_SDMMC_CLKENA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKENA_OFST))
2705
2706
#define ALT_SDMMC_TMOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TMOUT_OFST))
2707
2708
#define ALT_SDMMC_CTYPE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CTYPE_OFST))
2709
2710
#define ALT_SDMMC_BLKSIZ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BLKSIZ_OFST))
2711
2712
#define ALT_SDMMC_BYTCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BYTCNT_OFST))
2713
2714
#define ALT_SDMMC_INTMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_INTMSK_OFST))
2715
2716
#define ALT_SDMMC_CMDARG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CMDARG_OFST))
2717
2718
#define ALT_SDMMC_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CMD_OFST))
2719
2720
#define ALT_SDMMC_RESP0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP0_OFST))
2721
2722
#define ALT_SDMMC_RESP1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP1_OFST))
2723
2724
#define ALT_SDMMC_RESP2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP2_OFST))
2725
2726
#define ALT_SDMMC_RESP3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP3_OFST))
2727
2728
#define ALT_SDMMC_MINTSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_MINTSTS_OFST))
2729
2730
#define ALT_SDMMC_RINTSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RINTSTS_OFST))
2731
2732
#define ALT_SDMMC_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_STAT_OFST))
2733
2734
#define ALT_SDMMC_FIFOTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_FIFOTH_OFST))
2735
2736
#define ALT_SDMMC_CDETECT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CDETECT_OFST))
2737
2738
#define ALT_SDMMC_WRTPRT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_WRTPRT_OFST))
2739
2740
#define ALT_SDMMC_GPIO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_GPIO_OFST))
2741
2742
#define ALT_SDMMC_TCBCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TCBCNT_OFST))
2743
2744
#define ALT_SDMMC_TBBCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TBBCNT_OFST))
2745
2746
#define ALT_SDMMC_DEBNCE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DEBNCE_OFST))
2747
2748
#define ALT_SDMMC_USRID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_USRID_OFST))
2749
2750
#define ALT_SDMMC_VERID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_VERID_OFST))
2751
2752
#define ALT_SDMMC_HCON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_HCON_OFST))
2753
2754
#define ALT_SDMMC_UHS_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_UHS_REG_OFST))
2755
2756
#define ALT_SDMMC_RST_N_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RST_N_OFST))
2757
2758
#define ALT_SDMMC_BMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BMOD_OFST))
2759
2760
#define ALT_SDMMC_PLDMND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_PLDMND_OFST))
2761
2762
#define ALT_SDMMC_DBADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DBADDR_OFST))
2763
2764
#define ALT_SDMMC_IDSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_IDSTS_OFST))
2765
2766
#define ALT_SDMMC_IDINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_IDINTEN_OFST))
2767
2768
#define ALT_SDMMC_DSCADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DSCADDR_OFST))
2769
2770
#define ALT_SDMMC_BUFADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BUFADDR_OFST))
2771
2772
#define ALT_SDMMC_CARDTHRCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CARDTHRCTL_OFST))
2773
2774
#define ALT_SDMMC_BACK_END_POWER_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BACK_END_POWER_R_OFST))
2775
2776
#define ALT_SDMMC_UHS_REG_EXT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_UHS_REG_EXT_OFST))
2777
2778
#define ALT_SDMMC_EMMC_DDR_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_EMMC_DDR_REG_OFST))
2779
2780
#define ALT_SDMMC_EN_SHIFT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_EN_SHIFT_OFST))
2781
2782
#define ALT_SDMMC_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DATA_OFST))
2783
2784
#define ALT_SDMMC_OFST 0xff808000
2785
2786
#define ALT_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDMMC_OFST))
2787
2788
#define ALT_SDMMC_LB_ADDR ALT_SDMMC_ADDR
2789
2790
#define ALT_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDMMC_ADDR) + 0x400) - 1))
2791
2801
#define ALT_QSPI_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_CFG_OFST))
2802
2803
#define ALT_QSPI_DEVRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVRD_OFST))
2804
2805
#define ALT_QSPI_DEVWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVWR_OFST))
2806
2807
#define ALT_QSPI_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DELAY_OFST))
2808
2809
#define ALT_QSPI_RDDATACAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_RDDATACAP_OFST))
2810
2811
#define ALT_QSPI_DEVSZ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVSZ_OFST))
2812
2813
#define ALT_QSPI_SRAMPART_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_SRAMPART_OFST))
2814
2815
#define ALT_QSPI_INDADDRTRIG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDADDRTRIG_OFST))
2816
2817
#define ALT_QSPI_DMAPER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DMAPER_OFST))
2818
2819
#define ALT_QSPI_REMAPADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_REMAPADDR_OFST))
2820
2821
#define ALT_QSPI_MODBIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_MODBIT_OFST))
2822
2823
#define ALT_QSPI_SRAMFILL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_SRAMFILL_OFST))
2824
2825
#define ALT_QSPI_TXTHRESH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_TXTHRESH_OFST))
2826
2827
#define ALT_QSPI_RXTHRESH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_RXTHRESH_OFST))
2828
2829
#define ALT_QSPI_IRQSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_IRQSTAT_OFST))
2830
2831
#define ALT_QSPI_IRQMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_IRQMSK_OFST))
2832
2833
#define ALT_QSPI_LOWWRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_LOWWRPROT_OFST))
2834
2835
#define ALT_QSPI_UPPWRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_UPPWRPROT_OFST))
2836
2837
#define ALT_QSPI_WRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_WRPROT_OFST))
2838
2839
#define ALT_QSPI_INDRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRD_OFST))
2840
2841
#define ALT_QSPI_INDRDWATER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDWATER_OFST))
2842
2843
#define ALT_QSPI_INDRDSTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDSTADDR_OFST))
2844
2845
#define ALT_QSPI_INDRDCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDCNT_OFST))
2846
2847
#define ALT_QSPI_INDWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWR_OFST))
2848
2849
#define ALT_QSPI_INDWRWATER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRWATER_OFST))
2850
2851
#define ALT_QSPI_INDWRSTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRSTADDR_OFST))
2852
2853
#define ALT_QSPI_INDWRCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRCNT_OFST))
2854
2855
#define ALT_QSPI_FLSHCMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMD_OFST))
2856
2857
#define ALT_QSPI_FLSHCMDADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDADDR_OFST))
2858
2859
#define ALT_QSPI_FLSHCMDRDDATALO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDRDDATALO_OFST))
2860
2861
#define ALT_QSPI_FLSHCMDRDDATAUP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDRDDATAUP_OFST))
2862
2863
#define ALT_QSPI_FLSHCMDWRDATALO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDWRDATALO_OFST))
2864
2865
#define ALT_QSPI_FLSHCMDWRDATAUP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDWRDATAUP_OFST))
2866
2867
#define ALT_QSPI_MODULEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_MODULEID_OFST))
2868
2869
#define ALT_QSPI_OFST 0xff809000
2870
2871
#define ALT_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_QSPI_OFST))
2872
2873
#define ALT_QSPI_LB_ADDR ALT_QSPI_ADDR
2874
2875
#define ALT_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_QSPI_ADDR) + 0x100) - 1))
2876
2886
#define ALT_ECC_EMAC0_RX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_IP_REV_ID_OFST))
2887
2888
#define ALT_ECC_EMAC0_RX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_CTL_OFST))
2889
2890
#define ALT_ECC_EMAC0_RX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INITSTAT_OFST))
2891
2892
#define ALT_ECC_EMAC0_RX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ERRINTEN_OFST))
2893
2894
#define ALT_ECC_EMAC0_RX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ERRINTENS_OFST))
2895
2896
#define ALT_ECC_EMAC0_RX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ERRINTENR_OFST))
2897
2898
#define ALT_ECC_EMAC0_RX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INTMOD_OFST))
2899
2900
#define ALT_ECC_EMAC0_RX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INTSTAT_OFST))
2901
2902
#define ALT_ECC_EMAC0_RX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_INTTEST_OFST))
2903
2904
#define ALT_ECC_EMAC0_RX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_MODSTAT_OFST))
2905
2906
#define ALT_ECC_EMAC0_RX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_DERRADDRA_OFST))
2907
2908
#define ALT_ECC_EMAC0_RX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_SERRADDRA_OFST))
2909
2910
#define ALT_ECC_EMAC0_RX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_SERRCNTREG_OFST))
2911
2912
#define ALT_ECC_EMAC0_RX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_ADDRBUS_OFST))
2913
2914
#define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA0BUS_OFST))
2915
2916
#define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA1BUS_OFST))
2917
2918
#define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA2BUS_OFST))
2919
2920
#define ALT_ECC_EMAC0_RX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATA3BUS_OFST))
2921
2922
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA0BUS_OFST))
2923
2924
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA1BUS_OFST))
2925
2926
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA2BUS_OFST))
2927
2928
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATA3BUS_OFST))
2929
2930
#define ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC0BUS_OFST))
2931
2932
#define ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_RDATAECC1BUS_OFST))
2933
2934
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC0BUS_OFST))
2935
2936
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDATAECC1BUS_OFST))
2937
2938
#define ALT_ECC_EMAC0_RX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_DBYTECTL_OFST))
2939
2940
#define ALT_ECC_EMAC0_RX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_ACCCTL_OFST))
2941
2942
#define ALT_ECC_EMAC0_RX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_STARTACC_OFST))
2943
2944
#define ALT_ECC_EMAC0_RX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_ECC_WDCTL_OFST))
2945
2946
#define ALT_ECC_EMAC0_RX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + ALT_ECC_EMAC0_RX_ECC_SERRLKUPA0_OFST))
2947
2948
#define ALT_ECC_EMAC0_RX_ECC_OFST 0xff8c0800
2949
2950
#define ALT_ECC_EMAC0_RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC0_RX_ECC_OFST))
2951
2952
#define ALT_ECC_EMAC0_RX_ECC_LB_ADDR ALT_ECC_EMAC0_RX_ECC_ADDR
2953
2954
#define ALT_ECC_EMAC0_RX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC0_RX_ECC_ADDR) + 0x400) - 1))
2955
2965
#define ALT_ECC_EMAC0_TX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_IP_REV_ID_OFST))
2966
2967
#define ALT_ECC_EMAC0_TX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_CTL_OFST))
2968
2969
#define ALT_ECC_EMAC0_TX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INITSTAT_OFST))
2970
2971
#define ALT_ECC_EMAC0_TX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ERRINTEN_OFST))
2972
2973
#define ALT_ECC_EMAC0_TX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ERRINTENS_OFST))
2974
2975
#define ALT_ECC_EMAC0_TX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ERRINTENR_OFST))
2976
2977
#define ALT_ECC_EMAC0_TX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INTMOD_OFST))
2978
2979
#define ALT_ECC_EMAC0_TX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INTTEST_OFST))
2980
2981
#define ALT_ECC_EMAC0_TX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_MODSTAT_OFST))
2982
2983
#define ALT_ECC_EMAC0_TX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_DERRADDRA_OFST))
2984
2985
#define ALT_ECC_EMAC0_TX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_SERRADDRA_OFST))
2986
2987
#define ALT_ECC_EMAC0_TX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_INTSTAT_OFST))
2988
2989
#define ALT_ECC_EMAC0_TX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_SERRCNTREG_OFST))
2990
2991
#define ALT_ECC_EMAC0_TX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_ADDRBUS_OFST))
2992
2993
#define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA0BUS_OFST))
2994
2995
#define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA1BUS_OFST))
2996
2997
#define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA2BUS_OFST))
2998
2999
#define ALT_ECC_EMAC0_TX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATA3BUS_OFST))
3000
3001
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA0BUS_OFST))
3002
3003
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA1BUS_OFST))
3004
3005
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA2BUS_OFST))
3006
3007
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATA3BUS_OFST))
3008
3009
#define ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC0BUS_OFST))
3010
3011
#define ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_RDATAECC1BUS_OFST))
3012
3013
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC0BUS_OFST))
3014
3015
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDATAECC1BUS_OFST))
3016
3017
#define ALT_ECC_EMAC0_TX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_DBYTECTL_OFST))
3018
3019
#define ALT_ECC_EMAC0_TX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_ACCCTL_OFST))
3020
3021
#define ALT_ECC_EMAC0_TX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_STARTACC_OFST))
3022
3023
#define ALT_ECC_EMAC0_TX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_ECC_WDCTL_OFST))
3024
3025
#define ALT_ECC_EMAC0_TX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + ALT_ECC_EMAC0_TX_ECC_SERRLKUPA0_OFST))
3026
3027
#define ALT_ECC_EMAC0_TX_ECC_OFST 0xff8c0c00
3028
3029
#define ALT_ECC_EMAC0_TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC0_TX_ECC_OFST))
3030
3031
#define ALT_ECC_EMAC0_TX_ECC_LB_ADDR ALT_ECC_EMAC0_TX_ECC_ADDR
3032
3033
#define ALT_ECC_EMAC0_TX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC0_TX_ECC_ADDR) + 0x400) - 1))
3034
3044
#define ALT_ECC_EMAC1_RX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_IP_REV_ID_OFST))
3045
3046
#define ALT_ECC_EMAC1_RX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_CTL_OFST))
3047
3048
#define ALT_ECC_EMAC1_RX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INITSTAT_OFST))
3049
3050
#define ALT_ECC_EMAC1_RX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ERRINTEN_OFST))
3051
3052
#define ALT_ECC_EMAC1_RX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ERRINTENS_OFST))
3053
3054
#define ALT_ECC_EMAC1_RX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ERRINTENR_OFST))
3055
3056
#define ALT_ECC_EMAC1_RX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INTMOD_OFST))
3057
3058
#define ALT_ECC_EMAC1_RX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INTSTAT_OFST))
3059
3060
#define ALT_ECC_EMAC1_RX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_INTTEST_OFST))
3061
3062
#define ALT_ECC_EMAC1_RX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_MODSTAT_OFST))
3063
3064
#define ALT_ECC_EMAC1_RX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_DERRADDRA_OFST))
3065
3066
#define ALT_ECC_EMAC1_RX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_SERRADDRA_OFST))
3067
3068
#define ALT_ECC_EMAC1_RX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_SERRCNTREG_OFST))
3069
3070
#define ALT_ECC_EMAC1_RX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_ADDRBUS_OFST))
3071
3072
#define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA0BUS_OFST))
3073
3074
#define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA1BUS_OFST))
3075
3076
#define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA2BUS_OFST))
3077
3078
#define ALT_ECC_EMAC1_RX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATA3BUS_OFST))
3079
3080
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA0BUS_OFST))
3081
3082
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA1BUS_OFST))
3083
3084
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA2BUS_OFST))
3085
3086
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATA3BUS_OFST))
3087
3088
#define ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC0BUS_OFST))
3089
3090
#define ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_RDATAECC1BUS_OFST))
3091
3092
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC0BUS_OFST))
3093
3094
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDATAECC1BUS_OFST))
3095
3096
#define ALT_ECC_EMAC1_RX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_DBYTECTL_OFST))
3097
3098
#define ALT_ECC_EMAC1_RX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_ACCCTL_OFST))
3099
3100
#define ALT_ECC_EMAC1_RX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_STARTACC_OFST))
3101
3102
#define ALT_ECC_EMAC1_RX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_ECC_WDCTL_OFST))
3103
3104
#define ALT_ECC_EMAC1_RX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + ALT_ECC_EMAC1_RX_ECC_SERRLKUPA0_OFST))
3105
3106
#define ALT_ECC_EMAC1_RX_ECC_OFST 0xff8c1000
3107
3108
#define ALT_ECC_EMAC1_RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC1_RX_ECC_OFST))
3109
3110
#define ALT_ECC_EMAC1_RX_ECC_LB_ADDR ALT_ECC_EMAC1_RX_ECC_ADDR
3111
3112
#define ALT_ECC_EMAC1_RX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC1_RX_ECC_ADDR) + 0x400) - 1))
3113
3123
#define ALT_ECC_EMAC1_TX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_IP_REV_ID_OFST))
3124
3125
#define ALT_ECC_EMAC1_TX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_CTL_OFST))
3126
3127
#define ALT_ECC_EMAC1_TX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INITSTAT_OFST))
3128
3129
#define ALT_ECC_EMAC1_TX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ERRINTEN_OFST))
3130
3131
#define ALT_ECC_EMAC1_TX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ERRINTENS_OFST))
3132
3133
#define ALT_ECC_EMAC1_TX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ERRINTENR_OFST))
3134
3135
#define ALT_ECC_EMAC1_TX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INTMOD_OFST))
3136
3137
#define ALT_ECC_EMAC1_TX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INTTEST_OFST))
3138
3139
#define ALT_ECC_EMAC1_TX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_MODSTAT_OFST))
3140
3141
#define ALT_ECC_EMAC1_TX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_DERRADDRA_OFST))
3142
3143
#define ALT_ECC_EMAC1_TX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_SERRADDRA_OFST))
3144
3145
#define ALT_ECC_EMAC1_TX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_INTSTAT_OFST))
3146
3147
#define ALT_ECC_EMAC1_TX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_SERRCNTREG_OFST))
3148
3149
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_OFST))
3150
3151
#define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA0BUS_OFST))
3152
3153
#define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA1BUS_OFST))
3154
3155
#define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA2BUS_OFST))
3156
3157
#define ALT_ECC_EMAC1_TX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATA3BUS_OFST))
3158
3159
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA0BUS_OFST))
3160
3161
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA1BUS_OFST))
3162
3163
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA2BUS_OFST))
3164
3165
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATA3BUS_OFST))
3166
3167
#define ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC0BUS_OFST))
3168
3169
#define ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_RDATAECC1BUS_OFST))
3170
3171
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC0BUS_OFST))
3172
3173
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDATAECC1BUS_OFST))
3174
3175
#define ALT_ECC_EMAC1_TX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_DBYTECTL_OFST))
3176
3177
#define ALT_ECC_EMAC1_TX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_ACCCTL_OFST))
3178
3179
#define ALT_ECC_EMAC1_TX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_STARTACC_OFST))
3180
3181
#define ALT_ECC_EMAC1_TX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_ECC_WDCTL_OFST))
3182
3183
#define ALT_ECC_EMAC1_TX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + ALT_ECC_EMAC1_TX_ECC_SERRLKUPA0_OFST))
3184
3185
#define ALT_ECC_EMAC1_TX_ECC_OFST 0xff8c1400
3186
3187
#define ALT_ECC_EMAC1_TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC1_TX_ECC_OFST))
3188
3189
#define ALT_ECC_EMAC1_TX_ECC_LB_ADDR ALT_ECC_EMAC1_TX_ECC_ADDR
3190
3191
#define ALT_ECC_EMAC1_TX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC1_TX_ECC_ADDR) + 0x400) - 1))
3192
3202
#define ALT_ECC_EMAC2_RX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_IP_REV_ID_OFST))
3203
3204
#define ALT_ECC_EMAC2_RX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_CTL_OFST))
3205
3206
#define ALT_ECC_EMAC2_RX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INITSTAT_OFST))
3207
3208
#define ALT_ECC_EMAC2_RX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ERRINTEN_OFST))
3209
3210
#define ALT_ECC_EMAC2_RX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ERRINTENS_OFST))
3211
3212
#define ALT_ECC_EMAC2_RX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ERRINTENR_OFST))
3213
3214
#define ALT_ECC_EMAC2_RX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INTMOD_OFST))
3215
3216
#define ALT_ECC_EMAC2_RX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INTSTAT_OFST))
3217
3218
#define ALT_ECC_EMAC2_RX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_INTTEST_OFST))
3219
3220
#define ALT_ECC_EMAC2_RX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_MODSTAT_OFST))
3221
3222
#define ALT_ECC_EMAC2_RX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_DERRADDRA_OFST))
3223
3224
#define ALT_ECC_EMAC2_RX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_SERRADDRA_OFST))
3225
3226
#define ALT_ECC_EMAC2_RX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_SERRCNTREG_OFST))
3227
3228
#define ALT_ECC_EMAC2_RX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_ADDRBUS_OFST))
3229
3230
#define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA0BUS_OFST))
3231
3232
#define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA1BUS_OFST))
3233
3234
#define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA2BUS_OFST))
3235
3236
#define ALT_ECC_EMAC2_RX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATA3BUS_OFST))
3237
3238
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA0BUS_OFST))
3239
3240
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA1BUS_OFST))
3241
3242
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA2BUS_OFST))
3243
3244
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATA3BUS_OFST))
3245
3246
#define ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC0BUS_OFST))
3247
3248
#define ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_RDATAECC1BUS_OFST))
3249
3250
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC0BUS_OFST))
3251
3252
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDATAECC1BUS_OFST))
3253
3254
#define ALT_ECC_EMAC2_RX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_DBYTECTL_OFST))
3255
3256
#define ALT_ECC_EMAC2_RX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_ACCCTL_OFST))
3257
3258
#define ALT_ECC_EMAC2_RX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_STARTACC_OFST))
3259
3260
#define ALT_ECC_EMAC2_RX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_ECC_WDCTL_OFST))
3261
3262
#define ALT_ECC_EMAC2_RX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + ALT_ECC_EMAC2_RX_ECC_SERRLKUPA0_OFST))
3263
3264
#define ALT_ECC_EMAC2_RX_ECC_OFST 0xff8c1800
3265
3266
#define ALT_ECC_EMAC2_RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC2_RX_ECC_OFST))
3267
3268
#define ALT_ECC_EMAC2_RX_ECC_LB_ADDR ALT_ECC_EMAC2_RX_ECC_ADDR
3269
3270
#define ALT_ECC_EMAC2_RX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC2_RX_ECC_ADDR) + 0x400) - 1))
3271
3281
#define ALT_ECC_EMAC2_TX_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_IP_REV_ID_OFST))
3282
3283
#define ALT_ECC_EMAC2_TX_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_CTL_OFST))
3284
3285
#define ALT_ECC_EMAC2_TX_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INITSTAT_OFST))
3286
3287
#define ALT_ECC_EMAC2_TX_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ERRINTEN_OFST))
3288
3289
#define ALT_ECC_EMAC2_TX_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ERRINTENS_OFST))
3290
3291
#define ALT_ECC_EMAC2_TX_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ERRINTENR_OFST))
3292
3293
#define ALT_ECC_EMAC2_TX_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INTMOD_OFST))
3294
3295
#define ALT_ECC_EMAC2_TX_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INTTEST_OFST))
3296
3297
#define ALT_ECC_EMAC2_TX_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_MODSTAT_OFST))
3298
3299
#define ALT_ECC_EMAC2_TX_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_DERRADDRA_OFST))
3300
3301
#define ALT_ECC_EMAC2_TX_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_SERRADDRA_OFST))
3302
3303
#define ALT_ECC_EMAC2_TX_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_INTSTAT_OFST))
3304
3305
#define ALT_ECC_EMAC2_TX_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_SERRCNTREG_OFST))
3306
3307
#define ALT_ECC_EMAC2_TX_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_ADDRBUS_OFST))
3308
3309
#define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA0BUS_OFST))
3310
3311
#define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA1BUS_OFST))
3312
3313
#define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA2BUS_OFST))
3314
3315
#define ALT_ECC_EMAC2_TX_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATA3BUS_OFST))
3316
3317
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA0BUS_OFST))
3318
3319
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA1BUS_OFST))
3320
3321
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA2BUS_OFST))
3322
3323
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATA3BUS_OFST))
3324
3325
#define ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC0BUS_OFST))
3326
3327
#define ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_RDATAECC1BUS_OFST))
3328
3329
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC0BUS_OFST))
3330
3331
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDATAECC1BUS_OFST))
3332
3333
#define ALT_ECC_EMAC2_TX_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_DBYTECTL_OFST))
3334
3335
#define ALT_ECC_EMAC2_TX_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_ACCCTL_OFST))
3336
3337
#define ALT_ECC_EMAC2_TX_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_STARTACC_OFST))
3338
3339
#define ALT_ECC_EMAC2_TX_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_ECC_WDCTL_OFST))
3340
3341
#define ALT_ECC_EMAC2_TX_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + ALT_ECC_EMAC2_TX_ECC_SERRLKUPA0_OFST))
3342
3343
#define ALT_ECC_EMAC2_TX_ECC_OFST 0xff8c1c00
3344
3345
#define ALT_ECC_EMAC2_TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_EMAC2_TX_ECC_OFST))
3346
3347
#define ALT_ECC_EMAC2_TX_ECC_LB_ADDR ALT_ECC_EMAC2_TX_ECC_ADDR
3348
3349
#define ALT_ECC_EMAC2_TX_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_EMAC2_TX_ECC_ADDR) + 0x400) - 1))
3350
3360
#define ALT_ECC_NAND_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_IP_REV_ID_OFST))
3361
3362
#define ALT_ECC_NAND_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_CTL_OFST))
3363
3364
#define ALT_ECC_NAND_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INITSTAT_OFST))
3365
3366
#define ALT_ECC_NAND_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ERRINTEN_OFST))
3367
3368
#define ALT_ECC_NAND_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ERRINTENS_OFST))
3369
3370
#define ALT_ECC_NAND_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ERRINTENR_OFST))
3371
3372
#define ALT_ECC_NAND_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INTMOD_OFST))
3373
3374
#define ALT_ECC_NAND_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INTSTAT_OFST))
3375
3376
#define ALT_ECC_NAND_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_INTTEST_OFST))
3377
3378
#define ALT_ECC_NAND_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_MODSTAT_OFST))
3379
3380
#define ALT_ECC_NAND_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_DERRADDRA_OFST))
3381
3382
#define ALT_ECC_NAND_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_SERRADDRA_OFST))
3383
3384
#define ALT_ECC_NAND_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_SERRCNTREG_OFST))
3385
3386
#define ALT_ECC_NAND_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_ADDRBUS_OFST))
3387
3388
#define ALT_ECC_NAND_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA0BUS_OFST))
3389
3390
#define ALT_ECC_NAND_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA1BUS_OFST))
3391
3392
#define ALT_ECC_NAND_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA2BUS_OFST))
3393
3394
#define ALT_ECC_NAND_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATA3BUS_OFST))
3395
3396
#define ALT_ECC_NAND_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA0BUS_OFST))
3397
3398
#define ALT_ECC_NAND_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA1BUS_OFST))
3399
3400
#define ALT_ECC_NAND_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA2BUS_OFST))
3401
3402
#define ALT_ECC_NAND_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATA3BUS_OFST))
3403
3404
#define ALT_ECC_NAND_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATAECC0BUS_OFST))
3405
3406
#define ALT_ECC_NAND_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_RDATAECC1BUS_OFST))
3407
3408
#define ALT_ECC_NAND_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATAECC0BUS_OFST))
3409
3410
#define ALT_ECC_NAND_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDATAECC1BUS_OFST))
3411
3412
#define ALT_ECC_NAND_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_DBYTECTL_OFST))
3413
3414
#define ALT_ECC_NAND_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_ACCCTL_OFST))
3415
3416
#define ALT_ECC_NAND_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_STARTACC_OFST))
3417
3418
#define ALT_ECC_NAND_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_ECC_WDCTL_OFST))
3419
3420
#define ALT_ECC_NAND_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NAND_ADDR) + ALT_ECC_NAND_SERRLKUPA0_OFST))
3421
3422
#define ALT_ECC_NAND_OFST 0xff8c2000
3423
3424
#define ALT_ECC_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_NAND_OFST))
3425
3426
#define ALT_ECC_NAND_LB_ADDR ALT_ECC_NAND_ADDR
3427
3428
#define ALT_ECC_NAND_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_NAND_ADDR) + 0x400) - 1))
3429
3439
#define ALT_ECC_NANDR_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_IP_REV_ID_OFST))
3440
3441
#define ALT_ECC_NANDR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_CTL_OFST))
3442
3443
#define ALT_ECC_NANDR_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INITSTAT_OFST))
3444
3445
#define ALT_ECC_NANDR_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_ERRINTEN_OFST))
3446
3447
#define ALT_ECC_NANDR_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_ERRINTENS_OFST))
3448
3449
#define ALT_ECC_NANDR_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_ERRINTENR_OFST))
3450
3451
#define ALT_ECC_NANDR_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INTMOD_OFST))
3452
3453
#define ALT_ECC_NANDR_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INTSTAT_OFST))
3454
3455
#define ALT_ECC_NANDR_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_INTTEST_OFST))
3456
3457
#define ALT_ECC_NANDR_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_MODSTAT_OFST))
3458
3459
#define ALT_ECC_NANDR_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_DERRADDRA_OFST))
3460
3461
#define ALT_ECC_NANDR_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_SERRADDRA_OFST))
3462
3463
#define ALT_ECC_NANDR_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_SERRCNTREG_OFST))
3464
3465
#define ALT_ECC_NANDR_ECC_ADDRBUS_ADDR ALT_ECC_NANDR_ADDRBUS_ADDR(ALT_ECC_NANDR_ADDR)
3466
3467
#define ALT_ECC_NANDR_ECC_RDATA0BUS_ADDR ALT_ECC_NANDR_RDATA0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3468
3469
#define ALT_ECC_NANDR_ECC_RDATA1BUS_ADDR ALT_ECC_NANDR_RDATA1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3470
3471
#define ALT_ECC_NANDR_ECC_RDATA2BUS_ADDR ALT_ECC_NANDR_RDATA2BUS_ADDR(ALT_ECC_NANDR_ADDR)
3472
3473
#define ALT_ECC_NANDR_ECC_RDATA3BUS_ADDR ALT_ECC_NANDR_RDATA3BUS_ADDR(ALT_ECC_NANDR_ADDR)
3474
3475
#define ALT_ECC_NANDR_ECC_WDATA0BUS_ADDR ALT_ECC_NANDR_WDATA0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3476
3477
#define ALT_ECC_NANDR_ECC_WDATA1BUS_ADDR ALT_ECC_NANDR_WDATA1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3478
3479
#define ALT_ECC_NANDR_ECC_WDATA2BUS_ADDR ALT_ECC_NANDR_WDATA2BUS_ADDR(ALT_ECC_NANDR_ADDR)
3480
3481
#define ALT_ECC_NANDR_ECC_WDATA3BUS_ADDR ALT_ECC_NANDR_WDATA3BUS_ADDR(ALT_ECC_NANDR_ADDR)
3482
3483
#define ALT_ECC_NANDR_ECC_RDATAECC0BUS_ADDR ALT_ECC_NANDR_RDATAECC0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3484
3485
#define ALT_ECC_NANDR_ECC_RDATAECC1BUS_ADDR ALT_ECC_NANDR_RDATAECC1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3486
3487
#define ALT_ECC_NANDR_ECC_WDATAECC0BUS_ADDR ALT_ECC_NANDR_WDATAECC0BUS_ADDR(ALT_ECC_NANDR_ADDR)
3488
3489
#define ALT_ECC_NANDR_ECC_WDATAECC1BUS_ADDR ALT_ECC_NANDR_WDATAECC1BUS_ADDR(ALT_ECC_NANDR_ADDR)
3490
3491
#define ALT_ECC_NANDR_ECC_DBYTECTL_ADDR ALT_ECC_NANDR_DBYTECTL_ADDR(ALT_ECC_NANDR_ADDR)
3492
3493
#define ALT_ECC_NANDR_ECC_ACCCTL_ADDR ALT_ECC_NANDR_ACCCTL_ADDR(ALT_ECC_NANDR_ADDR)
3494
3495
#define ALT_ECC_NANDR_ECC_STARTACC_ADDR ALT_ECC_NANDR_STARTACC_ADDR(ALT_ECC_NANDR_ADDR)
3496
3497
#define ALT_ECC_NANDR_ECC_WDCTL_ADDR ALT_ECC_NANDR_WDCTL_ADDR(ALT_ECC_NANDR_ADDR)
3498
3499
#define ALT_ECC_NANDR_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + ALT_ECC_NANDR_SERRLKUPA0_OFST))
3500
3501
#define ALT_ECC_NANDR_OFST 0xff8c2400
3502
3503
#define ALT_ECC_NANDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_NANDR_OFST))
3504
3505
#define ALT_ECC_NANDR_LB_ADDR ALT_ECC_NANDR_ADDR
3506
3507
#define ALT_ECC_NANDR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_NANDR_ADDR) + 0x400) - 1))
3508
3518
#define ALT_ECC_NANDW_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_IP_REV_ID_OFST))
3519
3520
#define ALT_ECC_NANDW_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_CTL_OFST))
3521
3522
#define ALT_ECC_NANDW_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INITSTAT_OFST))
3523
3524
#define ALT_ECC_NANDW_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_ERRINTEN_OFST))
3525
3526
#define ALT_ECC_NANDW_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_ERRINTENS_OFST))
3527
3528
#define ALT_ECC_NANDW_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_ERRINTENR_OFST))
3529
3530
#define ALT_ECC_NANDW_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INTMOD_OFST))
3531
3532
#define ALT_ECC_NANDW_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INTSTAT_OFST))
3533
3534
#define ALT_ECC_NANDW_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_INTTEST_OFST))
3535
3536
#define ALT_ECC_NANDW_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_MODSTAT_OFST))
3537
3538
#define ALT_ECC_NANDW_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_DERRADDRA_OFST))
3539
3540
#define ALT_ECC_NANDW_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_SERRADDRA_OFST))
3541
3542
#define ALT_ECC_NANDW_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_SERRCNTREG_OFST))
3543
3544
#define ALT_ECC_NANDW_ECC_ADDRBUS_ADDR ALT_ECC_NANDW_ADDRBUS_ADDR(ALT_ECC_NANDW_ADDR)
3545
3546
#define ALT_ECC_NANDW_ECC_RDATA0BUS_ADDR ALT_ECC_NANDW_RDATA0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3547
3548
#define ALT_ECC_NANDW_ECC_RDATA1BUS_ADDR ALT_ECC_NANDW_RDATA1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3549
3550
#define ALT_ECC_NANDW_ECC_RDATA2BUS_ADDR ALT_ECC_NANDW_RDATA2BUS_ADDR(ALT_ECC_NANDW_ADDR)
3551
3552
#define ALT_ECC_NANDW_ECC_RDATA3BUS_ADDR ALT_ECC_NANDW_RDATA3BUS_ADDR(ALT_ECC_NANDW_ADDR)
3553
3554
#define ALT_ECC_NANDW_ECC_WDATA0BUS_ADDR ALT_ECC_NANDW_WDATA0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3555
3556
#define ALT_ECC_NANDW_ECC_WDATA1BUS_ADDR ALT_ECC_NANDW_WDATA1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3557
3558
#define ALT_ECC_NANDW_ECC_WDATA2BUS_ADDR ALT_ECC_NANDW_WDATA2BUS_ADDR(ALT_ECC_NANDW_ADDR)
3559
3560
#define ALT_ECC_NANDW_ECC_WDATA3BUS_ADDR ALT_ECC_NANDW_WDATA3BUS_ADDR(ALT_ECC_NANDW_ADDR)
3561
3562
#define ALT_ECC_NANDW_ECC_RDATAECC0BUS_ADDR ALT_ECC_NANDW_RDATAECC0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3563
3564
#define ALT_ECC_NANDW_ECC_RDATAECC1BUS_ADDR ALT_ECC_NANDW_RDATAECC1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3565
3566
#define ALT_ECC_NANDW_ECC_WDATAECC0BUS_ADDR ALT_ECC_NANDW_WDATAECC0BUS_ADDR(ALT_ECC_NANDW_ADDR)
3567
3568
#define ALT_ECC_NANDW_ECC_WDATAECC1BUS_ADDR ALT_ECC_NANDW_WDATAECC1BUS_ADDR(ALT_ECC_NANDW_ADDR)
3569
3570
#define ALT_ECC_NANDW_ECC_DBYTECTL_ADDR ALT_ECC_NANDW_DBYTECTL_ADDR(ALT_ECC_NANDW_ADDR)
3571
3572
#define ALT_ECC_NANDW_ECC_ACCCTL_ADDR ALT_ECC_NANDW_ACCCTL_ADDR(ALT_ECC_NANDW_ADDR)
3573
3574
#define ALT_ECC_NANDW_ECC_STARTACC_ADDR ALT_ECC_NANDW_STARTACC_ADDR(ALT_ECC_NANDW_ADDR)
3575
3576
#define ALT_ECC_NANDW_ECC_WDCTL_ADDR ALT_ECC_NANDW_WDCTL_ADDR(ALT_ECC_NANDW_ADDR)
3577
3578
#define ALT_ECC_NANDW_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + ALT_ECC_NANDW_SERRLKUPA0_OFST))
3579
3580
#define ALT_ECC_NANDW_OFST 0xff8c2800
3581
3582
#define ALT_ECC_NANDW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_NANDW_OFST))
3583
3584
#define ALT_ECC_NANDW_LB_ADDR ALT_ECC_NANDW_ADDR
3585
3586
#define ALT_ECC_NANDW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_NANDW_ADDR) + 0x400) - 1))
3587
3597
#define ALT_ECC_SDMMC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_IP_REV_ID_OFST))
3598
3599
#define ALT_ECC_SDMMC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_CTL_OFST))
3600
3601
#define ALT_ECC_SDMMC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INITSTAT_OFST))
3602
3603
#define ALT_ECC_SDMMC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_ERRINTEN_OFST))
3604
3605
#define ALT_ECC_SDMMC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_ERRINTENS_OFST))
3606
3607
#define ALT_ECC_SDMMC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_ERRINTENR_OFST))
3608
3609
#define ALT_ECC_SDMMC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INTMOD_OFST))
3610
3611
#define ALT_ECC_SDMMC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INTSTAT_OFST))
3612
3613
#define ALT_ECC_SDMMC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_INTTEST_OFST))
3614
3615
#define ALT_ECC_SDMMC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_MODSTAT_OFST))
3616
3617
#define ALT_ECC_SDMMC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_DERRADDRA_OFST))
3618
3619
#define ALT_ECC_SDMMC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRADDRA_OFST))
3620
3621
#define ALT_ECC_SDMMC_DERRADDRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_DERRADDRB_OFST))
3622
3623
#define ALT_ECC_SDMMC_SERRADDRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRADDRB_OFST))
3624
3625
#define ALT_ECC_SDMMC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRCNTREG_OFST))
3626
3627
#define ALT_ECC_SDMMC_ECC_ADDRBUS_ADDR ALT_ECC_SDMMC_ADDRBUS_ADDR(ALT_ECC_SDMMC_ADDR)
3628
3629
#define ALT_ECC_SDMMC_ECC_RDATA0BUS_ADDR ALT_ECC_SDMMC_RDATA0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3630
3631
#define ALT_ECC_SDMMC_ECC_RDATA1BUS_ADDR ALT_ECC_SDMMC_RDATA1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3632
3633
#define ALT_ECC_SDMMC_ECC_RDATA2BUS_ADDR ALT_ECC_SDMMC_RDATA2BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3634
3635
#define ALT_ECC_SDMMC_ECC_RDATA3BUS_ADDR ALT_ECC_SDMMC_RDATA3BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3636
3637
#define ALT_ECC_SDMMC_ECC_WDATA0BUS_ADDR ALT_ECC_SDMMC_WDATA0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3638
3639
#define ALT_ECC_SDMMC_ECC_WDATA1BUS_ADDR ALT_ECC_SDMMC_WDATA1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3640
3641
#define ALT_ECC_SDMMC_ECC_WDATA2BUS_ADDR ALT_ECC_SDMMC_WDATA2BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3642
3643
#define ALT_ECC_SDMMC_ECC_WDATA3BUS_ADDR ALT_ECC_SDMMC_WDATA3BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3644
3645
#define ALT_ECC_SDMMC_ECC_RDATAECC0BUS_ADDR ALT_ECC_SDMMC_RDATAECC0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3646
3647
#define ALT_ECC_SDMMC_ECC_RDATAECC1BUS_ADDR ALT_ECC_SDMMC_RDATAECC1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3648
3649
#define ALT_ECC_SDMMC_ECC_WDATAECC0BUS_ADDR ALT_ECC_SDMMC_WDATAECC0BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3650
3651
#define ALT_ECC_SDMMC_ECC_WDATAECC1BUS_ADDR ALT_ECC_SDMMC_WDATAECC1BUS_ADDR(ALT_ECC_SDMMC_ADDR)
3652
3653
#define ALT_ECC_SDMMC_ECC_DBYTECTL_ADDR ALT_ECC_SDMMC_DBYTECTL_ADDR(ALT_ECC_SDMMC_ADDR)
3654
3655
#define ALT_ECC_SDMMC_ECC_ACCCTL_ADDR ALT_ECC_SDMMC_ACCCTL_ADDR(ALT_ECC_SDMMC_ADDR)
3656
3657
#define ALT_ECC_SDMMC_ECC_STARTACC_ADDR ALT_ECC_SDMMC_STARTACC_ADDR(ALT_ECC_SDMMC_ADDR)
3658
3659
#define ALT_ECC_SDMMC_ECC_WDCTL_ADDR ALT_ECC_SDMMC_WDCTL_ADDR(ALT_ECC_SDMMC_ADDR)
3660
3661
#define ALT_ECC_SDMMC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRLKUPA0_OFST))
3662
3663
#define ALT_ECC_SDMMC_SERRLKUPB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + ALT_ECC_SDMMC_SERRLKUPB0_OFST))
3664
3665
#define ALT_ECC_SDMMC_OFST 0xff8c2c00
3666
3667
#define ALT_ECC_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_SDMMC_OFST))
3668
3669
#define ALT_ECC_SDMMC_LB_ADDR ALT_ECC_SDMMC_ADDR
3670
3671
#define ALT_ECC_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_SDMMC_ADDR) + 0x400) - 1))
3672
3682
#define ALT_ECC_OCRAM_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_IP_REV_ID_OFST))
3683
3684
#define ALT_ECC_OCRAM_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_CTL_OFST))
3685
3686
#define ALT_ECC_OCRAM_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INITSTAT_OFST))
3687
3688
#define ALT_ECC_OCRAM_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ERRINTEN_OFST))
3689
3690
#define ALT_ECC_OCRAM_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ERRINTENS_OFST))
3691
3692
#define ALT_ECC_OCRAM_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ERRINTENR_OFST))
3693
3694
#define ALT_ECC_OCRAM_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INTMOD_OFST))
3695
3696
#define ALT_ECC_OCRAM_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INTSTAT_OFST))
3697
3698
#define ALT_ECC_OCRAM_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_INTTEST_OFST))
3699
3700
#define ALT_ECC_OCRAM_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_MODSTAT_OFST))
3701
3702
#define ALT_ECC_OCRAM_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_DERRADDRA_OFST))
3703
3704
#define ALT_ECC_OCRAM_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_SERRADDRA_OFST))
3705
3706
#define ALT_ECC_OCRAM_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_SERRCNTREG_OFST))
3707
3708
#define ALT_ECC_OCRAM_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_ADDRBUS_OFST))
3709
3710
#define ALT_ECC_OCRAM_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA0BUS_OFST))
3711
3712
#define ALT_ECC_OCRAM_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA1BUS_OFST))
3713
3714
#define ALT_ECC_OCRAM_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA2BUS_OFST))
3715
3716
#define ALT_ECC_OCRAM_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATA3BUS_OFST))
3717
3718
#define ALT_ECC_OCRAM_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA0BUS_OFST))
3719
3720
#define ALT_ECC_OCRAM_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA1BUS_OFST))
3721
3722
#define ALT_ECC_OCRAM_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA2BUS_OFST))
3723
3724
#define ALT_ECC_OCRAM_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATA3BUS_OFST))
3725
3726
#define ALT_ECC_OCRAM_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATAECC0BUS_OFST))
3727
3728
#define ALT_ECC_OCRAM_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_RDATAECC1BUS_OFST))
3729
3730
#define ALT_ECC_OCRAM_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATAECC0BUS_OFST))
3731
3732
#define ALT_ECC_OCRAM_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDATAECC1BUS_OFST))
3733
3734
#define ALT_ECC_OCRAM_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_DBYTECTL_OFST))
3735
3736
#define ALT_ECC_OCRAM_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_ACCCTL_OFST))
3737
3738
#define ALT_ECC_OCRAM_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_STARTACC_OFST))
3739
3740
#define ALT_ECC_OCRAM_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_ECC_WDCTL_OFST))
3741
3742
#define ALT_ECC_OCRAM_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + ALT_ECC_OCRAM_ECC_SERRLKUPA0_OFST))
3743
3744
#define ALT_ECC_OCRAM_ECC_OFST 0xff8c3000
3745
3746
#define ALT_ECC_OCRAM_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_OCRAM_ECC_OFST))
3747
3748
#define ALT_ECC_OCRAM_ECC_LB_ADDR ALT_ECC_OCRAM_ECC_ADDR
3749
3750
#define ALT_ECC_OCRAM_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_OCRAM_ECC_ADDR) + 0x400) - 1))
3751
3761
#define ALT_ECC_DMAC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_IP_REV_ID_OFST))
3762
3763
#define ALT_ECC_DMAC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_CTL_OFST))
3764
3765
#define ALT_ECC_DMAC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INITSTAT_OFST))
3766
3767
#define ALT_ECC_DMAC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_ERRINTEN_OFST))
3768
3769
#define ALT_ECC_DMAC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_ERRINTENS_OFST))
3770
3771
#define ALT_ECC_DMAC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_ERRINTENR_OFST))
3772
3773
#define ALT_ECC_DMAC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INTMOD_OFST))
3774
3775
#define ALT_ECC_DMAC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INTSTAT_OFST))
3776
3777
#define ALT_ECC_DMAC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_INTTEST_OFST))
3778
3779
#define ALT_ECC_DMAC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_MODSTAT_OFST))
3780
3781
#define ALT_ECC_DMAC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_DERRADDRA_OFST))
3782
3783
#define ALT_ECC_DMAC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_SERRADDRA_OFST))
3784
3785
#define ALT_ECC_DMAC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_SERRCNTREG_OFST))
3786
3787
#define ALT_ECC_DMAC_ECC_ADDRBUS_ADDR ALT_ECC_DMAC_ADDRBUS_ADDR(ALT_ECC_DMAC_ADDR)
3788
3789
#define ALT_ECC_DMAC_ECC_RDATA0BUS_ADDR ALT_ECC_DMAC_RDATA0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3790
3791
#define ALT_ECC_DMAC_ECC_RDATA1BUS_ADDR ALT_ECC_DMAC_RDATA1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3792
3793
#define ALT_ECC_DMAC_ECC_RDATA2BUS_ADDR ALT_ECC_DMAC_RDATA2BUS_ADDR(ALT_ECC_DMAC_ADDR)
3794
3795
#define ALT_ECC_DMAC_ECC_RDATA3BUS_ADDR ALT_ECC_DMAC_RDATA3BUS_ADDR(ALT_ECC_DMAC_ADDR)
3796
3797
#define ALT_ECC_DMAC_ECC_WDATA0BUS_ADDR ALT_ECC_DMAC_WDATA0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3798
3799
#define ALT_ECC_DMAC_ECC_WDATA1BUS_ADDR ALT_ECC_DMAC_WDATA1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3800
3801
#define ALT_ECC_DMAC_ECC_WDATA2BUS_ADDR ALT_ECC_DMAC_WDATA2BUS_ADDR(ALT_ECC_DMAC_ADDR)
3802
3803
#define ALT_ECC_DMAC_ECC_WDATA3BUS_ADDR ALT_ECC_DMAC_WDATA3BUS_ADDR(ALT_ECC_DMAC_ADDR)
3804
3805
#define ALT_ECC_DMAC_ECC_RDATAECC0BUS_ADDR ALT_ECC_DMAC_RDATAECC0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3806
3807
#define ALT_ECC_DMAC_ECC_RDATAECC1BUS_ADDR ALT_ECC_DMAC_RDATAECC1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3808
3809
#define ALT_ECC_DMAC_ECC_WDATAECC0BUS_ADDR ALT_ECC_DMAC_WDATAECC0BUS_ADDR(ALT_ECC_DMAC_ADDR)
3810
3811
#define ALT_ECC_DMAC_ECC_WDATAECC1BUS_ADDR ALT_ECC_DMAC_WDATAECC1BUS_ADDR(ALT_ECC_DMAC_ADDR)
3812
3813
#define ALT_ECC_DMAC_ECC_DBYTECTL_ADDR ALT_ECC_DMAC_DBYTECTL_ADDR(ALT_ECC_DMAC_ADDR)
3814
3815
#define ALT_ECC_DMAC_ECC_ACCCTL_ADDR ALT_ECC_DMAC_ACCCTL_ADDR(ALT_ECC_DMAC_ADDR)
3816
3817
#define ALT_ECC_DMAC_ECC_STARTACC_ADDR ALT_ECC_DMAC_STARTACC_ADDR(ALT_ECC_DMAC_ADDR)
3818
3819
#define ALT_ECC_DMAC_ECC_WDCTL_ADDR ALT_ECC_DMAC_WDCTL_ADDR(ALT_ECC_DMAC_ADDR)
3820
3821
#define ALT_ECC_DMAC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + ALT_ECC_DMAC_SERRLKUPA0_OFST))
3822
3823
#define ALT_ECC_DMAC_OFST 0xff8c8000
3824
3825
#define ALT_ECC_DMAC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_DMAC_OFST))
3826
3827
#define ALT_ECC_DMAC_LB_ADDR ALT_ECC_DMAC_ADDR
3828
3829
#define ALT_ECC_DMAC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_DMAC_ADDR) + 0x400) - 1))
3830
3840
#define ALT_ECC_QSPI_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_IP_REV_ID_OFST))
3841
3842
#define ALT_ECC_QSPI_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_CTL_OFST))
3843
3844
#define ALT_ECC_QSPI_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INITSTAT_OFST))
3845
3846
#define ALT_ECC_QSPI_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_ERRINTEN_OFST))
3847
3848
#define ALT_ECC_QSPI_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_ERRINTENS_OFST))
3849
3850
#define ALT_ECC_QSPI_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_ERRINTENR_OFST))
3851
3852
#define ALT_ECC_QSPI_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INTMOD_OFST))
3853
3854
#define ALT_ECC_QSPI_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INTSTAT_OFST))
3855
3856
#define ALT_ECC_QSPI_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_INTTEST_OFST))
3857
3858
#define ALT_ECC_QSPI_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_MODSTAT_OFST))
3859
3860
#define ALT_ECC_QSPI_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_DERRADDRA_OFST))
3861
3862
#define ALT_ECC_QSPI_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_SERRADDRA_OFST))
3863
3864
#define ALT_ECC_QSPI_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_SERRCNTREG_OFST))
3865
3866
#define ALT_ECC_QSPI_ECC_ADDRBUS_ADDR ALT_ECC_QSPI_ADDRBUS_ADDR(ALT_ECC_QSPI_ADDR)
3867
3868
#define ALT_ECC_QSPI_ECC_RDATA0BUS_ADDR ALT_ECC_QSPI_RDATA0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3869
3870
#define ALT_ECC_QSPI_ECC_RDATA1BUS_ADDR ALT_ECC_QSPI_RDATA1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3871
3872
#define ALT_ECC_QSPI_ECC_RDATA2BUS_ADDR ALT_ECC_QSPI_RDATA2BUS_ADDR(ALT_ECC_QSPI_ADDR)
3873
3874
#define ALT_ECC_QSPI_ECC_RDATA3BUS_ADDR ALT_ECC_QSPI_RDATA3BUS_ADDR(ALT_ECC_QSPI_ADDR)
3875
3876
#define ALT_ECC_QSPI_ECC_WDATA0BUS_ADDR ALT_ECC_QSPI_WDATA0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3877
3878
#define ALT_ECC_QSPI_ECC_WDATA1BUS_ADDR ALT_ECC_QSPI_WDATA1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3879
3880
#define ALT_ECC_QSPI_ECC_WDATA2BUS_ADDR ALT_ECC_QSPI_WDATA2BUS_ADDR(ALT_ECC_QSPI_ADDR)
3881
3882
#define ALT_ECC_QSPI_ECC_WDATA3BUS_ADDR ALT_ECC_QSPI_WDATA3BUS_ADDR(ALT_ECC_QSPI_ADDR)
3883
3884
#define ALT_ECC_QSPI_ECC_RDATAECC0BUS_ADDR ALT_ECC_QSPI_RDATAECC0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3885
3886
#define ALT_ECC_QSPI_ECC_RDATAECC1BUS_ADDR ALT_ECC_QSPI_RDATAECC1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3887
3888
#define ALT_ECC_QSPI_ECC_WDATAECC0BUS_ADDR ALT_ECC_QSPI_WDATAECC0BUS_ADDR(ALT_ECC_QSPI_ADDR)
3889
3890
#define ALT_ECC_QSPI_ECC_WDATAECC1BUS_ADDR ALT_ECC_QSPI_WDATAECC1BUS_ADDR(ALT_ECC_QSPI_ADDR)
3891
3892
#define ALT_ECC_QSPI_ECC_DBYTECTL_ADDR ALT_ECC_QSPI_DBYTECTL_ADDR(ALT_ECC_QSPI_ADDR)
3893
3894
#define ALT_ECC_QSPI_ECC_ACCCTL_ADDR ALT_ECC_QSPI_ACCCTL_ADDR(ALT_ECC_QSPI_ADDR)
3895
3896
#define ALT_ECC_QSPI_ECC_STARTACC_ADDR ALT_ECC_QSPI_STARTACC_ADDR(ALT_ECC_QSPI_ADDR)
3897
3898
#define ALT_ECC_QSPI_ECC_WDCTL_ADDR ALT_ECC_QSPI_WDCTL_ADDR(ALT_ECC_QSPI_ADDR)
3899
3900
#define ALT_ECC_QSPI_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + ALT_ECC_QSPI_SERRLKUPA0_OFST))
3901
3902
#define ALT_ECC_QSPI_OFST 0xff8c8400
3903
3904
#define ALT_ECC_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_QSPI_OFST))
3905
3906
#define ALT_ECC_QSPI_LB_ADDR ALT_ECC_QSPI_ADDR
3907
3908
#define ALT_ECC_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_QSPI_ADDR) + 0x400) - 1))
3909
3919
#define ALT_ECC_OTG0_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_IP_REV_ID_OFST))
3920
3921
#define ALT_ECC_OTG0_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_CTL_OFST))
3922
3923
#define ALT_ECC_OTG0_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INITSTAT_OFST))
3924
3925
#define ALT_ECC_OTG0_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ERRINTEN_OFST))
3926
3927
#define ALT_ECC_OTG0_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ERRINTENS_OFST))
3928
3929
#define ALT_ECC_OTG0_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ERRINTENR_OFST))
3930
3931
#define ALT_ECC_OTG0_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INTMOD_OFST))
3932
3933
#define ALT_ECC_OTG0_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INTSTAT_OFST))
3934
3935
#define ALT_ECC_OTG0_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_INTTEST_OFST))
3936
3937
#define ALT_ECC_OTG0_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_MODSTAT_OFST))
3938
3939
#define ALT_ECC_OTG0_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_DERRADDRA_OFST))
3940
3941
#define ALT_ECC_OTG0_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_SERRADDRA_OFST))
3942
3943
#define ALT_ECC_OTG0_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_SERRCNTREG_OFST))
3944
3945
#define ALT_ECC_OTG0_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_ADDRBUS_OFST))
3946
3947
#define ALT_ECC_OTG0_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA0BUS_OFST))
3948
3949
#define ALT_ECC_OTG0_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA1BUS_OFST))
3950
3951
#define ALT_ECC_OTG0_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA2BUS_OFST))
3952
3953
#define ALT_ECC_OTG0_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATA3BUS_OFST))
3954
3955
#define ALT_ECC_OTG0_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA0BUS_OFST))
3956
3957
#define ALT_ECC_OTG0_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA1BUS_OFST))
3958
3959
#define ALT_ECC_OTG0_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA2BUS_OFST))
3960
3961
#define ALT_ECC_OTG0_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATA3BUS_OFST))
3962
3963
#define ALT_ECC_OTG0_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATAECC0BUS_OFST))
3964
3965
#define ALT_ECC_OTG0_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_RDATAECC1BUS_OFST))
3966
3967
#define ALT_ECC_OTG0_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATAECC0BUS_OFST))
3968
3969
#define ALT_ECC_OTG0_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDATAECC1BUS_OFST))
3970
3971
#define ALT_ECC_OTG0_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_DBYTECTL_OFST))
3972
3973
#define ALT_ECC_OTG0_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_ACCCTL_OFST))
3974
3975
#define ALT_ECC_OTG0_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_STARTACC_OFST))
3976
3977
#define ALT_ECC_OTG0_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_ECC_WDCTL_OFST))
3978
3979
#define ALT_ECC_OTG0_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + ALT_ECC_OTG0_ECC_SERRLKUPA0_OFST))
3980
3981
#define ALT_ECC_OTG0_ECC_OFST 0xff8c8800
3982
3983
#define ALT_ECC_OTG0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_OTG0_ECC_OFST))
3984
3985
#define ALT_ECC_OTG0_ECC_LB_ADDR ALT_ECC_OTG0_ECC_ADDR
3986
3987
#define ALT_ECC_OTG0_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_OTG0_ECC_ADDR) + 0x400) - 1))
3988
3998
#define ALT_ECC_OTG1_ECC_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_IP_REV_ID_OFST))
3999
4000
#define ALT_ECC_OTG1_ECC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_CTL_OFST))
4001
4002
#define ALT_ECC_OTG1_ECC_INITSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INITSTAT_OFST))
4003
4004
#define ALT_ECC_OTG1_ECC_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ERRINTEN_OFST))
4005
4006
#define ALT_ECC_OTG1_ECC_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ERRINTENS_OFST))
4007
4008
#define ALT_ECC_OTG1_ECC_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ERRINTENR_OFST))
4009
4010
#define ALT_ECC_OTG1_ECC_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INTMOD_OFST))
4011
4012
#define ALT_ECC_OTG1_ECC_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INTSTAT_OFST))
4013
4014
#define ALT_ECC_OTG1_ECC_INTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_INTTEST_OFST))
4015
4016
#define ALT_ECC_OTG1_ECC_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_MODSTAT_OFST))
4017
4018
#define ALT_ECC_OTG1_ECC_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_DERRADDRA_OFST))
4019
4020
#define ALT_ECC_OTG1_ECC_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_SERRADDRA_OFST))
4021
4022
#define ALT_ECC_OTG1_ECC_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_SERRCNTREG_OFST))
4023
4024
#define ALT_ECC_OTG1_ECC_ECC_ADDRBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_ADDRBUS_OFST))
4025
4026
#define ALT_ECC_OTG1_ECC_ECC_RDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA0BUS_OFST))
4027
4028
#define ALT_ECC_OTG1_ECC_ECC_RDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA1BUS_OFST))
4029
4030
#define ALT_ECC_OTG1_ECC_ECC_RDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA2BUS_OFST))
4031
4032
#define ALT_ECC_OTG1_ECC_ECC_RDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATA3BUS_OFST))
4033
4034
#define ALT_ECC_OTG1_ECC_ECC_WDATA0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA0BUS_OFST))
4035
4036
#define ALT_ECC_OTG1_ECC_ECC_WDATA1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA1BUS_OFST))
4037
4038
#define ALT_ECC_OTG1_ECC_ECC_WDATA2BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA2BUS_OFST))
4039
4040
#define ALT_ECC_OTG1_ECC_ECC_WDATA3BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATA3BUS_OFST))
4041
4042
#define ALT_ECC_OTG1_ECC_ECC_RDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATAECC0BUS_OFST))
4043
4044
#define ALT_ECC_OTG1_ECC_ECC_RDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_RDATAECC1BUS_OFST))
4045
4046
#define ALT_ECC_OTG1_ECC_ECC_WDATAECC0BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATAECC0BUS_OFST))
4047
4048
#define ALT_ECC_OTG1_ECC_ECC_WDATAECC1BUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDATAECC1BUS_OFST))
4049
4050
#define ALT_ECC_OTG1_ECC_ECC_DBYTECTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_DBYTECTL_OFST))
4051
4052
#define ALT_ECC_OTG1_ECC_ECC_ACCCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_ACCCTL_OFST))
4053
4054
#define ALT_ECC_OTG1_ECC_ECC_STARTACC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_STARTACC_OFST))
4055
4056
#define ALT_ECC_OTG1_ECC_ECC_WDCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_ECC_WDCTL_OFST))
4057
4058
#define ALT_ECC_OTG1_ECC_SERRLKUPA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + ALT_ECC_OTG1_ECC_SERRLKUPA0_OFST))
4059
4060
#define ALT_ECC_OTG1_ECC_OFST 0xff8c8c00
4061
4062
#define ALT_ECC_OTG1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_OTG1_ECC_OFST))
4063
4064
#define ALT_ECC_OTG1_ECC_LB_ADDR ALT_ECC_OTG1_ECC_ADDR
4065
4066
#define ALT_ECC_OTG1_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_OTG1_ECC_ADDR) + 0x400) - 1))
4067
4077
#define ALT_QSPIDATA_OFST 0xffa00000
4078
4079
#define ALT_QSPIDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_QSPIDATA_OFST))
4080
4081
#define ALT_QSPIDATA_LB_ADDR ALT_QSPIDATA_ADDR
4082
4083
#define ALT_QSPIDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_QSPIDATA_ADDR) + 0x100000) - 1))
4084
4094
#define ALT_USB0_GLOB_GOTGCTL_ADDR ALT_USB_GLOB_GOTGCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
4095
4096
#define ALT_USB0_GLOB_GOTGINT_ADDR ALT_USB_GLOB_GOTGINT_ADDR(ALT_USB0_GLOBGRP_ADDR)
4097
4098
#define ALT_USB0_GLOB_GAHBCFG_ADDR ALT_USB_GLOB_GAHBCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
4099
4100
#define ALT_USB0_GLOB_GUSBCFG_ADDR ALT_USB_GLOB_GUSBCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
4101
4102
#define ALT_USB0_GLOB_GRSTCTL_ADDR ALT_USB_GLOB_GRSTCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
4103
4104
#define ALT_USB0_GLOB_GINTSTS_ADDR ALT_USB_GLOB_GINTSTS_ADDR(ALT_USB0_GLOBGRP_ADDR)
4105
4106
#define ALT_USB0_GLOB_GINTMSK_ADDR ALT_USB_GLOB_GINTMSK_ADDR(ALT_USB0_GLOBGRP_ADDR)
4107
4108
#define ALT_USB0_GLOB_GRXSTSR_ADDR ALT_USB_GLOB_GRXSTSR_ADDR(ALT_USB0_GLOBGRP_ADDR)
4109
4110
#define ALT_USB0_GLOB_GRXSTSP_ADDR ALT_USB_GLOB_GRXSTSP_ADDR(ALT_USB0_GLOBGRP_ADDR)
4111
4112
#define ALT_USB0_GLOB_GRXFSIZ_ADDR ALT_USB_GLOB_GRXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
4113
4114
#define ALT_USB0_GLOB_GNPTXFSIZ_ADDR ALT_USB_GLOB_GNPTXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
4115
4116
#define ALT_USB0_GLOB_GNPTXSTS_ADDR ALT_USB_GLOB_GNPTXSTS_ADDR(ALT_USB0_GLOBGRP_ADDR)
4117
4118
#define ALT_USB0_GLOB_GPVNDCTL_ADDR ALT_USB_GLOB_GPVNDCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
4119
4120
#define ALT_USB0_GLOB_GGPIO_ADDR ALT_USB_GLOB_GGPIO_ADDR(ALT_USB0_GLOBGRP_ADDR)
4121
4122
#define ALT_USB0_GLOB_GUID_ADDR ALT_USB_GLOB_GUID_ADDR(ALT_USB0_GLOBGRP_ADDR)
4123
4124
#define ALT_USB0_GLOB_GSNPSID_ADDR ALT_USB_GLOB_GSNPSID_ADDR(ALT_USB0_GLOBGRP_ADDR)
4125
4126
#define ALT_USB0_GLOB_GHWCFG1_ADDR ALT_USB_GLOB_GHWCFG1_ADDR(ALT_USB0_GLOBGRP_ADDR)
4127
4128
#define ALT_USB0_GLOB_GHWCFG2_ADDR ALT_USB_GLOB_GHWCFG2_ADDR(ALT_USB0_GLOBGRP_ADDR)
4129
4130
#define ALT_USB0_GLOB_GHWCFG3_ADDR ALT_USB_GLOB_GHWCFG3_ADDR(ALT_USB0_GLOBGRP_ADDR)
4131
4132
#define ALT_USB0_GLOB_GHWCFG4_ADDR ALT_USB_GLOB_GHWCFG4_ADDR(ALT_USB0_GLOBGRP_ADDR)
4133
4134
#define ALT_USB0_GLOB_GDFIFOCFG_ADDR ALT_USB_GLOB_GDFIFOCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
4135
4136
#define ALT_USB0_GLOB_HPTXFSIZ_ADDR ALT_USB_GLOB_HPTXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
4137
4138
#define ALT_USB0_GLOB_DIEPTXF1_ADDR ALT_USB_GLOB_DIEPTXF1_ADDR(ALT_USB0_GLOBGRP_ADDR)
4139
4140
#define ALT_USB0_GLOB_DIEPTXF2_ADDR ALT_USB_GLOB_DIEPTXF2_ADDR(ALT_USB0_GLOBGRP_ADDR)
4141
4142
#define ALT_USB0_GLOB_DIEPTXF3_ADDR ALT_USB_GLOB_DIEPTXF3_ADDR(ALT_USB0_GLOBGRP_ADDR)
4143
4144
#define ALT_USB0_GLOB_DIEPTXF4_ADDR ALT_USB_GLOB_DIEPTXF4_ADDR(ALT_USB0_GLOBGRP_ADDR)
4145
4146
#define ALT_USB0_GLOB_DIEPTXF5_ADDR ALT_USB_GLOB_DIEPTXF5_ADDR(ALT_USB0_GLOBGRP_ADDR)
4147
4148
#define ALT_USB0_GLOB_DIEPTXF6_ADDR ALT_USB_GLOB_DIEPTXF6_ADDR(ALT_USB0_GLOBGRP_ADDR)
4149
4150
#define ALT_USB0_GLOB_DIEPTXF7_ADDR ALT_USB_GLOB_DIEPTXF7_ADDR(ALT_USB0_GLOBGRP_ADDR)
4151
4152
#define ALT_USB0_GLOB_DIEPTXF8_ADDR ALT_USB_GLOB_DIEPTXF8_ADDR(ALT_USB0_GLOBGRP_ADDR)
4153
4154
#define ALT_USB0_GLOB_DIEPTXF9_ADDR ALT_USB_GLOB_DIEPTXF9_ADDR(ALT_USB0_GLOBGRP_ADDR)
4155
4156
#define ALT_USB0_GLOB_DIEPTXF10_ADDR ALT_USB_GLOB_DIEPTXF10_ADDR(ALT_USB0_GLOBGRP_ADDR)
4157
4158
#define ALT_USB0_GLOB_DIEPTXF11_ADDR ALT_USB_GLOB_DIEPTXF11_ADDR(ALT_USB0_GLOBGRP_ADDR)
4159
4160
#define ALT_USB0_GLOB_DIEPTXF12_ADDR ALT_USB_GLOB_DIEPTXF12_ADDR(ALT_USB0_GLOBGRP_ADDR)
4161
4162
#define ALT_USB0_GLOB_DIEPTXF13_ADDR ALT_USB_GLOB_DIEPTXF13_ADDR(ALT_USB0_GLOBGRP_ADDR)
4163
4164
#define ALT_USB0_GLOB_DIEPTXF14_ADDR ALT_USB_GLOB_DIEPTXF14_ADDR(ALT_USB0_GLOBGRP_ADDR)
4165
4166
#define ALT_USB0_GLOB_DIEPTXF15_ADDR ALT_USB_GLOB_DIEPTXF15_ADDR(ALT_USB0_GLOBGRP_ADDR)
4167
4168
#define ALT_USB0_GLOBGRP_OFST 0xffb00000
4169
4170
#define ALT_USB0_GLOBGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_GLOBGRP_OFST))
4171
4172
#define ALT_USB0_GLOBGRP_LB_ADDR ALT_USB0_GLOBGRP_ADDR
4173
4174
#define ALT_USB0_GLOBGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_GLOBGRP_ADDR) + 0x140) - 1))
4175
4185
#define ALT_USB0_HOST_HCFG_ADDR ALT_USB_HOST_HCFG_ADDR(ALT_USB0_HOSTGRP_ADDR)
4186
4187
#define ALT_USB0_HOST_HFIR_ADDR ALT_USB_HOST_HFIR_ADDR(ALT_USB0_HOSTGRP_ADDR)
4188
4189
#define ALT_USB0_HOST_HFNUM_ADDR ALT_USB_HOST_HFNUM_ADDR(ALT_USB0_HOSTGRP_ADDR)
4190
4191
#define ALT_USB0_HOST_HPTXSTS_ADDR ALT_USB_HOST_HPTXSTS_ADDR(ALT_USB0_HOSTGRP_ADDR)
4192
4193
#define ALT_USB0_HOST_HAINT_ADDR ALT_USB_HOST_HAINT_ADDR(ALT_USB0_HOSTGRP_ADDR)
4194
4195
#define ALT_USB0_HOST_HAINTMSK_ADDR ALT_USB_HOST_HAINTMSK_ADDR(ALT_USB0_HOSTGRP_ADDR)
4196
4197
#define ALT_USB0_HOST_HFLBADDR_ADDR ALT_USB_HOST_HFLBADDR_ADDR(ALT_USB0_HOSTGRP_ADDR)
4198
4199
#define ALT_USB0_HOST_HPRT_ADDR ALT_USB_HOST_HPRT_ADDR(ALT_USB0_HOSTGRP_ADDR)
4200
4201
#define ALT_USB0_HOST_HCCHAR0_ADDR ALT_USB_HOST_HCCHAR0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4202
4203
#define ALT_USB0_HOST_HCSPLT0_ADDR ALT_USB_HOST_HCSPLT0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4204
4205
#define ALT_USB0_HOST_HCINT0_ADDR ALT_USB_HOST_HCINT0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4206
4207
#define ALT_USB0_HOST_HCINTMSK0_ADDR ALT_USB_HOST_HCINTMSK0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4208
4209
#define ALT_USB0_HOST_HCTSIZ0_ADDR ALT_USB_HOST_HCTSIZ0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4210
4211
#define ALT_USB0_HOST_HCDMA0_ADDR ALT_USB_HOST_HCDMA0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4212
4213
#define ALT_USB0_HOST_HCDMAB0_ADDR ALT_USB_HOST_HCDMAB0_ADDR(ALT_USB0_HOSTGRP_ADDR)
4214
4215
#define ALT_USB0_HOST_HCCHAR1_ADDR ALT_USB_HOST_HCCHAR1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4216
4217
#define ALT_USB0_HOST_HCSPLT1_ADDR ALT_USB_HOST_HCSPLT1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4218
4219
#define ALT_USB0_HOST_HCINT1_ADDR ALT_USB_HOST_HCINT1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4220
4221
#define ALT_USB0_HOST_HCINTMSK1_ADDR ALT_USB_HOST_HCINTMSK1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4222
4223
#define ALT_USB0_HOST_HCTSIZ1_ADDR ALT_USB_HOST_HCTSIZ1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4224
4225
#define ALT_USB0_HOST_HCDMA1_ADDR ALT_USB_HOST_HCDMA1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4226
4227
#define ALT_USB0_HOST_HCDMAB1_ADDR ALT_USB_HOST_HCDMAB1_ADDR(ALT_USB0_HOSTGRP_ADDR)
4228
4229
#define ALT_USB0_HOST_HCCHAR2_ADDR ALT_USB_HOST_HCCHAR2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4230
4231
#define ALT_USB0_HOST_HCSPLT2_ADDR ALT_USB_HOST_HCSPLT2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4232
4233
#define ALT_USB0_HOST_HCINT2_ADDR ALT_USB_HOST_HCINT2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4234
4235
#define ALT_USB0_HOST_HCINTMSK2_ADDR ALT_USB_HOST_HCINTMSK2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4236
4237
#define ALT_USB0_HOST_HCTSIZ2_ADDR ALT_USB_HOST_HCTSIZ2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4238
4239
#define ALT_USB0_HOST_HCDMA2_ADDR ALT_USB_HOST_HCDMA2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4240
4241
#define ALT_USB0_HOST_HCDMAB2_ADDR ALT_USB_HOST_HCDMAB2_ADDR(ALT_USB0_HOSTGRP_ADDR)
4242
4243
#define ALT_USB0_HOST_HCCHAR3_ADDR ALT_USB_HOST_HCCHAR3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4244
4245
#define ALT_USB0_HOST_HCSPLT3_ADDR ALT_USB_HOST_HCSPLT3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4246
4247
#define ALT_USB0_HOST_HCINT3_ADDR ALT_USB_HOST_HCINT3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4248
4249
#define ALT_USB0_HOST_HCINTMSK3_ADDR ALT_USB_HOST_HCINTMSK3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4250
4251
#define ALT_USB0_HOST_HCTSIZ3_ADDR ALT_USB_HOST_HCTSIZ3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4252
4253
#define ALT_USB0_HOST_HCDMA3_ADDR ALT_USB_HOST_HCDMA3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4254
4255
#define ALT_USB0_HOST_HCDMAB3_ADDR ALT_USB_HOST_HCDMAB3_ADDR(ALT_USB0_HOSTGRP_ADDR)
4256
4257
#define ALT_USB0_HOST_HCCHAR4_ADDR ALT_USB_HOST_HCCHAR4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4258
4259
#define ALT_USB0_HOST_HCSPLT4_ADDR ALT_USB_HOST_HCSPLT4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4260
4261
#define ALT_USB0_HOST_HCINT4_ADDR ALT_USB_HOST_HCINT4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4262
4263
#define ALT_USB0_HOST_HCINTMSK4_ADDR ALT_USB_HOST_HCINTMSK4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4264
4265
#define ALT_USB0_HOST_HCTSIZ4_ADDR ALT_USB_HOST_HCTSIZ4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4266
4267
#define ALT_USB0_HOST_HCDMA4_ADDR ALT_USB_HOST_HCDMA4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4268
4269
#define ALT_USB0_HOST_HCDMAB4_ADDR ALT_USB_HOST_HCDMAB4_ADDR(ALT_USB0_HOSTGRP_ADDR)
4270
4271
#define ALT_USB0_HOST_HCCHAR5_ADDR ALT_USB_HOST_HCCHAR5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4272
4273
#define ALT_USB0_HOST_HCSPLT5_ADDR ALT_USB_HOST_HCSPLT5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4274
4275
#define ALT_USB0_HOST_HCINT5_ADDR ALT_USB_HOST_HCINT5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4276
4277
#define ALT_USB0_HOST_HCINTMSK5_ADDR ALT_USB_HOST_HCINTMSK5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4278
4279
#define ALT_USB0_HOST_HCTSIZ5_ADDR ALT_USB_HOST_HCTSIZ5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4280
4281
#define ALT_USB0_HOST_HCDMA5_ADDR ALT_USB_HOST_HCDMA5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4282
4283
#define ALT_USB0_HOST_HCDMAB5_ADDR ALT_USB_HOST_HCDMAB5_ADDR(ALT_USB0_HOSTGRP_ADDR)
4284
4285
#define ALT_USB0_HOST_HCCHAR6_ADDR ALT_USB_HOST_HCCHAR6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4286
4287
#define ALT_USB0_HOST_HCSPLT6_ADDR ALT_USB_HOST_HCSPLT6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4288
4289
#define ALT_USB0_HOST_HCINT6_ADDR ALT_USB_HOST_HCINT6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4290
4291
#define ALT_USB0_HOST_HCINTMSK6_ADDR ALT_USB_HOST_HCINTMSK6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4292
4293
#define ALT_USB0_HOST_HCTSIZ6_ADDR ALT_USB_HOST_HCTSIZ6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4294
4295
#define ALT_USB0_HOST_HCDMA6_ADDR ALT_USB_HOST_HCDMA6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4296
4297
#define ALT_USB0_HOST_HCDMAB6_ADDR ALT_USB_HOST_HCDMAB6_ADDR(ALT_USB0_HOSTGRP_ADDR)
4298
4299
#define ALT_USB0_HOST_HCCHAR7_ADDR ALT_USB_HOST_HCCHAR7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4300
4301
#define ALT_USB0_HOST_HCSPLT7_ADDR ALT_USB_HOST_HCSPLT7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4302
4303
#define ALT_USB0_HOST_HCINT7_ADDR ALT_USB_HOST_HCINT7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4304
4305
#define ALT_USB0_HOST_HCINTMSK7_ADDR ALT_USB_HOST_HCINTMSK7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4306
4307
#define ALT_USB0_HOST_HCTSIZ7_ADDR ALT_USB_HOST_HCTSIZ7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4308
4309
#define ALT_USB0_HOST_HCDMA7_ADDR ALT_USB_HOST_HCDMA7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4310
4311
#define ALT_USB0_HOST_HCDMAB7_ADDR ALT_USB_HOST_HCDMAB7_ADDR(ALT_USB0_HOSTGRP_ADDR)
4312
4313
#define ALT_USB0_HOST_HCCHAR8_ADDR ALT_USB_HOST_HCCHAR8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4314
4315
#define ALT_USB0_HOST_HCSPLT8_ADDR ALT_USB_HOST_HCSPLT8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4316
4317
#define ALT_USB0_HOST_HCINT8_ADDR ALT_USB_HOST_HCINT8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4318
4319
#define ALT_USB0_HOST_HCINTMSK8_ADDR ALT_USB_HOST_HCINTMSK8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4320
4321
#define ALT_USB0_HOST_HCTSIZ8_ADDR ALT_USB_HOST_HCTSIZ8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4322
4323
#define ALT_USB0_HOST_HCDMA8_ADDR ALT_USB_HOST_HCDMA8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4324
4325
#define ALT_USB0_HOST_HCDMAB8_ADDR ALT_USB_HOST_HCDMAB8_ADDR(ALT_USB0_HOSTGRP_ADDR)
4326
4327
#define ALT_USB0_HOST_HCCHAR9_ADDR ALT_USB_HOST_HCCHAR9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4328
4329
#define ALT_USB0_HOST_HCSPLT9_ADDR ALT_USB_HOST_HCSPLT9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4330
4331
#define ALT_USB0_HOST_HCINT9_ADDR ALT_USB_HOST_HCINT9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4332
4333
#define ALT_USB0_HOST_HCINTMSK9_ADDR ALT_USB_HOST_HCINTMSK9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4334
4335
#define ALT_USB0_HOST_HCTSIZ9_ADDR ALT_USB_HOST_HCTSIZ9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4336
4337
#define ALT_USB0_HOST_HCDMA9_ADDR ALT_USB_HOST_HCDMA9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4338
4339
#define ALT_USB0_HOST_HCDMAB9_ADDR ALT_USB_HOST_HCDMAB9_ADDR(ALT_USB0_HOSTGRP_ADDR)
4340
4341
#define ALT_USB0_HOST_HCCHAR10_ADDR ALT_USB_HOST_HCCHAR10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4342
4343
#define ALT_USB0_HOST_HCSPLT10_ADDR ALT_USB_HOST_HCSPLT10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4344
4345
#define ALT_USB0_HOST_HCINT10_ADDR ALT_USB_HOST_HCINT10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4346
4347
#define ALT_USB0_HOST_HCINTMSK10_ADDR ALT_USB_HOST_HCINTMSK10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4348
4349
#define ALT_USB0_HOST_HCTSIZ10_ADDR ALT_USB_HOST_HCTSIZ10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4350
4351
#define ALT_USB0_HOST_HCDMA10_ADDR ALT_USB_HOST_HCDMA10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4352
4353
#define ALT_USB0_HOST_HCDMAB10_ADDR ALT_USB_HOST_HCDMAB10_ADDR(ALT_USB0_HOSTGRP_ADDR)
4354
4355
#define ALT_USB0_HOST_HCCHAR11_ADDR ALT_USB_HOST_HCCHAR11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4356
4357
#define ALT_USB0_HOST_HCSPLT11_ADDR ALT_USB_HOST_HCSPLT11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4358
4359
#define ALT_USB0_HOST_HCINT11_ADDR ALT_USB_HOST_HCINT11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4360
4361
#define ALT_USB0_HOST_HCINTMSK11_ADDR ALT_USB_HOST_HCINTMSK11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4362
4363
#define ALT_USB0_HOST_HCTSIZ11_ADDR ALT_USB_HOST_HCTSIZ11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4364
4365
#define ALT_USB0_HOST_HCDMA11_ADDR ALT_USB_HOST_HCDMA11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4366
4367
#define ALT_USB0_HOST_HCDMAB11_ADDR ALT_USB_HOST_HCDMAB11_ADDR(ALT_USB0_HOSTGRP_ADDR)
4368
4369
#define ALT_USB0_HOST_HCCHAR12_ADDR ALT_USB_HOST_HCCHAR12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4370
4371
#define ALT_USB0_HOST_HCSPLT12_ADDR ALT_USB_HOST_HCSPLT12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4372
4373
#define ALT_USB0_HOST_HCINT12_ADDR ALT_USB_HOST_HCINT12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4374
4375
#define ALT_USB0_HOST_HCINTMSK12_ADDR ALT_USB_HOST_HCINTMSK12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4376
4377
#define ALT_USB0_HOST_HCTSIZ12_ADDR ALT_USB_HOST_HCTSIZ12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4378
4379
#define ALT_USB0_HOST_HCDMA12_ADDR ALT_USB_HOST_HCDMA12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4380
4381
#define ALT_USB0_HOST_HCDMAB12_ADDR ALT_USB_HOST_HCDMAB12_ADDR(ALT_USB0_HOSTGRP_ADDR)
4382
4383
#define ALT_USB0_HOST_HCCHAR13_ADDR ALT_USB_HOST_HCCHAR13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4384
4385
#define ALT_USB0_HOST_HCSPLT13_ADDR ALT_USB_HOST_HCSPLT13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4386
4387
#define ALT_USB0_HOST_HCINT13_ADDR ALT_USB_HOST_HCINT13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4388
4389
#define ALT_USB0_HOST_HCINTMSK13_ADDR ALT_USB_HOST_HCINTMSK13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4390
4391
#define ALT_USB0_HOST_HCTSIZ13_ADDR ALT_USB_HOST_HCTSIZ13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4392
4393
#define ALT_USB0_HOST_HCDMA13_ADDR ALT_USB_HOST_HCDMA13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4394
4395
#define ALT_USB0_HOST_HCDMAB13_ADDR ALT_USB_HOST_HCDMAB13_ADDR(ALT_USB0_HOSTGRP_ADDR)
4396
4397
#define ALT_USB0_HOST_HCCHAR14_ADDR ALT_USB_HOST_HCCHAR14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4398
4399
#define ALT_USB0_HOST_HCSPLT14_ADDR ALT_USB_HOST_HCSPLT14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4400
4401
#define ALT_USB0_HOST_HCINT14_ADDR ALT_USB_HOST_HCINT14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4402
4403
#define ALT_USB0_HOST_HCINTMSK14_ADDR ALT_USB_HOST_HCINTMSK14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4404
4405
#define ALT_USB0_HOST_HCTSIZ14_ADDR ALT_USB_HOST_HCTSIZ14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4406
4407
#define ALT_USB0_HOST_HCDMA14_ADDR ALT_USB_HOST_HCDMA14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4408
4409
#define ALT_USB0_HOST_HCDMAB14_ADDR ALT_USB_HOST_HCDMAB14_ADDR(ALT_USB0_HOSTGRP_ADDR)
4410
4411
#define ALT_USB0_HOST_HCCHAR15_ADDR ALT_USB_HOST_HCCHAR15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4412
4413
#define ALT_USB0_HOST_HCSPLT15_ADDR ALT_USB_HOST_HCSPLT15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4414
4415
#define ALT_USB0_HOST_HCINT15_ADDR ALT_USB_HOST_HCINT15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4416
4417
#define ALT_USB0_HOST_HCINTMSK15_ADDR ALT_USB_HOST_HCINTMSK15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4418
4419
#define ALT_USB0_HOST_HCTSIZ15_ADDR ALT_USB_HOST_HCTSIZ15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4420
4421
#define ALT_USB0_HOST_HCDMA15_ADDR ALT_USB_HOST_HCDMA15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4422
4423
#define ALT_USB0_HOST_HCDMAB15_ADDR ALT_USB_HOST_HCDMAB15_ADDR(ALT_USB0_HOSTGRP_ADDR)
4424
4425
#define ALT_USB0_HOSTGRP_OFST 0xffb00400
4426
4427
#define ALT_USB0_HOSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_HOSTGRP_OFST))
4428
4429
#define ALT_USB0_HOSTGRP_LB_ADDR ALT_USB0_HOSTGRP_ADDR
4430
4431
#define ALT_USB0_HOSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_HOSTGRP_ADDR) + 0x300) - 1))
4432
4442
#define ALT_USB0_DEV_DCFG_ADDR ALT_USB_DEV_DCFG_ADDR(ALT_USB0_DEVGRP_ADDR)
4443
4444
#define ALT_USB0_DEV_DCTL_ADDR ALT_USB_DEV_DCTL_ADDR(ALT_USB0_DEVGRP_ADDR)
4445
4446
#define ALT_USB0_DEV_DSTS_ADDR ALT_USB_DEV_DSTS_ADDR(ALT_USB0_DEVGRP_ADDR)
4447
4448
#define ALT_USB0_DEV_DIEPMSK_ADDR ALT_USB_DEV_DIEPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4449
4450
#define ALT_USB0_DEV_DOEPMSK_ADDR ALT_USB_DEV_DOEPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4451
4452
#define ALT_USB0_DEV_DAINT_ADDR ALT_USB_DEV_DAINT_ADDR(ALT_USB0_DEVGRP_ADDR)
4453
4454
#define ALT_USB0_DEV_DAINTMSK_ADDR ALT_USB_DEV_DAINTMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4455
4456
#define ALT_USB0_DEV_DVBUSDIS_ADDR ALT_USB_DEV_DVBUSDIS_ADDR(ALT_USB0_DEVGRP_ADDR)
4457
4458
#define ALT_USB0_DEV_DVBUSPULSE_ADDR ALT_USB_DEV_DVBUSPULSE_ADDR(ALT_USB0_DEVGRP_ADDR)
4459
4460
#define ALT_USB0_DEV_DTHRCTL_ADDR ALT_USB_DEV_DTHRCTL_ADDR(ALT_USB0_DEVGRP_ADDR)
4461
4462
#define ALT_USB0_DEV_DIEPEMPMSK_ADDR ALT_USB_DEV_DIEPEMPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
4463
4464
#define ALT_USB0_DEV_DIEPCTL0_ADDR ALT_USB_DEV_DIEPCTL0_ADDR(ALT_USB0_DEVGRP_ADDR)
4465
4466
#define ALT_USB0_DEV_DIEPINT0_ADDR ALT_USB_DEV_DIEPINT0_ADDR(ALT_USB0_DEVGRP_ADDR)
4467
4468
#define ALT_USB0_DEV_DIEPTSIZ0_ADDR ALT_USB_DEV_DIEPTSIZ0_ADDR(ALT_USB0_DEVGRP_ADDR)
4469
4470
#define ALT_USB0_DEV_DIEPDMA0_ADDR ALT_USB_DEV_DIEPDMA0_ADDR(ALT_USB0_DEVGRP_ADDR)
4471
4472
#define ALT_USB0_DEV_DTXFSTS0_ADDR ALT_USB_DEV_DTXFSTS0_ADDR(ALT_USB0_DEVGRP_ADDR)
4473
4474
#define ALT_USB0_DEV_DIEPDMAB0_ADDR ALT_USB_DEV_DIEPDMAB0_ADDR(ALT_USB0_DEVGRP_ADDR)
4475
4476
#define ALT_USB0_DEV_DIEPCTL1_ADDR ALT_USB_DEV_DIEPCTL1_ADDR(ALT_USB0_DEVGRP_ADDR)
4477
4478
#define ALT_USB0_DEV_DIEPINT1_ADDR ALT_USB_DEV_DIEPINT1_ADDR(ALT_USB0_DEVGRP_ADDR)
4479
4480
#define ALT_USB0_DEV_DIEPTSIZ1_ADDR ALT_USB_DEV_DIEPTSIZ1_ADDR(ALT_USB0_DEVGRP_ADDR)
4481
4482
#define ALT_USB0_DEV_DIEPDMA1_ADDR ALT_USB_DEV_DIEPDMA1_ADDR(ALT_USB0_DEVGRP_ADDR)
4483
4484
#define ALT_USB0_DEV_DTXFSTS1_ADDR ALT_USB_DEV_DTXFSTS1_ADDR(ALT_USB0_DEVGRP_ADDR)
4485
4486
#define ALT_USB0_DEV_DIEPDMAB1_ADDR ALT_USB_DEV_DIEPDMAB1_ADDR(ALT_USB0_DEVGRP_ADDR)
4487
4488
#define ALT_USB0_DEV_DIEPCTL2_ADDR ALT_USB_DEV_DIEPCTL2_ADDR(ALT_USB0_DEVGRP_ADDR)
4489
4490
#define ALT_USB0_DEV_DIEPINT2_ADDR ALT_USB_DEV_DIEPINT2_ADDR(ALT_USB0_DEVGRP_ADDR)
4491
4492
#define ALT_USB0_DEV_DIEPTSIZ2_ADDR ALT_USB_DEV_DIEPTSIZ2_ADDR(ALT_USB0_DEVGRP_ADDR)
4493
4494
#define ALT_USB0_DEV_DIEPDMA2_ADDR ALT_USB_DEV_DIEPDMA2_ADDR(ALT_USB0_DEVGRP_ADDR)
4495
4496
#define ALT_USB0_DEV_DTXFSTS2_ADDR ALT_USB_DEV_DTXFSTS2_ADDR(ALT_USB0_DEVGRP_ADDR)
4497
4498
#define ALT_USB0_DEV_DIEPDMAB2_ADDR ALT_USB_DEV_DIEPDMAB2_ADDR(ALT_USB0_DEVGRP_ADDR)
4499
4500
#define ALT_USB0_DEV_DIEPCTL3_ADDR ALT_USB_DEV_DIEPCTL3_ADDR(ALT_USB0_DEVGRP_ADDR)
4501
4502
#define ALT_USB0_DEV_DIEPINT3_ADDR ALT_USB_DEV_DIEPINT3_ADDR(ALT_USB0_DEVGRP_ADDR)
4503
4504
#define ALT_USB0_DEV_DIEPTSIZ3_ADDR ALT_USB_DEV_DIEPTSIZ3_ADDR(ALT_USB0_DEVGRP_ADDR)
4505
4506
#define ALT_USB0_DEV_DIEPDMA3_ADDR ALT_USB_DEV_DIEPDMA3_ADDR(ALT_USB0_DEVGRP_ADDR)
4507
4508
#define ALT_USB0_DEV_DTXFSTS3_ADDR ALT_USB_DEV_DTXFSTS3_ADDR(ALT_USB0_DEVGRP_ADDR)
4509
4510
#define ALT_USB0_DEV_DIEPDMAB3_ADDR ALT_USB_DEV_DIEPDMAB3_ADDR(ALT_USB0_DEVGRP_ADDR)
4511
4512
#define ALT_USB0_DEV_DIEPCTL4_ADDR ALT_USB_DEV_DIEPCTL4_ADDR(ALT_USB0_DEVGRP_ADDR)
4513
4514
#define ALT_USB0_DEV_DIEPINT4_ADDR ALT_USB_DEV_DIEPINT4_ADDR(ALT_USB0_DEVGRP_ADDR)
4515
4516
#define ALT_USB0_DEV_DIEPTSIZ4_ADDR ALT_USB_DEV_DIEPTSIZ4_ADDR(ALT_USB0_DEVGRP_ADDR)
4517
4518
#define ALT_USB0_DEV_DIEPDMA4_ADDR ALT_USB_DEV_DIEPDMA4_ADDR(ALT_USB0_DEVGRP_ADDR)
4519
4520
#define ALT_USB0_DEV_DTXFSTS4_ADDR ALT_USB_DEV_DTXFSTS4_ADDR(ALT_USB0_DEVGRP_ADDR)
4521
4522
#define ALT_USB0_DEV_DIEPDMAB4_ADDR ALT_USB_DEV_DIEPDMAB4_ADDR(ALT_USB0_DEVGRP_ADDR)
4523
4524
#define ALT_USB0_DEV_DIEPCTL5_ADDR ALT_USB_DEV_DIEPCTL5_ADDR(ALT_USB0_DEVGRP_ADDR)
4525
4526
#define ALT_USB0_DEV_DIEPINT5_ADDR ALT_USB_DEV_DIEPINT5_ADDR(ALT_USB0_DEVGRP_ADDR)
4527
4528
#define ALT_USB0_DEV_DIEPTSIZ5_ADDR ALT_USB_DEV_DIEPTSIZ5_ADDR(ALT_USB0_DEVGRP_ADDR)
4529
4530
#define ALT_USB0_DEV_DIEPDMA5_ADDR ALT_USB_DEV_DIEPDMA5_ADDR(ALT_USB0_DEVGRP_ADDR)
4531
4532
#define ALT_USB0_DEV_DTXFSTS5_ADDR ALT_USB_DEV_DTXFSTS5_ADDR(ALT_USB0_DEVGRP_ADDR)
4533
4534
#define ALT_USB0_DEV_DIEPDMAB5_ADDR ALT_USB_DEV_DIEPDMAB5_ADDR(ALT_USB0_DEVGRP_ADDR)
4535
4536
#define ALT_USB0_DEV_DIEPCTL6_ADDR ALT_USB_DEV_DIEPCTL6_ADDR(ALT_USB0_DEVGRP_ADDR)
4537
4538
#define ALT_USB0_DEV_DIEPINT6_ADDR ALT_USB_DEV_DIEPINT6_ADDR(ALT_USB0_DEVGRP_ADDR)
4539
4540
#define ALT_USB0_DEV_DIEPTSIZ6_ADDR ALT_USB_DEV_DIEPTSIZ6_ADDR(ALT_USB0_DEVGRP_ADDR)
4541
4542
#define ALT_USB0_DEV_DIEPDMA6_ADDR ALT_USB_DEV_DIEPDMA6_ADDR(ALT_USB0_DEVGRP_ADDR)
4543
4544
#define ALT_USB0_DEV_DTXFSTS6_ADDR ALT_USB_DEV_DTXFSTS6_ADDR(ALT_USB0_DEVGRP_ADDR)
4545
4546
#define ALT_USB0_DEV_DIEPDMAB6_ADDR ALT_USB_DEV_DIEPDMAB6_ADDR(ALT_USB0_DEVGRP_ADDR)
4547
4548
#define ALT_USB0_DEV_DIEPCTL7_ADDR ALT_USB_DEV_DIEPCTL7_ADDR(ALT_USB0_DEVGRP_ADDR)
4549
4550
#define ALT_USB0_DEV_DIEPINT7_ADDR ALT_USB_DEV_DIEPINT7_ADDR(ALT_USB0_DEVGRP_ADDR)
4551
4552
#define ALT_USB0_DEV_DIEPTSIZ7_ADDR ALT_USB_DEV_DIEPTSIZ7_ADDR(ALT_USB0_DEVGRP_ADDR)
4553
4554
#define ALT_USB0_DEV_DIEPDMA7_ADDR ALT_USB_DEV_DIEPDMA7_ADDR(ALT_USB0_DEVGRP_ADDR)
4555
4556
#define ALT_USB0_DEV_DTXFSTS7_ADDR ALT_USB_DEV_DTXFSTS7_ADDR(ALT_USB0_DEVGRP_ADDR)
4557
4558
#define ALT_USB0_DEV_DIEPDMAB7_ADDR ALT_USB_DEV_DIEPDMAB7_ADDR(ALT_USB0_DEVGRP_ADDR)
4559
4560
#define ALT_USB0_DEV_DIEPCTL8_ADDR ALT_USB_DEV_DIEPCTL8_ADDR(ALT_USB0_DEVGRP_ADDR)
4561
4562
#define ALT_USB0_DEV_DIEPINT8_ADDR ALT_USB_DEV_DIEPINT8_ADDR(ALT_USB0_DEVGRP_ADDR)
4563
4564
#define ALT_USB0_DEV_DIEPTSIZ8_ADDR ALT_USB_DEV_DIEPTSIZ8_ADDR(ALT_USB0_DEVGRP_ADDR)
4565
4566
#define ALT_USB0_DEV_DIEPDMA8_ADDR ALT_USB_DEV_DIEPDMA8_ADDR(ALT_USB0_DEVGRP_ADDR)
4567
4568
#define ALT_USB0_DEV_DTXFSTS8_ADDR ALT_USB_DEV_DTXFSTS8_ADDR(ALT_USB0_DEVGRP_ADDR)
4569
4570
#define ALT_USB0_DEV_DIEPDMAB8_ADDR ALT_USB_DEV_DIEPDMAB8_ADDR(ALT_USB0_DEVGRP_ADDR)
4571
4572
#define ALT_USB0_DEV_DIEPCTL9_ADDR ALT_USB_DEV_DIEPCTL9_ADDR(ALT_USB0_DEVGRP_ADDR)
4573
4574
#define ALT_USB0_DEV_DIEPINT9_ADDR ALT_USB_DEV_DIEPINT9_ADDR(ALT_USB0_DEVGRP_ADDR)
4575
4576
#define ALT_USB0_DEV_DIEPTSIZ9_ADDR ALT_USB_DEV_DIEPTSIZ9_ADDR(ALT_USB0_DEVGRP_ADDR)
4577
4578
#define ALT_USB0_DEV_DIEPDMA9_ADDR ALT_USB_DEV_DIEPDMA9_ADDR(ALT_USB0_DEVGRP_ADDR)
4579
4580
#define ALT_USB0_DEV_DTXFSTS9_ADDR ALT_USB_DEV_DTXFSTS9_ADDR(ALT_USB0_DEVGRP_ADDR)
4581
4582
#define ALT_USB0_DEV_DIEPDMAB9_ADDR ALT_USB_DEV_DIEPDMAB9_ADDR(ALT_USB0_DEVGRP_ADDR)
4583
4584
#define ALT_USB0_DEV_DIEPCTL10_ADDR ALT_USB_DEV_DIEPCTL10_ADDR(ALT_USB0_DEVGRP_ADDR)
4585
4586
#define ALT_USB0_DEV_DIEPINT10_ADDR ALT_USB_DEV_DIEPINT10_ADDR(ALT_USB0_DEVGRP_ADDR)
4587
4588
#define ALT_USB0_DEV_DIEPTSIZ10_ADDR ALT_USB_DEV_DIEPTSIZ10_ADDR(ALT_USB0_DEVGRP_ADDR)
4589
4590
#define ALT_USB0_DEV_DIEPDMA10_ADDR ALT_USB_DEV_DIEPDMA10_ADDR(ALT_USB0_DEVGRP_ADDR)
4591
4592
#define ALT_USB0_DEV_DTXFSTS10_ADDR ALT_USB_DEV_DTXFSTS10_ADDR(ALT_USB0_DEVGRP_ADDR)
4593
4594
#define ALT_USB0_DEV_DIEPDMAB10_ADDR ALT_USB_DEV_DIEPDMAB10_ADDR(ALT_USB0_DEVGRP_ADDR)
4595
4596
#define ALT_USB0_DEV_DIEPCTL11_ADDR ALT_USB_DEV_DIEPCTL11_ADDR(ALT_USB0_DEVGRP_ADDR)
4597
4598
#define ALT_USB0_DEV_DIEPINT11_ADDR ALT_USB_DEV_DIEPINT11_ADDR(ALT_USB0_DEVGRP_ADDR)
4599
4600
#define ALT_USB0_DEV_DIEPTSIZ11_ADDR ALT_USB_DEV_DIEPTSIZ11_ADDR(ALT_USB0_DEVGRP_ADDR)
4601
4602
#define ALT_USB0_DEV_DIEPDMA11_ADDR ALT_USB_DEV_DIEPDMA11_ADDR(ALT_USB0_DEVGRP_ADDR)
4603
4604
#define ALT_USB0_DEV_DTXFSTS11_ADDR ALT_USB_DEV_DTXFSTS11_ADDR(ALT_USB0_DEVGRP_ADDR)
4605
4606
#define ALT_USB0_DEV_DIEPDMAB11_ADDR ALT_USB_DEV_DIEPDMAB11_ADDR(ALT_USB0_DEVGRP_ADDR)
4607
4608
#define ALT_USB0_DEV_DIEPCTL12_ADDR ALT_USB_DEV_DIEPCTL12_ADDR(ALT_USB0_DEVGRP_ADDR)
4609
4610
#define ALT_USB0_DEV_DIEPINT12_ADDR ALT_USB_DEV_DIEPINT12_ADDR(ALT_USB0_DEVGRP_ADDR)
4611
4612
#define ALT_USB0_DEV_DIEPTSIZ12_ADDR ALT_USB_DEV_DIEPTSIZ12_ADDR(ALT_USB0_DEVGRP_ADDR)
4613
4614
#define ALT_USB0_DEV_DIEPDMA12_ADDR ALT_USB_DEV_DIEPDMA12_ADDR(ALT_USB0_DEVGRP_ADDR)
4615
4616
#define ALT_USB0_DEV_DTXFSTS12_ADDR ALT_USB_DEV_DTXFSTS12_ADDR(ALT_USB0_DEVGRP_ADDR)
4617
4618
#define ALT_USB0_DEV_DIEPDMAB12_ADDR ALT_USB_DEV_DIEPDMAB12_ADDR(ALT_USB0_DEVGRP_ADDR)
4619
4620
#define ALT_USB0_DEV_DIEPCTL13_ADDR ALT_USB_DEV_DIEPCTL13_ADDR(ALT_USB0_DEVGRP_ADDR)
4621
4622
#define ALT_USB0_DEV_DIEPINT13_ADDR ALT_USB_DEV_DIEPINT13_ADDR(ALT_USB0_DEVGRP_ADDR)
4623
4624
#define ALT_USB0_DEV_DIEPTSIZ13_ADDR ALT_USB_DEV_DIEPTSIZ13_ADDR(ALT_USB0_DEVGRP_ADDR)
4625
4626
#define ALT_USB0_DEV_DIEPDMA13_ADDR ALT_USB_DEV_DIEPDMA13_ADDR(ALT_USB0_DEVGRP_ADDR)
4627
4628
#define ALT_USB0_DEV_DTXFSTS13_ADDR ALT_USB_DEV_DTXFSTS13_ADDR(ALT_USB0_DEVGRP_ADDR)
4629
4630
#define ALT_USB0_DEV_DIEPDMAB13_ADDR ALT_USB_DEV_DIEPDMAB13_ADDR(ALT_USB0_DEVGRP_ADDR)
4631
4632
#define ALT_USB0_DEV_DIEPCTL14_ADDR ALT_USB_DEV_DIEPCTL14_ADDR(ALT_USB0_DEVGRP_ADDR)
4633
4634
#define ALT_USB0_DEV_DIEPINT14_ADDR ALT_USB_DEV_DIEPINT14_ADDR(ALT_USB0_DEVGRP_ADDR)
4635
4636
#define ALT_USB0_DEV_DIEPTSIZ14_ADDR ALT_USB_DEV_DIEPTSIZ14_ADDR(ALT_USB0_DEVGRP_ADDR)
4637
4638
#define ALT_USB0_DEV_DIEPDMA14_ADDR ALT_USB_DEV_DIEPDMA14_ADDR(ALT_USB0_DEVGRP_ADDR)
4639
4640
#define ALT_USB0_DEV_DTXFSTS14_ADDR ALT_USB_DEV_DTXFSTS14_ADDR(ALT_USB0_DEVGRP_ADDR)
4641
4642
#define ALT_USB0_DEV_DIEPDMAB14_ADDR ALT_USB_DEV_DIEPDMAB14_ADDR(ALT_USB0_DEVGRP_ADDR)
4643
4644
#define ALT_USB0_DEV_DIEPCTL15_ADDR ALT_USB_DEV_DIEPCTL15_ADDR(ALT_USB0_DEVGRP_ADDR)
4645
4646
#define ALT_USB0_DEV_DIEPINT15_ADDR ALT_USB_DEV_DIEPINT15_ADDR(ALT_USB0_DEVGRP_ADDR)
4647
4648
#define ALT_USB0_DEV_DIEPTSIZ15_ADDR ALT_USB_DEV_DIEPTSIZ15_ADDR(ALT_USB0_DEVGRP_ADDR)
4649
4650
#define ALT_USB0_DEV_DIEPDMA15_ADDR ALT_USB_DEV_DIEPDMA15_ADDR(ALT_USB0_DEVGRP_ADDR)
4651
4652
#define ALT_USB0_DEV_DTXFSTS15_ADDR ALT_USB_DEV_DTXFSTS15_ADDR(ALT_USB0_DEVGRP_ADDR)
4653
4654
#define ALT_USB0_DEV_DIEPDMAB15_ADDR ALT_USB_DEV_DIEPDMAB15_ADDR(ALT_USB0_DEVGRP_ADDR)
4655
4656
#define ALT_USB0_DEV_DOEPCTL0_ADDR ALT_USB_DEV_DOEPCTL0_ADDR(ALT_USB0_DEVGRP_ADDR)
4657
4658
#define ALT_USB0_DEV_DOEPINT0_ADDR ALT_USB_DEV_DOEPINT0_ADDR(ALT_USB0_DEVGRP_ADDR)
4659
4660
#define ALT_USB0_DEV_DOEPTSIZ0_ADDR ALT_USB_DEV_DOEPTSIZ0_ADDR(ALT_USB0_DEVGRP_ADDR)
4661
4662
#define ALT_USB0_DEV_DOEPDMA0_ADDR ALT_USB_DEV_DOEPDMA0_ADDR(ALT_USB0_DEVGRP_ADDR)
4663
4664
#define ALT_USB0_DEV_DOEPDMAB0_ADDR ALT_USB_DEV_DOEPDMAB0_ADDR(ALT_USB0_DEVGRP_ADDR)
4665
4666
#define ALT_USB0_DEV_DOEPCTL1_ADDR ALT_USB_DEV_DOEPCTL1_ADDR(ALT_USB0_DEVGRP_ADDR)
4667
4668
#define ALT_USB0_DEV_DOEPINT1_ADDR ALT_USB_DEV_DOEPINT1_ADDR(ALT_USB0_DEVGRP_ADDR)
4669
4670
#define ALT_USB0_DEV_DOEPTSIZ1_ADDR ALT_USB_DEV_DOEPTSIZ1_ADDR(ALT_USB0_DEVGRP_ADDR)
4671
4672
#define ALT_USB0_DEV_DOEPDMA1_ADDR ALT_USB_DEV_DOEPDMA1_ADDR(ALT_USB0_DEVGRP_ADDR)
4673
4674
#define ALT_USB0_DEV_DOEPDMAB1_ADDR ALT_USB_DEV_DOEPDMAB1_ADDR(ALT_USB0_DEVGRP_ADDR)
4675
4676
#define ALT_USB0_DEV_DOEPCTL2_ADDR ALT_USB_DEV_DOEPCTL2_ADDR(ALT_USB0_DEVGRP_ADDR)
4677
4678
#define ALT_USB0_DEV_DOEPINT2_ADDR ALT_USB_DEV_DOEPINT2_ADDR(ALT_USB0_DEVGRP_ADDR)
4679
4680
#define ALT_USB0_DEV_DOEPTSIZ2_ADDR ALT_USB_DEV_DOEPTSIZ2_ADDR(ALT_USB0_DEVGRP_ADDR)
4681
4682
#define ALT_USB0_DEV_DOEPDMA2_ADDR ALT_USB_DEV_DOEPDMA2_ADDR(ALT_USB0_DEVGRP_ADDR)
4683
4684
#define ALT_USB0_DEV_DOEPDMAB2_ADDR ALT_USB_DEV_DOEPDMAB2_ADDR(ALT_USB0_DEVGRP_ADDR)
4685
4686
#define ALT_USB0_DEV_DOEPCTL3_ADDR ALT_USB_DEV_DOEPCTL3_ADDR(ALT_USB0_DEVGRP_ADDR)
4687
4688
#define ALT_USB0_DEV_DOEPINT3_ADDR ALT_USB_DEV_DOEPINT3_ADDR(ALT_USB0_DEVGRP_ADDR)
4689
4690
#define ALT_USB0_DEV_DOEPTSIZ3_ADDR ALT_USB_DEV_DOEPTSIZ3_ADDR(ALT_USB0_DEVGRP_ADDR)
4691
4692
#define ALT_USB0_DEV_DOEPDMA3_ADDR ALT_USB_DEV_DOEPDMA3_ADDR(ALT_USB0_DEVGRP_ADDR)
4693
4694
#define ALT_USB0_DEV_DOEPDMAB3_ADDR ALT_USB_DEV_DOEPDMAB3_ADDR(ALT_USB0_DEVGRP_ADDR)
4695
4696
#define ALT_USB0_DEV_DOEPCTL4_ADDR ALT_USB_DEV_DOEPCTL4_ADDR(ALT_USB0_DEVGRP_ADDR)
4697
4698
#define ALT_USB0_DEV_DOEPINT4_ADDR ALT_USB_DEV_DOEPINT4_ADDR(ALT_USB0_DEVGRP_ADDR)
4699
4700
#define ALT_USB0_DEV_DOEPTSIZ4_ADDR ALT_USB_DEV_DOEPTSIZ4_ADDR(ALT_USB0_DEVGRP_ADDR)
4701
4702
#define ALT_USB0_DEV_DOEPDMA4_ADDR ALT_USB_DEV_DOEPDMA4_ADDR(ALT_USB0_DEVGRP_ADDR)
4703
4704
#define ALT_USB0_DEV_DOEPDMAB4_ADDR ALT_USB_DEV_DOEPDMAB4_ADDR(ALT_USB0_DEVGRP_ADDR)
4705
4706
#define ALT_USB0_DEV_DOEPCTL5_ADDR ALT_USB_DEV_DOEPCTL5_ADDR(ALT_USB0_DEVGRP_ADDR)
4707
4708
#define ALT_USB0_DEV_DOEPINT5_ADDR ALT_USB_DEV_DOEPINT5_ADDR(ALT_USB0_DEVGRP_ADDR)
4709
4710
#define ALT_USB0_DEV_DOEPTSIZ5_ADDR ALT_USB_DEV_DOEPTSIZ5_ADDR(ALT_USB0_DEVGRP_ADDR)
4711
4712
#define ALT_USB0_DEV_DOEPDMA5_ADDR ALT_USB_DEV_DOEPDMA5_ADDR(ALT_USB0_DEVGRP_ADDR)
4713
4714
#define ALT_USB0_DEV_DOEPDMAB5_ADDR ALT_USB_DEV_DOEPDMAB5_ADDR(ALT_USB0_DEVGRP_ADDR)
4715
4716
#define ALT_USB0_DEV_DOEPCTL6_ADDR ALT_USB_DEV_DOEPCTL6_ADDR(ALT_USB0_DEVGRP_ADDR)
4717
4718
#define ALT_USB0_DEV_DOEPINT6_ADDR ALT_USB_DEV_DOEPINT6_ADDR(ALT_USB0_DEVGRP_ADDR)
4719
4720
#define ALT_USB0_DEV_DOEPTSIZ6_ADDR ALT_USB_DEV_DOEPTSIZ6_ADDR(ALT_USB0_DEVGRP_ADDR)
4721
4722
#define ALT_USB0_DEV_DOEPDMA6_ADDR ALT_USB_DEV_DOEPDMA6_ADDR(ALT_USB0_DEVGRP_ADDR)
4723
4724
#define ALT_USB0_DEV_DOEPDMAB6_ADDR ALT_USB_DEV_DOEPDMAB6_ADDR(ALT_USB0_DEVGRP_ADDR)
4725
4726
#define ALT_USB0_DEV_DOEPCTL7_ADDR ALT_USB_DEV_DOEPCTL7_ADDR(ALT_USB0_DEVGRP_ADDR)
4727
4728
#define ALT_USB0_DEV_DOEPINT7_ADDR ALT_USB_DEV_DOEPINT7_ADDR(ALT_USB0_DEVGRP_ADDR)
4729
4730
#define ALT_USB0_DEV_DOEPTSIZ7_ADDR ALT_USB_DEV_DOEPTSIZ7_ADDR(ALT_USB0_DEVGRP_ADDR)
4731
4732
#define ALT_USB0_DEV_DOEPDMA7_ADDR ALT_USB_DEV_DOEPDMA7_ADDR(ALT_USB0_DEVGRP_ADDR)
4733
4734
#define ALT_USB0_DEV_DOEPDMAB7_ADDR ALT_USB_DEV_DOEPDMAB7_ADDR(ALT_USB0_DEVGRP_ADDR)
4735
4736
#define ALT_USB0_DEV_DOEPCTL8_ADDR ALT_USB_DEV_DOEPCTL8_ADDR(ALT_USB0_DEVGRP_ADDR)
4737
4738
#define ALT_USB0_DEV_DOEPINT8_ADDR ALT_USB_DEV_DOEPINT8_ADDR(ALT_USB0_DEVGRP_ADDR)
4739
4740
#define ALT_USB0_DEV_DOEPTSIZ8_ADDR ALT_USB_DEV_DOEPTSIZ8_ADDR(ALT_USB0_DEVGRP_ADDR)
4741
4742
#define ALT_USB0_DEV_DOEPDMA8_ADDR ALT_USB_DEV_DOEPDMA8_ADDR(ALT_USB0_DEVGRP_ADDR)
4743
4744
#define ALT_USB0_DEV_DOEPDMAB8_ADDR ALT_USB_DEV_DOEPDMAB8_ADDR(ALT_USB0_DEVGRP_ADDR)
4745
4746
#define ALT_USB0_DEV_DOEPCTL9_ADDR ALT_USB_DEV_DOEPCTL9_ADDR(ALT_USB0_DEVGRP_ADDR)
4747
4748
#define ALT_USB0_DEV_DOEPINT9_ADDR ALT_USB_DEV_DOEPINT9_ADDR(ALT_USB0_DEVGRP_ADDR)
4749
4750
#define ALT_USB0_DEV_DOEPTSIZ9_ADDR ALT_USB_DEV_DOEPTSIZ9_ADDR(ALT_USB0_DEVGRP_ADDR)
4751
4752
#define ALT_USB0_DEV_DOEPDMA9_ADDR ALT_USB_DEV_DOEPDMA9_ADDR(ALT_USB0_DEVGRP_ADDR)
4753
4754
#define ALT_USB0_DEV_DOEPDMAB9_ADDR ALT_USB_DEV_DOEPDMAB9_ADDR(ALT_USB0_DEVGRP_ADDR)
4755
4756
#define ALT_USB0_DEV_DOEPCTL10_ADDR ALT_USB_DEV_DOEPCTL10_ADDR(ALT_USB0_DEVGRP_ADDR)
4757
4758
#define ALT_USB0_DEV_DOEPINT10_ADDR ALT_USB_DEV_DOEPINT10_ADDR(ALT_USB0_DEVGRP_ADDR)
4759
4760
#define ALT_USB0_DEV_DOEPTSIZ10_ADDR ALT_USB_DEV_DOEPTSIZ10_ADDR(ALT_USB0_DEVGRP_ADDR)
4761
4762
#define ALT_USB0_DEV_DOEPDMA10_ADDR ALT_USB_DEV_DOEPDMA10_ADDR(ALT_USB0_DEVGRP_ADDR)
4763
4764
#define ALT_USB0_DEV_DOEPDMAB10_ADDR ALT_USB_DEV_DOEPDMAB10_ADDR(ALT_USB0_DEVGRP_ADDR)
4765
4766
#define ALT_USB0_DEV_DOEPCTL11_ADDR ALT_USB_DEV_DOEPCTL11_ADDR(ALT_USB0_DEVGRP_ADDR)
4767
4768
#define ALT_USB0_DEV_DOEPINT11_ADDR ALT_USB_DEV_DOEPINT11_ADDR(ALT_USB0_DEVGRP_ADDR)
4769
4770
#define ALT_USB0_DEV_DOEPTSIZ11_ADDR ALT_USB_DEV_DOEPTSIZ11_ADDR(ALT_USB0_DEVGRP_ADDR)
4771
4772
#define ALT_USB0_DEV_DOEPDMA11_ADDR ALT_USB_DEV_DOEPDMA11_ADDR(ALT_USB0_DEVGRP_ADDR)
4773
4774
#define ALT_USB0_DEV_DOEPDMAB11_ADDR ALT_USB_DEV_DOEPDMAB11_ADDR(ALT_USB0_DEVGRP_ADDR)
4775
4776
#define ALT_USB0_DEV_DOEPCTL12_ADDR ALT_USB_DEV_DOEPCTL12_ADDR(ALT_USB0_DEVGRP_ADDR)
4777
4778
#define ALT_USB0_DEV_DOEPINT12_ADDR ALT_USB_DEV_DOEPINT12_ADDR(ALT_USB0_DEVGRP_ADDR)
4779
4780
#define ALT_USB0_DEV_DOEPTSIZ12_ADDR ALT_USB_DEV_DOEPTSIZ12_ADDR(ALT_USB0_DEVGRP_ADDR)
4781
4782
#define ALT_USB0_DEV_DOEPDMA12_ADDR ALT_USB_DEV_DOEPDMA12_ADDR(ALT_USB0_DEVGRP_ADDR)
4783
4784
#define ALT_USB0_DEV_DOEPDMAB12_ADDR ALT_USB_DEV_DOEPDMAB12_ADDR(ALT_USB0_DEVGRP_ADDR)
4785
4786
#define ALT_USB0_DEV_DOEPCTL13_ADDR ALT_USB_DEV_DOEPCTL13_ADDR(ALT_USB0_DEVGRP_ADDR)
4787
4788
#define ALT_USB0_DEV_DOEPINT13_ADDR ALT_USB_DEV_DOEPINT13_ADDR(ALT_USB0_DEVGRP_ADDR)
4789
4790
#define ALT_USB0_DEV_DOEPTSIZ13_ADDR ALT_USB_DEV_DOEPTSIZ13_ADDR(ALT_USB0_DEVGRP_ADDR)
4791
4792
#define ALT_USB0_DEV_DOEPDMA13_ADDR ALT_USB_DEV_DOEPDMA13_ADDR(ALT_USB0_DEVGRP_ADDR)
4793
4794
#define ALT_USB0_DEV_DOEPDMAB13_ADDR ALT_USB_DEV_DOEPDMAB13_ADDR(ALT_USB0_DEVGRP_ADDR)
4795
4796
#define ALT_USB0_DEV_DOEPCTL14_ADDR ALT_USB_DEV_DOEPCTL14_ADDR(ALT_USB0_DEVGRP_ADDR)
4797
4798
#define ALT_USB0_DEV_DOEPINT14_ADDR ALT_USB_DEV_DOEPINT14_ADDR(ALT_USB0_DEVGRP_ADDR)
4799
4800
#define ALT_USB0_DEV_DOEPTSIZ14_ADDR ALT_USB_DEV_DOEPTSIZ14_ADDR(ALT_USB0_DEVGRP_ADDR)
4801
4802
#define ALT_USB0_DEV_DOEPDMA14_ADDR ALT_USB_DEV_DOEPDMA14_ADDR(ALT_USB0_DEVGRP_ADDR)
4803
4804
#define ALT_USB0_DEV_DOEPDMAB14_ADDR ALT_USB_DEV_DOEPDMAB14_ADDR(ALT_USB0_DEVGRP_ADDR)
4805
4806
#define ALT_USB0_DEV_DOEPCTL15_ADDR ALT_USB_DEV_DOEPCTL15_ADDR(ALT_USB0_DEVGRP_ADDR)
4807
4808
#define ALT_USB0_DEV_DOEPINT15_ADDR ALT_USB_DEV_DOEPINT15_ADDR(ALT_USB0_DEVGRP_ADDR)
4809
4810
#define ALT_USB0_DEV_DOEPTSIZ15_ADDR ALT_USB_DEV_DOEPTSIZ15_ADDR(ALT_USB0_DEVGRP_ADDR)
4811
4812
#define ALT_USB0_DEV_DOEPDMA15_ADDR ALT_USB_DEV_DOEPDMA15_ADDR(ALT_USB0_DEVGRP_ADDR)
4813
4814
#define ALT_USB0_DEV_DOEPDMAB15_ADDR ALT_USB_DEV_DOEPDMAB15_ADDR(ALT_USB0_DEVGRP_ADDR)
4815
4816
#define ALT_USB0_DEVGRP_OFST 0xffb00800
4817
4818
#define ALT_USB0_DEVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DEVGRP_OFST))
4819
4820
#define ALT_USB0_DEVGRP_LB_ADDR ALT_USB0_DEVGRP_ADDR
4821
4822
#define ALT_USB0_DEVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DEVGRP_ADDR) + 0x500) - 1))
4823
4833
#define ALT_USB0_PWRCLK_PCGCCTL_ADDR ALT_USB_PWRCLK_PCGCCTL_ADDR(ALT_USB0_PWRCLKGRP_ADDR)
4834
4835
#define ALT_USB0_PWRCLKGRP_OFST 0xffb00e00
4836
4837
#define ALT_USB0_PWRCLKGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_PWRCLKGRP_OFST))
4838
4839
#define ALT_USB0_PWRCLKGRP_LB_ADDR ALT_USB0_PWRCLKGRP_ADDR
4840
4841
#define ALT_USB0_PWRCLKGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_PWRCLKGRP_ADDR) + 0x4) - 1))
4842
4852
#define ALT_USB0_DWC_OTG_DFIFO_0_OFST 0xffb01000
4853
4854
#define ALT_USB0_DWC_OTG_DFIFO_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_0_OFST))
4855
4856
#define ALT_USB0_DWC_OTG_DFIFO_0_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_0_ADDR
4857
4858
#define ALT_USB0_DWC_OTG_DFIFO_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_0_ADDR) + 0x1000) - 1))
4859
4869
#define ALT_USB0_DWC_OTG_DFIFO_1_OFST 0xffb02000
4870
4871
#define ALT_USB0_DWC_OTG_DFIFO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_1_OFST))
4872
4873
#define ALT_USB0_DWC_OTG_DFIFO_1_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_1_ADDR
4874
4875
#define ALT_USB0_DWC_OTG_DFIFO_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_1_ADDR) + 0x1000) - 1))
4876
4886
#define ALT_USB0_DWC_OTG_DFIFO_2_OFST 0xffb03000
4887
4888
#define ALT_USB0_DWC_OTG_DFIFO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_2_OFST))
4889
4890
#define ALT_USB0_DWC_OTG_DFIFO_2_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_2_ADDR
4891
4892
#define ALT_USB0_DWC_OTG_DFIFO_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_2_ADDR) + 0x1000) - 1))
4893
4903
#define ALT_USB0_DWC_OTG_DFIFO_3_OFST 0xffb04000
4904
4905
#define ALT_USB0_DWC_OTG_DFIFO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_3_OFST))
4906
4907
#define ALT_USB0_DWC_OTG_DFIFO_3_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_3_ADDR
4908
4909
#define ALT_USB0_DWC_OTG_DFIFO_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_3_ADDR) + 0x1000) - 1))
4910
4920
#define ALT_USB0_DWC_OTG_DFIFO_4_OFST 0xffb05000
4921
4922
#define ALT_USB0_DWC_OTG_DFIFO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_4_OFST))
4923
4924
#define ALT_USB0_DWC_OTG_DFIFO_4_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_4_ADDR
4925
4926
#define ALT_USB0_DWC_OTG_DFIFO_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_4_ADDR) + 0x1000) - 1))
4927
4937
#define ALT_USB0_DWC_OTG_DFIFO_5_OFST 0xffb06000
4938
4939
#define ALT_USB0_DWC_OTG_DFIFO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_5_OFST))
4940
4941
#define ALT_USB0_DWC_OTG_DFIFO_5_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_5_ADDR
4942
4943
#define ALT_USB0_DWC_OTG_DFIFO_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_5_ADDR) + 0x1000) - 1))
4944
4954
#define ALT_USB0_DWC_OTG_DFIFO_6_OFST 0xffb07000
4955
4956
#define ALT_USB0_DWC_OTG_DFIFO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_6_OFST))
4957
4958
#define ALT_USB0_DWC_OTG_DFIFO_6_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_6_ADDR
4959
4960
#define ALT_USB0_DWC_OTG_DFIFO_6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_6_ADDR) + 0x1000) - 1))
4961
4971
#define ALT_USB0_DWC_OTG_DFIFO_7_OFST 0xffb08000
4972
4973
#define ALT_USB0_DWC_OTG_DFIFO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_7_OFST))
4974
4975
#define ALT_USB0_DWC_OTG_DFIFO_7_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_7_ADDR
4976
4977
#define ALT_USB0_DWC_OTG_DFIFO_7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_7_ADDR) + 0x1000) - 1))
4978
4988
#define ALT_USB0_DWC_OTG_DFIFO_8_OFST 0xffb09000
4989
4990
#define ALT_USB0_DWC_OTG_DFIFO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_8_OFST))
4991
4992
#define ALT_USB0_DWC_OTG_DFIFO_8_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_8_ADDR
4993
4994
#define ALT_USB0_DWC_OTG_DFIFO_8_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_8_ADDR) + 0x1000) - 1))
4995
5005
#define ALT_USB0_DWC_OTG_DFIFO_9_OFST 0xffb0a000
5006
5007
#define ALT_USB0_DWC_OTG_DFIFO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_9_OFST))
5008
5009
#define ALT_USB0_DWC_OTG_DFIFO_9_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_9_ADDR
5010
5011
#define ALT_USB0_DWC_OTG_DFIFO_9_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_9_ADDR) + 0x1000) - 1))
5012
5022
#define ALT_USB0_DWC_OTG_DFIFO_10_OFST 0xffb0b000
5023
5024
#define ALT_USB0_DWC_OTG_DFIFO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_10_OFST))
5025
5026
#define ALT_USB0_DWC_OTG_DFIFO_10_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_10_ADDR
5027
5028
#define ALT_USB0_DWC_OTG_DFIFO_10_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_10_ADDR) + 0x1000) - 1))
5029
5039
#define ALT_USB0_DWC_OTG_DFIFO_11_OFST 0xffb0c000
5040
5041
#define ALT_USB0_DWC_OTG_DFIFO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_11_OFST))
5042
5043
#define ALT_USB0_DWC_OTG_DFIFO_11_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_11_ADDR
5044
5045
#define ALT_USB0_DWC_OTG_DFIFO_11_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_11_ADDR) + 0x1000) - 1))
5046
5056
#define ALT_USB0_DWC_OTG_DFIFO_12_OFST 0xffb0d000
5057
5058
#define ALT_USB0_DWC_OTG_DFIFO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_12_OFST))
5059
5060
#define ALT_USB0_DWC_OTG_DFIFO_12_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_12_ADDR
5061
5062
#define ALT_USB0_DWC_OTG_DFIFO_12_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_12_ADDR) + 0x1000) - 1))
5063
5073
#define ALT_USB0_DWC_OTG_DFIFO_13_OFST 0xffb0e000
5074
5075
#define ALT_USB0_DWC_OTG_DFIFO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_13_OFST))
5076
5077
#define ALT_USB0_DWC_OTG_DFIFO_13_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_13_ADDR
5078
5079
#define ALT_USB0_DWC_OTG_DFIFO_13_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_13_ADDR) + 0x1000) - 1))
5080
5090
#define ALT_USB0_DWC_OTG_DFIFO_14_OFST 0xffb0f000
5091
5092
#define ALT_USB0_DWC_OTG_DFIFO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_14_OFST))
5093
5094
#define ALT_USB0_DWC_OTG_DFIFO_14_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_14_ADDR
5095
5096
#define ALT_USB0_DWC_OTG_DFIFO_14_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_14_ADDR) + 0x1000) - 1))
5097
5107
#define ALT_USB0_DWC_OTG_DFIFO_15_OFST 0xffb10000
5108
5109
#define ALT_USB0_DWC_OTG_DFIFO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_15_OFST))
5110
5111
#define ALT_USB0_DWC_OTG_DFIFO_15_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_15_ADDR
5112
5113
#define ALT_USB0_DWC_OTG_DFIFO_15_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_15_ADDR) + 0x1000) - 1))
5114
5124
#define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST 0xffb20000
5125
5126
#define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST))
5127
5128
#define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_LB_ADDR ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR
5129
5130
#define ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR) + 0x20000) - 1))
5131
5141
#define ALT_USB1_GLOB_GOTGCTL_ADDR ALT_USB_GLOB_GOTGCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
5142
5143
#define ALT_USB1_GLOB_GOTGINT_ADDR ALT_USB_GLOB_GOTGINT_ADDR(ALT_USB1_GLOBGRP_ADDR)
5144
5145
#define ALT_USB1_GLOB_GAHBCFG_ADDR ALT_USB_GLOB_GAHBCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
5146
5147
#define ALT_USB1_GLOB_GUSBCFG_ADDR ALT_USB_GLOB_GUSBCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
5148
5149
#define ALT_USB1_GLOB_GRSTCTL_ADDR ALT_USB_GLOB_GRSTCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
5150
5151
#define ALT_USB1_GLOB_GINTSTS_ADDR ALT_USB_GLOB_GINTSTS_ADDR(ALT_USB1_GLOBGRP_ADDR)
5152
5153
#define ALT_USB1_GLOB_GINTMSK_ADDR ALT_USB_GLOB_GINTMSK_ADDR(ALT_USB1_GLOBGRP_ADDR)
5154
5155
#define ALT_USB1_GLOB_GRXSTSR_ADDR ALT_USB_GLOB_GRXSTSR_ADDR(ALT_USB1_GLOBGRP_ADDR)
5156
5157
#define ALT_USB1_GLOB_GRXSTSP_ADDR ALT_USB_GLOB_GRXSTSP_ADDR(ALT_USB1_GLOBGRP_ADDR)
5158
5159
#define ALT_USB1_GLOB_GRXFSIZ_ADDR ALT_USB_GLOB_GRXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
5160
5161
#define ALT_USB1_GLOB_GNPTXFSIZ_ADDR ALT_USB_GLOB_GNPTXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
5162
5163
#define ALT_USB1_GLOB_GNPTXSTS_ADDR ALT_USB_GLOB_GNPTXSTS_ADDR(ALT_USB1_GLOBGRP_ADDR)
5164
5165
#define ALT_USB1_GLOB_GPVNDCTL_ADDR ALT_USB_GLOB_GPVNDCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
5166
5167
#define ALT_USB1_GLOB_GGPIO_ADDR ALT_USB_GLOB_GGPIO_ADDR(ALT_USB1_GLOBGRP_ADDR)
5168
5169
#define ALT_USB1_GLOB_GUID_ADDR ALT_USB_GLOB_GUID_ADDR(ALT_USB1_GLOBGRP_ADDR)
5170
5171
#define ALT_USB1_GLOB_GSNPSID_ADDR ALT_USB_GLOB_GSNPSID_ADDR(ALT_USB1_GLOBGRP_ADDR)
5172
5173
#define ALT_USB1_GLOB_GHWCFG1_ADDR ALT_USB_GLOB_GHWCFG1_ADDR(ALT_USB1_GLOBGRP_ADDR)
5174
5175
#define ALT_USB1_GLOB_GHWCFG2_ADDR ALT_USB_GLOB_GHWCFG2_ADDR(ALT_USB1_GLOBGRP_ADDR)
5176
5177
#define ALT_USB1_GLOB_GHWCFG3_ADDR ALT_USB_GLOB_GHWCFG3_ADDR(ALT_USB1_GLOBGRP_ADDR)
5178
5179
#define ALT_USB1_GLOB_GHWCFG4_ADDR ALT_USB_GLOB_GHWCFG4_ADDR(ALT_USB1_GLOBGRP_ADDR)
5180
5181
#define ALT_USB1_GLOB_GDFIFOCFG_ADDR ALT_USB_GLOB_GDFIFOCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
5182
5183
#define ALT_USB1_GLOB_HPTXFSIZ_ADDR ALT_USB_GLOB_HPTXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
5184
5185
#define ALT_USB1_GLOB_DIEPTXF1_ADDR ALT_USB_GLOB_DIEPTXF1_ADDR(ALT_USB1_GLOBGRP_ADDR)
5186
5187
#define ALT_USB1_GLOB_DIEPTXF2_ADDR ALT_USB_GLOB_DIEPTXF2_ADDR(ALT_USB1_GLOBGRP_ADDR)
5188
5189
#define ALT_USB1_GLOB_DIEPTXF3_ADDR ALT_USB_GLOB_DIEPTXF3_ADDR(ALT_USB1_GLOBGRP_ADDR)
5190
5191
#define ALT_USB1_GLOB_DIEPTXF4_ADDR ALT_USB_GLOB_DIEPTXF4_ADDR(ALT_USB1_GLOBGRP_ADDR)
5192
5193
#define ALT_USB1_GLOB_DIEPTXF5_ADDR ALT_USB_GLOB_DIEPTXF5_ADDR(ALT_USB1_GLOBGRP_ADDR)
5194
5195
#define ALT_USB1_GLOB_DIEPTXF6_ADDR ALT_USB_GLOB_DIEPTXF6_ADDR(ALT_USB1_GLOBGRP_ADDR)
5196
5197
#define ALT_USB1_GLOB_DIEPTXF7_ADDR ALT_USB_GLOB_DIEPTXF7_ADDR(ALT_USB1_GLOBGRP_ADDR)
5198
5199
#define ALT_USB1_GLOB_DIEPTXF8_ADDR ALT_USB_GLOB_DIEPTXF8_ADDR(ALT_USB1_GLOBGRP_ADDR)
5200
5201
#define ALT_USB1_GLOB_DIEPTXF9_ADDR ALT_USB_GLOB_DIEPTXF9_ADDR(ALT_USB1_GLOBGRP_ADDR)
5202
5203
#define ALT_USB1_GLOB_DIEPTXF10_ADDR ALT_USB_GLOB_DIEPTXF10_ADDR(ALT_USB1_GLOBGRP_ADDR)
5204
5205
#define ALT_USB1_GLOB_DIEPTXF11_ADDR ALT_USB_GLOB_DIEPTXF11_ADDR(ALT_USB1_GLOBGRP_ADDR)
5206
5207
#define ALT_USB1_GLOB_DIEPTXF12_ADDR ALT_USB_GLOB_DIEPTXF12_ADDR(ALT_USB1_GLOBGRP_ADDR)
5208
5209
#define ALT_USB1_GLOB_DIEPTXF13_ADDR ALT_USB_GLOB_DIEPTXF13_ADDR(ALT_USB1_GLOBGRP_ADDR)
5210
5211
#define ALT_USB1_GLOB_DIEPTXF14_ADDR ALT_USB_GLOB_DIEPTXF14_ADDR(ALT_USB1_GLOBGRP_ADDR)
5212
5213
#define ALT_USB1_GLOB_DIEPTXF15_ADDR ALT_USB_GLOB_DIEPTXF15_ADDR(ALT_USB1_GLOBGRP_ADDR)
5214
5215
#define ALT_USB1_GLOBGRP_OFST 0xffb40000
5216
5217
#define ALT_USB1_GLOBGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_GLOBGRP_OFST))
5218
5219
#define ALT_USB1_GLOBGRP_LB_ADDR ALT_USB1_GLOBGRP_ADDR
5220
5221
#define ALT_USB1_GLOBGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_GLOBGRP_ADDR) + 0x140) - 1))
5222
5232
#define ALT_USB1_HOST_HCFG_ADDR ALT_USB_HOST_HCFG_ADDR(ALT_USB1_HOSTGRP_ADDR)
5233
5234
#define ALT_USB1_HOST_HFIR_ADDR ALT_USB_HOST_HFIR_ADDR(ALT_USB1_HOSTGRP_ADDR)
5235
5236
#define ALT_USB1_HOST_HFNUM_ADDR ALT_USB_HOST_HFNUM_ADDR(ALT_USB1_HOSTGRP_ADDR)
5237
5238
#define ALT_USB1_HOST_HPTXSTS_ADDR ALT_USB_HOST_HPTXSTS_ADDR(ALT_USB1_HOSTGRP_ADDR)
5239
5240
#define ALT_USB1_HOST_HAINT_ADDR ALT_USB_HOST_HAINT_ADDR(ALT_USB1_HOSTGRP_ADDR)
5241
5242
#define ALT_USB1_HOST_HAINTMSK_ADDR ALT_USB_HOST_HAINTMSK_ADDR(ALT_USB1_HOSTGRP_ADDR)
5243
5244
#define ALT_USB1_HOST_HFLBADDR_ADDR ALT_USB_HOST_HFLBADDR_ADDR(ALT_USB1_HOSTGRP_ADDR)
5245
5246
#define ALT_USB1_HOST_HPRT_ADDR ALT_USB_HOST_HPRT_ADDR(ALT_USB1_HOSTGRP_ADDR)
5247
5248
#define ALT_USB1_HOST_HCCHAR0_ADDR ALT_USB_HOST_HCCHAR0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5249
5250
#define ALT_USB1_HOST_HCSPLT0_ADDR ALT_USB_HOST_HCSPLT0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5251
5252
#define ALT_USB1_HOST_HCINT0_ADDR ALT_USB_HOST_HCINT0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5253
5254
#define ALT_USB1_HOST_HCINTMSK0_ADDR ALT_USB_HOST_HCINTMSK0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5255
5256
#define ALT_USB1_HOST_HCTSIZ0_ADDR ALT_USB_HOST_HCTSIZ0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5257
5258
#define ALT_USB1_HOST_HCDMA0_ADDR ALT_USB_HOST_HCDMA0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5259
5260
#define ALT_USB1_HOST_HCDMAB0_ADDR ALT_USB_HOST_HCDMAB0_ADDR(ALT_USB1_HOSTGRP_ADDR)
5261
5262
#define ALT_USB1_HOST_HCCHAR1_ADDR ALT_USB_HOST_HCCHAR1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5263
5264
#define ALT_USB1_HOST_HCSPLT1_ADDR ALT_USB_HOST_HCSPLT1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5265
5266
#define ALT_USB1_HOST_HCINT1_ADDR ALT_USB_HOST_HCINT1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5267
5268
#define ALT_USB1_HOST_HCINTMSK1_ADDR ALT_USB_HOST_HCINTMSK1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5269
5270
#define ALT_USB1_HOST_HCTSIZ1_ADDR ALT_USB_HOST_HCTSIZ1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5271
5272
#define ALT_USB1_HOST_HCDMA1_ADDR ALT_USB_HOST_HCDMA1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5273
5274
#define ALT_USB1_HOST_HCDMAB1_ADDR ALT_USB_HOST_HCDMAB1_ADDR(ALT_USB1_HOSTGRP_ADDR)
5275
5276
#define ALT_USB1_HOST_HCCHAR2_ADDR ALT_USB_HOST_HCCHAR2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5277
5278
#define ALT_USB1_HOST_HCSPLT2_ADDR ALT_USB_HOST_HCSPLT2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5279
5280
#define ALT_USB1_HOST_HCINT2_ADDR ALT_USB_HOST_HCINT2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5281
5282
#define ALT_USB1_HOST_HCINTMSK2_ADDR ALT_USB_HOST_HCINTMSK2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5283
5284
#define ALT_USB1_HOST_HCTSIZ2_ADDR ALT_USB_HOST_HCTSIZ2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5285
5286
#define ALT_USB1_HOST_HCDMA2_ADDR ALT_USB_HOST_HCDMA2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5287
5288
#define ALT_USB1_HOST_HCDMAB2_ADDR ALT_USB_HOST_HCDMAB2_ADDR(ALT_USB1_HOSTGRP_ADDR)
5289
5290
#define ALT_USB1_HOST_HCCHAR3_ADDR ALT_USB_HOST_HCCHAR3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5291
5292
#define ALT_USB1_HOST_HCSPLT3_ADDR ALT_USB_HOST_HCSPLT3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5293
5294
#define ALT_USB1_HOST_HCINT3_ADDR ALT_USB_HOST_HCINT3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5295
5296
#define ALT_USB1_HOST_HCINTMSK3_ADDR ALT_USB_HOST_HCINTMSK3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5297
5298
#define ALT_USB1_HOST_HCTSIZ3_ADDR ALT_USB_HOST_HCTSIZ3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5299
5300
#define ALT_USB1_HOST_HCDMA3_ADDR ALT_USB_HOST_HCDMA3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5301
5302
#define ALT_USB1_HOST_HCDMAB3_ADDR ALT_USB_HOST_HCDMAB3_ADDR(ALT_USB1_HOSTGRP_ADDR)
5303
5304
#define ALT_USB1_HOST_HCCHAR4_ADDR ALT_USB_HOST_HCCHAR4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5305
5306
#define ALT_USB1_HOST_HCSPLT4_ADDR ALT_USB_HOST_HCSPLT4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5307
5308
#define ALT_USB1_HOST_HCINT4_ADDR ALT_USB_HOST_HCINT4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5309
5310
#define ALT_USB1_HOST_HCINTMSK4_ADDR ALT_USB_HOST_HCINTMSK4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5311
5312
#define ALT_USB1_HOST_HCTSIZ4_ADDR ALT_USB_HOST_HCTSIZ4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5313
5314
#define ALT_USB1_HOST_HCDMA4_ADDR ALT_USB_HOST_HCDMA4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5315
5316
#define ALT_USB1_HOST_HCDMAB4_ADDR ALT_USB_HOST_HCDMAB4_ADDR(ALT_USB1_HOSTGRP_ADDR)
5317
5318
#define ALT_USB1_HOST_HCCHAR5_ADDR ALT_USB_HOST_HCCHAR5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5319
5320
#define ALT_USB1_HOST_HCSPLT5_ADDR ALT_USB_HOST_HCSPLT5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5321
5322
#define ALT_USB1_HOST_HCINT5_ADDR ALT_USB_HOST_HCINT5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5323
5324
#define ALT_USB1_HOST_HCINTMSK5_ADDR ALT_USB_HOST_HCINTMSK5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5325
5326
#define ALT_USB1_HOST_HCTSIZ5_ADDR ALT_USB_HOST_HCTSIZ5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5327
5328
#define ALT_USB1_HOST_HCDMA5_ADDR ALT_USB_HOST_HCDMA5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5329
5330
#define ALT_USB1_HOST_HCDMAB5_ADDR ALT_USB_HOST_HCDMAB5_ADDR(ALT_USB1_HOSTGRP_ADDR)
5331
5332
#define ALT_USB1_HOST_HCCHAR6_ADDR ALT_USB_HOST_HCCHAR6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5333
5334
#define ALT_USB1_HOST_HCSPLT6_ADDR ALT_USB_HOST_HCSPLT6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5335
5336
#define ALT_USB1_HOST_HCINT6_ADDR ALT_USB_HOST_HCINT6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5337
5338
#define ALT_USB1_HOST_HCINTMSK6_ADDR ALT_USB_HOST_HCINTMSK6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5339
5340
#define ALT_USB1_HOST_HCTSIZ6_ADDR ALT_USB_HOST_HCTSIZ6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5341
5342
#define ALT_USB1_HOST_HCDMA6_ADDR ALT_USB_HOST_HCDMA6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5343
5344
#define ALT_USB1_HOST_HCDMAB6_ADDR ALT_USB_HOST_HCDMAB6_ADDR(ALT_USB1_HOSTGRP_ADDR)
5345
5346
#define ALT_USB1_HOST_HCCHAR7_ADDR ALT_USB_HOST_HCCHAR7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5347
5348
#define ALT_USB1_HOST_HCSPLT7_ADDR ALT_USB_HOST_HCSPLT7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5349
5350
#define ALT_USB1_HOST_HCINT7_ADDR ALT_USB_HOST_HCINT7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5351
5352
#define ALT_USB1_HOST_HCINTMSK7_ADDR ALT_USB_HOST_HCINTMSK7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5353
5354
#define ALT_USB1_HOST_HCTSIZ7_ADDR ALT_USB_HOST_HCTSIZ7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5355
5356
#define ALT_USB1_HOST_HCDMA7_ADDR ALT_USB_HOST_HCDMA7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5357
5358
#define ALT_USB1_HOST_HCDMAB7_ADDR ALT_USB_HOST_HCDMAB7_ADDR(ALT_USB1_HOSTGRP_ADDR)
5359
5360
#define ALT_USB1_HOST_HCCHAR8_ADDR ALT_USB_HOST_HCCHAR8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5361
5362
#define ALT_USB1_HOST_HCSPLT8_ADDR ALT_USB_HOST_HCSPLT8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5363
5364
#define ALT_USB1_HOST_HCINT8_ADDR ALT_USB_HOST_HCINT8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5365
5366
#define ALT_USB1_HOST_HCINTMSK8_ADDR ALT_USB_HOST_HCINTMSK8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5367
5368
#define ALT_USB1_HOST_HCTSIZ8_ADDR ALT_USB_HOST_HCTSIZ8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5369
5370
#define ALT_USB1_HOST_HCDMA8_ADDR ALT_USB_HOST_HCDMA8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5371
5372
#define ALT_USB1_HOST_HCDMAB8_ADDR ALT_USB_HOST_HCDMAB8_ADDR(ALT_USB1_HOSTGRP_ADDR)
5373
5374
#define ALT_USB1_HOST_HCCHAR9_ADDR ALT_USB_HOST_HCCHAR9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5375
5376
#define ALT_USB1_HOST_HCSPLT9_ADDR ALT_USB_HOST_HCSPLT9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5377
5378
#define ALT_USB1_HOST_HCINT9_ADDR ALT_USB_HOST_HCINT9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5379
5380
#define ALT_USB1_HOST_HCINTMSK9_ADDR ALT_USB_HOST_HCINTMSK9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5381
5382
#define ALT_USB1_HOST_HCTSIZ9_ADDR ALT_USB_HOST_HCTSIZ9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5383
5384
#define ALT_USB1_HOST_HCDMA9_ADDR ALT_USB_HOST_HCDMA9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5385
5386
#define ALT_USB1_HOST_HCDMAB9_ADDR ALT_USB_HOST_HCDMAB9_ADDR(ALT_USB1_HOSTGRP_ADDR)
5387
5388
#define ALT_USB1_HOST_HCCHAR10_ADDR ALT_USB_HOST_HCCHAR10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5389
5390
#define ALT_USB1_HOST_HCSPLT10_ADDR ALT_USB_HOST_HCSPLT10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5391
5392
#define ALT_USB1_HOST_HCINT10_ADDR ALT_USB_HOST_HCINT10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5393
5394
#define ALT_USB1_HOST_HCINTMSK10_ADDR ALT_USB_HOST_HCINTMSK10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5395
5396
#define ALT_USB1_HOST_HCTSIZ10_ADDR ALT_USB_HOST_HCTSIZ10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5397
5398
#define ALT_USB1_HOST_HCDMA10_ADDR ALT_USB_HOST_HCDMA10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5399
5400
#define ALT_USB1_HOST_HCDMAB10_ADDR ALT_USB_HOST_HCDMAB10_ADDR(ALT_USB1_HOSTGRP_ADDR)
5401
5402
#define ALT_USB1_HOST_HCCHAR11_ADDR ALT_USB_HOST_HCCHAR11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5403
5404
#define ALT_USB1_HOST_HCSPLT11_ADDR ALT_USB_HOST_HCSPLT11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5405
5406
#define ALT_USB1_HOST_HCINT11_ADDR ALT_USB_HOST_HCINT11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5407
5408
#define ALT_USB1_HOST_HCINTMSK11_ADDR ALT_USB_HOST_HCINTMSK11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5409
5410
#define ALT_USB1_HOST_HCTSIZ11_ADDR ALT_USB_HOST_HCTSIZ11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5411
5412
#define ALT_USB1_HOST_HCDMA11_ADDR ALT_USB_HOST_HCDMA11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5413
5414
#define ALT_USB1_HOST_HCDMAB11_ADDR ALT_USB_HOST_HCDMAB11_ADDR(ALT_USB1_HOSTGRP_ADDR)
5415
5416
#define ALT_USB1_HOST_HCCHAR12_ADDR ALT_USB_HOST_HCCHAR12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5417
5418
#define ALT_USB1_HOST_HCSPLT12_ADDR ALT_USB_HOST_HCSPLT12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5419
5420
#define ALT_USB1_HOST_HCINT12_ADDR ALT_USB_HOST_HCINT12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5421
5422
#define ALT_USB1_HOST_HCINTMSK12_ADDR ALT_USB_HOST_HCINTMSK12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5423
5424
#define ALT_USB1_HOST_HCTSIZ12_ADDR ALT_USB_HOST_HCTSIZ12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5425
5426
#define ALT_USB1_HOST_HCDMA12_ADDR ALT_USB_HOST_HCDMA12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5427
5428
#define ALT_USB1_HOST_HCDMAB12_ADDR ALT_USB_HOST_HCDMAB12_ADDR(ALT_USB1_HOSTGRP_ADDR)
5429
5430
#define ALT_USB1_HOST_HCCHAR13_ADDR ALT_USB_HOST_HCCHAR13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5431
5432
#define ALT_USB1_HOST_HCSPLT13_ADDR ALT_USB_HOST_HCSPLT13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5433
5434
#define ALT_USB1_HOST_HCINT13_ADDR ALT_USB_HOST_HCINT13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5435
5436
#define ALT_USB1_HOST_HCINTMSK13_ADDR ALT_USB_HOST_HCINTMSK13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5437
5438
#define ALT_USB1_HOST_HCTSIZ13_ADDR ALT_USB_HOST_HCTSIZ13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5439
5440
#define ALT_USB1_HOST_HCDMA13_ADDR ALT_USB_HOST_HCDMA13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5441
5442
#define ALT_USB1_HOST_HCDMAB13_ADDR ALT_USB_HOST_HCDMAB13_ADDR(ALT_USB1_HOSTGRP_ADDR)
5443
5444
#define ALT_USB1_HOST_HCCHAR14_ADDR ALT_USB_HOST_HCCHAR14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5445
5446
#define ALT_USB1_HOST_HCSPLT14_ADDR ALT_USB_HOST_HCSPLT14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5447
5448
#define ALT_USB1_HOST_HCINT14_ADDR ALT_USB_HOST_HCINT14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5449
5450
#define ALT_USB1_HOST_HCINTMSK14_ADDR ALT_USB_HOST_HCINTMSK14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5451
5452
#define ALT_USB1_HOST_HCTSIZ14_ADDR ALT_USB_HOST_HCTSIZ14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5453
5454
#define ALT_USB1_HOST_HCDMA14_ADDR ALT_USB_HOST_HCDMA14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5455
5456
#define ALT_USB1_HOST_HCDMAB14_ADDR ALT_USB_HOST_HCDMAB14_ADDR(ALT_USB1_HOSTGRP_ADDR)
5457
5458
#define ALT_USB1_HOST_HCCHAR15_ADDR ALT_USB_HOST_HCCHAR15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5459
5460
#define ALT_USB1_HOST_HCSPLT15_ADDR ALT_USB_HOST_HCSPLT15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5461
5462
#define ALT_USB1_HOST_HCINT15_ADDR ALT_USB_HOST_HCINT15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5463
5464
#define ALT_USB1_HOST_HCINTMSK15_ADDR ALT_USB_HOST_HCINTMSK15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5465
5466
#define ALT_USB1_HOST_HCTSIZ15_ADDR ALT_USB_HOST_HCTSIZ15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5467
5468
#define ALT_USB1_HOST_HCDMA15_ADDR ALT_USB_HOST_HCDMA15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5469
5470
#define ALT_USB1_HOST_HCDMAB15_ADDR ALT_USB_HOST_HCDMAB15_ADDR(ALT_USB1_HOSTGRP_ADDR)
5471
5472
#define ALT_USB1_HOSTGRP_OFST 0xffb40400
5473
5474
#define ALT_USB1_HOSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_HOSTGRP_OFST))
5475
5476
#define ALT_USB1_HOSTGRP_LB_ADDR ALT_USB1_HOSTGRP_ADDR
5477
5478
#define ALT_USB1_HOSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_HOSTGRP_ADDR) + 0x300) - 1))
5479
5489
#define ALT_USB1_DEV_DCFG_ADDR ALT_USB_DEV_DCFG_ADDR(ALT_USB1_DEVGRP_ADDR)
5490
5491
#define ALT_USB1_DEV_DCTL_ADDR ALT_USB_DEV_DCTL_ADDR(ALT_USB1_DEVGRP_ADDR)
5492
5493
#define ALT_USB1_DEV_DSTS_ADDR ALT_USB_DEV_DSTS_ADDR(ALT_USB1_DEVGRP_ADDR)
5494
5495
#define ALT_USB1_DEV_DIEPMSK_ADDR ALT_USB_DEV_DIEPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5496
5497
#define ALT_USB1_DEV_DOEPMSK_ADDR ALT_USB_DEV_DOEPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5498
5499
#define ALT_USB1_DEV_DAINT_ADDR ALT_USB_DEV_DAINT_ADDR(ALT_USB1_DEVGRP_ADDR)
5500
5501
#define ALT_USB1_DEV_DAINTMSK_ADDR ALT_USB_DEV_DAINTMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5502
5503
#define ALT_USB1_DEV_DVBUSDIS_ADDR ALT_USB_DEV_DVBUSDIS_ADDR(ALT_USB1_DEVGRP_ADDR)
5504
5505
#define ALT_USB1_DEV_DVBUSPULSE_ADDR ALT_USB_DEV_DVBUSPULSE_ADDR(ALT_USB1_DEVGRP_ADDR)
5506
5507
#define ALT_USB1_DEV_DTHRCTL_ADDR ALT_USB_DEV_DTHRCTL_ADDR(ALT_USB1_DEVGRP_ADDR)
5508
5509
#define ALT_USB1_DEV_DIEPEMPMSK_ADDR ALT_USB_DEV_DIEPEMPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
5510
5511
#define ALT_USB1_DEV_DIEPCTL0_ADDR ALT_USB_DEV_DIEPCTL0_ADDR(ALT_USB1_DEVGRP_ADDR)
5512
5513
#define ALT_USB1_DEV_DIEPINT0_ADDR ALT_USB_DEV_DIEPINT0_ADDR(ALT_USB1_DEVGRP_ADDR)
5514
5515
#define ALT_USB1_DEV_DIEPTSIZ0_ADDR ALT_USB_DEV_DIEPTSIZ0_ADDR(ALT_USB1_DEVGRP_ADDR)
5516
5517
#define ALT_USB1_DEV_DIEPDMA0_ADDR ALT_USB_DEV_DIEPDMA0_ADDR(ALT_USB1_DEVGRP_ADDR)
5518
5519
#define ALT_USB1_DEV_DTXFSTS0_ADDR ALT_USB_DEV_DTXFSTS0_ADDR(ALT_USB1_DEVGRP_ADDR)
5520
5521
#define ALT_USB1_DEV_DIEPDMAB0_ADDR ALT_USB_DEV_DIEPDMAB0_ADDR(ALT_USB1_DEVGRP_ADDR)
5522
5523
#define ALT_USB1_DEV_DIEPCTL1_ADDR ALT_USB_DEV_DIEPCTL1_ADDR(ALT_USB1_DEVGRP_ADDR)
5524
5525
#define ALT_USB1_DEV_DIEPINT1_ADDR ALT_USB_DEV_DIEPINT1_ADDR(ALT_USB1_DEVGRP_ADDR)
5526
5527
#define ALT_USB1_DEV_DIEPTSIZ1_ADDR ALT_USB_DEV_DIEPTSIZ1_ADDR(ALT_USB1_DEVGRP_ADDR)
5528
5529
#define ALT_USB1_DEV_DIEPDMA1_ADDR ALT_USB_DEV_DIEPDMA1_ADDR(ALT_USB1_DEVGRP_ADDR)
5530
5531
#define ALT_USB1_DEV_DTXFSTS1_ADDR ALT_USB_DEV_DTXFSTS1_ADDR(ALT_USB1_DEVGRP_ADDR)
5532
5533
#define ALT_USB1_DEV_DIEPDMAB1_ADDR ALT_USB_DEV_DIEPDMAB1_ADDR(ALT_USB1_DEVGRP_ADDR)
5534
5535
#define ALT_USB1_DEV_DIEPCTL2_ADDR ALT_USB_DEV_DIEPCTL2_ADDR(ALT_USB1_DEVGRP_ADDR)
5536
5537
#define ALT_USB1_DEV_DIEPINT2_ADDR ALT_USB_DEV_DIEPINT2_ADDR(ALT_USB1_DEVGRP_ADDR)
5538
5539
#define ALT_USB1_DEV_DIEPTSIZ2_ADDR ALT_USB_DEV_DIEPTSIZ2_ADDR(ALT_USB1_DEVGRP_ADDR)
5540
5541
#define ALT_USB1_DEV_DIEPDMA2_ADDR ALT_USB_DEV_DIEPDMA2_ADDR(ALT_USB1_DEVGRP_ADDR)
5542
5543
#define ALT_USB1_DEV_DTXFSTS2_ADDR ALT_USB_DEV_DTXFSTS2_ADDR(ALT_USB1_DEVGRP_ADDR)
5544
5545
#define ALT_USB1_DEV_DIEPDMAB2_ADDR ALT_USB_DEV_DIEPDMAB2_ADDR(ALT_USB1_DEVGRP_ADDR)
5546
5547
#define ALT_USB1_DEV_DIEPCTL3_ADDR ALT_USB_DEV_DIEPCTL3_ADDR(ALT_USB1_DEVGRP_ADDR)
5548
5549
#define ALT_USB1_DEV_DIEPINT3_ADDR ALT_USB_DEV_DIEPINT3_ADDR(ALT_USB1_DEVGRP_ADDR)
5550
5551
#define ALT_USB1_DEV_DIEPTSIZ3_ADDR ALT_USB_DEV_DIEPTSIZ3_ADDR(ALT_USB1_DEVGRP_ADDR)
5552
5553
#define ALT_USB1_DEV_DIEPDMA3_ADDR ALT_USB_DEV_DIEPDMA3_ADDR(ALT_USB1_DEVGRP_ADDR)
5554
5555
#define ALT_USB1_DEV_DTXFSTS3_ADDR ALT_USB_DEV_DTXFSTS3_ADDR(ALT_USB1_DEVGRP_ADDR)
5556
5557
#define ALT_USB1_DEV_DIEPDMAB3_ADDR ALT_USB_DEV_DIEPDMAB3_ADDR(ALT_USB1_DEVGRP_ADDR)
5558
5559
#define ALT_USB1_DEV_DIEPCTL4_ADDR ALT_USB_DEV_DIEPCTL4_ADDR(ALT_USB1_DEVGRP_ADDR)
5560
5561
#define ALT_USB1_DEV_DIEPINT4_ADDR ALT_USB_DEV_DIEPINT4_ADDR(ALT_USB1_DEVGRP_ADDR)
5562
5563
#define ALT_USB1_DEV_DIEPTSIZ4_ADDR ALT_USB_DEV_DIEPTSIZ4_ADDR(ALT_USB1_DEVGRP_ADDR)
5564
5565
#define ALT_USB1_DEV_DIEPDMA4_ADDR ALT_USB_DEV_DIEPDMA4_ADDR(ALT_USB1_DEVGRP_ADDR)
5566
5567
#define ALT_USB1_DEV_DTXFSTS4_ADDR ALT_USB_DEV_DTXFSTS4_ADDR(ALT_USB1_DEVGRP_ADDR)
5568
5569
#define ALT_USB1_DEV_DIEPDMAB4_ADDR ALT_USB_DEV_DIEPDMAB4_ADDR(ALT_USB1_DEVGRP_ADDR)
5570
5571
#define ALT_USB1_DEV_DIEPCTL5_ADDR ALT_USB_DEV_DIEPCTL5_ADDR(ALT_USB1_DEVGRP_ADDR)
5572
5573
#define ALT_USB1_DEV_DIEPINT5_ADDR ALT_USB_DEV_DIEPINT5_ADDR(ALT_USB1_DEVGRP_ADDR)
5574
5575
#define ALT_USB1_DEV_DIEPTSIZ5_ADDR ALT_USB_DEV_DIEPTSIZ5_ADDR(ALT_USB1_DEVGRP_ADDR)
5576
5577
#define ALT_USB1_DEV_DIEPDMA5_ADDR ALT_USB_DEV_DIEPDMA5_ADDR(ALT_USB1_DEVGRP_ADDR)
5578
5579
#define ALT_USB1_DEV_DTXFSTS5_ADDR ALT_USB_DEV_DTXFSTS5_ADDR(ALT_USB1_DEVGRP_ADDR)
5580
5581
#define ALT_USB1_DEV_DIEPDMAB5_ADDR ALT_USB_DEV_DIEPDMAB5_ADDR(ALT_USB1_DEVGRP_ADDR)
5582
5583
#define ALT_USB1_DEV_DIEPCTL6_ADDR ALT_USB_DEV_DIEPCTL6_ADDR(ALT_USB1_DEVGRP_ADDR)
5584
5585
#define ALT_USB1_DEV_DIEPINT6_ADDR ALT_USB_DEV_DIEPINT6_ADDR(ALT_USB1_DEVGRP_ADDR)
5586
5587
#define ALT_USB1_DEV_DIEPTSIZ6_ADDR ALT_USB_DEV_DIEPTSIZ6_ADDR(ALT_USB1_DEVGRP_ADDR)
5588
5589
#define ALT_USB1_DEV_DIEPDMA6_ADDR ALT_USB_DEV_DIEPDMA6_ADDR(ALT_USB1_DEVGRP_ADDR)
5590
5591
#define ALT_USB1_DEV_DTXFSTS6_ADDR ALT_USB_DEV_DTXFSTS6_ADDR(ALT_USB1_DEVGRP_ADDR)
5592
5593
#define ALT_USB1_DEV_DIEPDMAB6_ADDR ALT_USB_DEV_DIEPDMAB6_ADDR(ALT_USB1_DEVGRP_ADDR)
5594
5595
#define ALT_USB1_DEV_DIEPCTL7_ADDR ALT_USB_DEV_DIEPCTL7_ADDR(ALT_USB1_DEVGRP_ADDR)
5596
5597
#define ALT_USB1_DEV_DIEPINT7_ADDR ALT_USB_DEV_DIEPINT7_ADDR(ALT_USB1_DEVGRP_ADDR)
5598
5599
#define ALT_USB1_DEV_DIEPTSIZ7_ADDR ALT_USB_DEV_DIEPTSIZ7_ADDR(ALT_USB1_DEVGRP_ADDR)
5600
5601
#define ALT_USB1_DEV_DIEPDMA7_ADDR ALT_USB_DEV_DIEPDMA7_ADDR(ALT_USB1_DEVGRP_ADDR)
5602
5603
#define ALT_USB1_DEV_DTXFSTS7_ADDR ALT_USB_DEV_DTXFSTS7_ADDR(ALT_USB1_DEVGRP_ADDR)
5604
5605
#define ALT_USB1_DEV_DIEPDMAB7_ADDR ALT_USB_DEV_DIEPDMAB7_ADDR(ALT_USB1_DEVGRP_ADDR)
5606
5607
#define ALT_USB1_DEV_DIEPCTL8_ADDR ALT_USB_DEV_DIEPCTL8_ADDR(ALT_USB1_DEVGRP_ADDR)
5608
5609
#define ALT_USB1_DEV_DIEPINT8_ADDR ALT_USB_DEV_DIEPINT8_ADDR(ALT_USB1_DEVGRP_ADDR)
5610
5611
#define ALT_USB1_DEV_DIEPTSIZ8_ADDR ALT_USB_DEV_DIEPTSIZ8_ADDR(ALT_USB1_DEVGRP_ADDR)
5612
5613
#define ALT_USB1_DEV_DIEPDMA8_ADDR ALT_USB_DEV_DIEPDMA8_ADDR(ALT_USB1_DEVGRP_ADDR)
5614
5615
#define ALT_USB1_DEV_DTXFSTS8_ADDR ALT_USB_DEV_DTXFSTS8_ADDR(ALT_USB1_DEVGRP_ADDR)
5616
5617
#define ALT_USB1_DEV_DIEPDMAB8_ADDR ALT_USB_DEV_DIEPDMAB8_ADDR(ALT_USB1_DEVGRP_ADDR)
5618
5619
#define ALT_USB1_DEV_DIEPCTL9_ADDR ALT_USB_DEV_DIEPCTL9_ADDR(ALT_USB1_DEVGRP_ADDR)
5620
5621
#define ALT_USB1_DEV_DIEPINT9_ADDR ALT_USB_DEV_DIEPINT9_ADDR(ALT_USB1_DEVGRP_ADDR)
5622
5623
#define ALT_USB1_DEV_DIEPTSIZ9_ADDR ALT_USB_DEV_DIEPTSIZ9_ADDR(ALT_USB1_DEVGRP_ADDR)
5624
5625
#define ALT_USB1_DEV_DIEPDMA9_ADDR ALT_USB_DEV_DIEPDMA9_ADDR(ALT_USB1_DEVGRP_ADDR)
5626
5627
#define ALT_USB1_DEV_DTXFSTS9_ADDR ALT_USB_DEV_DTXFSTS9_ADDR(ALT_USB1_DEVGRP_ADDR)
5628
5629
#define ALT_USB1_DEV_DIEPDMAB9_ADDR ALT_USB_DEV_DIEPDMAB9_ADDR(ALT_USB1_DEVGRP_ADDR)
5630
5631
#define ALT_USB1_DEV_DIEPCTL10_ADDR ALT_USB_DEV_DIEPCTL10_ADDR(ALT_USB1_DEVGRP_ADDR)
5632
5633
#define ALT_USB1_DEV_DIEPINT10_ADDR ALT_USB_DEV_DIEPINT10_ADDR(ALT_USB1_DEVGRP_ADDR)
5634
5635
#define ALT_USB1_DEV_DIEPTSIZ10_ADDR ALT_USB_DEV_DIEPTSIZ10_ADDR(ALT_USB1_DEVGRP_ADDR)
5636
5637
#define ALT_USB1_DEV_DIEPDMA10_ADDR ALT_USB_DEV_DIEPDMA10_ADDR(ALT_USB1_DEVGRP_ADDR)
5638
5639
#define ALT_USB1_DEV_DTXFSTS10_ADDR ALT_USB_DEV_DTXFSTS10_ADDR(ALT_USB1_DEVGRP_ADDR)
5640
5641
#define ALT_USB1_DEV_DIEPDMAB10_ADDR ALT_USB_DEV_DIEPDMAB10_ADDR(ALT_USB1_DEVGRP_ADDR)
5642
5643
#define ALT_USB1_DEV_DIEPCTL11_ADDR ALT_USB_DEV_DIEPCTL11_ADDR(ALT_USB1_DEVGRP_ADDR)
5644
5645
#define ALT_USB1_DEV_DIEPINT11_ADDR ALT_USB_DEV_DIEPINT11_ADDR(ALT_USB1_DEVGRP_ADDR)
5646
5647
#define ALT_USB1_DEV_DIEPTSIZ11_ADDR ALT_USB_DEV_DIEPTSIZ11_ADDR(ALT_USB1_DEVGRP_ADDR)
5648
5649
#define ALT_USB1_DEV_DIEPDMA11_ADDR ALT_USB_DEV_DIEPDMA11_ADDR(ALT_USB1_DEVGRP_ADDR)
5650
5651
#define ALT_USB1_DEV_DTXFSTS11_ADDR ALT_USB_DEV_DTXFSTS11_ADDR(ALT_USB1_DEVGRP_ADDR)
5652
5653
#define ALT_USB1_DEV_DIEPDMAB11_ADDR ALT_USB_DEV_DIEPDMAB11_ADDR(ALT_USB1_DEVGRP_ADDR)
5654
5655
#define ALT_USB1_DEV_DIEPCTL12_ADDR ALT_USB_DEV_DIEPCTL12_ADDR(ALT_USB1_DEVGRP_ADDR)
5656
5657
#define ALT_USB1_DEV_DIEPINT12_ADDR ALT_USB_DEV_DIEPINT12_ADDR(ALT_USB1_DEVGRP_ADDR)
5658
5659
#define ALT_USB1_DEV_DIEPTSIZ12_ADDR ALT_USB_DEV_DIEPTSIZ12_ADDR(ALT_USB1_DEVGRP_ADDR)
5660
5661
#define ALT_USB1_DEV_DIEPDMA12_ADDR ALT_USB_DEV_DIEPDMA12_ADDR(ALT_USB1_DEVGRP_ADDR)
5662
5663
#define ALT_USB1_DEV_DTXFSTS12_ADDR ALT_USB_DEV_DTXFSTS12_ADDR(ALT_USB1_DEVGRP_ADDR)
5664
5665
#define ALT_USB1_DEV_DIEPDMAB12_ADDR ALT_USB_DEV_DIEPDMAB12_ADDR(ALT_USB1_DEVGRP_ADDR)
5666
5667
#define ALT_USB1_DEV_DIEPCTL13_ADDR ALT_USB_DEV_DIEPCTL13_ADDR(ALT_USB1_DEVGRP_ADDR)
5668
5669
#define ALT_USB1_DEV_DIEPINT13_ADDR ALT_USB_DEV_DIEPINT13_ADDR(ALT_USB1_DEVGRP_ADDR)
5670
5671
#define ALT_USB1_DEV_DIEPTSIZ13_ADDR ALT_USB_DEV_DIEPTSIZ13_ADDR(ALT_USB1_DEVGRP_ADDR)
5672
5673
#define ALT_USB1_DEV_DIEPDMA13_ADDR ALT_USB_DEV_DIEPDMA13_ADDR(ALT_USB1_DEVGRP_ADDR)
5674
5675
#define ALT_USB1_DEV_DTXFSTS13_ADDR ALT_USB_DEV_DTXFSTS13_ADDR(ALT_USB1_DEVGRP_ADDR)
5676
5677
#define ALT_USB1_DEV_DIEPDMAB13_ADDR ALT_USB_DEV_DIEPDMAB13_ADDR(ALT_USB1_DEVGRP_ADDR)
5678
5679
#define ALT_USB1_DEV_DIEPCTL14_ADDR ALT_USB_DEV_DIEPCTL14_ADDR(ALT_USB1_DEVGRP_ADDR)
5680
5681
#define ALT_USB1_DEV_DIEPINT14_ADDR ALT_USB_DEV_DIEPINT14_ADDR(ALT_USB1_DEVGRP_ADDR)
5682
5683
#define ALT_USB1_DEV_DIEPTSIZ14_ADDR ALT_USB_DEV_DIEPTSIZ14_ADDR(ALT_USB1_DEVGRP_ADDR)
5684
5685
#define ALT_USB1_DEV_DIEPDMA14_ADDR ALT_USB_DEV_DIEPDMA14_ADDR(ALT_USB1_DEVGRP_ADDR)
5686
5687
#define ALT_USB1_DEV_DTXFSTS14_ADDR ALT_USB_DEV_DTXFSTS14_ADDR(ALT_USB1_DEVGRP_ADDR)
5688
5689
#define ALT_USB1_DEV_DIEPDMAB14_ADDR ALT_USB_DEV_DIEPDMAB14_ADDR(ALT_USB1_DEVGRP_ADDR)
5690
5691
#define ALT_USB1_DEV_DIEPCTL15_ADDR ALT_USB_DEV_DIEPCTL15_ADDR(ALT_USB1_DEVGRP_ADDR)
5692
5693
#define ALT_USB1_DEV_DIEPINT15_ADDR ALT_USB_DEV_DIEPINT15_ADDR(ALT_USB1_DEVGRP_ADDR)
5694
5695
#define ALT_USB1_DEV_DIEPTSIZ15_ADDR ALT_USB_DEV_DIEPTSIZ15_ADDR(ALT_USB1_DEVGRP_ADDR)
5696
5697
#define ALT_USB1_DEV_DIEPDMA15_ADDR ALT_USB_DEV_DIEPDMA15_ADDR(ALT_USB1_DEVGRP_ADDR)
5698
5699
#define ALT_USB1_DEV_DTXFSTS15_ADDR ALT_USB_DEV_DTXFSTS15_ADDR(ALT_USB1_DEVGRP_ADDR)
5700
5701
#define ALT_USB1_DEV_DIEPDMAB15_ADDR ALT_USB_DEV_DIEPDMAB15_ADDR(ALT_USB1_DEVGRP_ADDR)
5702
5703
#define ALT_USB1_DEV_DOEPCTL0_ADDR ALT_USB_DEV_DOEPCTL0_ADDR(ALT_USB1_DEVGRP_ADDR)
5704
5705
#define ALT_USB1_DEV_DOEPINT0_ADDR ALT_USB_DEV_DOEPINT0_ADDR(ALT_USB1_DEVGRP_ADDR)
5706
5707
#define ALT_USB1_DEV_DOEPTSIZ0_ADDR ALT_USB_DEV_DOEPTSIZ0_ADDR(ALT_USB1_DEVGRP_ADDR)
5708
5709
#define ALT_USB1_DEV_DOEPDMA0_ADDR ALT_USB_DEV_DOEPDMA0_ADDR(ALT_USB1_DEVGRP_ADDR)
5710
5711
#define ALT_USB1_DEV_DOEPDMAB0_ADDR ALT_USB_DEV_DOEPDMAB0_ADDR(ALT_USB1_DEVGRP_ADDR)
5712
5713
#define ALT_USB1_DEV_DOEPCTL1_ADDR ALT_USB_DEV_DOEPCTL1_ADDR(ALT_USB1_DEVGRP_ADDR)
5714
5715
#define ALT_USB1_DEV_DOEPINT1_ADDR ALT_USB_DEV_DOEPINT1_ADDR(ALT_USB1_DEVGRP_ADDR)
5716
5717
#define ALT_USB1_DEV_DOEPTSIZ1_ADDR ALT_USB_DEV_DOEPTSIZ1_ADDR(ALT_USB1_DEVGRP_ADDR)
5718
5719
#define ALT_USB1_DEV_DOEPDMA1_ADDR ALT_USB_DEV_DOEPDMA1_ADDR(ALT_USB1_DEVGRP_ADDR)
5720
5721
#define ALT_USB1_DEV_DOEPDMAB1_ADDR ALT_USB_DEV_DOEPDMAB1_ADDR(ALT_USB1_DEVGRP_ADDR)
5722
5723
#define ALT_USB1_DEV_DOEPCTL2_ADDR ALT_USB_DEV_DOEPCTL2_ADDR(ALT_USB1_DEVGRP_ADDR)
5724
5725
#define ALT_USB1_DEV_DOEPINT2_ADDR ALT_USB_DEV_DOEPINT2_ADDR(ALT_USB1_DEVGRP_ADDR)
5726
5727
#define ALT_USB1_DEV_DOEPTSIZ2_ADDR ALT_USB_DEV_DOEPTSIZ2_ADDR(ALT_USB1_DEVGRP_ADDR)
5728
5729
#define ALT_USB1_DEV_DOEPDMA2_ADDR ALT_USB_DEV_DOEPDMA2_ADDR(ALT_USB1_DEVGRP_ADDR)
5730
5731
#define ALT_USB1_DEV_DOEPDMAB2_ADDR ALT_USB_DEV_DOEPDMAB2_ADDR(ALT_USB1_DEVGRP_ADDR)
5732
5733
#define ALT_USB1_DEV_DOEPCTL3_ADDR ALT_USB_DEV_DOEPCTL3_ADDR(ALT_USB1_DEVGRP_ADDR)
5734
5735
#define ALT_USB1_DEV_DOEPINT3_ADDR ALT_USB_DEV_DOEPINT3_ADDR(ALT_USB1_DEVGRP_ADDR)
5736
5737
#define ALT_USB1_DEV_DOEPTSIZ3_ADDR ALT_USB_DEV_DOEPTSIZ3_ADDR(ALT_USB1_DEVGRP_ADDR)
5738
5739
#define ALT_USB1_DEV_DOEPDMA3_ADDR ALT_USB_DEV_DOEPDMA3_ADDR(ALT_USB1_DEVGRP_ADDR)
5740
5741
#define ALT_USB1_DEV_DOEPDMAB3_ADDR ALT_USB_DEV_DOEPDMAB3_ADDR(ALT_USB1_DEVGRP_ADDR)
5742
5743
#define ALT_USB1_DEV_DOEPCTL4_ADDR ALT_USB_DEV_DOEPCTL4_ADDR(ALT_USB1_DEVGRP_ADDR)
5744
5745
#define ALT_USB1_DEV_DOEPINT4_ADDR ALT_USB_DEV_DOEPINT4_ADDR(ALT_USB1_DEVGRP_ADDR)
5746
5747
#define ALT_USB1_DEV_DOEPTSIZ4_ADDR ALT_USB_DEV_DOEPTSIZ4_ADDR(ALT_USB1_DEVGRP_ADDR)
5748
5749
#define ALT_USB1_DEV_DOEPDMA4_ADDR ALT_USB_DEV_DOEPDMA4_ADDR(ALT_USB1_DEVGRP_ADDR)
5750
5751
#define ALT_USB1_DEV_DOEPDMAB4_ADDR ALT_USB_DEV_DOEPDMAB4_ADDR(ALT_USB1_DEVGRP_ADDR)
5752
5753
#define ALT_USB1_DEV_DOEPCTL5_ADDR ALT_USB_DEV_DOEPCTL5_ADDR(ALT_USB1_DEVGRP_ADDR)
5754
5755
#define ALT_USB1_DEV_DOEPINT5_ADDR ALT_USB_DEV_DOEPINT5_ADDR(ALT_USB1_DEVGRP_ADDR)
5756
5757
#define ALT_USB1_DEV_DOEPTSIZ5_ADDR ALT_USB_DEV_DOEPTSIZ5_ADDR(ALT_USB1_DEVGRP_ADDR)
5758
5759
#define ALT_USB1_DEV_DOEPDMA5_ADDR ALT_USB_DEV_DOEPDMA5_ADDR(ALT_USB1_DEVGRP_ADDR)
5760
5761
#define ALT_USB1_DEV_DOEPDMAB5_ADDR ALT_USB_DEV_DOEPDMAB5_ADDR(ALT_USB1_DEVGRP_ADDR)
5762
5763
#define ALT_USB1_DEV_DOEPCTL6_ADDR ALT_USB_DEV_DOEPCTL6_ADDR(ALT_USB1_DEVGRP_ADDR)
5764
5765
#define ALT_USB1_DEV_DOEPINT6_ADDR ALT_USB_DEV_DOEPINT6_ADDR(ALT_USB1_DEVGRP_ADDR)
5766
5767
#define ALT_USB1_DEV_DOEPTSIZ6_ADDR ALT_USB_DEV_DOEPTSIZ6_ADDR(ALT_USB1_DEVGRP_ADDR)
5768
5769
#define ALT_USB1_DEV_DOEPDMA6_ADDR ALT_USB_DEV_DOEPDMA6_ADDR(ALT_USB1_DEVGRP_ADDR)
5770
5771
#define ALT_USB1_DEV_DOEPDMAB6_ADDR ALT_USB_DEV_DOEPDMAB6_ADDR(ALT_USB1_DEVGRP_ADDR)
5772
5773
#define ALT_USB1_DEV_DOEPCTL7_ADDR ALT_USB_DEV_DOEPCTL7_ADDR(ALT_USB1_DEVGRP_ADDR)
5774
5775
#define ALT_USB1_DEV_DOEPINT7_ADDR ALT_USB_DEV_DOEPINT7_ADDR(ALT_USB1_DEVGRP_ADDR)
5776
5777
#define ALT_USB1_DEV_DOEPTSIZ7_ADDR ALT_USB_DEV_DOEPTSIZ7_ADDR(ALT_USB1_DEVGRP_ADDR)
5778
5779
#define ALT_USB1_DEV_DOEPDMA7_ADDR ALT_USB_DEV_DOEPDMA7_ADDR(ALT_USB1_DEVGRP_ADDR)
5780
5781
#define ALT_USB1_DEV_DOEPDMAB7_ADDR ALT_USB_DEV_DOEPDMAB7_ADDR(ALT_USB1_DEVGRP_ADDR)
5782
5783
#define ALT_USB1_DEV_DOEPCTL8_ADDR ALT_USB_DEV_DOEPCTL8_ADDR(ALT_USB1_DEVGRP_ADDR)
5784
5785
#define ALT_USB1_DEV_DOEPINT8_ADDR ALT_USB_DEV_DOEPINT8_ADDR(ALT_USB1_DEVGRP_ADDR)
5786
5787
#define ALT_USB1_DEV_DOEPTSIZ8_ADDR ALT_USB_DEV_DOEPTSIZ8_ADDR(ALT_USB1_DEVGRP_ADDR)
5788
5789
#define ALT_USB1_DEV_DOEPDMA8_ADDR ALT_USB_DEV_DOEPDMA8_ADDR(ALT_USB1_DEVGRP_ADDR)
5790
5791
#define ALT_USB1_DEV_DOEPDMAB8_ADDR ALT_USB_DEV_DOEPDMAB8_ADDR(ALT_USB1_DEVGRP_ADDR)
5792
5793
#define ALT_USB1_DEV_DOEPCTL9_ADDR ALT_USB_DEV_DOEPCTL9_ADDR(ALT_USB1_DEVGRP_ADDR)
5794
5795
#define ALT_USB1_DEV_DOEPINT9_ADDR ALT_USB_DEV_DOEPINT9_ADDR(ALT_USB1_DEVGRP_ADDR)
5796
5797
#define ALT_USB1_DEV_DOEPTSIZ9_ADDR ALT_USB_DEV_DOEPTSIZ9_ADDR(ALT_USB1_DEVGRP_ADDR)
5798
5799
#define ALT_USB1_DEV_DOEPDMA9_ADDR ALT_USB_DEV_DOEPDMA9_ADDR(ALT_USB1_DEVGRP_ADDR)
5800
5801
#define ALT_USB1_DEV_DOEPDMAB9_ADDR ALT_USB_DEV_DOEPDMAB9_ADDR(ALT_USB1_DEVGRP_ADDR)
5802
5803
#define ALT_USB1_DEV_DOEPCTL10_ADDR ALT_USB_DEV_DOEPCTL10_ADDR(ALT_USB1_DEVGRP_ADDR)
5804
5805
#define ALT_USB1_DEV_DOEPINT10_ADDR ALT_USB_DEV_DOEPINT10_ADDR(ALT_USB1_DEVGRP_ADDR)
5806
5807
#define ALT_USB1_DEV_DOEPTSIZ10_ADDR ALT_USB_DEV_DOEPTSIZ10_ADDR(ALT_USB1_DEVGRP_ADDR)
5808
5809
#define ALT_USB1_DEV_DOEPDMA10_ADDR ALT_USB_DEV_DOEPDMA10_ADDR(ALT_USB1_DEVGRP_ADDR)
5810
5811
#define ALT_USB1_DEV_DOEPDMAB10_ADDR ALT_USB_DEV_DOEPDMAB10_ADDR(ALT_USB1_DEVGRP_ADDR)
5812
5813
#define ALT_USB1_DEV_DOEPCTL11_ADDR ALT_USB_DEV_DOEPCTL11_ADDR(ALT_USB1_DEVGRP_ADDR)
5814
5815
#define ALT_USB1_DEV_DOEPINT11_ADDR ALT_USB_DEV_DOEPINT11_ADDR(ALT_USB1_DEVGRP_ADDR)
5816
5817
#define ALT_USB1_DEV_DOEPTSIZ11_ADDR ALT_USB_DEV_DOEPTSIZ11_ADDR(ALT_USB1_DEVGRP_ADDR)
5818
5819
#define ALT_USB1_DEV_DOEPDMA11_ADDR ALT_USB_DEV_DOEPDMA11_ADDR(ALT_USB1_DEVGRP_ADDR)
5820
5821
#define ALT_USB1_DEV_DOEPDMAB11_ADDR ALT_USB_DEV_DOEPDMAB11_ADDR(ALT_USB1_DEVGRP_ADDR)
5822
5823
#define ALT_USB1_DEV_DOEPCTL12_ADDR ALT_USB_DEV_DOEPCTL12_ADDR(ALT_USB1_DEVGRP_ADDR)
5824
5825
#define ALT_USB1_DEV_DOEPINT12_ADDR ALT_USB_DEV_DOEPINT12_ADDR(ALT_USB1_DEVGRP_ADDR)
5826
5827
#define ALT_USB1_DEV_DOEPTSIZ12_ADDR ALT_USB_DEV_DOEPTSIZ12_ADDR(ALT_USB1_DEVGRP_ADDR)
5828
5829
#define ALT_USB1_DEV_DOEPDMA12_ADDR ALT_USB_DEV_DOEPDMA12_ADDR(ALT_USB1_DEVGRP_ADDR)
5830
5831
#define ALT_USB1_DEV_DOEPDMAB12_ADDR ALT_USB_DEV_DOEPDMAB12_ADDR(ALT_USB1_DEVGRP_ADDR)
5832
5833
#define ALT_USB1_DEV_DOEPCTL13_ADDR ALT_USB_DEV_DOEPCTL13_ADDR(ALT_USB1_DEVGRP_ADDR)
5834
5835
#define ALT_USB1_DEV_DOEPINT13_ADDR ALT_USB_DEV_DOEPINT13_ADDR(ALT_USB1_DEVGRP_ADDR)
5836
5837
#define ALT_USB1_DEV_DOEPTSIZ13_ADDR ALT_USB_DEV_DOEPTSIZ13_ADDR(ALT_USB1_DEVGRP_ADDR)
5838
5839
#define ALT_USB1_DEV_DOEPDMA13_ADDR ALT_USB_DEV_DOEPDMA13_ADDR(ALT_USB1_DEVGRP_ADDR)
5840
5841
#define ALT_USB1_DEV_DOEPDMAB13_ADDR ALT_USB_DEV_DOEPDMAB13_ADDR(ALT_USB1_DEVGRP_ADDR)
5842
5843
#define ALT_USB1_DEV_DOEPCTL14_ADDR ALT_USB_DEV_DOEPCTL14_ADDR(ALT_USB1_DEVGRP_ADDR)
5844
5845
#define ALT_USB1_DEV_DOEPINT14_ADDR ALT_USB_DEV_DOEPINT14_ADDR(ALT_USB1_DEVGRP_ADDR)
5846
5847
#define ALT_USB1_DEV_DOEPTSIZ14_ADDR ALT_USB_DEV_DOEPTSIZ14_ADDR(ALT_USB1_DEVGRP_ADDR)
5848
5849
#define ALT_USB1_DEV_DOEPDMA14_ADDR ALT_USB_DEV_DOEPDMA14_ADDR(ALT_USB1_DEVGRP_ADDR)
5850
5851
#define ALT_USB1_DEV_DOEPDMAB14_ADDR ALT_USB_DEV_DOEPDMAB14_ADDR(ALT_USB1_DEVGRP_ADDR)
5852
5853
#define ALT_USB1_DEV_DOEPCTL15_ADDR ALT_USB_DEV_DOEPCTL15_ADDR(ALT_USB1_DEVGRP_ADDR)
5854
5855
#define ALT_USB1_DEV_DOEPINT15_ADDR ALT_USB_DEV_DOEPINT15_ADDR(ALT_USB1_DEVGRP_ADDR)
5856
5857
#define ALT_USB1_DEV_DOEPTSIZ15_ADDR ALT_USB_DEV_DOEPTSIZ15_ADDR(ALT_USB1_DEVGRP_ADDR)
5858
5859
#define ALT_USB1_DEV_DOEPDMA15_ADDR ALT_USB_DEV_DOEPDMA15_ADDR(ALT_USB1_DEVGRP_ADDR)
5860
5861
#define ALT_USB1_DEV_DOEPDMAB15_ADDR ALT_USB_DEV_DOEPDMAB15_ADDR(ALT_USB1_DEVGRP_ADDR)
5862
5863
#define ALT_USB1_DEVGRP_OFST 0xffb40800
5864
5865
#define ALT_USB1_DEVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DEVGRP_OFST))
5866
5867
#define ALT_USB1_DEVGRP_LB_ADDR ALT_USB1_DEVGRP_ADDR
5868
5869
#define ALT_USB1_DEVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DEVGRP_ADDR) + 0x500) - 1))
5870
5880
#define ALT_USB1_PWRCLK_PCGCCTL_ADDR ALT_USB_PWRCLK_PCGCCTL_ADDR(ALT_USB1_PWRCLKGRP_ADDR)
5881
5882
#define ALT_USB1_PWRCLKGRP_OFST 0xffb40e00
5883
5884
#define ALT_USB1_PWRCLKGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_PWRCLKGRP_OFST))
5885
5886
#define ALT_USB1_PWRCLKGRP_LB_ADDR ALT_USB1_PWRCLKGRP_ADDR
5887
5888
#define ALT_USB1_PWRCLKGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_PWRCLKGRP_ADDR) + 0x4) - 1))
5889
5899
#define ALT_USB1_DWC_OTG_DFIFO_0_OFST 0xffb41000
5900
5901
#define ALT_USB1_DWC_OTG_DFIFO_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_0_OFST))
5902
5903
#define ALT_USB1_DWC_OTG_DFIFO_0_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_0_ADDR
5904
5905
#define ALT_USB1_DWC_OTG_DFIFO_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_0_ADDR) + 0x1000) - 1))
5906
5916
#define ALT_USB1_DWC_OTG_DFIFO_1_OFST 0xffb42000
5917
5918
#define ALT_USB1_DWC_OTG_DFIFO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_1_OFST))
5919
5920
#define ALT_USB1_DWC_OTG_DFIFO_1_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_1_ADDR
5921
5922
#define ALT_USB1_DWC_OTG_DFIFO_1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_1_ADDR) + 0x1000) - 1))
5923
5933
#define ALT_USB1_DWC_OTG_DFIFO_2_OFST 0xffb43000
5934
5935
#define ALT_USB1_DWC_OTG_DFIFO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_2_OFST))
5936
5937
#define ALT_USB1_DWC_OTG_DFIFO_2_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_2_ADDR
5938
5939
#define ALT_USB1_DWC_OTG_DFIFO_2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_2_ADDR) + 0x1000) - 1))
5940
5950
#define ALT_USB1_DWC_OTG_DFIFO_3_OFST 0xffb44000
5951
5952
#define ALT_USB1_DWC_OTG_DFIFO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_3_OFST))
5953
5954
#define ALT_USB1_DWC_OTG_DFIFO_3_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_3_ADDR
5955
5956
#define ALT_USB1_DWC_OTG_DFIFO_3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_3_ADDR) + 0x1000) - 1))
5957
5967
#define ALT_USB1_DWC_OTG_DFIFO_4_OFST 0xffb45000
5968
5969
#define ALT_USB1_DWC_OTG_DFIFO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_4_OFST))
5970
5971
#define ALT_USB1_DWC_OTG_DFIFO_4_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_4_ADDR
5972
5973
#define ALT_USB1_DWC_OTG_DFIFO_4_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_4_ADDR) + 0x1000) - 1))
5974
5984
#define ALT_USB1_DWC_OTG_DFIFO_5_OFST 0xffb46000
5985
5986
#define ALT_USB1_DWC_OTG_DFIFO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_5_OFST))
5987
5988
#define ALT_USB1_DWC_OTG_DFIFO_5_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_5_ADDR
5989
5990
#define ALT_USB1_DWC_OTG_DFIFO_5_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_5_ADDR) + 0x1000) - 1))
5991
6001
#define ALT_USB1_DWC_OTG_DFIFO_6_OFST 0xffb47000
6002
6003
#define ALT_USB1_DWC_OTG_DFIFO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_6_OFST))
6004
6005
#define ALT_USB1_DWC_OTG_DFIFO_6_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_6_ADDR
6006
6007
#define ALT_USB1_DWC_OTG_DFIFO_6_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_6_ADDR) + 0x1000) - 1))
6008
6018
#define ALT_USB1_DWC_OTG_DFIFO_7_OFST 0xffb48000
6019
6020
#define ALT_USB1_DWC_OTG_DFIFO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_7_OFST))
6021
6022
#define ALT_USB1_DWC_OTG_DFIFO_7_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_7_ADDR
6023
6024
#define ALT_USB1_DWC_OTG_DFIFO_7_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_7_ADDR) + 0x1000) - 1))
6025
6035
#define ALT_USB1_DWC_OTG_DFIFO_8_OFST 0xffb49000
6036
6037
#define ALT_USB1_DWC_OTG_DFIFO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_8_OFST))
6038
6039
#define ALT_USB1_DWC_OTG_DFIFO_8_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_8_ADDR
6040
6041
#define ALT_USB1_DWC_OTG_DFIFO_8_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_8_ADDR) + 0x1000) - 1))
6042
6052
#define ALT_USB1_DWC_OTG_DFIFO_9_OFST 0xffb4a000
6053
6054
#define ALT_USB1_DWC_OTG_DFIFO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_9_OFST))
6055
6056
#define ALT_USB1_DWC_OTG_DFIFO_9_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_9_ADDR
6057
6058
#define ALT_USB1_DWC_OTG_DFIFO_9_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_9_ADDR) + 0x1000) - 1))
6059
6069
#define ALT_USB1_DWC_OTG_DFIFO_10_OFST 0xffb4b000
6070
6071
#define ALT_USB1_DWC_OTG_DFIFO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_10_OFST))
6072
6073
#define ALT_USB1_DWC_OTG_DFIFO_10_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_10_ADDR
6074
6075
#define ALT_USB1_DWC_OTG_DFIFO_10_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_10_ADDR) + 0x1000) - 1))
6076
6086
#define ALT_USB1_DWC_OTG_DFIFO_11_OFST 0xffb4c000
6087
6088
#define ALT_USB1_DWC_OTG_DFIFO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_11_OFST))
6089
6090
#define ALT_USB1_DWC_OTG_DFIFO_11_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_11_ADDR
6091
6092
#define ALT_USB1_DWC_OTG_DFIFO_11_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_11_ADDR) + 0x1000) - 1))
6093
6103
#define ALT_USB1_DWC_OTG_DFIFO_12_OFST 0xffb4d000
6104
6105
#define ALT_USB1_DWC_OTG_DFIFO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_12_OFST))
6106
6107
#define ALT_USB1_DWC_OTG_DFIFO_12_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_12_ADDR
6108
6109
#define ALT_USB1_DWC_OTG_DFIFO_12_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_12_ADDR) + 0x1000) - 1))
6110
6120
#define ALT_USB1_DWC_OTG_DFIFO_13_OFST 0xffb4e000
6121
6122
#define ALT_USB1_DWC_OTG_DFIFO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_13_OFST))
6123
6124
#define ALT_USB1_DWC_OTG_DFIFO_13_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_13_ADDR
6125
6126
#define ALT_USB1_DWC_OTG_DFIFO_13_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_13_ADDR) + 0x1000) - 1))
6127
6137
#define ALT_USB1_DWC_OTG_DFIFO_14_OFST 0xffb4f000
6138
6139
#define ALT_USB1_DWC_OTG_DFIFO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_14_OFST))
6140
6141
#define ALT_USB1_DWC_OTG_DFIFO_14_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_14_ADDR
6142
6143
#define ALT_USB1_DWC_OTG_DFIFO_14_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_14_ADDR) + 0x1000) - 1))
6144
6154
#define ALT_USB1_DWC_OTG_DFIFO_15_OFST 0xffb50000
6155
6156
#define ALT_USB1_DWC_OTG_DFIFO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_15_OFST))
6157
6158
#define ALT_USB1_DWC_OTG_DFIFO_15_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_15_ADDR
6159
6160
#define ALT_USB1_DWC_OTG_DFIFO_15_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_15_ADDR) + 0x1000) - 1))
6161
6171
#define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST 0xffb60000
6172
6173
#define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_OFST))
6174
6175
#define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_LB_ADDR ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR
6176
6177
#define ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DWC_OTG_DFIFO_DIRECT_ACCESS_ADDR) + 0x20000) - 1))
6178
6188
#define ALT_NAND_CFG_DEVICE_RST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_RST_OFST))
6189
6190
#define ALT_NAND_CFG_TFR_SPARE_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TFR_SPARE_REG_OFST))
6191
6192
#define ALT_NAND_CFG_LD_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_LD_WAIT_CNT_OFST))
6193
6194
#define ALT_NAND_CFG_PROGRAM_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PROGRAM_WAIT_CNT_OFST))
6195
6196
#define ALT_NAND_CFG_ERASE_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ERASE_WAIT_CNT_OFST))
6197
6198
#define ALT_NAND_CFG_INT_MON_CYCCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_INT_MON_CYCCNT_OFST))
6199
6200
#define ALT_NAND_CFG_RB_PIN_END_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RB_PIN_END_OFST))
6201
6202
#define ALT_NAND_CFG_MULTIPLANE_OP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_OP_OFST))
6203
6204
#define ALT_NAND_CFG_MULTIPLANE_RD_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_RD_EN_OFST))
6205
6206
#define ALT_NAND_CFG_COPYBACK_DIS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_COPYBACK_DIS_OFST))
6207
6208
#define ALT_NAND_CFG_CACHE_WR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CACHE_WR_EN_OFST))
6209
6210
#define ALT_NAND_CFG_CACHE_RD_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CACHE_RD_EN_OFST))
6211
6212
#define ALT_NAND_CFG_PREFETCH_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PREFETCH_MOD_OFST))
6213
6214
#define ALT_NAND_CFG_CHIP_EN_DONT_CARE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CHIP_EN_DONT_CARE_OFST))
6215
6216
#define ALT_NAND_CFG_ECC_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ECC_EN_OFST))
6217
6218
#define ALT_NAND_CFG_GLOB_INT_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_GLOB_INT_EN_OFST))
6219
6220
#define ALT_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TWHR2_AND_WE_2_RE_OFST))
6221
6222
#define ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_OFST))
6223
6224
#define ALT_NAND_CFG_RE_2_WE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RE_2_WE_OFST))
6225
6226
#define ALT_NAND_CFG_ACC_CLKS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ACC_CLKS_OFST))
6227
6228
#define ALT_NAND_CFG_NUMBER_OF_PLANES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_NUMBER_OF_PLANES_OFST))
6229
6230
#define ALT_NAND_CFG_PAGES_PER_BLOCK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PAGES_PER_BLOCK_OFST))
6231
6232
#define ALT_NAND_CFG_DEVICE_WIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_WIDTH_OFST))
6233
6234
#define ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_OFST))
6235
6236
#define ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_OFST))
6237
6238
#define ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_OFST))
6239
6240
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_OFST))
6241
6242
#define ALT_NAND_CFG_ECC_CORRECTION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ECC_CORRECTION_OFST))
6243
6244
#define ALT_NAND_CFG_RD_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RD_MOD_OFST))
6245
6246
#define ALT_NAND_CFG_WR_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WR_MOD_OFST))
6247
6248
#define ALT_NAND_CFG_COPYBACK_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_COPYBACK_MOD_OFST))
6249
6250
#define ALT_NAND_CFG_RDWR_EN_LO_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RDWR_EN_LO_CNT_OFST))
6251
6252
#define ALT_NAND_CFG_RDWR_EN_HI_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RDWR_EN_HI_CNT_OFST))
6253
6254
#define ALT_NAND_CFG_MAX_RD_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MAX_RD_DELAY_OFST))
6255
6256
#define ALT_NAND_CFG_CS_SETUP_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CS_SETUP_CNT_OFST))
6257
6258
#define ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_OFST))
6259
6260
#define ALT_NAND_CFG_SPARE_AREA_MARKER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_SPARE_AREA_MARKER_OFST))
6261
6262
#define ALT_NAND_CFG_DEVICES_CONNECTED_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICES_CONNECTED_OFST))
6263
6264
#define ALT_NAND_CFG_DIE_MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DIE_MSK_OFST))
6265
6266
#define ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_OFST))
6267
6268
#define ALT_NAND_CFG_WR_PROTECT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WR_PROTECT_OFST))
6269
6270
#define ALT_NAND_CFG_RE_2_RE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RE_2_RE_OFST))
6271
6272
#define ALT_NAND_CFG_POR_RST_COUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_POR_RST_COUNT_OFST))
6273
6274
#define ALT_NAND_CFG_WD_RST_COUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WD_RST_COUNT_OFST))
6275
6276
#define ALT_NAND_CFG_OFST 0xffb80000
6277
6278
#define ALT_NAND_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_CFG_OFST))
6279
6280
#define ALT_NAND_CFG_LB_ADDR ALT_NAND_CFG_ADDR
6281
6282
#define ALT_NAND_CFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_CFG_ADDR) + 0x2b4) - 1))
6283
6293
#define ALT_NAND_PARAM_MANUFACTURER_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_MANUFACTURER_ID_OFST))
6294
6295
#define ALT_NAND_PARAM_DEVICE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_ID_OFST))
6296
6297
#define ALT_NAND_PARAM_DEVICE_PARAM_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_0_OFST))
6298
6299
#define ALT_NAND_PARAM_DEVICE_PARAM_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_1_OFST))
6300
6301
#define ALT_NAND_PARAM_DEVICE_PARAM_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_2_OFST))
6302
6303
#define ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_OFST))
6304
6305
#define ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_OFST))
6306
6307
#define ALT_NAND_PARAM_REVISION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_REVISION_OFST))
6308
6309
#define ALT_NAND_PARAM_ONFI_DEV_FEATURES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_FEATURES_OFST))
6310
6311
#define ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_OFST))
6312
6313
#define ALT_NAND_PARAM_ONFI_TIMING_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_TIMING_MOD_OFST))
6314
6315
#define ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_OFST))
6316
6317
#define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_OFST))
6318
6319
#define ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_OFST))
6320
6321
#define ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_OFST))
6322
6323
#define ALT_NAND_PARAM_FEATURES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_FEATURES_OFST))
6324
6325
#define ALT_NAND_PARAM_OFST 0xffb80300
6326
6327
#define ALT_NAND_PARAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_PARAM_OFST))
6328
6329
#define ALT_NAND_PARAM_LB_ADDR ALT_NAND_PARAM_ADDR
6330
6331
#define ALT_NAND_PARAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + 0xf4) - 1))
6332
6342
#define ALT_NAND_STAT_TFR_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_TFR_MOD_OFST))
6343
6344
#define ALT_NAND_STAT_INTR_STAT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT0_OFST))
6345
6346
#define ALT_NAND_STAT_INTR_EN0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN0_OFST))
6347
6348
#define ALT_NAND_STAT_PAGE_CNT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT0_OFST))
6349
6350
#define ALT_NAND_STAT_ERR_PAGE_ADDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR0_OFST))
6351
6352
#define ALT_NAND_STAT_ERR_BLOCK_ADDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR0_OFST))
6353
6354
#define ALT_NAND_STAT_INTR_STAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT1_OFST))
6355
6356
#define ALT_NAND_STAT_INTR_EN1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN1_OFST))
6357
6358
#define ALT_NAND_STAT_PAGE_CNT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT1_OFST))
6359
6360
#define ALT_NAND_STAT_ERR_PAGE_ADDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR1_OFST))
6361
6362
#define ALT_NAND_STAT_ERR_BLOCK_ADDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR1_OFST))
6363
6364
#define ALT_NAND_STAT_INTR_STAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT2_OFST))
6365
6366
#define ALT_NAND_STAT_INTR_EN2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN2_OFST))
6367
6368
#define ALT_NAND_STAT_PAGE_CNT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT2_OFST))
6369
6370
#define ALT_NAND_STAT_ERR_PAGE_ADDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR2_OFST))
6371
6372
#define ALT_NAND_STAT_ERR_BLOCK_ADDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR2_OFST))
6373
6374
#define ALT_NAND_STAT_INTR_STAT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT3_OFST))
6375
6376
#define ALT_NAND_STAT_INTR_EN3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN3_OFST))
6377
6378
#define ALT_NAND_STAT_PAGE_CNT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT3_OFST))
6379
6380
#define ALT_NAND_STAT_ERR_PAGE_ADDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR3_OFST))
6381
6382
#define ALT_NAND_STAT_ERR_BLOCK_ADDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR3_OFST))
6383
6384
#define ALT_NAND_STAT_OFST 0xffb80400
6385
6386
#define ALT_NAND_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_STAT_OFST))
6387
6388
#define ALT_NAND_STAT_LB_ADDR ALT_NAND_STAT_ADDR
6389
6390
#define ALT_NAND_STAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_STAT_ADDR) + 0x144) - 1))
6391
6401
#define ALT_NAND_ECC_ECCCORINFO_B01_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ECC_ADDR) + ALT_NAND_ECC_ECCCORINFO_B01_OFST))
6402
6403
#define ALT_NAND_ECC_ECCCORINFO_B23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ECC_ADDR) + ALT_NAND_ECC_ECCCORINFO_B23_OFST))
6404
6405
#define ALT_NAND_ECC_OFST 0xffb80650
6406
6407
#define ALT_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_ECC_OFST))
6408
6409
#define ALT_NAND_ECC_LB_ADDR ALT_NAND_ECC_ADDR
6410
6411
#define ALT_NAND_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_ECC_ADDR) + 0x14) - 1))
6412
6422
#define ALT_NAND_DMA_DMA_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_EN_OFST))
6423
6424
#define ALT_NAND_DMA_DMA_INTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_INTR_OFST))
6425
6426
#define ALT_NAND_DMA_DMA_INTR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_INTR_EN_OFST))
6427
6428
#define ALT_NAND_DMA_TGT_ERR_ADDR_LO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_TGT_ERR_ADDR_LO_OFST))
6429
6430
#define ALT_NAND_DMA_TGT_ERR_ADDR_HI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_TGT_ERR_ADDR_HI_OFST))
6431
6432
#define ALT_NAND_DMA_CHNL_ACT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_CHNL_ACT_OFST))
6433
6434
#define ALT_NAND_DMA_FLSH_BURST_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_FLSH_BURST_LEN_OFST))
6435
6436
#define ALT_NAND_DMA_INTRLV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_INTRLV_OFST))
6437
6438
#define ALT_NAND_DMA_RESCAN_BUF_FLAG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_RESCAN_BUF_FLAG_OFST))
6439
6440
#define ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_OFST))
6441
6442
#define ALT_NAND_DMA_LUN_STAT_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_LUN_STAT_CMD_OFST))
6443
6444
#define ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_OFST))
6445
6446
#define ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_CMD_DMA_CHANNEL_ERROR_EN_OFST))
6447
6448
#define ALT_NAND_DMA_OFST 0xffb80700
6449
6450
#define ALT_NAND_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_DMA_OFST))
6451
6452
#define ALT_NAND_DMA_LB_ADDR ALT_NAND_DMA_ADDR
6453
6454
#define ALT_NAND_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_DMA_ADDR) + 0xd4) - 1))
6455
6465
#define ALT_NANDDATA_OFST 0xffb90000
6466
6467
#define ALT_NANDDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NANDDATA_OFST))
6468
6469
#define ALT_NANDDATA_LB_ADDR ALT_NANDDATA_ADDR
6470
6471
#define ALT_NANDDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NANDDATA_ADDR) + 0x10000) - 1))
6472
6482
#define ALT_UART0_RBR_THR_DLL_ADDR ALT_UART_RBR_THR_DLL_ADDR(ALT_UART0_ADDR)
6483
6484
#define ALT_UART0_IER_DLH_ADDR ALT_UART_IER_DLH_ADDR(ALT_UART0_ADDR)
6485
6486
#define ALT_UART0_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART0_ADDR)
6487
6488
#define ALT_UART0_FCR_ADDR ALT_UART_FCR_ADDR(ALT_UART0_ADDR)
6489
6490
#define ALT_UART0_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART0_ADDR)
6491
6492
#define ALT_UART0_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART0_ADDR)
6493
6494
#define ALT_UART0_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART0_ADDR)
6495
6496
#define ALT_UART0_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART0_ADDR)
6497
6498
#define ALT_UART0_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART0_ADDR)
6499
6500
#define ALT_UART0_SRBR_STHR_0_ADDR ALT_UART_SRBR_ADDR(ALT_UART0_ADDR)
6501
6502
#define ALT_UART0_SRBR_STHR_1_ADDR ALT_UART_SRBR_STHR_1_ADDR(ALT_UART0_ADDR)
6503
6504
#define ALT_UART0_SRBR_STHR_2_ADDR ALT_UART_SRBR_STHR_2_ADDR(ALT_UART0_ADDR)
6505
6506
#define ALT_UART0_SRBR_STHR_3_ADDR ALT_UART_SRBR_STHR_3_ADDR(ALT_UART0_ADDR)
6507
6508
#define ALT_UART0_SRBR_STHR_4_ADDR ALT_UART_SRBR_STHR_4_ADDR(ALT_UART0_ADDR)
6509
6510
#define ALT_UART0_SRBR_STHR_5_ADDR ALT_UART_SRBR_STHR_5_ADDR(ALT_UART0_ADDR)
6511
6512
#define ALT_UART0_SRBR_STHR_6_ADDR ALT_UART_SRBR_STHR_6_ADDR(ALT_UART0_ADDR)
6513
6514
#define ALT_UART0_SRBR_STHR_7_ADDR ALT_UART_SRBR_STHR_7_ADDR(ALT_UART0_ADDR)
6515
6516
#define ALT_UART0_SRBR_STHR_8_ADDR ALT_UART_SRBR_STHR_8_ADDR(ALT_UART0_ADDR)
6517
6518
#define ALT_UART0_SRBR_STHR_9_ADDR ALT_UART_SRBR_STHR_9_ADDR(ALT_UART0_ADDR)
6519
6520
#define ALT_UART0_SRBR_STHR_10_ADDR ALT_UART_SRBR_STHR_10_ADDR(ALT_UART0_ADDR)
6521
6522
#define ALT_UART0_SRBR_STHR_11_ADDR ALT_UART_SRBR_STHR_11_ADDR(ALT_UART0_ADDR)
6523
6524
#define ALT_UART0_SRBR_STHR_12_ADDR ALT_UART_SRBR_STHR_12_ADDR(ALT_UART0_ADDR)
6525
6526
#define ALT_UART0_SRBR_STHR_13_ADDR ALT_UART_SRBR_STHR_13_ADDR(ALT_UART0_ADDR)
6527
6528
#define ALT_UART0_SRBR_STHR_14_ADDR ALT_UART_SRBR_STHR_14_ADDR(ALT_UART0_ADDR)
6529
6530
#define ALT_UART0_SRBR_STHR_15_ADDR ALT_UART_SRBR_STHR_15_ADDR(ALT_UART0_ADDR)
6531
6532
#define ALT_UART0_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART0_ADDR)
6533
6534
#define ALT_UART0_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART0_ADDR)
6535
6536
#define ALT_UART0_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART0_ADDR)
6537
6538
#define ALT_UART0_USR_ADDR ALT_UART_USR_ADDR(ALT_UART0_ADDR)
6539
6540
#define ALT_UART0_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART0_ADDR)
6541
6542
#define ALT_UART0_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART0_ADDR)
6543
6544
#define ALT_UART0_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART0_ADDR)
6545
6546
#define ALT_UART0_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART0_ADDR)
6547
6548
#define ALT_UART0_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART0_ADDR)
6549
6550
#define ALT_UART0_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART0_ADDR)
6551
6552
#define ALT_UART0_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART0_ADDR)
6553
6554
#define ALT_UART0_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART0_ADDR)
6555
6556
#define ALT_UART0_STET_ADDR ALT_UART_STET_ADDR(ALT_UART0_ADDR)
6557
6558
#define ALT_UART0_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART0_ADDR)
6559
6560
#define ALT_UART0_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART0_ADDR)
6561
6562
#define ALT_UART0_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART0_ADDR)
6563
6564
#define ALT_UART0_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART0_ADDR)
6565
6566
#define ALT_UART0_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART0_ADDR)
6567
6568
#define ALT_UART0_OFST 0xffc02000
6569
6570
#define ALT_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART0_OFST))
6571
6572
#define ALT_UART0_LB_ADDR ALT_UART0_ADDR
6573
6574
#define ALT_UART0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART0_ADDR) + 0x100) - 1))
6575
6585
#define ALT_UART1_RBR_THR_DLL_ADDR ALT_UART_RBR_THR_DLL_ADDR(ALT_UART1_ADDR)
6586
6587
#define ALT_UART1_IER_DLH_ADDR ALT_UART_IER_DLH_ADDR(ALT_UART1_ADDR)
6588
6589
#define ALT_UART1_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART1_ADDR)
6590
6591
#define ALT_UART1_FCR_ADDR ALT_UART_FCR_ADDR(ALT_UART1_ADDR)
6592
6593
#define ALT_UART1_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART1_ADDR)
6594
6595
#define ALT_UART1_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART1_ADDR)
6596
6597
#define ALT_UART1_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART1_ADDR)
6598
6599
#define ALT_UART1_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART1_ADDR)
6600
6601
#define ALT_UART1_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART1_ADDR)
6602
6603
#define ALT_UART1_SRBR_STHR_0_ADDR ALT_UART_SRBR_ADDR(ALT_UART1_ADDR)
6604
6605
#define ALT_UART1_SRBR_STHR_1_ADDR ALT_UART_SRBR_STHR_1_ADDR(ALT_UART1_ADDR)
6606
6607
#define ALT_UART1_SRBR_STHR_2_ADDR ALT_UART_SRBR_STHR_2_ADDR(ALT_UART1_ADDR)
6608
6609
#define ALT_UART1_SRBR_STHR_3_ADDR ALT_UART_SRBR_STHR_3_ADDR(ALT_UART1_ADDR)
6610
6611
#define ALT_UART1_SRBR_STHR_4_ADDR ALT_UART_SRBR_STHR_4_ADDR(ALT_UART1_ADDR)
6612
6613
#define ALT_UART1_SRBR_STHR_5_ADDR ALT_UART_SRBR_STHR_5_ADDR(ALT_UART1_ADDR)
6614
6615
#define ALT_UART1_SRBR_STHR_6_ADDR ALT_UART_SRBR_STHR_6_ADDR(ALT_UART1_ADDR)
6616
6617
#define ALT_UART1_SRBR_STHR_7_ADDR ALT_UART_SRBR_STHR_7_ADDR(ALT_UART1_ADDR)
6618
6619
#define ALT_UART1_SRBR_STHR_8_ADDR ALT_UART_SRBR_STHR_8_ADDR(ALT_UART1_ADDR)
6620
6621
#define ALT_UART1_SRBR_STHR_9_ADDR ALT_UART_SRBR_STHR_9_ADDR(ALT_UART1_ADDR)
6622
6623
#define ALT_UART1_SRBR_STHR_10_ADDR ALT_UART_SRBR_STHR_10_ADDR(ALT_UART1_ADDR)
6624
6625
#define ALT_UART1_SRBR_STHR_11_ADDR ALT_UART_SRBR_STHR_11_ADDR(ALT_UART1_ADDR)
6626
6627
#define ALT_UART1_SRBR_STHR_12_ADDR ALT_UART_SRBR_STHR_12_ADDR(ALT_UART1_ADDR)
6628
6629
#define ALT_UART1_SRBR_STHR_13_ADDR ALT_UART_SRBR_STHR_13_ADDR(ALT_UART1_ADDR)
6630
6631
#define ALT_UART1_SRBR_STHR_14_ADDR ALT_UART_SRBR_STHR_14_ADDR(ALT_UART1_ADDR)
6632
6633
#define ALT_UART1_SRBR_STHR_15_ADDR ALT_UART_SRBR_STHR_15_ADDR(ALT_UART1_ADDR)
6634
6635
#define ALT_UART1_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART1_ADDR)
6636
6637
#define ALT_UART1_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART1_ADDR)
6638
6639
#define ALT_UART1_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART1_ADDR)
6640
6641
#define ALT_UART1_USR_ADDR ALT_UART_USR_ADDR(ALT_UART1_ADDR)
6642
6643
#define ALT_UART1_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART1_ADDR)
6644
6645
#define ALT_UART1_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART1_ADDR)
6646
6647
#define ALT_UART1_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART1_ADDR)
6648
6649
#define ALT_UART1_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART1_ADDR)
6650
6651
#define ALT_UART1_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART1_ADDR)
6652
6653
#define ALT_UART1_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART1_ADDR)
6654
6655
#define ALT_UART1_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART1_ADDR)
6656
6657
#define ALT_UART1_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART1_ADDR)
6658
6659
#define ALT_UART1_STET_ADDR ALT_UART_STET_ADDR(ALT_UART1_ADDR)
6660
6661
#define ALT_UART1_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART1_ADDR)
6662
6663
#define ALT_UART1_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART1_ADDR)
6664
6665
#define ALT_UART1_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART1_ADDR)
6666
6667
#define ALT_UART1_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART1_ADDR)
6668
6669
#define ALT_UART1_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART1_ADDR)
6670
6671
#define ALT_UART1_OFST 0xffc02100
6672
6673
#define ALT_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART1_OFST))
6674
6675
#define ALT_UART1_LB_ADDR ALT_UART1_ADDR
6676
6677
#define ALT_UART1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART1_ADDR) + 0x100) - 1))
6678
6688
#define ALT_I2C0_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C0_ADDR)
6689
6690
#define ALT_I2C0_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C0_ADDR)
6691
6692
#define ALT_I2C0_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C0_ADDR)
6693
6694
#define ALT_I2C0_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C0_ADDR)
6695
6696
#define ALT_I2C0_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
6697
6698
#define ALT_I2C0_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
6699
6700
#define ALT_I2C0_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
6701
6702
#define ALT_I2C0_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
6703
6704
#define ALT_I2C0_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C0_ADDR)
6705
6706
#define ALT_I2C0_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C0_ADDR)
6707
6708
#define ALT_I2C0_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C0_ADDR)
6709
6710
#define ALT_I2C0_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C0_ADDR)
6711
6712
#define ALT_I2C0_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C0_ADDR)
6713
6714
#define ALT_I2C0_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C0_ADDR)
6715
6716
#define ALT_I2C0_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C0_ADDR)
6717
6718
#define ALT_I2C0_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C0_ADDR)
6719
6720
#define ALT_I2C0_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C0_ADDR)
6721
6722
#define ALT_I2C0_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C0_ADDR)
6723
6724
#define ALT_I2C0_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C0_ADDR)
6725
6726
#define ALT_I2C0_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C0_ADDR)
6727
6728
#define ALT_I2C0_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C0_ADDR)
6729
6730
#define ALT_I2C0_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C0_ADDR)
6731
6732
#define ALT_I2C0_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C0_ADDR)
6733
6734
#define ALT_I2C0_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C0_ADDR)
6735
6736
#define ALT_I2C0_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C0_ADDR)
6737
6738
#define ALT_I2C0_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C0_ADDR)
6739
6740
#define ALT_I2C0_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C0_ADDR)
6741
6742
#define ALT_I2C0_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C0_ADDR)
6743
6744
#define ALT_I2C0_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C0_ADDR)
6745
6746
#define ALT_I2C0_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C0_ADDR)
6747
6748
#define ALT_I2C0_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C0_ADDR)
6749
6750
#define ALT_I2C0_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C0_ADDR)
6751
6752
#define ALT_I2C0_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C0_ADDR)
6753
6754
#define ALT_I2C0_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C0_ADDR)
6755
6756
#define ALT_I2C0_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C0_ADDR)
6757
6758
#define ALT_I2C0_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C0_ADDR)
6759
6760
#define ALT_I2C0_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C0_ADDR)
6761
6762
#define ALT_I2C0_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C0_ADDR)
6763
6764
#define ALT_I2C0_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C0_ADDR)
6765
6766
#define ALT_I2C0_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C0_ADDR)
6767
6768
#define ALT_I2C0_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C0_ADDR)
6769
6770
#define ALT_I2C0_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C0_ADDR)
6771
6772
#define ALT_I2C0_OFST 0xffc02200
6773
6774
#define ALT_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C0_OFST))
6775
6776
#define ALT_I2C0_LB_ADDR ALT_I2C0_ADDR
6777
6778
#define ALT_I2C0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C0_ADDR) + 0x100) - 1))
6779
6789
#define ALT_I2C1_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C1_ADDR)
6790
6791
#define ALT_I2C1_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C1_ADDR)
6792
6793
#define ALT_I2C1_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C1_ADDR)
6794
6795
#define ALT_I2C1_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C1_ADDR)
6796
6797
#define ALT_I2C1_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
6798
6799
#define ALT_I2C1_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
6800
6801
#define ALT_I2C1_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
6802
6803
#define ALT_I2C1_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
6804
6805
#define ALT_I2C1_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C1_ADDR)
6806
6807
#define ALT_I2C1_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C1_ADDR)
6808
6809
#define ALT_I2C1_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C1_ADDR)
6810
6811
#define ALT_I2C1_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C1_ADDR)
6812
6813
#define ALT_I2C1_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C1_ADDR)
6814
6815
#define ALT_I2C1_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C1_ADDR)
6816
6817
#define ALT_I2C1_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C1_ADDR)
6818
6819
#define ALT_I2C1_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C1_ADDR)
6820
6821
#define ALT_I2C1_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C1_ADDR)
6822
6823
#define ALT_I2C1_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C1_ADDR)
6824
6825
#define ALT_I2C1_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C1_ADDR)
6826
6827
#define ALT_I2C1_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C1_ADDR)
6828
6829
#define ALT_I2C1_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C1_ADDR)
6830
6831
#define ALT_I2C1_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C1_ADDR)
6832
6833
#define ALT_I2C1_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C1_ADDR)
6834
6835
#define ALT_I2C1_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C1_ADDR)
6836
6837
#define ALT_I2C1_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C1_ADDR)
6838
6839
#define ALT_I2C1_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C1_ADDR)
6840
6841
#define ALT_I2C1_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C1_ADDR)
6842
6843
#define ALT_I2C1_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C1_ADDR)
6844
6845
#define ALT_I2C1_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C1_ADDR)
6846
6847
#define ALT_I2C1_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C1_ADDR)
6848
6849
#define ALT_I2C1_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C1_ADDR)
6850
6851
#define ALT_I2C1_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C1_ADDR)
6852
6853
#define ALT_I2C1_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C1_ADDR)
6854
6855
#define ALT_I2C1_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C1_ADDR)
6856
6857
#define ALT_I2C1_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C1_ADDR)
6858
6859
#define ALT_I2C1_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C1_ADDR)
6860
6861
#define ALT_I2C1_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C1_ADDR)
6862
6863
#define ALT_I2C1_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C1_ADDR)
6864
6865
#define ALT_I2C1_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C1_ADDR)
6866
6867
#define ALT_I2C1_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C1_ADDR)
6868
6869
#define ALT_I2C1_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C1_ADDR)
6870
6871
#define ALT_I2C1_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C1_ADDR)
6872
6873
#define ALT_I2C1_OFST 0xffc02300
6874
6875
#define ALT_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C1_OFST))
6876
6877
#define ALT_I2C1_LB_ADDR ALT_I2C1_ADDR
6878
6879
#define ALT_I2C1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C1_ADDR) + 0x100) - 1))
6880
6890
#define ALT_I2C_EMAC_0_I2C_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6891
6892
#define ALT_I2C_EMAC_0_I2C_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6893
6894
#define ALT_I2C_EMAC_0_I2C_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6895
6896
#define ALT_I2C_EMAC_0_I2C_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6897
6898
#define ALT_I2C_EMAC_0_I2C_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6899
6900
#define ALT_I2C_EMAC_0_I2C_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6901
6902
#define ALT_I2C_EMAC_0_I2C_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6903
6904
#define ALT_I2C_EMAC_0_I2C_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6905
6906
#define ALT_I2C_EMAC_0_I2C_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6907
6908
#define ALT_I2C_EMAC_0_I2C_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6909
6910
#define ALT_I2C_EMAC_0_I2C_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6911
6912
#define ALT_I2C_EMAC_0_I2C_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6913
6914
#define ALT_I2C_EMAC_0_I2C_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6915
6916
#define ALT_I2C_EMAC_0_I2C_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6917
6918
#define ALT_I2C_EMAC_0_I2C_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6919
6920
#define ALT_I2C_EMAC_0_I2C_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6921
6922
#define ALT_I2C_EMAC_0_I2C_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6923
6924
#define ALT_I2C_EMAC_0_I2C_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6925
6926
#define ALT_I2C_EMAC_0_I2C_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6927
6928
#define ALT_I2C_EMAC_0_I2C_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6929
6930
#define ALT_I2C_EMAC_0_I2C_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6931
6932
#define ALT_I2C_EMAC_0_I2C_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6933
6934
#define ALT_I2C_EMAC_0_I2C_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6935
6936
#define ALT_I2C_EMAC_0_I2C_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6937
6938
#define ALT_I2C_EMAC_0_I2C_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6939
6940
#define ALT_I2C_EMAC_0_I2C_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6941
6942
#define ALT_I2C_EMAC_0_I2C_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6943
6944
#define ALT_I2C_EMAC_0_I2C_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6945
6946
#define ALT_I2C_EMAC_0_I2C_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6947
6948
#define ALT_I2C_EMAC_0_I2C_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6949
6950
#define ALT_I2C_EMAC_0_I2C_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6951
6952
#define ALT_I2C_EMAC_0_I2C_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6953
6954
#define ALT_I2C_EMAC_0_I2C_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6955
6956
#define ALT_I2C_EMAC_0_I2C_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6957
6958
#define ALT_I2C_EMAC_0_I2C_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6959
6960
#define ALT_I2C_EMAC_0_I2C_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6961
6962
#define ALT_I2C_EMAC_0_I2C_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6963
6964
#define ALT_I2C_EMAC_0_I2C_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6965
6966
#define ALT_I2C_EMAC_0_I2C_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6967
6968
#define ALT_I2C_EMAC_0_I2C_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6969
6970
#define ALT_I2C_EMAC_0_I2C_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6971
6972
#define ALT_I2C_EMAC_0_I2C_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C_EMAC_0_I2C_ADDR)
6973
6974
#define ALT_I2C_EMAC_0_I2C_OFST 0xffc02400
6975
6976
#define ALT_I2C_EMAC_0_I2C_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC_0_I2C_OFST))
6977
6978
#define ALT_I2C_EMAC_0_I2C_LB_ADDR ALT_I2C_EMAC_0_I2C_ADDR
6979
6980
#define ALT_I2C_EMAC_0_I2C_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC_0_I2C_ADDR) + 0x100) - 1))
6981
6991
#define ALT_I2C_EMAC_1_I2C_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6992
6993
#define ALT_I2C_EMAC_1_I2C_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6994
6995
#define ALT_I2C_EMAC_1_I2C_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6996
6997
#define ALT_I2C_EMAC_1_I2C_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
6998
6999
#define ALT_I2C_EMAC_1_I2C_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7000
7001
#define ALT_I2C_EMAC_1_I2C_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7002
7003
#define ALT_I2C_EMAC_1_I2C_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7004
7005
#define ALT_I2C_EMAC_1_I2C_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7006
7007
#define ALT_I2C_EMAC_1_I2C_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7008
7009
#define ALT_I2C_EMAC_1_I2C_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7010
7011
#define ALT_I2C_EMAC_1_I2C_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7012
7013
#define ALT_I2C_EMAC_1_I2C_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7014
7015
#define ALT_I2C_EMAC_1_I2C_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7016
7017
#define ALT_I2C_EMAC_1_I2C_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7018
7019
#define ALT_I2C_EMAC_1_I2C_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7020
7021
#define ALT_I2C_EMAC_1_I2C_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7022
7023
#define ALT_I2C_EMAC_1_I2C_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7024
7025
#define ALT_I2C_EMAC_1_I2C_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7026
7027
#define ALT_I2C_EMAC_1_I2C_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7028
7029
#define ALT_I2C_EMAC_1_I2C_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7030
7031
#define ALT_I2C_EMAC_1_I2C_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7032
7033
#define ALT_I2C_EMAC_1_I2C_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7034
7035
#define ALT_I2C_EMAC_1_I2C_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7036
7037
#define ALT_I2C_EMAC_1_I2C_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7038
7039
#define ALT_I2C_EMAC_1_I2C_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7040
7041
#define ALT_I2C_EMAC_1_I2C_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7042
7043
#define ALT_I2C_EMAC_1_I2C_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7044
7045
#define ALT_I2C_EMAC_1_I2C_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7046
7047
#define ALT_I2C_EMAC_1_I2C_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7048
7049
#define ALT_I2C_EMAC_1_I2C_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7050
7051
#define ALT_I2C_EMAC_1_I2C_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7052
7053
#define ALT_I2C_EMAC_1_I2C_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7054
7055
#define ALT_I2C_EMAC_1_I2C_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7056
7057
#define ALT_I2C_EMAC_1_I2C_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7058
7059
#define ALT_I2C_EMAC_1_I2C_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7060
7061
#define ALT_I2C_EMAC_1_I2C_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7062
7063
#define ALT_I2C_EMAC_1_I2C_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7064
7065
#define ALT_I2C_EMAC_1_I2C_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7066
7067
#define ALT_I2C_EMAC_1_I2C_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7068
7069
#define ALT_I2C_EMAC_1_I2C_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7070
7071
#define ALT_I2C_EMAC_1_I2C_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7072
7073
#define ALT_I2C_EMAC_1_I2C_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C_EMAC_1_I2C_ADDR)
7074
7075
#define ALT_I2C_EMAC_1_I2C_OFST 0xffc02500
7076
7077
#define ALT_I2C_EMAC_1_I2C_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC_1_I2C_OFST))
7078
7079
#define ALT_I2C_EMAC_1_I2C_LB_ADDR ALT_I2C_EMAC_1_I2C_ADDR
7080
7081
#define ALT_I2C_EMAC_1_I2C_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC_1_I2C_ADDR) + 0x100) - 1))
7082
7092
#define ALT_I2C_EMAC_2_I2C_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7093
7094
#define ALT_I2C_EMAC_2_I2C_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7095
7096
#define ALT_I2C_EMAC_2_I2C_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7097
7098
#define ALT_I2C_EMAC_2_I2C_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7099
7100
#define ALT_I2C_EMAC_2_I2C_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7101
7102
#define ALT_I2C_EMAC_2_I2C_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7103
7104
#define ALT_I2C_EMAC_2_I2C_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7105
7106
#define ALT_I2C_EMAC_2_I2C_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7107
7108
#define ALT_I2C_EMAC_2_I2C_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7109
7110
#define ALT_I2C_EMAC_2_I2C_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7111
7112
#define ALT_I2C_EMAC_2_I2C_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7113
7114
#define ALT_I2C_EMAC_2_I2C_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7115
7116
#define ALT_I2C_EMAC_2_I2C_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7117
7118
#define ALT_I2C_EMAC_2_I2C_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7119
7120
#define ALT_I2C_EMAC_2_I2C_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7121
7122
#define ALT_I2C_EMAC_2_I2C_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7123
7124
#define ALT_I2C_EMAC_2_I2C_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7125
7126
#define ALT_I2C_EMAC_2_I2C_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7127
7128
#define ALT_I2C_EMAC_2_I2C_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7129
7130
#define ALT_I2C_EMAC_2_I2C_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7131
7132
#define ALT_I2C_EMAC_2_I2C_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7133
7134
#define ALT_I2C_EMAC_2_I2C_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7135
7136
#define ALT_I2C_EMAC_2_I2C_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7137
7138
#define ALT_I2C_EMAC_2_I2C_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7139
7140
#define ALT_I2C_EMAC_2_I2C_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7141
7142
#define ALT_I2C_EMAC_2_I2C_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7143
7144
#define ALT_I2C_EMAC_2_I2C_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7145
7146
#define ALT_I2C_EMAC_2_I2C_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7147
7148
#define ALT_I2C_EMAC_2_I2C_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7149
7150
#define ALT_I2C_EMAC_2_I2C_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7151
7152
#define ALT_I2C_EMAC_2_I2C_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7153
7154
#define ALT_I2C_EMAC_2_I2C_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7155
7156
#define ALT_I2C_EMAC_2_I2C_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7157
7158
#define ALT_I2C_EMAC_2_I2C_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7159
7160
#define ALT_I2C_EMAC_2_I2C_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7161
7162
#define ALT_I2C_EMAC_2_I2C_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7163
7164
#define ALT_I2C_EMAC_2_I2C_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7165
7166
#define ALT_I2C_EMAC_2_I2C_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7167
7168
#define ALT_I2C_EMAC_2_I2C_CLR_RESTART_DET_ADDR ALT_I2C_CLR_RESTART_DET_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7169
7170
#define ALT_I2C_EMAC_2_I2C_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7171
7172
#define ALT_I2C_EMAC_2_I2C_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7173
7174
#define ALT_I2C_EMAC_2_I2C_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C_EMAC_2_I2C_ADDR)
7175
7176
#define ALT_I2C_EMAC_2_I2C_OFST 0xffc02600
7177
7178
#define ALT_I2C_EMAC_2_I2C_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C_EMAC_2_I2C_OFST))
7179
7180
#define ALT_I2C_EMAC_2_I2C_LB_ADDR ALT_I2C_EMAC_2_I2C_ADDR
7181
7182
#define ALT_I2C_EMAC_2_I2C_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C_EMAC_2_I2C_ADDR) + 0x100) - 1))
7183
7193
#define ALT_SPTMR0_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_SPTMR0_ADDR)
7194
7195
#define ALT_SPTMR0_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_SPTMR0_ADDR)
7196
7197
#define ALT_SPTMR0_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_SPTMR0_ADDR)
7198
7199
#define ALT_SPTMR0_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_SPTMR0_ADDR)
7200
7201
#define ALT_SPTMR0_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_SPTMR0_ADDR)
7202
7203
#define ALT_SPTMR0_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_SPTMR0_ADDR)
7204
7205
#define ALT_SPTMR0_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_SPTMR0_ADDR)
7206
7207
#define ALT_SPTMR0_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_SPTMR0_ADDR)
7208
7209
#define ALT_SPTMR0_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_SPTMR0_ADDR)
7210
7211
#define ALT_SPTMR0_OFST 0xffc02700
7212
7213
#define ALT_SPTMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPTMR0_OFST))
7214
7215
#define ALT_SPTMR0_LB_ADDR ALT_SPTMR0_ADDR
7216
7217
#define ALT_SPTMR0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPTMR0_ADDR) + 0x100) - 1))
7218
7228
#define ALT_SPTMR1_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_SPTMR1_ADDR)
7229
7230
#define ALT_SPTMR1_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_SPTMR1_ADDR)
7231
7232
#define ALT_SPTMR1_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_SPTMR1_ADDR)
7233
7234
#define ALT_SPTMR1_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_SPTMR1_ADDR)
7235
7236
#define ALT_SPTMR1_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_SPTMR1_ADDR)
7237
7238
#define ALT_SPTMR1_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_SPTMR1_ADDR)
7239
7240
#define ALT_SPTMR1_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_SPTMR1_ADDR)
7241
7242
#define ALT_SPTMR1_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_SPTMR1_ADDR)
7243
7244
#define ALT_SPTMR1_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_SPTMR1_ADDR)
7245
7246
#define ALT_SPTMR1_OFST 0xffc02800
7247
7248
#define ALT_SPTMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPTMR1_OFST))
7249
7250
#define ALT_SPTMR1_LB_ADDR ALT_SPTMR1_ADDR
7251
7252
#define ALT_SPTMR1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPTMR1_ADDR) + 0x100) - 1))
7253
7263
#define ALT_GPIO0_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO0_ADDR)
7264
7265
#define ALT_GPIO0_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO0_ADDR)
7266
7267
#define ALT_GPIO0_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO0_ADDR)
7268
7269
#define ALT_GPIO0_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO0_ADDR)
7270
7271
#define ALT_GPIO0_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO0_ADDR)
7272
7273
#define ALT_GPIO0_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO0_ADDR)
7274
7275
#define ALT_GPIO0_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO0_ADDR)
7276
7277
#define ALT_GPIO0_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO0_ADDR)
7278
7279
#define ALT_GPIO0_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO0_ADDR)
7280
7281
#define ALT_GPIO0_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO0_ADDR)
7282
7283
#define ALT_GPIO0_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO0_ADDR)
7284
7285
#define ALT_GPIO0_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO0_ADDR)
7286
7287
#define ALT_GPIO0_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO0_ADDR)
7288
7289
#define ALT_GPIO0_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO0_ADDR)
7290
7291
#define ALT_GPIO0_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO0_ADDR)
7292
7293
#define ALT_GPIO0_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO0_ADDR)
7294
7295
#define ALT_GPIO0_OFST 0xffc02900
7296
7297
#define ALT_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO0_OFST))
7298
7299
#define ALT_GPIO0_LB_ADDR ALT_GPIO0_ADDR
7300
7301
#define ALT_GPIO0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO0_ADDR) + 0x80) - 1))
7302
7312
#define ALT_GPIO1_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO1_ADDR)
7313
7314
#define ALT_GPIO1_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO1_ADDR)
7315
7316
#define ALT_GPIO1_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO1_ADDR)
7317
7318
#define ALT_GPIO1_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO1_ADDR)
7319
7320
#define ALT_GPIO1_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO1_ADDR)
7321
7322
#define ALT_GPIO1_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO1_ADDR)
7323
7324
#define ALT_GPIO1_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO1_ADDR)
7325
7326
#define ALT_GPIO1_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO1_ADDR)
7327
7328
#define ALT_GPIO1_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO1_ADDR)
7329
7330
#define ALT_GPIO1_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO1_ADDR)
7331
7332
#define ALT_GPIO1_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO1_ADDR)
7333
7334
#define ALT_GPIO1_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO1_ADDR)
7335
7336
#define ALT_GPIO1_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO1_ADDR)
7337
7338
#define ALT_GPIO1_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO1_ADDR)
7339
7340
#define ALT_GPIO1_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO1_ADDR)
7341
7342
#define ALT_GPIO1_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO1_ADDR)
7343
7344
#define ALT_GPIO1_OFST 0xffc02a00
7345
7346
#define ALT_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO1_OFST))
7347
7348
#define ALT_GPIO1_LB_ADDR ALT_GPIO1_ADDR
7349
7350
#define ALT_GPIO1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO1_ADDR) + 0x80) - 1))
7351
7361
#define ALT_GPIO_2_GPIO_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO_2_GPIO_ADDR)
7362
7363
#define ALT_GPIO_2_GPIO_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO_2_GPIO_ADDR)
7364
7365
#define ALT_GPIO_2_GPIO_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO_2_GPIO_ADDR)
7366
7367
#define ALT_GPIO_2_GPIO_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO_2_GPIO_ADDR)
7368
7369
#define ALT_GPIO_2_GPIO_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO_2_GPIO_ADDR)
7370
7371
#define ALT_GPIO_2_GPIO_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO_2_GPIO_ADDR)
7372
7373
#define ALT_GPIO_2_GPIO_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO_2_GPIO_ADDR)
7374
7375
#define ALT_GPIO_2_GPIO_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO_2_GPIO_ADDR)
7376
7377
#define ALT_GPIO_2_GPIO_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO_2_GPIO_ADDR)
7378
7379
#define ALT_GPIO_2_GPIO_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO_2_GPIO_ADDR)
7380
7381
#define ALT_GPIO_2_GPIO_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO_2_GPIO_ADDR)
7382
7383
#define ALT_GPIO_2_GPIO_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO_2_GPIO_ADDR)
7384
7385
#define ALT_GPIO_2_GPIO_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO_2_GPIO_ADDR)
7386
7387
#define ALT_GPIO_2_GPIO_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO_2_GPIO_ADDR)
7388
7389
#define ALT_GPIO_2_GPIO_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO_2_GPIO_ADDR)
7390
7391
#define ALT_GPIO_2_GPIO_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO_2_GPIO_ADDR)
7392
7393
#define ALT_GPIO_2_GPIO_OFST 0xffc02b00
7394
7395
#define ALT_GPIO_2_GPIO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO_2_GPIO_OFST))
7396
7397
#define ALT_GPIO_2_GPIO_LB_ADDR ALT_GPIO_2_GPIO_ADDR
7398
7399
#define ALT_GPIO_2_GPIO_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO_2_GPIO_ADDR) + 0x80) - 1))
7400
7410
#define ALT_IO48_HMC_MMR_DBGCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG0_OFST))
7411
7412
#define ALT_IO48_HMC_MMR_DBGCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG1_OFST))
7413
7414
#define ALT_IO48_HMC_MMR_DBGCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG2_OFST))
7415
7416
#define ALT_IO48_HMC_MMR_DBGCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG3_OFST))
7417
7418
#define ALT_IO48_HMC_MMR_DBGCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG4_OFST))
7419
7420
#define ALT_IO48_HMC_MMR_DBGCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG5_OFST))
7421
7422
#define ALT_IO48_HMC_MMR_DBGCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG6_OFST))
7423
7424
#define ALT_IO48_HMC_MMR_RESERVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE0_OFST))
7425
7426
#define ALT_IO48_HMC_MMR_RESERVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE1_OFST))
7427
7428
#define ALT_IO48_HMC_MMR_RESERVE2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE2_OFST))
7429
7430
#define ALT_IO48_HMC_MMR_CTLCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG0_OFST))
7431
7432
#define ALT_IO48_HMC_MMR_CTLCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG1_OFST))
7433
7434
#define ALT_IO48_HMC_MMR_CTLCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG2_OFST))
7435
7436
#define ALT_IO48_HMC_MMR_CTLCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG3_OFST))
7437
7438
#define ALT_IO48_HMC_MMR_CTLCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG4_OFST))
7439
7440
#define ALT_IO48_HMC_MMR_CTLCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG5_OFST))
7441
7442
#define ALT_IO48_HMC_MMR_CTLCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG6_OFST))
7443
7444
#define ALT_IO48_HMC_MMR_CTLCFG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG7_OFST))
7445
7446
#define ALT_IO48_HMC_MMR_CTLCFG8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG8_OFST))
7447
7448
#define ALT_IO48_HMC_MMR_CTLCFG9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG9_OFST))
7449
7450
#define ALT_IO48_HMC_MMR_DRAMTIMING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMTIMING0_OFST))
7451
7452
#define ALT_IO48_HMC_MMR_DRAMODT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT0_OFST))
7453
7454
#define ALT_IO48_HMC_MMR_DRAMODT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT1_OFST))
7455
7456
#define ALT_IO48_HMC_MMR_SBCFG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG0_OFST))
7457
7458
#define ALT_IO48_HMC_MMR_SBCFG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG1_OFST))
7459
7460
#define ALT_IO48_HMC_MMR_SBCFG2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG2_OFST))
7461
7462
#define ALT_IO48_HMC_MMR_SBCFG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG3_OFST))
7463
7464
#define ALT_IO48_HMC_MMR_SBCFG4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG4_OFST))
7465
7466
#define ALT_IO48_HMC_MMR_SBCFG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG5_OFST))
7467
7468
#define ALT_IO48_HMC_MMR_SBCFG6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG6_OFST))
7469
7470
#define ALT_IO48_HMC_MMR_SBCFG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG7_OFST))
7471
7472
#define ALT_IO48_HMC_MMR_CALTIMING0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING0_OFST))
7473
7474
#define ALT_IO48_HMC_MMR_CALTIMING1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING1_OFST))
7475
7476
#define ALT_IO48_HMC_MMR_CALTIMING2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING2_OFST))
7477
7478
#define ALT_IO48_HMC_MMR_CALTIMING3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING3_OFST))
7479
7480
#define ALT_IO48_HMC_MMR_CALTIMING4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING4_OFST))
7481
7482
#define ALT_IO48_HMC_MMR_CALTIMING5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING5_OFST))
7483
7484
#define ALT_IO48_HMC_MMR_CALTIMING6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING6_OFST))
7485
7486
#define ALT_IO48_HMC_MMR_CALTIMING7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING7_OFST))
7487
7488
#define ALT_IO48_HMC_MMR_CALTIMING8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING8_OFST))
7489
7490
#define ALT_IO48_HMC_MMR_CALTIMING9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING9_OFST))
7491
7492
#define ALT_IO48_HMC_MMR_CALTIMING10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING10_OFST))
7493
7494
#define ALT_IO48_HMC_MMR_DRAMADDRW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMADDRW_OFST))
7495
7496
#define ALT_IO48_HMC_MMR_SIDEBAND0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND0_OFST))
7497
7498
#define ALT_IO48_HMC_MMR_SIDEBAND1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND1_OFST))
7499
7500
#define ALT_IO48_HMC_MMR_SIDEBAND2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND2_OFST))
7501
7502
#define ALT_IO48_HMC_MMR_SIDEBAND3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND3_OFST))
7503
7504
#define ALT_IO48_HMC_MMR_SIDEBAND4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND4_OFST))
7505
7506
#define ALT_IO48_HMC_MMR_SIDEBAND5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND5_OFST))
7507
7508
#define ALT_IO48_HMC_MMR_SIDEBAND6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND6_OFST))
7509
7510
#define ALT_IO48_HMC_MMR_SIDEBAND7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND7_OFST))
7511
7512
#define ALT_IO48_HMC_MMR_SIDEBAND8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND8_OFST))
7513
7514
#define ALT_IO48_HMC_MMR_SIDEBAND9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND9_OFST))
7515
7516
#define ALT_IO48_HMC_MMR_SIDEBAND10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND10_OFST))
7517
7518
#define ALT_IO48_HMC_MMR_SIDEBAND11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND11_OFST))
7519
7520
#define ALT_IO48_HMC_MMR_SIDEBAND12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND12_OFST))
7521
7522
#define ALT_IO48_HMC_MMR_SIDEBAND13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND13_OFST))
7523
7524
#define ALT_IO48_HMC_MMR_SIDEBAND14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND14_OFST))
7525
7526
#define ALT_IO48_HMC_MMR_SIDEBAND15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND15_OFST))
7527
7528
#define ALT_IO48_HMC_MMR_DRAMSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMSTS_OFST))
7529
7530
#define ALT_IO48_HMC_MMR_DBGDONE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGDONE_OFST))
7531
7532
#define ALT_IO48_HMC_MMR_DBGSIGNALS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGSIGNALS_OFST))
7533
7534
#define ALT_IO48_HMC_MMR_DBGRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGRST_OFST))
7535
7536
#define ALT_IO48_HMC_MMR_DBGMATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGMATCH_OFST))
7537
7538
#define ALT_IO48_HMC_MMR_CNTR0MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MSK_OFST))
7539
7540
#define ALT_IO48_HMC_MMR_CNTR1MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MSK_OFST))
7541
7542
#define ALT_IO48_HMC_MMR_CNTR0MATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MATCH_OFST))
7543
7544
#define ALT_IO48_HMC_MMR_CNTR1MATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MATCH_OFST))
7545
7546
#define ALT_IO48_HMC_MMR_NIOSRESERVE0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE0_OFST))
7547
7548
#define ALT_IO48_HMC_MMR_NIOSRESERVE1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE1_OFST))
7549
7550
#define ALT_IO48_HMC_MMR_NIOSRESERVE2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE2_OFST))
7551
7552
#define ALT_IO48_HMC_MMR_OFST 0xffcfa000
7553
7554
#define ALT_IO48_HMC_MMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_IO48_HMC_MMR_OFST))
7555
7556
#define ALT_IO48_HMC_MMR_LB_ADDR ALT_IO48_HMC_MMR_ADDR
7557
7558
#define ALT_IO48_HMC_MMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + 0x1000) - 1))
7559
7569
#define ALT_ECC_HMC_OCP_IP_REV_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_IP_REV_ID_OFST))
7570
7571
#define ALT_ECC_HMC_OCP_DDRIOCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DDRIOCTL_OFST))
7572
7573
#define ALT_ECC_HMC_OCP_DDRCALSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DDRCALSTAT_OFST))
7574
7575
#define ALT_ECC_HMC_OCP_MPR_0BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_0BEAT1_OFST))
7576
7577
#define ALT_ECC_HMC_OCP_MPR_1BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_1BEAT1_OFST))
7578
7579
#define ALT_ECC_HMC_OCP_MPR_2BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_2BEAT1_OFST))
7580
7581
#define ALT_ECC_HMC_OCP_MPR_3BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_3BEAT1_OFST))
7582
7583
#define ALT_ECC_HMC_OCP_MPR_4BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_4BEAT1_OFST))
7584
7585
#define ALT_ECC_HMC_OCP_MPR_5BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_5BEAT1_OFST))
7586
7587
#define ALT_ECC_HMC_OCP_MPR_6BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_6BEAT1_OFST))
7588
7589
#define ALT_ECC_HMC_OCP_MPR_7BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_7BEAT1_OFST))
7590
7591
#define ALT_ECC_HMC_OCP_MPR_8BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_8BEAT1_OFST))
7592
7593
#define ALT_ECC_HMC_OCP_MPR_0BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_0BEAT2_OFST))
7594
7595
#define ALT_ECC_HMC_OCP_MPR_1BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_1BEAT2_OFST))
7596
7597
#define ALT_ECC_HMC_OCP_MPR_2BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_2BEAT2_OFST))
7598
7599
#define ALT_ECC_HMC_OCP_MPR_3BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_3BEAT2_OFST))
7600
7601
#define ALT_ECC_HMC_OCP_MPR_4BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_4BEAT2_OFST))
7602
7603
#define ALT_ECC_HMC_OCP_MPR_5BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_5BEAT2_OFST))
7604
7605
#define ALT_ECC_HMC_OCP_MPR_6BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_6BEAT2_OFST))
7606
7607
#define ALT_ECC_HMC_OCP_MPR_7BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_7BEAT2_OFST))
7608
7609
#define ALT_ECC_HMC_OCP_MPR_8BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MPR_8BEAT2_OFST))
7610
7611
#define ALT_ECC_HMC_OCP_AUTO_PRECHARGE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_AUTO_PRECHARGE_OFST))
7612
7613
#define ALT_ECC_HMC_OCP_ECCCTL1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECCCTL1_OFST))
7614
7615
#define ALT_ECC_HMC_OCP_ECCCTL2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECCCTL2_OFST))
7616
7617
#define ALT_ECC_HMC_OCP_ERRINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ERRINTEN_OFST))
7618
7619
#define ALT_ECC_HMC_OCP_ERRINTENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ERRINTENS_OFST))
7620
7621
#define ALT_ECC_HMC_OCP_ERRINTENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ERRINTENR_OFST))
7622
7623
#define ALT_ECC_HMC_OCP_INTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_INTMOD_OFST))
7624
7625
#define ALT_ECC_HMC_OCP_INTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_INTSTAT_OFST))
7626
7627
#define ALT_ECC_HMC_OCP_DIAGINTTEST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DIAGINTTEST_OFST))
7628
7629
#define ALT_ECC_HMC_OCP_MODSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_MODSTAT_OFST))
7630
7631
#define ALT_ECC_HMC_OCP_DERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_DERRADDRA_OFST))
7632
7633
#define ALT_ECC_HMC_OCP_SERRADDRA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_SERRADDRA_OFST))
7634
7635
#define ALT_ECC_HMC_OCP_AUTOWB_CORRADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_AUTOWB_CORRADDR_OFST))
7636
7637
#define ALT_ECC_HMC_OCP_SERRCNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_SERRCNTREG_OFST))
7638
7639
#define ALT_ECC_HMC_OCP_AUTOWB_DROP_CNTREG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_AUTOWB_DROP_CNTREG_OFST))
7640
7641
#define ALT_ECC_HMC_OCP_ECC_REG2WRECCDATABUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2WRECCDATABUS_OFST))
7642
7643
#define ALT_ECC_HMC_OCP_ECC_RDECCDATA2REGBUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_RDECCDATA2REGBUS_OFST))
7644
7645
#define ALT_ECC_HMC_OCP_ECC_REG2RDECCDATABUS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDECCDATABUS_OFST))
7646
7647
#define ALT_ECC_HMC_OCP_ECC_DIAGON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_DIAGON_OFST))
7648
7649
#define ALT_ECC_HMC_OCP_ECC_DECSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_DECSTAT_OFST))
7650
7651
#define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_0_OFST))
7652
7653
#define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_1_OFST))
7654
7655
#define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_2_OFST))
7656
7657
#define ALT_ECC_HMC_OCP_ECC_ERRGENADDR_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_ERRGENADDR_3_OFST))
7658
7659
#define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT0_OFST))
7660
7661
#define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT1_OFST))
7662
7663
#define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT2_OFST))
7664
7665
#define ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + ALT_ECC_HMC_OCP_ECC_REG2RDDATABUS_BEAT3_OFST))
7666
7667
#define ALT_ECC_HMC_OCP_OFST 0xffcfb000
7668
7669
#define ALT_ECC_HMC_OCP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ECC_HMC_OCP_OFST))
7670
7671
#define ALT_ECC_HMC_OCP_LB_ADDR ALT_ECC_HMC_OCP_ADDR
7672
7673
#define ALT_ECC_HMC_OCP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ECC_HMC_OCP_ADDR) + 0x500) - 1))
7674
7684
#define ALT_SEC_MGR_AESFIFO_OFST 0xffcfe000
7685
7686
#define ALT_SEC_MGR_AESFIFO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SEC_MGR_AESFIFO_OFST))
7687
7688
#define ALT_SEC_MGR_AESFIFO_LB_ADDR ALT_SEC_MGR_AESFIFO_ADDR
7689
7690
#define ALT_SEC_MGR_AESFIFO_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SEC_MGR_AESFIFO_ADDR) + 0x400) - 1))
7691
7701
#define ALT_FPGAMGRDATA_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGRDATA_ADDR) + ALT_FPGAMGRDATA_DATA_OFST))
7702
7703
#define ALT_FPGAMGRDATA_OFST 0xffcfe400
7704
7705
#define ALT_FPGAMGRDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGAMGRDATA_OFST))
7706
7707
#define ALT_FPGAMGRDATA_LB_ADDR ALT_FPGAMGRDATA_ADDR
7708
7709
#define ALT_FPGAMGRDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGRDATA_ADDR) + 0x400) - 1))
7710
7720
#define ALT_TMR_SYS_0_TMR_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7721
7722
#define ALT_TMR_SYS_0_TMR_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7723
7724
#define ALT_TMR_SYS_0_TMR_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7725
7726
#define ALT_TMR_SYS_0_TMR_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7727
7728
#define ALT_TMR_SYS_0_TMR_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7729
7730
#define ALT_TMR_SYS_0_TMR_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7731
7732
#define ALT_TMR_SYS_0_TMR_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7733
7734
#define ALT_TMR_SYS_0_TMR_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7735
7736
#define ALT_TMR_SYS_0_TMR_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_TMR_SYS_0_TMR_ADDR)
7737
7738
#define ALT_TMR_SYS_0_TMR_OFST 0xffd00000
7739
7740
#define ALT_TMR_SYS_0_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SYS_0_TMR_OFST))
7741
7742
#define ALT_TMR_SYS_0_TMR_LB_ADDR ALT_TMR_SYS_0_TMR_ADDR
7743
7744
#define ALT_TMR_SYS_0_TMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SYS_0_TMR_ADDR) + 0x100) - 1))
7745
7755
#define ALT_TMR_SYS_1_TMR_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7756
7757
#define ALT_TMR_SYS_1_TMR_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7758
7759
#define ALT_TMR_SYS_1_TMR_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7760
7761
#define ALT_TMR_SYS_1_TMR_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7762
7763
#define ALT_TMR_SYS_1_TMR_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7764
7765
#define ALT_TMR_SYS_1_TMR_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7766
7767
#define ALT_TMR_SYS_1_TMR_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7768
7769
#define ALT_TMR_SYS_1_TMR_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7770
7771
#define ALT_TMR_SYS_1_TMR_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_TMR_SYS_1_TMR_ADDR)
7772
7773
#define ALT_TMR_SYS_1_TMR_OFST 0xffd00100
7774
7775
#define ALT_TMR_SYS_1_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_TMR_SYS_1_TMR_OFST))
7776
7777
#define ALT_TMR_SYS_1_TMR_LB_ADDR ALT_TMR_SYS_1_TMR_ADDR
7778
7779
#define ALT_TMR_SYS_1_TMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_TMR_SYS_1_TMR_ADDR) + 0x100) - 1))
7780
7790
#define ALT_L4WD0_WDT_CR_ADDR ALT_L4WD_CR_ADDR(ALT_L4WD0_ADDR)
7791
7792
#define ALT_L4WD0_WDT_TORR_ADDR ALT_L4WD_TORR_ADDR(ALT_L4WD0_ADDR)
7793
7794
#define ALT_L4WD0_WDT_CCVR_ADDR ALT_L4WD_CCVR_ADDR(ALT_L4WD0_ADDR)
7795
7796
#define ALT_L4WD0_WDT_CRR_ADDR ALT_L4WD_CRR_ADDR(ALT_L4WD0_ADDR)
7797
7798
#define ALT_L4WD0_WDT_STAT_ADDR ALT_L4WD_STAT_ADDR(ALT_L4WD0_ADDR)
7799
7800
#define ALT_L4WD0_WDT_EOI_ADDR ALT_L4WD_EOI_ADDR(ALT_L4WD0_ADDR)
7801
7802
#define ALT_L4WD0_CP_WDT_USER_TOP_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(ALT_L4WD0_ADDR)
7803
7804
#define ALT_L4WD0_CP_WDT_USER_TOP_INIT_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(ALT_L4WD0_ADDR)
7805
7806
#define ALT_L4WD0_CD_WDT_TOP_RST_ADDR ALT_L4WD_CD_WDT_TOP_RST_ADDR(ALT_L4WD0_ADDR)
7807
7808
#define ALT_L4WD0_CP_WDT_CNT_RST_ADDR ALT_L4WD_CP_WDT_CNT_RST_ADDR(ALT_L4WD0_ADDR)
7809
7810
#define ALT_L4WD0_WDT_COMP_PARAM_1_ADDR ALT_L4WD_COMP_PARAM_1_ADDR(ALT_L4WD0_ADDR)
7811
7812
#define ALT_L4WD0_WDT_COMP_VER_ADDR ALT_L4WD_COMP_VER_ADDR(ALT_L4WD0_ADDR)
7813
7814
#define ALT_L4WD0_WDT_COMP_TYPE_ADDR ALT_L4WD_COMP_TYPE_ADDR(ALT_L4WD0_ADDR)
7815
7816
#define ALT_L4WD0_OFST 0xffd00200
7817
7818
#define ALT_L4WD0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L4WD0_OFST))
7819
7820
#define ALT_L4WD0_LB_ADDR ALT_L4WD0_ADDR
7821
7822
#define ALT_L4WD0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L4WD0_ADDR) + 0x100) - 1))
7823
7833
#define ALT_L4WD1_WDT_CR_ADDR ALT_L4WD_CR_ADDR(ALT_L4WD1_ADDR)
7834
7835
#define ALT_L4WD1_WDT_TORR_ADDR ALT_L4WD_TORR_ADDR(ALT_L4WD1_ADDR)
7836
7837
#define ALT_L4WD1_WDT_CCVR_ADDR ALT_L4WD_CCVR_ADDR(ALT_L4WD1_ADDR)
7838
7839
#define ALT_L4WD1_WDT_CRR_ADDR ALT_L4WD_CRR_ADDR(ALT_L4WD1_ADDR)
7840
7841
#define ALT_L4WD1_WDT_STAT_ADDR ALT_L4WD_STAT_ADDR(ALT_L4WD1_ADDR)
7842
7843
#define ALT_L4WD1_WDT_EOI_ADDR ALT_L4WD_EOI_ADDR(ALT_L4WD1_ADDR)
7844
7845
#define ALT_L4WD1_CP_WDT_USER_TOP_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(ALT_L4WD1_ADDR)
7846
7847
#define ALT_L4WD1_CP_WDT_USER_TOP_INIT_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(ALT_L4WD1_ADDR)
7848
7849
#define ALT_L4WD1_CD_WDT_TOP_RST_ADDR ALT_L4WD_CD_WDT_TOP_RST_ADDR(ALT_L4WD1_ADDR)
7850
7851
#define ALT_L4WD1_CP_WDT_CNT_RST_ADDR ALT_L4WD_CP_WDT_CNT_RST_ADDR(ALT_L4WD1_ADDR)
7852
7853
#define ALT_L4WD1_WDT_COMP_PARAM_1_ADDR ALT_L4WD_COMP_PARAM_1_ADDR(ALT_L4WD1_ADDR)
7854
7855
#define ALT_L4WD1_WDT_COMP_VER_ADDR ALT_L4WD_COMP_VER_ADDR(ALT_L4WD1_ADDR)
7856
7857
#define ALT_L4WD1_WDT_COMP_TYPE_ADDR ALT_L4WD_COMP_TYPE_ADDR(ALT_L4WD1_ADDR)
7858
7859
#define ALT_L4WD1_OFST 0xffd00300
7860
7861
#define ALT_L4WD1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L4WD1_OFST))
7862
7863
#define ALT_L4WD1_LB_ADDR ALT_L4WD1_ADDR
7864
7865
#define ALT_L4WD1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L4WD1_ADDR) + 0x100) - 1))
7866
7876
#define ALT_FPGAMGR_DCLKCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DCLKCNT_OFST))
7877
7878
#define ALT_FPGAMGR_DCLKSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DCLKSTAT_OFST))
7879
7880
#define ALT_FPGAMGR_GPO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_GPO_OFST))
7881
7882
#define ALT_FPGAMGR_GPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_GPI_OFST))
7883
7884
#define ALT_FPGAMGR_MISCI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_MISCI_OFST))
7885
7886
#define ALT_FPGAMGR_EMR_DATA0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA0_OFST))
7887
7888
#define ALT_FPGAMGR_EMR_DATA1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA1_OFST))
7889
7890
#define ALT_FPGAMGR_EMR_DATA2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA2_OFST))
7891
7892
#define ALT_FPGAMGR_EMR_DATA3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA3_OFST))
7893
7894
#define ALT_FPGAMGR_EMR_DATA4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA4_OFST))
7895
7896
#define ALT_FPGAMGR_EMR_DATA5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_DATA5_OFST))
7897
7898
#define ALT_FPGAMGR_EMR_VALID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_VALID_OFST))
7899
7900
#define ALT_FPGAMGR_EMR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_EMR_EN_OFST))
7901
7902
#define ALT_FPGAMGR_JTAG_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_CFG_OFST))
7903
7904
#define ALT_FPGAMGR_JTAG_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_STAT_OFST))
7905
7906
#define ALT_FPGAMGR_JTAG_KICK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_KICK_OFST))
7907
7908
#define ALT_FPGAMGR_JTAG_DATA_W_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_DATA_W_OFST))
7909
7910
#define ALT_FPGAMGR_JTAG_DATA_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_JTAG_DATA_R_OFST))
7911
7912
#define ALT_FPGAMGR_IMGCFG_CTL_00_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_CTL_00_OFST))
7913
7914
#define ALT_FPGAMGR_IMGCFG_CTL_01_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_CTL_01_OFST))
7915
7916
#define ALT_FPGAMGR_IMGCFG_CTL_02_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_CTL_02_OFST))
7917
7918
#define ALT_FPGAMGR_IMGCFG_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_STAT_OFST))
7919
7920
#define ALT_FPGAMGR_INTR_MSKED_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_INTR_MSKED_STAT_OFST))
7921
7922
#define ALT_FPGAMGR_INTR_MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_INTR_MSK_OFST))
7923
7924
#define ALT_FPGAMGR_INTR_POL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_INTR_POL_OFST))
7925
7926
#define ALT_FPGAMGR_DMA_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DMA_CFG_OFST))
7927
7928
#define ALT_FPGAMGR_IMGCFG_FIFO_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_IMGCFG_FIFO_STAT_OFST))
7929
7930
#define ALT_FPGAMGR_OFST 0xffd03000
7931
7932
#define ALT_FPGAMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGAMGR_OFST))
7933
7934
#define ALT_FPGAMGR_LB_ADDR ALT_FPGAMGR_ADDR
7935
7936
#define ALT_FPGAMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGR_ADDR) + 0x1000) - 1))
7937
7947
#define ALT_CLKMGR_CLKMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_CTL_OFST))
7948
7949
#define ALT_CLKMGR_CLKMGR_INTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTR_OFST))
7950
7951
#define ALT_CLKMGR_CLKMGR_INTRS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRS_OFST))
7952
7953
#define ALT_CLKMGR_CLKMGR_INTRR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRR_OFST))
7954
7955
#define ALT_CLKMGR_CLKMGR_INTREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTREN_OFST))
7956
7957
#define ALT_CLKMGR_CLKMGR_INTRENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRENS_OFST))
7958
7959
#define ALT_CLKMGR_CLKMGR_INTRENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_INTRENR_OFST))
7960
7961
#define ALT_CLKMGR_CLKMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_STAT_OFST))
7962
7963
#define ALT_CLKMGR_CLKMGR_TESTIOCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + ALT_CLKMGR_CLKMGR_TESTIOCTL_OFST))
7964
7965
#define ALT_CLKMGR_CLKMGR_OFST 0xffd04000
7966
7967
#define ALT_CLKMGR_CLKMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_CLKMGR_OFST))
7968
7969
#define ALT_CLKMGR_CLKMGR_LB_ADDR ALT_CLKMGR_CLKMGR_ADDR
7970
7971
#define ALT_CLKMGR_CLKMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_CLKMGR_ADDR) + 0x40) - 1))
7972
7982
#define ALT_CLKMGR_MAINPLL_VCO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_VCO0_OFST))
7983
7984
#define ALT_CLKMGR_MAINPLL_VCO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_VCO1_OFST))
7985
7986
#define ALT_CLKMGR_MAINPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_EN_OFST))
7987
7988
#define ALT_CLKMGR_MAINPLL_ENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_ENS_OFST))
7989
7990
#define ALT_CLKMGR_MAINPLL_ENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_ENR_OFST))
7991
7992
#define ALT_CLKMGR_MAINPLL_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASS_OFST))
7993
7994
#define ALT_CLKMGR_MAINPLL_BYPASSS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASSS_OFST))
7995
7996
#define ALT_CLKMGR_MAINPLL_BYPASSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_BYPASSR_OFST))
7997
7998
#define ALT_CLKMGR_MAINPLL_MPUCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MPUCLK_OFST))
7999
8000
#define ALT_CLKMGR_MAINPLL_NOCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_NOCCLK_OFST))
8001
8002
#define ALT_CLKMGR_MAINPLL_CNTR2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR2CLK_OFST))
8003
8004
#define ALT_CLKMGR_MAINPLL_CNTR3CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR3CLK_OFST))
8005
8006
#define ALT_CLKMGR_MAINPLL_CNTR4CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR4CLK_OFST))
8007
8008
#define ALT_CLKMGR_MAINPLL_CNTR5CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR5CLK_OFST))
8009
8010
#define ALT_CLKMGR_MAINPLL_CNTR6CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR6CLK_OFST))
8011
8012
#define ALT_CLKMGR_MAINPLL_CNTR7CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR7CLK_OFST))
8013
8014
#define ALT_CLKMGR_MAINPLL_CNTR8CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR8CLK_OFST))
8015
8016
#define ALT_CLKMGR_MAINPLL_CNTR9CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR9CLK_OFST))
8017
8018
#define ALT_CLKMGR_MAINPLL_CNTR15CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CNTR15CLK_OFST))
8019
8020
#define ALT_CLKMGR_MAINPLL_OUTRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_OUTRST_OFST))
8021
8022
#define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OFST))
8023
8024
#define ALT_CLKMGR_MAINPLL_NOCDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_NOCDIV_OFST))
8025
8026
#define ALT_CLKMGR_MAINPLL_OFST 0xffd04040
8027
8028
#define ALT_CLKMGR_MAINPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_MAINPLL_OFST))
8029
8030
#define ALT_CLKMGR_MAINPLL_LB_ADDR ALT_CLKMGR_MAINPLL_ADDR
8031
8032
#define ALT_CLKMGR_MAINPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + 0x80) - 1))
8033
8043
#define ALT_CLKMGR_PERPLL_VCO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_VCO0_OFST))
8044
8045
#define ALT_CLKMGR_PERPLL_VCO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_VCO1_OFST))
8046
8047
#define ALT_CLKMGR_PERPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EN_OFST))
8048
8049
#define ALT_CLKMGR_PERPLL_ENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_ENS_OFST))
8050
8051
#define ALT_CLKMGR_PERPLL_ENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_ENR_OFST))
8052
8053
#define ALT_CLKMGR_PERPLL_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASS_OFST))
8054
8055
#define ALT_CLKMGR_PERPLL_BYPASSS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASSS_OFST))
8056
8057
#define ALT_CLKMGR_PERPLL_BYPASSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_BYPASSR_OFST))
8058
8059
#define ALT_CLKMGR_PERPLL_CNTR2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR2CLK_OFST))
8060
8061
#define ALT_CLKMGR_PERPLL_CNTR3CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR3CLK_OFST))
8062
8063
#define ALT_CLKMGR_PERPLL_CNTR4CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR4CLK_OFST))
8064
8065
#define ALT_CLKMGR_PERPLL_CNTR5CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR5CLK_OFST))
8066
8067
#define ALT_CLKMGR_PERPLL_CNTR6CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR6CLK_OFST))
8068
8069
#define ALT_CLKMGR_PERPLL_CNTR7CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR7CLK_OFST))
8070
8071
#define ALT_CLKMGR_PERPLL_CNTR8CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR8CLK_OFST))
8072
8073
#define ALT_CLKMGR_PERPLL_CNTR9CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_CNTR9CLK_OFST))
8074
8075
#define ALT_CLKMGR_PERPLL_OUTRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_OUTRST_OFST))
8076
8077
#define ALT_CLKMGR_PERPLL_OUTRSTSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_OUTRSTSTAT_OFST))
8078
8079
#define ALT_CLKMGR_PERPLL_EMACCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EMACCTL_OFST))
8080
8081
#define ALT_CLKMGR_PERPLL_GPIODIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_GPIODIV_OFST))
8082
8083
#define ALT_CLKMGR_PERPLL_OFST 0xffd040c0
8084
8085
#define ALT_CLKMGR_PERPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_PERPLL_OFST))
8086
8087
#define ALT_CLKMGR_PERPLL_LB_ADDR ALT_CLKMGR_PERPLL_ADDR
8088
8089
#define ALT_CLKMGR_PERPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + 0x80) - 1))
8090
8100
#define ALT_CLKMGR_NOCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + ALT_CLKMGR_NOCCLK_OFST))
8101
8102
#define ALT_CLKMGR_ALTERA_OFST 0xffd04140
8103
8104
#define ALT_CLKMGR_ALTERA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_ALTERA_OFST))
8105
8106
#define ALT_CLKMGR_ALTERA_LB_ADDR ALT_CLKMGR_ALTERA_ADDR
8107
8108
#define ALT_CLKMGR_ALTERA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + 0x40) - 1))
8109
8119
#define ALT_RSTMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_STAT_OFST))
8120
8121
#define ALT_RSTMGR_RAMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_RAMSTAT_OFST))
8122
8123
#define ALT_RSTMGR_MISCSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MISCSTAT_OFST))
8124
8125
#define ALT_RSTMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_CTL_OFST))
8126
8127
#define ALT_RSTMGR_HDSKEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKEN_OFST))
8128
8129
#define ALT_RSTMGR_HDSKREQ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKREQ_OFST))
8130
8131
#define ALT_RSTMGR_HDSKACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKACK_OFST))
8132
8133
#define ALT_RSTMGR_COUNTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_COUNTS_OFST))
8134
8135
#define ALT_RSTMGR_MPUMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUMODRST_OFST))
8136
8137
#define ALT_RSTMGR_PER0MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER0MODRST_OFST))
8138
8139
#define ALT_RSTMGR_PER1MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER1MODRST_OFST))
8140
8141
#define ALT_RSTMGR_BRGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGMODRST_OFST))
8142
8143
#define ALT_RSTMGR_SYSMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_SYSMODRST_OFST))
8144
8145
#define ALT_RSTMGR_COLDMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_COLDMODRST_OFST))
8146
8147
#define ALT_RSTMGR_NRSTMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_NRSTMODRST_OFST))
8148
8149
#define ALT_RSTMGR_DBGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_DBGMODRST_OFST))
8150
8151
#define ALT_RSTMGR_MPUWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUWARMMSK_OFST))
8152
8153
#define ALT_RSTMGR_PER0WARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER0WARMMSK_OFST))
8154
8155
#define ALT_RSTMGR_PER1WARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER1WARMMSK_OFST))
8156
8157
#define ALT_RSTMGR_BRGWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGWARMMSK_OFST))
8158
8159
#define ALT_RSTMGR_SYSWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_SYSWARMMSK_OFST))
8160
8161
#define ALT_RSTMGR_NRSTWARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_NRSTWARMMSK_OFST))
8162
8163
#define ALT_RSTMGR_L3WARMMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_L3WARMMSK_OFST))
8164
8165
#define ALT_RSTMGR_TSTSTA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_TSTSTA_OFST))
8166
8167
#define ALT_RSTMGR_TSTSCRATCH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_TSTSCRATCH_OFST))
8168
8169
#define ALT_RSTMGR_HDSKTMO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HDSKTMO_OFST))
8170
8171
#define ALT_RSTMGR_HMCINTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTR_OFST))
8172
8173
#define ALT_RSTMGR_HMCINTREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTREN_OFST))
8174
8175
#define ALT_RSTMGR_HMCINTRENS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTRENS_OFST))
8176
8177
#define ALT_RSTMGR_HMCINTRENR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCINTRENR_OFST))
8178
8179
#define ALT_RSTMGR_HMCGPOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCGPOUT_OFST))
8180
8181
#define ALT_RSTMGR_HMCGPIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_HMCGPIN_OFST))
8182
8183
#define ALT_RSTMGR_OFST 0xffd05000
8184
8185
#define ALT_RSTMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_RSTMGR_OFST))
8186
8187
#define ALT_RSTMGR_LB_ADDR ALT_RSTMGR_ADDR
8188
8189
#define ALT_RSTMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_RSTMGR_ADDR) + 0x100) - 1))
8190
8200
#define ALT_SYSMGR_SILICONID1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SILICONID1_OFST))
8201
8202
#define ALT_SYSMGR_SILICONID2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SILICONID2_OFST))
8203
8204
#define ALT_SYSMGR_WDDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_WDDBG_OFST))
8205
8206
#define ALT_SYSMGR_BOOT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_BOOT_OFST))
8207
8208
#define ALT_SYSMGR_MPU_CTL_L2_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_CTL_L2_ECC_OFST))
8209
8210
#define ALT_SYSMGR_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_DMA_OFST))
8211
8212
#define ALT_SYSMGR_DMA_PERIPH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_DMA_PERIPH_OFST))
8213
8214
#define ALT_SYSMGR_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SDMMC_OFST))
8215
8216
#define ALT_SYSMGR_SDMMC_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SDMMC_L3MST_OFST))
8217
8218
#define ALT_SYSMGR_NAND_BOOTSTRAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NAND_BOOTSTRAP_OFST))
8219
8220
#define ALT_SYSMGR_NAND_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NAND_L3MST_OFST))
8221
8222
#define ALT_SYSMGR_USB0_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_USB0_L3MST_OFST))
8223
8224
#define ALT_SYSMGR_USB1_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_USB1_L3MST_OFST))
8225
8226
#define ALT_SYSMGR_EMAC_GLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC_GLOB_OFST))
8227
8228
#define ALT_SYSMGR_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC0_OFST))
8229
8230
#define ALT_SYSMGR_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC1_OFST))
8231
8232
#define ALT_SYSMGR_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC2_OFST))
8233
8234
#define ALT_SYSMGR_FPGAINTF_EN_GLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_GLOB_OFST))
8235
8236
#define ALT_SYSMGR_FPGAINTF_EN_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_0_OFST))
8237
8238
#define ALT_SYSMGR_FPGAINTF_EN_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_1_OFST))
8239
8240
#define ALT_SYSMGR_FPGAINTF_EN_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_2_OFST))
8241
8242
#define ALT_SYSMGR_FPGAINTF_EN_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_EN_3_OFST))
8243
8244
#define ALT_SYSMGR_NOC_ADDR_REMAP_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_ADDR_REMAP_VALUE_OFST))
8245
8246
#define ALT_SYSMGR_NOC_ADDR_REMAP_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_ADDR_REMAP_SET_OFST))
8247
8248
#define ALT_SYSMGR_NOC_ADDR_REMAP_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_ADDR_REMAP_CLR_OFST))
8249
8250
#define ALT_SYSMGR_ECC_INTMSK_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTMSK_VALUE_OFST))
8251
8252
#define ALT_SYSMGR_ECC_INTMSK_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTMSK_SET_OFST))
8253
8254
#define ALT_SYSMGR_ECC_INTMSK_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTMSK_CLR_OFST))
8255
8256
#define ALT_SYSMGR_ECC_INTSTAT_SERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTSTAT_SERR_OFST))
8257
8258
#define ALT_SYSMGR_ECC_INTSTAT_DERR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_INTSTAT_DERR_OFST))
8259
8260
#define ALT_SYSMGR_MPU_STAT_L2_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_STAT_L2_ECC_OFST))
8261
8262
#define ALT_SYSMGR_MPU_CLR_L2_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_CLR_L2_ECC_OFST))
8263
8264
#define ALT_SYSMGR_MPU_STAT_L1_PARITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_STAT_L1_PARITY_OFST))
8265
8266
#define ALT_SYSMGR_MPU_CLR_L1_PARITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_CLR_L1_PARITY_OFST))
8267
8268
#define ALT_SYSMGR_MPU_SET_L1_PARITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_MPU_SET_L1_PARITY_OFST))
8269
8270
#define ALT_SYSMGR_NOC_TMO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_TMO_OFST))
8271
8272
#define ALT_SYSMGR_NOC_IDLEREQ_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEREQ_SET_OFST))
8273
8274
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEREQ_CLR_OFST))
8275
8276
#define ALT_SYSMGR_NOC_IDLEREQ_VALUE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEREQ_VALUE_OFST))
8277
8278
#define ALT_SYSMGR_NOC_IDLEACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLEACK_OFST))
8279
8280
#define ALT_SYSMGR_NOC_IDLESTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NOC_IDLESTAT_OFST))
8281
8282
#define ALT_SYSMGR_F2H_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_F2H_CTL_OFST))
8283
8284
#define ALT_SYSMGR_TSMC_TSEL_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_0_OFST))
8285
8286
#define ALT_SYSMGR_TSMC_TSEL_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_1_OFST))
8287
8288
#define ALT_SYSMGR_TSMC_TSEL_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_2_OFST))
8289
8290
#define ALT_SYSMGR_TSMC_TSEL_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_TSMC_TSEL_3_OFST))
8291
8292
#define ALT_SYSMGR_OFST 0xffd06000
8293
8294
#define ALT_SYSMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SYSMGR_OFST))
8295
8296
#define ALT_SYSMGR_LB_ADDR ALT_SYSMGR_ADDR
8297
8298
#define ALT_SYSMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ADDR) + 0x200) - 1))
8299
8309
#define ALT_SYSMGR_ROM_ROMHW_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMHW_CTL_OFST))
8310
8311
#define ALT_SYSMGR_ROM_ROMCODE_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_CTL_OFST))
8312
8313
#define ALT_SYSMGR_ROM_ROMCODE_QSPI_RST_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_QSPI_RST_CMD_OFST))
8314
8315
#define ALT_SYSMGR_ROM_ROMCODE_INITSWSTATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_INITSWSTATE_OFST))
8316
8317
#define ALT_SYSMGR_ROM_ROMCODE_INITSWLASTLD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_INITSWLASTLD_OFST))
8318
8319
#define ALT_SYSMGR_ROM_WARMRAM_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_EN_OFST))
8320
8321
#define ALT_SYSMGR_ROM_WARMRAM_DATASTART_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_DATASTART_OFST))
8322
8323
#define ALT_SYSMGR_ROM_WARMRAM_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_LEN_OFST))
8324
8325
#define ALT_SYSMGR_ROM_WARMRAM_EXECUTION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_EXECUTION_OFST))
8326
8327
#define ALT_SYSMGR_ROM_WARMRAM_CRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_WARMRAM_CRC_OFST))
8328
8329
#define ALT_SYSMGR_ROM_ISW_HANDOFF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ISW_HANDOFF_OFST))
8330
8331
#define ALT_SYSMGR_ROM_ROMCODE_BOOTROMSWSTATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_BOOTROMSWSTATE_OFST))
8332
8333
#define ALT_SYSMGR_ROM_ROMCODE_STICKYSET_WARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_STICKYSET_WARMCLR_OFST))
8334
8335
#define ALT_SYSMGR_ROM_ROMCODE_STICKYSET_COLDCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + ALT_SYSMGR_ROM_ROMCODE_STICKYSET_COLDCLR_OFST))
8336
8337
#define ALT_SYSMGR_ROM_OFST 0xffd06200
8338
8339
#define ALT_SYSMGR_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SYSMGR_ROM_OFST))
8340
8341
#define ALT_SYSMGR_ROM_LB_ADDR ALT_SYSMGR_ROM_ADDR
8342
8343
#define ALT_SYSMGR_ROM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ROM_ADDR) + 0x100) - 1))
8344
8354
#define ALT_PINMUX_SHARED_3V_IO_Q1_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_1_OFST))
8355
8356
#define ALT_PINMUX_SHARED_3V_IO_Q1_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_2_OFST))
8357
8358
#define ALT_PINMUX_SHARED_3V_IO_Q1_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_3_OFST))
8359
8360
#define ALT_PINMUX_SHARED_3V_IO_Q1_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_4_OFST))
8361
8362
#define ALT_PINMUX_SHARED_3V_IO_Q1_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_5_OFST))
8363
8364
#define ALT_PINMUX_SHARED_3V_IO_Q1_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_6_OFST))
8365
8366
#define ALT_PINMUX_SHARED_3V_IO_Q1_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_7_OFST))
8367
8368
#define ALT_PINMUX_SHARED_3V_IO_Q1_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_8_OFST))
8369
8370
#define ALT_PINMUX_SHARED_3V_IO_Q1_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_9_OFST))
8371
8372
#define ALT_PINMUX_SHARED_3V_IO_Q1_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_10_OFST))
8373
8374
#define ALT_PINMUX_SHARED_3V_IO_Q1_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_11_OFST))
8375
8376
#define ALT_PINMUX_SHARED_3V_IO_Q1_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q1_12_OFST))
8377
8378
#define ALT_PINMUX_SHARED_3V_IO_Q2_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_1_OFST))
8379
8380
#define ALT_PINMUX_SHARED_3V_IO_Q2_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_2_OFST))
8381
8382
#define ALT_PINMUX_SHARED_3V_IO_Q2_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_3_OFST))
8383
8384
#define ALT_PINMUX_SHARED_3V_IO_Q2_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_4_OFST))
8385
8386
#define ALT_PINMUX_SHARED_3V_IO_Q2_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_5_OFST))
8387
8388
#define ALT_PINMUX_SHARED_3V_IO_Q2_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_6_OFST))
8389
8390
#define ALT_PINMUX_SHARED_3V_IO_Q2_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_7_OFST))
8391
8392
#define ALT_PINMUX_SHARED_3V_IO_Q2_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_8_OFST))
8393
8394
#define ALT_PINMUX_SHARED_3V_IO_Q2_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_9_OFST))
8395
8396
#define ALT_PINMUX_SHARED_3V_IO_Q2_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_10_OFST))
8397
8398
#define ALT_PINMUX_SHARED_3V_IO_Q2_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_11_OFST))
8399
8400
#define ALT_PINMUX_SHARED_3V_IO_Q2_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q2_12_OFST))
8401
8402
#define ALT_PINMUX_SHARED_3V_IO_Q3_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_1_OFST))
8403
8404
#define ALT_PINMUX_SHARED_3V_IO_Q3_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_2_OFST))
8405
8406
#define ALT_PINMUX_SHARED_3V_IO_Q3_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_3_OFST))
8407
8408
#define ALT_PINMUX_SHARED_3V_IO_Q3_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_4_OFST))
8409
8410
#define ALT_PINMUX_SHARED_3V_IO_Q3_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_5_OFST))
8411
8412
#define ALT_PINMUX_SHARED_3V_IO_Q3_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_6_OFST))
8413
8414
#define ALT_PINMUX_SHARED_3V_IO_Q3_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_7_OFST))
8415
8416
#define ALT_PINMUX_SHARED_3V_IO_Q3_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_8_OFST))
8417
8418
#define ALT_PINMUX_SHARED_3V_IO_Q3_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_9_OFST))
8419
8420
#define ALT_PINMUX_SHARED_3V_IO_Q3_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_10_OFST))
8421
8422
#define ALT_PINMUX_SHARED_3V_IO_Q3_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_11_OFST))
8423
8424
#define ALT_PINMUX_SHARED_3V_IO_Q3_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q3_12_OFST))
8425
8426
#define ALT_PINMUX_SHARED_3V_IO_Q4_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_1_OFST))
8427
8428
#define ALT_PINMUX_SHARED_3V_IO_Q4_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_2_OFST))
8429
8430
#define ALT_PINMUX_SHARED_3V_IO_Q4_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_3_OFST))
8431
8432
#define ALT_PINMUX_SHARED_3V_IO_Q4_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_4_OFST))
8433
8434
#define ALT_PINMUX_SHARED_3V_IO_Q4_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_5_OFST))
8435
8436
#define ALT_PINMUX_SHARED_3V_IO_Q4_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_6_OFST))
8437
8438
#define ALT_PINMUX_SHARED_3V_IO_Q4_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_7_OFST))
8439
8440
#define ALT_PINMUX_SHARED_3V_IO_Q4_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_8_OFST))
8441
8442
#define ALT_PINMUX_SHARED_3V_IO_Q4_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_9_OFST))
8443
8444
#define ALT_PINMUX_SHARED_3V_IO_Q4_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_10_OFST))
8445
8446
#define ALT_PINMUX_SHARED_3V_IO_Q4_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_11_OFST))
8447
8448
#define ALT_PINMUX_SHARED_3V_IO_Q4_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + ALT_PINMUX_SHARED_3V_IO_Q4_12_OFST))
8449
8450
#define ALT_PINMUX_SHARED_3V_IO_GRP_OFST 0xffd07000
8451
8452
#define ALT_PINMUX_SHARED_3V_IO_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_SHARED_3V_IO_GRP_OFST))
8453
8454
#define ALT_PINMUX_SHARED_3V_IO_GRP_LB_ADDR ALT_PINMUX_SHARED_3V_IO_GRP_ADDR
8455
8456
#define ALT_PINMUX_SHARED_3V_IO_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_SHARED_3V_IO_GRP_ADDR) + 0x200) - 1))
8457
8467
#define ALT_PINMUX_DCTD_IO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_1_OFST))
8468
8469
#define ALT_PINMUX_DCTD_IO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_2_OFST))
8470
8471
#define ALT_PINMUX_DCTD_IO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_3_OFST))
8472
8473
#define ALT_PINMUX_DCTD_IO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_4_OFST))
8474
8475
#define ALT_PINMUX_DCTD_IO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_5_OFST))
8476
8477
#define ALT_PINMUX_DCTD_IO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_6_OFST))
8478
8479
#define ALT_PINMUX_DCTD_IO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_7_OFST))
8480
8481
#define ALT_PINMUX_DCTD_IO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_8_OFST))
8482
8483
#define ALT_PINMUX_DCTD_IO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_9_OFST))
8484
8485
#define ALT_PINMUX_DCTD_IO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_10_OFST))
8486
8487
#define ALT_PINMUX_DCTD_IO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_11_OFST))
8488
8489
#define ALT_PINMUX_DCTD_IO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_12_OFST))
8490
8491
#define ALT_PINMUX_DCTD_IO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_13_OFST))
8492
8493
#define ALT_PINMUX_DCTD_IO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_14_OFST))
8494
8495
#define ALT_PINMUX_DCTD_IO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_15_OFST))
8496
8497
#define ALT_PINMUX_DCTD_IO_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_16_OFST))
8498
8499
#define ALT_PINMUX_DCTD_IO_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_17_OFST))
8500
8501
#define ALT_PINMUX_DCTD_IO_CFG_BANK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_BANK_OFST))
8502
8503
#define ALT_PINMUX_DCTD_IO_CFG_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_1_OFST))
8504
8505
#define ALT_PINMUX_DCTD_IO_CFG_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_2_OFST))
8506
8507
#define ALT_PINMUX_DCTD_IO_CFG_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_3_OFST))
8508
8509
#define ALT_PINMUX_DCTD_IO_CFG_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_4_OFST))
8510
8511
#define ALT_PINMUX_DCTD_IO_CFG_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_5_OFST))
8512
8513
#define ALT_PINMUX_DCTD_IO_CFG_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_6_OFST))
8514
8515
#define ALT_PINMUX_DCTD_IO_CFG_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_7_OFST))
8516
8517
#define ALT_PINMUX_DCTD_IO_CFG_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_8_OFST))
8518
8519
#define ALT_PINMUX_DCTD_IO_CFG_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_9_OFST))
8520
8521
#define ALT_PINMUX_DCTD_IO_CFG_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_10_OFST))
8522
8523
#define ALT_PINMUX_DCTD_IO_CFG_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_11_OFST))
8524
8525
#define ALT_PINMUX_DCTD_IO_CFG_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_12_OFST))
8526
8527
#define ALT_PINMUX_DCTD_IO_CFG_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_13_OFST))
8528
8529
#define ALT_PINMUX_DCTD_IO_CFG_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_14_OFST))
8530
8531
#define ALT_PINMUX_DCTD_IO_CFG_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_15_OFST))
8532
8533
#define ALT_PINMUX_DCTD_IO_CFG_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_16_OFST))
8534
8535
#define ALT_PINMUX_DCTD_IO_CFG_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_17_OFST))
8536
8537
#define ALT_PINMUX_DCTD_IO_GRP_OFST 0xffd07200
8538
8539
#define ALT_PINMUX_DCTD_IO_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_DCTD_IO_GRP_OFST))
8540
8541
#define ALT_PINMUX_DCTD_IO_GRP_LB_ADDR ALT_PINMUX_DCTD_IO_GRP_ADDR
8542
8543
#define ALT_PINMUX_DCTD_IO_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + 0x200) - 1))
8544
8554
#define ALT_PINMUX_FPGA_EMAC0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_EMAC0_USEFPGA_OFST))
8555
8556
#define ALT_PINMUX_FPGA_EMAC1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_EMAC1_USEFPGA_OFST))
8557
8558
#define ALT_PINMUX_FPGA_EMAC2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_EMAC2_USEFPGA_OFST))
8559
8560
#define ALT_PINMUX_FPGA_I2C0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C0_USEFPGA_OFST))
8561
8562
#define ALT_PINMUX_FPGA_I2C1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C1_USEFPGA_OFST))
8563
8564
#define ALT_PINMUX_FPGA_I2C_EMAC0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C_EMAC0_USEFPGA_OFST))
8565
8566
#define ALT_PINMUX_FPGA_I2C_EMAC1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C_EMAC1_USEFPGA_OFST))
8567
8568
#define ALT_PINMUX_FPGA_I2C_EMAC2_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_I2C_EMAC2_USEFPGA_OFST))
8569
8570
#define ALT_PINMUX_FPGA_NAND_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_NAND_USEFPGA_OFST))
8571
8572
#define ALT_PINMUX_FPGA_QSPI_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_QSPI_USEFPGA_OFST))
8573
8574
#define ALT_PINMUX_FPGA_SDMMC_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SDMMC_USEFPGA_OFST))
8575
8576
#define ALT_PINMUX_FPGA_SPIM0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIM0_USEFPGA_OFST))
8577
8578
#define ALT_PINMUX_FPGA_SPIM1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIM1_USEFPGA_OFST))
8579
8580
#define ALT_PINMUX_FPGA_SPIS0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIS0_USEFPGA_OFST))
8581
8582
#define ALT_PINMUX_FPGA_SPIS1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_SPIS1_USEFPGA_OFST))
8583
8584
#define ALT_PINMUX_FPGA_UART0_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_UART0_USEFPGA_OFST))
8585
8586
#define ALT_PINMUX_FPGA_UART1_USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + ALT_PINMUX_FPGA_UART1_USEFPGA_OFST))
8587
8588
#define ALT_PINMUX_FPGA_INTERFACE_GRP_OFST 0xffd07400
8589
8590
#define ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_FPGA_INTERFACE_GRP_OFST))
8591
8592
#define ALT_PINMUX_FPGA_INTERFACE_GRP_LB_ADDR ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR
8593
8594
#define ALT_PINMUX_FPGA_INTERFACE_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_FPGA_INTERFACE_GRP_ADDR) + 0x100) - 1))
8595
8605
#define ALT_NOC_L4_PRIV_FLT_L4_PRIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + ALT_NOC_L4_PRIV_FLT_L4_PRIV_OFST))
8606
8607
#define ALT_NOC_L4_PRIV_FLT_L4_PRIV_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + ALT_NOC_L4_PRIV_FLT_L4_PRIV_SET_OFST))
8608
8609
#define ALT_NOC_L4_PRIV_FLT_L4_PRIV_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + ALT_NOC_L4_PRIV_FLT_L4_PRIV_CLR_OFST))
8610
8611
#define ALT_NOC_L4_PRIV_FLT_OFST 0xffd11000
8612
8613
#define ALT_NOC_L4_PRIV_FLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_L4_PRIV_FLT_OFST))
8614
8615
#define ALT_NOC_L4_PRIV_FLT_LB_ADDR ALT_NOC_L4_PRIV_FLT_ADDR
8616
8617
#define ALT_NOC_L4_PRIV_FLT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_L4_PRIV_FLT_ADDR) + 0x100) - 1))
8618
8628
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_COREID_OFST))
8629
8630
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_REVID_OFST))
8631
8632
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_RATE_OFST))
8633
8634
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_MPU_M1TODDRRESP_MAIN_RATE_BYPASS_OFST))
8635
8636
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_OFST 0xffd11100
8637
8638
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_OFST))
8639
8640
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_LB_ADDR ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR
8641
8642
#define ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M1TODDRRESP_MAIN_RATE_ADDR) + 0x80) - 1))
8643
8653
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_COREID_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_COREID_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8654
8655
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_REVID_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_REVID_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8656
8657
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_RATE_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_RATE_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8658
8659
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_BYPASS_ADDR ALT_NOC_MPU_RATE_ADRESP_MAIN_RATE_MPU_M0_RATE_ADRESP_MAIN_RATE_BYPASS_ADDR(ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR)
8660
8661
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_OFST 0xffd11200
8662
8663
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_OFST))
8664
8665
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_LB_ADDR ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR
8666
8667
#define ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M0_RATE_ADRESP_MAIN_RATE_ADDR) + 0x80) - 1))
8668
8678
#define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_COREID_OFST))
8679
8680
#define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_REVID_OFST))
8681
8682
#define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_RATE_OFST))
8683
8684
#define ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_L4_MP_AD_MAIN_RATE_BYPASS_OFST))
8685
8686
#define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_OFST 0xffd11300
8687
8688
#define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_OFST))
8689
8690
#define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_LB_ADDR ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR
8691
8692
#define ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_L4_MP_RATE_AD_MAIN_RATE_ADDR) + 0x80) - 1))
8693
8703
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_COREID_OFST))
8704
8705
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_REVID_OFST))
8706
8707
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_RATE_OFST))
8708
8709
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_F2H_RATE_AD_MAIN_RATE_BYPASS_OFST))
8710
8711
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_OFST 0xffd11400
8712
8713
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_OFST))
8714
8715
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_LB_ADDR ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR
8716
8717
#define ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_RATE_AD_MAIN_RATE_ADDR) + 0x80) - 1))
8718
8728
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_COREID_OFST))
8729
8730
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_REVID_OFST))
8731
8732
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_RATE_OFST))
8733
8734
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_OFST))
8735
8736
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_OFST 0xffd11500
8737
8738
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_OFST))
8739
8740
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_LB_ADDR ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR
8741
8742
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_ADDR) + 0x80) - 1))
8743
8753
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_COREID_OFST))
8754
8755
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_REVID_OFST))
8756
8757
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_RATE_OFST))
8758
8759
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ACP_RATE_AD_MAIN_RATE_BYPASS_OFST))
8760
8761
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_OFST 0xffd11600
8762
8763
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_OFST))
8764
8765
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_LB_ADDR ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR
8766
8767
#define ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_ACP_RATE_AD_MAIN_RATE_ADDR) + 0x80) - 1))
8768
8778
#define ALT_NOC_MPU_DDR_T_PRB_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_COREID_OFST))
8779
8780
#define ALT_NOC_MPU_DDR_T_PRB_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_REVID_OFST))
8781
8782
#define ALT_NOC_MPU_DDR_T_PRB_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_MAINCTL_OFST))
8783
8784
#define ALT_NOC_MPU_DDR_T_PRB_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CFGCTL_OFST))
8785
8786
#define ALT_NOC_MPU_DDR_T_PRB_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTLUT_OFST))
8787
8788
#define ALT_NOC_MPU_DDR_T_PRB_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_TRACEALARMEN_OFST))
8789
8790
#define ALT_NOC_MPU_DDR_T_PRB_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_TRACEALARMSTAT_OFST))
8791
8792
#define ALT_NOC_MPU_DDR_T_PRB_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_TRACEALARMCLR_OFST))
8793
8794
#define ALT_NOC_MPU_DDR_T_PRB_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATPERIOD_OFST))
8795
8796
#define ALT_NOC_MPU_DDR_T_PRB_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATGO_OFST))
8797
8798
#define ALT_NOC_MPU_DDR_T_PRB_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMMIN_OFST))
8799
8800
#define ALT_NOC_MPU_DDR_T_PRB_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMMAX_OFST))
8801
8802
#define ALT_NOC_MPU_DDR_T_PRB_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMSTAT_OFST))
8803
8804
#define ALT_NOC_MPU_DDR_T_PRB_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMCLR_OFST))
8805
8806
#define ALT_NOC_MPU_DDR_T_PRB_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_STATALARMEN_OFST))
8807
8808
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDBASE_OFST))
8809
8810
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ROUTEIDMSK_OFST))
8811
8812
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_ADDRBASE_LOW_OFST))
8813
8814
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_WINDOWSIZE_OFST))
8815
8816
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYBASE_OFST))
8817
8818
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_SECURITYMSK_OFST))
8819
8820
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_OPCODE_OFST))
8821
8822
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_STAT_OFST))
8823
8824
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_LEN_OFST))
8825
8826
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_0_URGENCY_OFST))
8827
8828
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDBASE_OFST))
8829
8830
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ROUTEIDMSK_OFST))
8831
8832
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_ADDRBASE_LOW_OFST))
8833
8834
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_WINDOWSIZE_OFST))
8835
8836
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYBASE_OFST))
8837
8838
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_SECURITYMSK_OFST))
8839
8840
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_OPCODE_OFST))
8841
8842
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_STAT_OFST))
8843
8844
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_LEN_OFST))
8845
8846
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_1_URGENCY_OFST))
8847
8848
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDBASE_OFST))
8849
8850
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ROUTEIDMSK_OFST))
8851
8852
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_ADDRBASE_LOW_OFST))
8853
8854
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_WINDOWSIZE_OFST))
8855
8856
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYBASE_OFST))
8857
8858
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_SECURITYMSK_OFST))
8859
8860
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_OPCODE_OFST))
8861
8862
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_STAT_OFST))
8863
8864
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_LEN_OFST))
8865
8866
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_2_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_2_URGENCY_OFST))
8867
8868
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDBASE_OFST))
8869
8870
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ROUTEIDMSK_OFST))
8871
8872
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_ADDRBASE_LOW_OFST))
8873
8874
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_WINDOWSIZE_OFST))
8875
8876
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYBASE_OFST))
8877
8878
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_SECURITYMSK_OFST))
8879
8880
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_OPCODE_OFST))
8881
8882
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_STAT_OFST))
8883
8884
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_LEN_OFST))
8885
8886
#define ALT_NOC_MPU_DDR_T_PRB_FLTS_3_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_FLTS_3_URGENCY_OFST))
8887
8888
#define ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_SRC_OFST))
8889
8890
#define ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_ALARMMOD_OFST))
8891
8892
#define ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_0_VAL_OFST))
8893
8894
#define ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_SRC_OFST))
8895
8896
#define ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_ALARMMOD_OFST))
8897
8898
#define ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + ALT_NOC_MPU_DDR_T_PRB_CNTRS_1_VAL_OFST))
8899
8900
#define ALT_NOC_MPU_DDR_T_PRB_OFST 0xffd12000
8901
8902
#define ALT_NOC_MPU_DDR_T_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_DDR_T_PRB_OFST))
8903
8904
#define ALT_NOC_MPU_DDR_T_PRB_LB_ADDR ALT_NOC_MPU_DDR_T_PRB_ADDR
8905
8906
#define ALT_NOC_MPU_DDR_T_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_DDR_T_PRB_ADDR) + 0x400) - 1))
8907
8917
#define ALT_NOC_MPU_DDR_T_SCHED_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_COREID_OFST))
8918
8919
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_REVID_OFST))
8920
8921
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_OFST))
8922
8923
#define ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_OFST))
8924
8925
#define ALT_NOC_MPU_DDR_T_SCHED_DDRMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DDRMOD_OFST))
8926
8927
#define ALT_NOC_MPU_DDR_T_SCHED_RDLATENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_RDLATENCY_OFST))
8928
8929
#define ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_OFST))
8930
8931
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_OFST))
8932
8933
#define ALT_NOC_MPU_DDR_T_SCHED_OFST 0xffd12400
8934
8935
#define ALT_NOC_MPU_DDR_T_SCHED_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_DDR_T_SCHED_OFST))
8936
8937
#define ALT_NOC_MPU_DDR_T_SCHED_LB_ADDR ALT_NOC_MPU_DDR_T_SCHED_ADDR
8938
8939
#define ALT_NOC_MPU_DDR_T_SCHED_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_DDR_T_SCHED_ADDR) + 0x80) - 1))
8940
8950
#define ALT_NOC_FW_L4_PER_SCR_NAND_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_NAND_REG_OFST))
8951
8952
#define ALT_NOC_FW_L4_PER_SCR_NAND_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_NAND_DATA_OFST))
8953
8954
#define ALT_NOC_FW_L4_PER_SCR_QSPI_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_QSPI_DATA_OFST))
8955
8956
#define ALT_NOC_FW_L4_PER_SCR_USB0_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_USB0_REG_OFST))
8957
8958
#define ALT_NOC_FW_L4_PER_SCR_USB1_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_USB1_REG_OFST))
8959
8960
#define ALT_NOC_FW_L4_PER_SCR_DMA_NONSECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_DMA_NONSECURE_OFST))
8961
8962
#define ALT_NOC_FW_L4_PER_SCR_DMA_SECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_DMA_SECURE_OFST))
8963
8964
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_MST0_OFST))
8965
8966
#define ALT_NOC_FW_L4_PER_SCR_SPI_MST1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_MST1_OFST))
8967
8968
#define ALT_NOC_FW_L4_PER_SCR_SPI_SLV0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_SLV0_OFST))
8969
8970
#define ALT_NOC_FW_L4_PER_SCR_SPI_SLV1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SPI_SLV1_OFST))
8971
8972
#define ALT_NOC_FW_L4_PER_SCR_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC0_OFST))
8973
8974
#define ALT_NOC_FW_L4_PER_SCR_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC1_OFST))
8975
8976
#define ALT_NOC_FW_L4_PER_SCR_EMAC2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC2_OFST))
8977
8978
#define ALT_NOC_FW_L4_PER_SCR_EMAC3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_EMAC3_OFST))
8979
8980
#define ALT_NOC_FW_L4_PER_SCR_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_QSPI_OFST))
8981
8982
#define ALT_NOC_FW_L4_PER_SCR_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SDMMC_OFST))
8983
8984
#define ALT_NOC_FW_L4_PER_SCR_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO0_OFST))
8985
8986
#define ALT_NOC_FW_L4_PER_SCR_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO1_OFST))
8987
8988
#define ALT_NOC_FW_L4_PER_SCR_GPIO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_GPIO2_OFST))
8989
8990
#define ALT_NOC_FW_L4_PER_SCR_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C0_OFST))
8991
8992
#define ALT_NOC_FW_L4_PER_SCR_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C1_OFST))
8993
8994
#define ALT_NOC_FW_L4_PER_SCR_I2C2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C2_OFST))
8995
8996
#define ALT_NOC_FW_L4_PER_SCR_I2C3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C3_OFST))
8997
8998
#define ALT_NOC_FW_L4_PER_SCR_I2C4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_I2C4_OFST))
8999
9000
#define ALT_NOC_FW_L4_PER_SCR_SP_TMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SP_TMR0_OFST))
9001
9002
#define ALT_NOC_FW_L4_PER_SCR_SP_TMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_SP_TMR1_OFST))
9003
9004
#define ALT_NOC_FW_L4_PER_SCR_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_UART0_OFST))
9005
9006
#define ALT_NOC_FW_L4_PER_SCR_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + ALT_NOC_FW_L4_PER_SCR_UART1_OFST))
9007
9008
#define ALT_NOC_FW_L4_PER_SCR_OFST 0xffd13000
9009
9010
#define ALT_NOC_FW_L4_PER_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_L4_PER_SCR_OFST))
9011
9012
#define ALT_NOC_FW_L4_PER_SCR_LB_ADDR ALT_NOC_FW_L4_PER_SCR_ADDR
9013
9014
#define ALT_NOC_FW_L4_PER_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_L4_PER_SCR_ADDR) + 0x100) - 1))
9015
9025
#define ALT_NOC_FW_L4_SYS_SCR_CAN0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CAN0_ECC_OFST))
9026
9027
#define ALT_NOC_FW_L4_SYS_SCR_CAN1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CAN1_ECC_OFST))
9028
9029
#define ALT_NOC_FW_L4_SYS_SCR_DMA_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DMA_ECC_OFST))
9030
9031
#define ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC0RX_ECC_OFST))
9032
9033
#define ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC0TX_ECC_OFST))
9034
9035
#define ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC1RX_ECC_OFST))
9036
9037
#define ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC1TX_ECC_OFST))
9038
9039
#define ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC2RX_ECC_OFST))
9040
9041
#define ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC2TX_ECC_OFST))
9042
9043
#define ALT_NOC_FW_L4_SYS_SCR_EMAC3RX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC3RX_ECC_OFST))
9044
9045
#define ALT_NOC_FW_L4_SYS_SCR_EMAC3TX_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_EMAC3TX_ECC_OFST))
9046
9047
#define ALT_NOC_FW_L4_SYS_SCR_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_ECC_OFST))
9048
9049
#define ALT_NOC_FW_L4_SYS_SCR_NAND_RD_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_RD_ECC_OFST))
9050
9051
#define ALT_NOC_FW_L4_SYS_SCR_NAND_WR_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_NAND_WR_ECC_OFST))
9052
9053
#define ALT_NOC_FW_L4_SYS_SCR_ONCHIPRAM_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_ONCHIPRAM_ECC_OFST))
9054
9055
#define ALT_NOC_FW_L4_SYS_SCR_QSPI_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_QSPI_ECC_OFST))
9056
9057
#define ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_SDMMC_ECC_OFST))
9058
9059
#define ALT_NOC_FW_L4_SYS_SCR_USB0_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_USB0_ECC_OFST))
9060
9061
#define ALT_NOC_FW_L4_SYS_SCR_USB1_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_USB1_ECC_OFST))
9062
9063
#define ALT_NOC_FW_L4_SYS_SCR_CLK_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_CLK_MANAGER_OFST))
9064
9065
#define ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_REG_OFST))
9066
9067
#define ALT_NOC_FW_L4_SYS_SCR_PIN_MUX_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_PIN_MUX_REG_OFST))
9068
9069
#define ALT_NOC_FW_L4_SYS_SCR_RST_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_RST_MANAGER_OFST))
9070
9071
#define ALT_NOC_FW_L4_SYS_SCR_SYS_MANAGER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_SYS_MANAGER_OFST))
9072
9073
#define ALT_NOC_FW_L4_SYS_SCR_OSC0_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OSC0_TMR_OFST))
9074
9075
#define ALT_NOC_FW_L4_SYS_SCR_OSC1_TMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OSC1_TMR_OFST))
9076
9077
#define ALT_NOC_FW_L4_SYS_SCR_WD0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WD0_OFST))
9078
9079
#define ALT_NOC_FW_L4_SYS_SCR_WD1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_WD1_OFST))
9080
9081
#define ALT_NOC_FW_L4_SYS_SCR_DAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DAP_OFST))
9082
9083
#define ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_STREAMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_FPGA_MANAGER_STREAMING_OFST))
9084
9085
#define ALT_NOC_FW_L4_SYS_SCR_SECURITY_MANAGER_STREAMING_ADDR ALT_NOC_FW_L4_SYS_SCR_SEC_MGR_STREAMING_ADDR(ALT_NOC_FW_L4_SYS_SCR_ADDR)
9086
9087
#define ALT_NOC_FW_L4_SYS_SCR_HMC_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_HMC_REG_OFST))
9088
9089
#define ALT_NOC_FW_L4_SYS_SCR_HMC_ADAPTOR_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_HMC_ADAPTOR_REG_OFST))
9090
9091
#define ALT_NOC_FW_L4_SYS_SCR_L3_INTERCONNECT_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L3_INTERCONNECT_REG_OFST))
9092
9093
#define ALT_NOC_FW_L4_SYS_SCR_DDR_SCHED_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_DDR_SCHED_REG_OFST))
9094
9095
#define ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_FW_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_FW_CSR_OFST))
9096
9097
#define ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_PRBS_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_INTERCONNECT_PRBS_CSR_OFST))
9098
9099
#define ALT_NOC_FW_L4_SYS_SCR_L4_QOS_CSR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + ALT_NOC_FW_L4_SYS_SCR_L4_QOS_CSR_OFST))
9100
9101
#define ALT_NOC_FW_L4_SYS_SCR_OFST 0xffd13100
9102
9103
#define ALT_NOC_FW_L4_SYS_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_L4_SYS_SCR_OFST))
9104
9105
#define ALT_NOC_FW_L4_SYS_SCR_LB_ADDR ALT_NOC_FW_L4_SYS_SCR_ADDR
9106
9107
#define ALT_NOC_FW_L4_SYS_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_L4_SYS_SCR_ADDR) + 0x100) - 1))
9108
9118
#define ALT_NOC_FW_OCRAM_SCR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_EN_OFST))
9119
9120
#define ALT_NOC_FW_OCRAM_SCR_EN_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_EN_SET_OFST))
9121
9122
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_EN_CLR_OFST))
9123
9124
#define ALT_NOC_FW_OCRAM_SCR_REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG0ADDR_OFST))
9125
9126
#define ALT_NOC_FW_OCRAM_SCR_REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG1ADDR_OFST))
9127
9128
#define ALT_NOC_FW_OCRAM_SCR_REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG2ADDR_OFST))
9129
9130
#define ALT_NOC_FW_OCRAM_SCR_REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG3ADDR_OFST))
9131
9132
#define ALT_NOC_FW_OCRAM_SCR_REG4ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG4ADDR_OFST))
9133
9134
#define ALT_NOC_FW_OCRAM_SCR_REG5ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + ALT_NOC_FW_OCRAM_SCR_REG5ADDR_OFST))
9135
9136
#define ALT_NOC_FW_OCRAM_SCR_OFST 0xffd13200
9137
9138
#define ALT_NOC_FW_OCRAM_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_OCRAM_SCR_OFST))
9139
9140
#define ALT_NOC_FW_OCRAM_SCR_LB_ADDR ALT_NOC_FW_OCRAM_SCR_ADDR
9141
9142
#define ALT_NOC_FW_OCRAM_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_OCRAM_SCR_ADDR) + 0x100) - 1))
9143
9153
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_OFST))
9154
9155
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET_OFST))
9156
9157
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR_OFST))
9158
9159
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR_OFST))
9160
9161
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR_OFST))
9162
9163
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR_OFST))
9164
9165
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR_OFST))
9166
9167
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR_OFST))
9168
9169
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR_OFST))
9170
9171
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR_OFST))
9172
9173
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR_OFST))
9174
9175
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR_OFST))
9176
9177
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR_OFST))
9178
9179
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR_OFST))
9180
9181
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR_OFST))
9182
9183
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR_OFST))
9184
9185
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR_OFST))
9186
9187
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR_OFST))
9188
9189
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR_OFST))
9190
9191
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_OFST 0xffd13300
9192
9193
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_OFST))
9194
9195
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_LB_ADDR ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR
9196
9197
#define ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_ADDR) + 0x100) - 1))
9198
9208
#define ALT_NOC_FW_DDR_L3_SCR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_EN_OFST))
9209
9210
#define ALT_NOC_FW_DDR_L3_SCR_EN_SET_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_EN_SET_OFST))
9211
9212
#define ALT_NOC_FW_DDR_L3_SCR_EN_CLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_EN_CLR_OFST))
9213
9214
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG0ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG0ADDR_OFST))
9215
9216
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG1ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG1ADDR_OFST))
9217
9218
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG2ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG2ADDR_OFST))
9219
9220
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG3ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG3ADDR_OFST))
9221
9222
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG4ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG4ADDR_OFST))
9223
9224
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG5ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG5ADDR_OFST))
9225
9226
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG6ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG6ADDR_OFST))
9227
9228
#define ALT_NOC_FW_DDR_L3_SCR_HPSREG7ADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_HPSREG7ADDR_OFST))
9229
9230
#define ALT_NOC_FW_DDR_L3_SCR_GLOB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + ALT_NOC_FW_DDR_L3_SCR_GLOB_OFST))
9231
9232
#define ALT_NOC_FW_DDR_L3_SCR_OFST 0xffd13400
9233
9234
#define ALT_NOC_FW_DDR_L3_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_DDR_L3_SCR_OFST))
9235
9236
#define ALT_NOC_FW_DDR_L3_SCR_LB_ADDR ALT_NOC_FW_DDR_L3_SCR_ADDR
9237
9238
#define ALT_NOC_FW_DDR_L3_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_DDR_L3_SCR_ADDR) + 0x100) - 1))
9239
9249
#define ALT_NOC_FW_H2F_SCR_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + ALT_NOC_FW_H2F_SCR_LWH2F_OFST))
9250
9251
#define ALT_NOC_FW_H2F_SCR_H2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + ALT_NOC_FW_H2F_SCR_H2F_OFST))
9252
9253
#define ALT_NOC_FW_H2F_SCR_OFST 0xffd13500
9254
9255
#define ALT_NOC_FW_H2F_SCR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_FW_H2F_SCR_OFST))
9256
9257
#define ALT_NOC_FW_H2F_SCR_LB_ADDR ALT_NOC_FW_H2F_SCR_ADDR
9258
9259
#define ALT_NOC_FW_H2F_SCR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_FW_H2F_SCR_ADDR) + 0x100) - 1))
9260
9270
#define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_COREID_OFST))
9271
9272
#define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_REVID_OFST))
9273
9274
#define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_OFST))
9275
9276
#define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_OFST))
9277
9278
#define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_OFST))
9279
9280
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_OFST))
9281
9282
#define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_OFST))
9283
9284
#define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_OFST))
9285
9286
#define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_OFST))
9287
9288
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_OFST))
9289
9290
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_OFST))
9291
9292
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_OFST))
9293
9294
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_OFST))
9295
9296
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_OFST))
9297
9298
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_OFST))
9299
9300
#define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_OFST))
9301
9302
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_OFST))
9303
9304
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_OFST))
9305
9306
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_OFST))
9307
9308
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_OFST))
9309
9310
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_OFST))
9311
9312
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_OFST))
9313
9314
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_OFST))
9315
9316
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_OFST))
9317
9318
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_OFST))
9319
9320
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_OFST))
9321
9322
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_OFST))
9323
9324
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_OFST))
9325
9326
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_OFST))
9327
9328
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_OFST))
9329
9330
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_OFST))
9331
9332
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_OFST))
9333
9334
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_OFST))
9335
9336
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_OFST))
9337
9338
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_OFST))
9339
9340
#define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_OFST))
9341
9342
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_OFST))
9343
9344
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_OFST))
9345
9346
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_OFST))
9347
9348
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_OFST))
9349
9350
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_OFST))
9351
9352
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_OFST))
9353
9354
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_OFST))
9355
9356
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_OFST))
9357
9358
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_OFST))
9359
9360
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_OFST))
9361
9362
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_OFST))
9363
9364
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_OFST))
9365
9366
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_OFST))
9367
9368
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_OFST))
9369
9370
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_OFST))
9371
9372
#define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_OFST))
9373
9374
#define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_OFST 0xffd14000
9375
9376
#define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_H2F_MAIN_PRB_OFST))
9377
9378
#define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_LB_ADDR ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR
9379
9380
#define ALT_NOC_MPU_PRB_H2F_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_H2F_MAIN_PRB_ADDR) + 0x400) - 1))
9381
9391
#define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_OFST))
9392
9393
#define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_OFST))
9394
9395
#define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_OFST))
9396
9397
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_OFST))
9398
9399
#define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_OFST))
9400
9401
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_OFST))
9402
9403
#define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_OFST))
9404
9405
#define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_OFST))
9406
9407
#define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_OFST))
9408
9409
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_OFST))
9410
9411
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_OFST))
9412
9413
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_OFST))
9414
9415
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_OFST))
9416
9417
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_OFST))
9418
9419
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_OFST))
9420
9421
#define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_OFST))
9422
9423
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_OFST))
9424
9425
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_OFST))
9426
9427
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_OFST))
9428
9429
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_OFST))
9430
9431
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_OFST))
9432
9433
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_OFST))
9434
9435
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_OFST))
9436
9437
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_OFST))
9438
9439
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_OFST))
9440
9441
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_OFST))
9442
9443
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_OFST))
9444
9445
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_OFST))
9446
9447
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_OFST))
9448
9449
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_OFST))
9450
9451
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_OFST))
9452
9453
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_OFST))
9454
9455
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_OFST))
9456
9457
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_OFST))
9458
9459
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_OFST))
9460
9461
#define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_OFST))
9462
9463
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_OFST))
9464
9465
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_OFST))
9466
9467
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_OFST))
9468
9469
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_OFST))
9470
9471
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_OFST))
9472
9473
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_OFST))
9474
9475
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_OFST))
9476
9477
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_OFST))
9478
9479
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_OFST))
9480
9481
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_OFST))
9482
9483
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_OFST))
9484
9485
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_OFST))
9486
9487
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_OFST))
9488
9489
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_OFST))
9490
9491
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_OFST))
9492
9493
#define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_OFST))
9494
9495
#define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_OFST 0xffd14400
9496
9497
#define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_OFST))
9498
9499
#define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_LB_ADDR ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR
9500
9501
#define ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_ADDR) + 0x400) - 1))
9502
9512
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_OFST))
9513
9514
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_OFST))
9515
9516
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_OFST))
9517
9518
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_OFST))
9519
9520
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_OFST))
9521
9522
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_OFST))
9523
9524
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_OFST))
9525
9526
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OFST))
9527
9528
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OFST))
9529
9530
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_OFST))
9531
9532
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_OFST))
9533
9534
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OFST 0xffd14800
9535
9536
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OFST))
9537
9538
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_LB_ADDR ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR
9539
9540
#define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_ADDR) + 0x80) - 1))
9541
9551
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_COREID_OFST))
9552
9553
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_REVID_OFST))
9554
9555
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBID_OFST))
9556
9557
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ATBEN_OFST))
9558
9559
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_SYNCPERIOD_OFST))
9560
9561
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_OFST 0xffd14900
9562
9563
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_OFST))
9564
9565
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_LB_ADDR ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR
9566
9567
#define ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ATBENDPT_ADDR) + 0x80) - 1))
9568
9578
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_COREID_OFST))
9579
9580
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_REVID_OFST))
9581
9582
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_FAULTEN_OFST))
9583
9584
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRVLD_OFST))
9585
9586
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRCLR_OFST))
9587
9588
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG0_OFST))
9589
9590
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG1_OFST))
9591
9592
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG3_OFST))
9593
9594
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG5_OFST))
9595
9596
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ERRLOG7_OFST))
9597
9598
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_OFST 0xffd14980
9599
9600
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_OFST))
9601
9602
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_LB_ADDR ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR
9603
9604
#define ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_CS_OBS_AT_ERRLOG_0_ADDR) + 0x80) - 1))
9605
9615
#define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_COREID_OFST))
9616
9617
#define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_REVID_OFST))
9618
9619
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_OFST))
9620
9621
#define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_OFST))
9622
9623
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_OFST))
9624
9625
#define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_OFST))
9626
9627
#define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_OFST))
9628
9629
#define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_OFST))
9630
9631
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_OFST))
9632
9633
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_OFST))
9634
9635
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_OFST))
9636
9637
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_OFST))
9638
9639
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_OFST))
9640
9641
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_OFST))
9642
9643
#define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_OFST))
9644
9645
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_OFST))
9646
9647
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_OFST))
9648
9649
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_OFST))
9650
9651
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_OFST))
9652
9653
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_OFST))
9654
9655
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_OFST))
9656
9657
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_OFST))
9658
9659
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_OFST))
9660
9661
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_OFST))
9662
9663
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_OFST))
9664
9665
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_OFST))
9666
9667
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_OFST))
9668
9669
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_OFST))
9670
9671
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_OFST))
9672
9673
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_OFST))
9674
9675
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_OFST))
9676
9677
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_OFST))
9678
9679
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_OFST))
9680
9681
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_OFST))
9682
9683
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_OFST))
9684
9685
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_OFST))
9686
9687
#define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_OFST))
9688
9689
#define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_OFST 0xffd15000
9690
9691
#define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_PRB_MPU_MAIN_PRB_OFST))
9692
9693
#define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_LB_ADDR ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR
9694
9695
#define ALT_NOC_MPU_PRB_MPU_MAIN_PRB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_PRB_MPU_MAIN_PRB_ADDR) + 0x400) - 1))
9696
9706
#define ALT_NOC_MPU_M0_MAIN_QOS_COREID_ADDR ALT_NOC_MPU_MAIN_QOS_COREID_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9707
9708
#define ALT_NOC_MPU_M0_MAIN_QOS_REVID_ADDR ALT_NOC_MPU_MAIN_QOS_REVID_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9709
9710
#define ALT_NOC_MPU_M0_MAIN_QOS_PRI_ADDR ALT_NOC_MPU_MAIN_QOS_PRI_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9711
9712
#define ALT_NOC_MPU_M0_MAIN_QOS_MOD_ADDR ALT_NOC_MPU_MAIN_QOS_MOD_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9713
9714
#define ALT_NOC_MPU_M0_MAIN_QOS_BWDTH_ADDR ALT_NOC_MPU_MAIN_QOS_BWDTH_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9715
9716
#define ALT_NOC_MPU_M0_MAIN_QOS_SAT_ADDR ALT_NOC_MPU_MAIN_QOS_SAT_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9717
9718
#define ALT_NOC_MPU_M0_MAIN_QOS_EXTCTL_ADDR ALT_NOC_MPU_MAIN_QOS_EXTCTL_ADDR(ALT_NOC_MPU_M0_MAIN_QOS_ADDR)
9719
9720
#define ALT_NOC_MPU_M0_MAIN_QOS_OFST 0xffd16000
9721
9722
#define ALT_NOC_MPU_M0_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M0_MAIN_QOS_OFST))
9723
9724
#define ALT_NOC_MPU_M0_MAIN_QOS_LB_ADDR ALT_NOC_MPU_M0_MAIN_QOS_ADDR
9725
9726
#define ALT_NOC_MPU_M0_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M0_MAIN_QOS_ADDR) + 0x80) - 1))
9727
9737
#define ALT_NOC_MPU_M1_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_COREID_OFST))
9738
9739
#define ALT_NOC_MPU_M1_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_REVID_OFST))
9740
9741
#define ALT_NOC_MPU_M1_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_PRI_OFST))
9742
9743
#define ALT_NOC_MPU_M1_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_MOD_OFST))
9744
9745
#define ALT_NOC_MPU_M1_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_BWDTH_OFST))
9746
9747
#define ALT_NOC_MPU_M1_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_SAT_OFST))
9748
9749
#define ALT_NOC_MPU_M1_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_EXTCTL_OFST))
9750
9751
#define ALT_NOC_MPU_M1_MAIN_QOS_OFST 0xffd16080
9752
9753
#define ALT_NOC_MPU_M1_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_M1_MAIN_QOS_OFST))
9754
9755
#define ALT_NOC_MPU_M1_MAIN_QOS_LB_ADDR ALT_NOC_MPU_M1_MAIN_QOS_ADDR
9756
9757
#define ALT_NOC_MPU_M1_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_M1_MAIN_QOS_ADDR) + 0x80) - 1))
9758
9768
#define ALT_NOC_MPU_F2H_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_COREID_OFST))
9769
9770
#define ALT_NOC_MPU_F2H_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_REVID_OFST))
9771
9772
#define ALT_NOC_MPU_F2H_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_PRI_OFST))
9773
9774
#define ALT_NOC_MPU_F2H_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_MOD_OFST))
9775
9776
#define ALT_NOC_MPU_F2H_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_BWDTH_OFST))
9777
9778
#define ALT_NOC_MPU_F2H_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_SAT_OFST))
9779
9780
#define ALT_NOC_MPU_F2H_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_EXTCTL_OFST))
9781
9782
#define ALT_NOC_MPU_F2H_AXI32_QOS_OFST 0xffd16100
9783
9784
#define ALT_NOC_MPU_F2H_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_AXI32_QOS_OFST))
9785
9786
#define ALT_NOC_MPU_F2H_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2H_AXI32_QOS_ADDR
9787
9788
#define ALT_NOC_MPU_F2H_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI32_QOS_ADDR) + 0x80) - 1))
9789
9799
#define ALT_NOC_MPU_F2H_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_COREID_OFST))
9800
9801
#define ALT_NOC_MPU_F2H_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_REVID_OFST))
9802
9803
#define ALT_NOC_MPU_F2H_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_PRI_OFST))
9804
9805
#define ALT_NOC_MPU_F2H_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_MOD_OFST))
9806
9807
#define ALT_NOC_MPU_F2H_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_BWDTH_OFST))
9808
9809
#define ALT_NOC_MPU_F2H_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_SAT_OFST))
9810
9811
#define ALT_NOC_MPU_F2H_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_EXTCTL_OFST))
9812
9813
#define ALT_NOC_MPU_F2H_AXI64_QOS_OFST 0xffd16180
9814
9815
#define ALT_NOC_MPU_F2H_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_AXI64_QOS_OFST))
9816
9817
#define ALT_NOC_MPU_F2H_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2H_AXI64_QOS_ADDR
9818
9819
#define ALT_NOC_MPU_F2H_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI64_QOS_ADDR) + 0x80) - 1))
9820
9830
#define ALT_NOC_MPU_F2H_AXI128_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_COREID_OFST))
9831
9832
#define ALT_NOC_MPU_F2H_AXI128_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_REVID_OFST))
9833
9834
#define ALT_NOC_MPU_F2H_AXI128_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_PRI_OFST))
9835
9836
#define ALT_NOC_MPU_F2H_AXI128_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_MOD_OFST))
9837
9838
#define ALT_NOC_MPU_F2H_AXI128_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_BWDTH_OFST))
9839
9840
#define ALT_NOC_MPU_F2H_AXI128_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_SAT_OFST))
9841
9842
#define ALT_NOC_MPU_F2H_AXI128_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_EXTCTL_OFST))
9843
9844
#define ALT_NOC_MPU_F2H_AXI128_QOS_OFST 0xffd16200
9845
9846
#define ALT_NOC_MPU_F2H_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2H_AXI128_QOS_OFST))
9847
9848
#define ALT_NOC_MPU_F2H_AXI128_QOS_LB_ADDR ALT_NOC_MPU_F2H_AXI128_QOS_ADDR
9849
9850
#define ALT_NOC_MPU_F2H_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2H_AXI128_QOS_ADDR) + 0x80) - 1))
9851
9861
#define ALT_NOC_MPU_DMA_M0_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_COREID_OFST))
9862
9863
#define ALT_NOC_MPU_DMA_M0_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_REVID_OFST))
9864
9865
#define ALT_NOC_MPU_DMA_M0_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_PRI_OFST))
9866
9867
#define ALT_NOC_MPU_DMA_M0_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_MOD_OFST))
9868
9869
#define ALT_NOC_MPU_DMA_M0_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_BWDTH_OFST))
9870
9871
#define ALT_NOC_MPU_DMA_M0_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_SAT_OFST))
9872
9873
#define ALT_NOC_MPU_DMA_M0_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_EXTCTL_OFST))
9874
9875
#define ALT_NOC_MPU_DMA_M0_QOS_OFST 0xffd16280
9876
9877
#define ALT_NOC_MPU_DMA_M0_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_DMA_M0_QOS_OFST))
9878
9879
#define ALT_NOC_MPU_DMA_M0_QOS_LB_ADDR ALT_NOC_MPU_DMA_M0_QOS_ADDR
9880
9881
#define ALT_NOC_MPU_DMA_M0_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_DMA_M0_QOS_ADDR) + 0x80) - 1))
9882
9892
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_COREID_OFST))
9893
9894
#define ALT_NOC_MPU_EMAC0_M_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_REVID_OFST))
9895
9896
#define ALT_NOC_MPU_EMAC0_M_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_PRI_OFST))
9897
9898
#define ALT_NOC_MPU_EMAC0_M_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_MOD_OFST))
9899
9900
#define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_OFST))
9901
9902
#define ALT_NOC_MPU_EMAC0_M_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_SAT_OFST))
9903
9904
#define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_OFST))
9905
9906
#define ALT_NOC_MPU_EMAC0_M_QOS_OFST 0xffd16300
9907
9908
#define ALT_NOC_MPU_EMAC0_M_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC0_M_QOS_OFST))
9909
9910
#define ALT_NOC_MPU_EMAC0_M_QOS_LB_ADDR ALT_NOC_MPU_EMAC0_M_QOS_ADDR
9911
9912
#define ALT_NOC_MPU_EMAC0_M_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_QOS_ADDR) + 0x80) - 1))
9913
9923
#define ALT_NOC_MPU_EMAC1_M_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_COREID_OFST))
9924
9925
#define ALT_NOC_MPU_EMAC1_M_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_REVID_OFST))
9926
9927
#define ALT_NOC_MPU_EMAC1_M_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_PRI_OFST))
9928
9929
#define ALT_NOC_MPU_EMAC1_M_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_MOD_OFST))
9930
9931
#define ALT_NOC_MPU_EMAC1_M_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_BWDTH_OFST))
9932
9933
#define ALT_NOC_MPU_EMAC1_M_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_SAT_OFST))
9934
9935
#define ALT_NOC_MPU_EMAC1_M_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_EXTCTL_OFST))
9936
9937
#define ALT_NOC_MPU_EMAC1_M_QOS_OFST 0xffd16380
9938
9939
#define ALT_NOC_MPU_EMAC1_M_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC1_M_QOS_OFST))
9940
9941
#define ALT_NOC_MPU_EMAC1_M_QOS_LB_ADDR ALT_NOC_MPU_EMAC1_M_QOS_ADDR
9942
9943
#define ALT_NOC_MPU_EMAC1_M_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC1_M_QOS_ADDR) + 0x80) - 1))
9944
9954
#define ALT_NOC_MPU_EMAC2_M_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_COREID_OFST))
9955
9956
#define ALT_NOC_MPU_EMAC2_M_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_REVID_OFST))
9957
9958
#define ALT_NOC_MPU_EMAC2_M_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_PRI_OFST))
9959
9960
#define ALT_NOC_MPU_EMAC2_M_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_MOD_OFST))
9961
9962
#define ALT_NOC_MPU_EMAC2_M_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_BWDTH_OFST))
9963
9964
#define ALT_NOC_MPU_EMAC2_M_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_SAT_OFST))
9965
9966
#define ALT_NOC_MPU_EMAC2_M_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_EXTCTL_OFST))
9967
9968
#define ALT_NOC_MPU_EMAC2_M_QOS_OFST 0xffd16400
9969
9970
#define ALT_NOC_MPU_EMAC2_M_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC2_M_QOS_OFST))
9971
9972
#define ALT_NOC_MPU_EMAC2_M_QOS_LB_ADDR ALT_NOC_MPU_EMAC2_M_QOS_ADDR
9973
9974
#define ALT_NOC_MPU_EMAC2_M_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC2_M_QOS_ADDR) + 0x80) - 1))
9975
9985
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_COREID_OFST))
9986
9987
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_REVID_OFST))
9988
9989
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_PRI_OFST))
9990
9991
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_MOD_OFST))
9992
9993
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_BWDTH_OFST))
9994
9995
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_SAT_OFST))
9996
9997
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_EXTCTL_OFST))
9998
9999
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_OFST 0xffd16480
10000
10001
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_USB0_M_MAIN_QOS_OFST))
10002
10003
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR
10004
10005
#define ALT_NOC_MPU_USB0_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_USB0_M_MAIN_QOS_ADDR) + 0x80) - 1))
10006
10016
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_COREID_OFST))
10017
10018
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_REVID_OFST))
10019
10020
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_PRI_OFST))
10021
10022
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_MOD_OFST))
10023
10024
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_BWDTH_OFST))
10025
10026
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_SAT_OFST))
10027
10028
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_EXTCTL_OFST))
10029
10030
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_OFST 0xffd16500
10031
10032
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_USB1_M_MAIN_QOS_OFST))
10033
10034
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR
10035
10036
#define ALT_NOC_MPU_USB1_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_USB1_M_MAIN_QOS_ADDR) + 0x80) - 1))
10037
10047
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_COREID_OFST))
10048
10049
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_REVID_OFST))
10050
10051
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_PRI_OFST))
10052
10053
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_MOD_OFST))
10054
10055
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_BWDTH_OFST))
10056
10057
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_SAT_OFST))
10058
10059
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_EXTCTL_OFST))
10060
10061
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_OFST 0xffd16580
10062
10063
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_NAND_M_MAIN_QOS_OFST))
10064
10065
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR
10066
10067
#define ALT_NOC_MPU_NAND_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_NAND_M_MAIN_QOS_ADDR) + 0x80) - 1))
10068
10078
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_COREID_OFST))
10079
10080
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_REVID_OFST))
10081
10082
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_PRI_OFST))
10083
10084
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_MOD_OFST))
10085
10086
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_BWDTH_OFST))
10087
10088
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_SAT_OFST))
10089
10090
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_EXTCTL_OFST))
10091
10092
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_OFST 0xffd16600
10093
10094
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_SDMMC_M_MAIN_QOS_OFST))
10095
10096
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_LB_ADDR ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR
10097
10098
#define ALT_NOC_MPU_SDMMC_M_MAIN_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_SDMMC_M_MAIN_QOS_ADDR) + 0x80) - 1))
10099
10109
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_COREID_OFST))
10110
10111
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_REVID_OFST))
10112
10113
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_PRI_OFST))
10114
10115
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_MOD_OFST))
10116
10117
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_BWDTH_OFST))
10118
10119
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_SAT_OFST))
10120
10121
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_EXTCTL_OFST))
10122
10123
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_OFST 0xffd16680
10124
10125
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI32_QOS_OFST))
10126
10127
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR
10128
10129
#define ALT_NOC_MPU_F2SDR0_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI32_QOS_ADDR) + 0x80) - 1))
10130
10140
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_COREID_OFST))
10141
10142
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_REVID_OFST))
10143
10144
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_PRI_OFST))
10145
10146
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_MOD_OFST))
10147
10148
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_BWDTH_OFST))
10149
10150
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_SAT_OFST))
10151
10152
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_EXTCTL_OFST))
10153
10154
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_OFST 0xffd16700
10155
10156
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI64_QOS_OFST))
10157
10158
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR
10159
10160
#define ALT_NOC_MPU_F2SDR0_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI64_QOS_ADDR) + 0x80) - 1))
10161
10171
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_COREID_OFST))
10172
10173
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_REVID_OFST))
10174
10175
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_PRI_OFST))
10176
10177
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_MOD_OFST))
10178
10179
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_BWDTH_OFST))
10180
10181
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_SAT_OFST))
10182
10183
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_EXTCTL_OFST))
10184
10185
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_OFST 0xffd16780
10186
10187
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR0_AXI128_QOS_OFST))
10188
10189
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_LB_ADDR ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR
10190
10191
#define ALT_NOC_MPU_F2SDR0_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR0_AXI128_QOS_ADDR) + 0x80) - 1))
10192
10202
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_COREID_OFST))
10203
10204
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_REVID_OFST))
10205
10206
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_PRI_OFST))
10207
10208
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_MOD_OFST))
10209
10210
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_BWDTH_OFST))
10211
10212
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_SAT_OFST))
10213
10214
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_EXTCTL_OFST))
10215
10216
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_OFST 0xffd16800
10217
10218
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI32_QOS_OFST))
10219
10220
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR
10221
10222
#define ALT_NOC_MPU_F2SDR1_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI32_QOS_ADDR) + 0x80) - 1))
10223
10233
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_COREID_OFST))
10234
10235
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_REVID_OFST))
10236
10237
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_PRI_OFST))
10238
10239
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_MOD_OFST))
10240
10241
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_BWDTH_OFST))
10242
10243
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_SAT_OFST))
10244
10245
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_EXTCTL_OFST))
10246
10247
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_OFST 0xffd16880
10248
10249
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR1_AXI64_QOS_OFST))
10250
10251
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR
10252
10253
#define ALT_NOC_MPU_F2SDR1_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR1_AXI64_QOS_ADDR) + 0x80) - 1))
10254
10264
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_COREID_OFST))
10265
10266
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_REVID_OFST))
10267
10268
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_PRI_OFST))
10269
10270
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_MOD_OFST))
10271
10272
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_BWDTH_OFST))
10273
10274
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_SAT_OFST))
10275
10276
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_EXTCTL_OFST))
10277
10278
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_OFST 0xffd16900
10279
10280
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI32_QOS_OFST))
10281
10282
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_LB_ADDR ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR
10283
10284
#define ALT_NOC_MPU_F2SDR2_AXI32_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI32_QOS_ADDR) + 0x80) - 1))
10285
10295
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_COREID_OFST))
10296
10297
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_REVID_OFST))
10298
10299
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_PRI_OFST))
10300
10301
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_MOD_OFST))
10302
10303
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_BWDTH_OFST))
10304
10305
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_SAT_OFST))
10306
10307
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_EXTCTL_OFST))
10308
10309
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_OFST 0xffd16980
10310
10311
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI64_QOS_OFST))
10312
10313
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_LB_ADDR ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR
10314
10315
#define ALT_NOC_MPU_F2SDR2_AXI64_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI64_QOS_ADDR) + 0x80) - 1))
10316
10326
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_COREID_OFST))
10327
10328
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_REVID_OFST))
10329
10330
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_PRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_PRI_OFST))
10331
10332
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_MOD_OFST))
10333
10334
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_BWDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_BWDTH_OFST))
10335
10336
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_SAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_SAT_OFST))
10337
10338
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_EXTCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_EXTCTL_OFST))
10339
10340
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_OFST 0xffd17000
10341
10342
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_F2SDR2_AXI128_QOS_OFST))
10343
10344
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_LB_ADDR ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR
10345
10346
#define ALT_NOC_MPU_F2SDR2_AXI128_QOS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_F2SDR2_AXI128_QOS_ADDR) + 0x80) - 1))
10347
10357
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_OFST))
10358
10359
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_OFST))
10360
10361
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_OFST))
10362
10363
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_OFST))
10364
10365
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_OFST))
10366
10367
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_OFST))
10368
10369
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_OFST))
10370
10371
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_OFST))
10372
10373
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_OFST))
10374
10375
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_OFST))
10376
10377
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_OFST))
10378
10379
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OFST 0xffd17080
10380
10381
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OFST))
10382
10383
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_LB_ADDR ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR
10384
10385
#define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDR) + 0x80) - 1))
10386
10396
#define ALT_DMA_NSCTL_OFST 0xffda0000
10397
10398
#define ALT_DMA_NSCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCTL_OFST))
10399
10400
#define ALT_DMA_NSCTL_LB_ADDR ALT_DMA_NSCTL_ADDR
10401
10402
#define ALT_DMA_NSCTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCTL_ADDR) + 0x60) - 1))
10403
10413
#define ALT_DMA_NSCHANNELSTAT_OFST 0xffda0100
10414
10415
#define ALT_DMA_NSCHANNELSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCHANNELSTAT_OFST))
10416
10417
#define ALT_DMA_NSCHANNELSTAT_LB_ADDR ALT_DMA_NSCHANNELSTAT_ADDR
10418
10419
#define ALT_DMA_NSCHANNELSTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCHANNELSTAT_ADDR) + 0x40) - 1))
10420
10430
#define ALT_DMA_NSAXISTAT_OFST 0xffda0400
10431
10432
#define ALT_DMA_NSAXISTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSAXISTAT_OFST))
10433
10434
#define ALT_DMA_NSAXISTAT_LB_ADDR ALT_DMA_NSAXISTAT_ADDR
10435
10436
#define ALT_DMA_NSAXISTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSAXISTAT_ADDR) + 0x100) - 1))
10437
10447
#define ALT_DMA_NSDBG_OFST 0xffda0d00
10448
10449
#define ALT_DMA_NSDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSDBG_OFST))
10450
10451
#define ALT_DMA_NSDBG_LB_ADDR ALT_DMA_NSDBG_ADDR
10452
10453
#define ALT_DMA_NSDBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSDBG_ADDR) + 0x10) - 1))
10454
10464
#define ALT_DMA_NSCFG_OFST 0xffda0e00
10465
10466
#define ALT_DMA_NSCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCFG_OFST))
10467
10468
#define ALT_DMA_NSCFG_LB_ADDR ALT_DMA_NSCFG_ADDR
10469
10470
#define ALT_DMA_NSCFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCFG_ADDR) + 0x20) - 1))
10471
10481
#define ALT_DMA_NSCOMPID_OFST 0xffda0fe0
10482
10483
#define ALT_DMA_NSCOMPID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_NSCOMPID_OFST))
10484
10485
#define ALT_DMA_NSCOMPID_LB_ADDR ALT_DMA_NSCOMPID_ADDR
10486
10487
#define ALT_DMA_NSCOMPID_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_NSCOMPID_ADDR) + 0x20) - 1))
10488
10498
#define ALT_DMA_SCTL_OFST 0xffda1000
10499
10500
#define ALT_DMA_SCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCTL_OFST))
10501
10502
#define ALT_DMA_SCTL_LB_ADDR ALT_DMA_SCTL_ADDR
10503
10504
#define ALT_DMA_SCTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCTL_ADDR) + 0x60) - 1))
10505
10515
#define ALT_DMA_SCHANNELSTAT_OFST 0xffda1100
10516
10517
#define ALT_DMA_SCHANNELSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCHANNELSTAT_OFST))
10518
10519
#define ALT_DMA_SCHANNELSTAT_LB_ADDR ALT_DMA_SCHANNELSTAT_ADDR
10520
10521
#define ALT_DMA_SCHANNELSTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCHANNELSTAT_ADDR) + 0x40) - 1))
10522
10532
#define ALT_DMA_SAXISTAT_OFST 0xffda1400
10533
10534
#define ALT_DMA_SAXISTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SAXISTAT_OFST))
10535
10536
#define ALT_DMA_SAXISTAT_LB_ADDR ALT_DMA_SAXISTAT_ADDR
10537
10538
#define ALT_DMA_SAXISTAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SAXISTAT_ADDR) + 0x100) - 1))
10539
10549
#define ALT_DMA_SDBG_OFST 0xffda1d00
10550
10551
#define ALT_DMA_SDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SDBG_OFST))
10552
10553
#define ALT_DMA_SDBG_LB_ADDR ALT_DMA_SDBG_ADDR
10554
10555
#define ALT_DMA_SDBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SDBG_ADDR) + 0x10) - 1))
10556
10566
#define ALT_DMA_SCFG_OFST 0xffda1e00
10567
10568
#define ALT_DMA_SCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCFG_OFST))
10569
10570
#define ALT_DMA_SCFG_LB_ADDR ALT_DMA_SCFG_ADDR
10571
10572
#define ALT_DMA_SCFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCFG_ADDR) + 0x20) - 1))
10573
10583
#define ALT_DMA_SCOMPID_OFST 0xffda1fe0
10584
10585
#define ALT_DMA_SCOMPID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMA_SCOMPID_OFST))
10586
10587
#define ALT_DMA_SCOMPID_LB_ADDR ALT_DMA_SCOMPID_ADDR
10588
10589
#define ALT_DMA_SCOMPID_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMA_SCOMPID_ADDR) + 0x20) - 1))
10590
10600
#define ALT_SPIS0_CTLR0_ADDR ALT_SPIS_CTLR0_ADDR(ALT_SPIS0_ADDR)
10601
10602
#define ALT_SPIS0_SPIENR_ADDR ALT_SPIS_SPIENR_ADDR(ALT_SPIS0_ADDR)
10603
10604
#define ALT_SPIS0_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS0_ADDR)
10605
10606
#define ALT_SPIS0_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS0_ADDR)
10607
10608
#define ALT_SPIS0_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS0_ADDR)
10609
10610
#define ALT_SPIS0_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS0_ADDR)
10611
10612
#define ALT_SPIS0_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS0_ADDR)
10613
10614
#define ALT_SPIS0_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS0_ADDR)
10615
10616
#define ALT_SPIS0_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS0_ADDR)
10617
10618
#define ALT_SPIS0_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS0_ADDR)
10619
10620
#define ALT_SPIS0_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS0_ADDR)
10621
10622
#define ALT_SPIS0_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS0_ADDR)
10623
10624
#define ALT_SPIS0_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS0_ADDR)
10625
10626
#define ALT_SPIS0_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS0_ADDR)
10627
10628
#define ALT_SPIS0_MSTICR_ADDR ALT_SPIS_MSTICR_ADDR(ALT_SPIS0_ADDR)
10629
10630
#define ALT_SPIS0_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS0_ADDR)
10631
10632
#define ALT_SPIS0_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS0_ADDR)
10633
10634
#define ALT_SPIS0_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS0_ADDR)
10635
10636
#define ALT_SPIS0_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS0_ADDR)
10637
10638
#define ALT_SPIS0_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS0_ADDR)
10639
10640
#define ALT_SPIS0_SPI_VER_ID_ADDR ALT_SPIS_SPI_VER_ID_ADDR(ALT_SPIS0_ADDR)
10641
10642
#define ALT_SPIS0_DR_ADDR ALT_SPIS_DR_ADDR(ALT_SPIS0_ADDR)
10643
10644
#define ALT_SPIS0_OFST 0xffda2000
10645
10646
#define ALT_SPIS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS0_OFST))
10647
10648
#define ALT_SPIS0_LB_ADDR ALT_SPIS0_ADDR
10649
10650
#define ALT_SPIS0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS0_ADDR) + 0x80) - 1))
10651
10661
#define ALT_SPIS1_CTLR0_ADDR ALT_SPIS_CTLR0_ADDR(ALT_SPIS1_ADDR)
10662
10663
#define ALT_SPIS1_SPIENR_ADDR ALT_SPIS_SPIENR_ADDR(ALT_SPIS1_ADDR)
10664
10665
#define ALT_SPIS1_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS1_ADDR)
10666
10667
#define ALT_SPIS1_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS1_ADDR)
10668
10669
#define ALT_SPIS1_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS1_ADDR)
10670
10671
#define ALT_SPIS1_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS1_ADDR)
10672
10673
#define ALT_SPIS1_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS1_ADDR)
10674
10675
#define ALT_SPIS1_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS1_ADDR)
10676
10677
#define ALT_SPIS1_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS1_ADDR)
10678
10679
#define ALT_SPIS1_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS1_ADDR)
10680
10681
#define ALT_SPIS1_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS1_ADDR)
10682
10683
#define ALT_SPIS1_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS1_ADDR)
10684
10685
#define ALT_SPIS1_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS1_ADDR)
10686
10687
#define ALT_SPIS1_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS1_ADDR)
10688
10689
#define ALT_SPIS1_MSTICR_ADDR ALT_SPIS_MSTICR_ADDR(ALT_SPIS1_ADDR)
10690
10691
#define ALT_SPIS1_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS1_ADDR)
10692
10693
#define ALT_SPIS1_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS1_ADDR)
10694
10695
#define ALT_SPIS1_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS1_ADDR)
10696
10697
#define ALT_SPIS1_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS1_ADDR)
10698
10699
#define ALT_SPIS1_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS1_ADDR)
10700
10701
#define ALT_SPIS1_SPI_VER_ID_ADDR ALT_SPIS_SPI_VER_ID_ADDR(ALT_SPIS1_ADDR)
10702
10703
#define ALT_SPIS1_DR_ADDR ALT_SPIS_DR_ADDR(ALT_SPIS1_ADDR)
10704
10705
#define ALT_SPIS1_OFST 0xffda3000
10706
10707
#define ALT_SPIS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS1_OFST))
10708
10709
#define ALT_SPIS1_LB_ADDR ALT_SPIS1_ADDR
10710
10711
#define ALT_SPIS1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS1_ADDR) + 0x80) - 1))
10712
10722
#define ALT_SPIM0_CTLR0_ADDR ALT_SPIM_CTLR0_ADDR(ALT_SPIM0_ADDR)
10723
10724
#define ALT_SPIM0_CTLR1_ADDR ALT_SPIM_CTLR1_ADDR(ALT_SPIM0_ADDR)
10725
10726
#define ALT_SPIM0_SPIENR_ADDR ALT_SPIM_SPIENR_ADDR(ALT_SPIM0_ADDR)
10727
10728
#define ALT_SPIM0_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM0_ADDR)
10729
10730
#define ALT_SPIM0_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM0_ADDR)
10731
10732
#define ALT_SPIM0_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM0_ADDR)
10733
10734
#define ALT_SPIM0_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM0_ADDR)
10735
10736
#define ALT_SPIM0_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM0_ADDR)
10737
10738
#define ALT_SPIM0_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM0_ADDR)
10739
10740
#define ALT_SPIM0_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM0_ADDR)
10741
10742
#define ALT_SPIM0_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM0_ADDR)
10743
10744
#define ALT_SPIM0_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM0_ADDR)
10745
10746
#define ALT_SPIM0_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM0_ADDR)
10747
10748
#define ALT_SPIM0_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM0_ADDR)
10749
10750
#define ALT_SPIM0_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM0_ADDR)
10751
10752
#define ALT_SPIM0_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM0_ADDR)
10753
10754
#define ALT_SPIM0_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM0_ADDR)
10755
10756
#define ALT_SPIM0_MSTICR_ADDR ALT_SPIM_MSTICR_ADDR(ALT_SPIM0_ADDR)
10757
10758
#define ALT_SPIM0_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM0_ADDR)
10759
10760
#define ALT_SPIM0_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM0_ADDR)
10761
10762
#define ALT_SPIM0_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM0_ADDR)
10763
10764
#define ALT_SPIM0_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM0_ADDR)
10765
10766
#define ALT_SPIM0_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM0_ADDR)
10767
10768
#define ALT_SPIM0_SPI_VER_ID_ADDR ALT_SPIM_SPI_VER_ID_ADDR(ALT_SPIM0_ADDR)
10769
10770
#define ALT_SPIM0_DR_ADDR ALT_SPIM_DR_ADDR(ALT_SPIM0_ADDR)
10771
10772
#define ALT_SPIM0_RX_SMPL_DLY_ADDR ALT_SPIM_RX_SMPL_DLY_ADDR(ALT_SPIM0_ADDR)
10773
10774
#define ALT_SPIM0_RSVD_0_ADDR ALT_SPIM_RSVD_0_ADDR(ALT_SPIM0_ADDR)
10775
10776
#define ALT_SPIM0_RSVD_1_ADDR ALT_SPIM_RSVD_1_ADDR(ALT_SPIM0_ADDR)
10777
10778
#define ALT_SPIM0_RSVD_2_ADDR ALT_SPIM_RSVD_2_ADDR(ALT_SPIM0_ADDR)
10779
10780
#define ALT_SPIM0_OFST 0xffda4000
10781
10782
#define ALT_SPIM0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM0_OFST))
10783
10784
#define ALT_SPIM0_LB_ADDR ALT_SPIM0_ADDR
10785
10786
#define ALT_SPIM0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM0_ADDR) + 0x100) - 1))
10787
10797
#define ALT_SPIM1_CTLR0_ADDR ALT_SPIM_CTLR0_ADDR(ALT_SPIM1_ADDR)
10798
10799
#define ALT_SPIM1_CTLR1_ADDR ALT_SPIM_CTLR1_ADDR(ALT_SPIM1_ADDR)
10800
10801
#define ALT_SPIM1_SPIENR_ADDR ALT_SPIM_SPIENR_ADDR(ALT_SPIM1_ADDR)
10802
10803
#define ALT_SPIM1_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM1_ADDR)
10804
10805
#define ALT_SPIM1_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM1_ADDR)
10806
10807
#define ALT_SPIM1_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM1_ADDR)
10808
10809
#define ALT_SPIM1_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM1_ADDR)
10810
10811
#define ALT_SPIM1_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM1_ADDR)
10812
10813
#define ALT_SPIM1_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM1_ADDR)
10814
10815
#define ALT_SPIM1_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM1_ADDR)
10816
10817
#define ALT_SPIM1_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM1_ADDR)
10818
10819
#define ALT_SPIM1_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM1_ADDR)
10820
10821
#define ALT_SPIM1_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM1_ADDR)
10822
10823
#define ALT_SPIM1_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM1_ADDR)
10824
10825
#define ALT_SPIM1_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM1_ADDR)
10826
10827
#define ALT_SPIM1_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM1_ADDR)
10828
10829
#define ALT_SPIM1_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM1_ADDR)
10830
10831
#define ALT_SPIM1_MSTICR_ADDR ALT_SPIM_MSTICR_ADDR(ALT_SPIM1_ADDR)
10832
10833
#define ALT_SPIM1_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM1_ADDR)
10834
10835
#define ALT_SPIM1_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM1_ADDR)
10836
10837
#define ALT_SPIM1_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM1_ADDR)
10838
10839
#define ALT_SPIM1_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM1_ADDR)
10840
10841
#define ALT_SPIM1_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM1_ADDR)
10842
10843
#define ALT_SPIM1_SPI_VER_ID_ADDR ALT_SPIM_SPI_VER_ID_ADDR(ALT_SPIM1_ADDR)
10844
10845
#define ALT_SPIM1_DR_ADDR ALT_SPIM_DR_ADDR(ALT_SPIM1_ADDR)
10846
10847
#define ALT_SPIM1_RX_SMPL_DLY_ADDR ALT_SPIM_RX_SMPL_DLY_ADDR(ALT_SPIM1_ADDR)
10848
10849
#define ALT_SPIM1_RSVD_0_ADDR ALT_SPIM_RSVD_0_ADDR(ALT_SPIM1_ADDR)
10850
10851
#define ALT_SPIM1_RSVD_1_ADDR ALT_SPIM_RSVD_1_ADDR(ALT_SPIM1_ADDR)
10852
10853
#define ALT_SPIM1_RSVD_2_ADDR ALT_SPIM_RSVD_2_ADDR(ALT_SPIM1_ADDR)
10854
10855
#define ALT_SPIM1_OFST 0xffda5000
10856
10857
#define ALT_SPIM1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM1_OFST))
10858
10859
#define ALT_SPIM1_LB_ADDR ALT_SPIM1_ADDR
10860
10861
#define ALT_SPIM1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM1_ADDR) + 0x100) - 1))
10862
10872
#define ALT_OCRAM_OFST 0xffe00000
10873
10874
#define ALT_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_OCRAM_OFST))
10875
10876
#define ALT_OCRAM_LB_ADDR ALT_OCRAM_ADDR
10877
10878
#define ALT_OCRAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_OCRAM_ADDR) + 0x40000) - 1))
10879
10889
#define ALT_ROM_OFST 0xfffc0000
10890
10891
#define ALT_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ROM_OFST))
10892
10893
#define ALT_ROM_LB_ADDR ALT_ROM_ADDR
10894
10895
#define ALT_ROM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ROM_ADDR) + 0x20000) - 1))
10896
10906
#define ALT_MPU_REGS_MPUSCU_OFST 0xffffc000
10907
10908
#define ALT_MPU_REGS_MPUSCU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUSCU_OFST))
10909
10910
#define ALT_MPU_REGS_MPUSCU_LB_ADDR ALT_MPU_REGS_MPUSCU_ADDR
10911
10912
#define ALT_MPU_REGS_MPUSCU_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUSCU_ADDR) + 0x100) - 1))
10913
10923
#define ALT_MPU_REGS_MPUGIC_OFST 0xffffc100
10924
10925
#define ALT_MPU_REGS_MPUGIC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUGIC_OFST))
10926
10927
#define ALT_MPU_REGS_MPUGIC_LB_ADDR ALT_MPU_REGS_MPUGIC_ADDR
10928
10929
#define ALT_MPU_REGS_MPUGIC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUGIC_ADDR) + 0x100) - 1))
10930
10940
#define ALT_MPU_REGS_MPUGLOBTMR_OFST 0xffffc200
10941
10942
#define ALT_MPU_REGS_MPUGLOBTMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUGLOBTMR_OFST))
10943
10944
#define ALT_MPU_REGS_MPUGLOBTMR_LB_ADDR ALT_MPU_REGS_MPUGLOBTMR_ADDR
10945
10946
#define ALT_MPU_REGS_MPUGLOBTMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUGLOBTMR_ADDR) + 0x100) - 1))
10947
10957
#define ALT_MPU_REGS_MPUPRIVATETMR_OFST 0xffffc600
10958
10959
#define ALT_MPU_REGS_MPUPRIVATETMR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUPRIVATETMR_OFST))
10960
10961
#define ALT_MPU_REGS_MPUPRIVATETMR_LB_ADDR ALT_MPU_REGS_MPUPRIVATETMR_ADDR
10962
10963
#define ALT_MPU_REGS_MPUPRIVATETMR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUPRIVATETMR_ADDR) + 0x100) - 1))
10964
10974
#define ALT_MPU_REGS_MPUINTRDIST_OFST 0xffffd000
10975
10976
#define ALT_MPU_REGS_MPUINTRDIST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPU_REGS_MPUINTRDIST_OFST))
10977
10978
#define ALT_MPU_REGS_MPUINTRDIST_LB_ADDR ALT_MPU_REGS_MPUINTRDIST_ADDR
10979
10980
#define ALT_MPU_REGS_MPUINTRDIST_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPU_REGS_MPUINTRDIST_ADDR) + 0x1000) - 1))
10981
10991
#define ALT_L2_REGS_L2TYPE_OFST 0xfffff000
10992
10993
#define ALT_L2_REGS_L2TYPE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2TYPE_OFST))
10994
10995
#define ALT_L2_REGS_L2TYPE_LB_ADDR ALT_L2_REGS_L2TYPE_ADDR
10996
10997
#define ALT_L2_REGS_L2TYPE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2TYPE_ADDR) + 0x100) - 1))
10998
11008
#define ALT_L2_REGS_L2CTL_OFST 0xfffff100
11009
11010
#define ALT_L2_REGS_L2CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2CTL_OFST))
11011
11012
#define ALT_L2_REGS_L2CTL_LB_ADDR ALT_L2_REGS_L2CTL_ADDR
11013
11014
#define ALT_L2_REGS_L2CTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2CTL_ADDR) + 0x100) - 1))
11015
11025
#define ALT_L2_REGS_L2INT_OFST 0xfffff200
11026
11027
#define ALT_L2_REGS_L2INT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2INT_OFST))
11028
11029
#define ALT_L2_REGS_L2INT_LB_ADDR ALT_L2_REGS_L2INT_ADDR
11030
11031
#define ALT_L2_REGS_L2INT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2INT_ADDR) + 0x100) - 1))
11032
11042
#define ALT_L2_REGS_L2MAINTENANCE_OFST 0xfffff700
11043
11044
#define ALT_L2_REGS_L2MAINTENANCE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2MAINTENANCE_OFST))
11045
11046
#define ALT_L2_REGS_L2MAINTENANCE_LB_ADDR ALT_L2_REGS_L2MAINTENANCE_ADDR
11047
11048
#define ALT_L2_REGS_L2MAINTENANCE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2MAINTENANCE_ADDR) + 0x100) - 1))
11049
11059
#define ALT_L2_REGS_L2LOCKDOWN_OFST 0xfffff900
11060
11061
#define ALT_L2_REGS_L2LOCKDOWN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2LOCKDOWN_OFST))
11062
11063
#define ALT_L2_REGS_L2LOCKDOWN_LB_ADDR ALT_L2_REGS_L2LOCKDOWN_ADDR
11064
11065
#define ALT_L2_REGS_L2LOCKDOWN_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2LOCKDOWN_ADDR) + 0x100) - 1))
11066
11076
#define ALT_L2_REGS_L2ADDRFLT_OFST 0xfffffc00
11077
11078
#define ALT_L2_REGS_L2ADDRFLT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2ADDRFLT_OFST))
11079
11080
#define ALT_L2_REGS_L2ADDRFLT_LB_ADDR ALT_L2_REGS_L2ADDRFLT_ADDR
11081
11082
#define ALT_L2_REGS_L2ADDRFLT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2ADDRFLT_ADDR) + 0x100) - 1))
11083
11093
#define ALT_L2_REGS_L2DBG_OFST 0xffffff00
11094
11095
#define ALT_L2_REGS_L2DBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L2_REGS_L2DBG_OFST))
11096
11097
#define ALT_L2_REGS_L2DBG_LB_ADDR ALT_L2_REGS_L2DBG_ADDR
11098
11099
#define ALT_L2_REGS_L2DBG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L2_REGS_L2DBG_ADDR) + 0x100) - 1))
11100
11102
#ifdef __ASSEMBLY__
11103
#define ALT_CAST(type, ptr) ptr
11104
#else
/* __ASSEMBLY__ */
11105
#define ALT_CAST(type, ptr) ((type) (ptr))
11106
#endif
/* __ASSEMBLY__ */
11107
11363
#ifdef __cplusplus
11364
}
11365
#endif
/* __cplusplus */
11366
#endif
/* __ALT_SOCAL_HPS_H__ */
11367
include
soc_a10
socal
hps.h
Generated on Tue Sep 8 2015 13:33:06 for Altera SoCAL by
1.8.2