Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : timersrawintstat

Description

Name: Timers Raw Interrupt Status Register

Size: 1-9 bits

Address Offset: 0xa8

Read/Write Access: Read

Register Layout

Bits Access Reset Description
[0] R 0x0 ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT
[31:1] ??? 0x0 UNDEFINED

Field : timersrawintstat

The register contains the unmasked interrupt status of all timers in

the component.

0 = either timer_intr or timer_intr_n is not active prior to masking

1 = either timer_intr or timer_intr_n is active prior to masking.

Field Enumeration Values:

Enum Value Description
ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_E_INACT 0x0 Timer1 interrupt is not active
ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_E_ACT 0x1 Timer1 interrupt is active

Field Access Macros:

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_E_INACT   0x0
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_E_ACT   0x1
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_LSB   0
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_MSB   0
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_WIDTH   1
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_SET_MSK   0x00000001
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_CLR_MSK   0xfffffffe
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_RESET   0x0
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_SET(value)   (((value) << 0) & 0x00000001)
 

Data Structures

struct  ALT_TMR_TMRSRAWINTSTAT_s
 

Macros

#define ALT_TMR_TMRSRAWINTSTAT_RESET   0x00000000
 
#define ALT_TMR_TMRSRAWINTSTAT_OFST   0xa8
 
#define ALT_TMR_TMRSRAWINTSTAT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TMRSRAWINTSTAT_OFST))
 

Typedefs

typedef struct
ALT_TMR_TMRSRAWINTSTAT_s 
ALT_TMR_TMRSRAWINTSTAT_t
 

Data Structure Documentation

struct ALT_TMR_TMRSRAWINTSTAT_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_TMR_TMRSRAWINTSTAT.

Data Fields
const uint32_t timersrawintstat: 1 ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT
uint32_t __pad0__: 31 UNDEFINED

Macro Definitions

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_E_INACT   0x0

Enumerated value for register field ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT

Timer1 interrupt is not active

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_E_ACT   0x1

Enumerated value for register field ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT

Timer1 interrupt is active

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_LSB   0

The Least Significant Bit (LSB) position of the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_MSB   0

The Most Significant Bit (MSB) position of the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_WIDTH   1

The width in bits of the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_SET_MSK   0x00000001

The mask used to set the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field value.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_CLR_MSK   0xfffffffe

The mask used to clear the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field value.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_RESET   0x0

The reset value of the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT field value from a register.

#define ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_TMR_TMRSRAWINTSTAT_TMRSRAWINTSTAT register field value suitable for setting the register.

#define ALT_TMR_TMRSRAWINTSTAT_RESET   0x00000000

The reset value of the ALT_TMR_TMRSRAWINTSTAT register.

#define ALT_TMR_TMRSRAWINTSTAT_OFST   0xa8

The byte offset of the ALT_TMR_TMRSRAWINTSTAT register from the beginning of the component.

#define ALT_TMR_TMRSRAWINTSTAT_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_TMR_TMRSRAWINTSTAT_OFST))

The address of the ALT_TMR_TMRSRAWINTSTAT register.

Typedef Documentation

The typedef declaration for register ALT_TMR_TMRSRAWINTSTAT.