Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Register 453 (System Time - Nanoseconds Update Register) - gmacgrp_system_time_nanoseconds_update

Description

Update system time

Register Layout

Bits Access Reset Description
[30:0] RW 0x0 Timestamp Sub Second
[31] RW 0x0 Add or subtract time

Field : Timestamp Sub Second - tsss

The value in this field has the sub second representation of time, with an accuracy of 0.46 ns. When bit 9 (TSCTRLSSR) is set in Register 448 (Timestamp Control Register), each bit represents 1 ns and the programmed value should not exceed 0x3B9A_C9FF.

Field Access Macros:

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_LSB   0
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_MSB   30
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_WIDTH   31
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_SET_MSK   0x7fffffff
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_CLR_MSK   0x80000000
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_RESET   0x0
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_GET(value)   (((value) & 0x7fffffff) >> 0)
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_SET(value)   (((value) << 0) & 0x7fffffff)
 

Field : Add or subtract time - addsub

When this bit is set, the time value is subtracted with the contents of the update register. When this bit is reset, the time value is added with the contents of the update register.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_E_DISD | 0x0 | ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_E_DISD   0x0
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_E_END   0x1
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_LSB   31
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_MSB   31
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_WIDTH   1
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_SET_MSK   0x80000000
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_CLR_MSK   0x7fffffff
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_RESET   0x0
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_s
 

Macros

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_RESET   0x00000000
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_OFST   0x714
 
#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_OFST))
 

Typedefs

typedef struct
ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_s 
ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_t
 

Data Structure Documentation

struct ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE.

Data Fields
uint32_t tsss: 31 Timestamp Sub Second
uint32_t addsub: 1 Add or subtract time

Macro Definitions

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_LSB   0

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_MSB   30

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_WIDTH   31

The width in bits of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_SET_MSK   0x7fffffff

The mask used to set the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field value.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_CLR_MSK   0x80000000

The mask used to clear the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field value.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_RESET   0x0

The reset value of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_GET (   value)    (((value) & 0x7fffffff) >> 0)

Extracts the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS field value from a register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS_SET (   value)    (((value) << 0) & 0x7fffffff)

Produces a ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_TSSS register field value suitable for setting the register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_E_DISD   0x0

Enumerated value for register field ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_E_END   0x1

Enumerated value for register field ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_LSB   31

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_MSB   31

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_WIDTH   1

The width in bits of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_SET_MSK   0x80000000

The mask used to set the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field value.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_CLR_MSK   0x7fffffff

The mask used to clear the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field value.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_RESET   0x0

The reset value of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB field value from a register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDSUB register field value suitable for setting the register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_RESET   0x00000000

The reset value of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE register.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_OFST   0x714

The byte offset of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE register from the beginning of the component.

#define ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_OFST))

The address of the ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE register.

Typedef Documentation