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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Contains fields that control bypassing each PLL.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x1 | Main PLL Bypass |
[1] | RW | 0x1 | SDRAM PLL Bypass |
[2] | RW | 0x0 | SDRAM PLL Bypass Source |
[3] | RW | 0x1 | Peripheral PLL Bypass |
[4] | RW | 0x0 | Peripheral PLL Bypass Source |
[31:5] | ??? | 0x0 | UNDEFINED |
Field : Main PLL Bypass - mainpll | |
When set, causes the Main PLL VCO and counters to be bypassed so that all clocks generated by the Main PLL are directly driven from the Main PLL input clock. The bypass source for Main PLL is the external eosc1_clk. The reset value for this bit is applied on a cold reset. Warm reset has no affect on this bit. Field Access Macros: | |
#define | ALT_CLKMGR_BYPASS_MAINPLL_LSB 0 |
#define | ALT_CLKMGR_BYPASS_MAINPLL_MSB 0 |
#define | ALT_CLKMGR_BYPASS_MAINPLL_WIDTH 1 |
#define | ALT_CLKMGR_BYPASS_MAINPLL_SET_MSK 0x00000001 |
#define | ALT_CLKMGR_BYPASS_MAINPLL_CLR_MSK 0xfffffffe |
#define | ALT_CLKMGR_BYPASS_MAINPLL_RESET 0x1 |
#define | ALT_CLKMGR_BYPASS_MAINPLL_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_CLKMGR_BYPASS_MAINPLL_SET(value) (((value) << 0) & 0x00000001) |
Field : SDRAM PLL Bypass - sdrpll | |
When set, causes the SDRAM PLL VCO and counters to be bypassed so that all clocks generated by the SDRAM PLL are directly driven from either eosc1_clk or the SDRAM PLL input clock. The bypass clock source for SDRAM PLL is determined by the SDRAM PLL Bypass Source Register bit. The reset value for this bit is applied on a cold reset. Warm reset has no affect on this bit. Field Access Macros: | |
#define | ALT_CLKMGR_BYPASS_SDRPLL_LSB 1 |
#define | ALT_CLKMGR_BYPASS_SDRPLL_MSB 1 |
#define | ALT_CLKMGR_BYPASS_SDRPLL_WIDTH 1 |
#define | ALT_CLKMGR_BYPASS_SDRPLL_SET_MSK 0x00000002 |
#define | ALT_CLKMGR_BYPASS_SDRPLL_CLR_MSK 0xfffffffd |
#define | ALT_CLKMGR_BYPASS_SDRPLL_RESET 0x1 |
#define | ALT_CLKMGR_BYPASS_SDRPLL_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_CLKMGR_BYPASS_SDRPLL_SET(value) (((value) << 1) & 0x00000002) |
Field : SDRAM PLL Bypass Source - sdrpllsrc | ||||||||||
This bit defines the bypass source forSDRAM PLL. When changing fields that affect VCO lock the PLL must be bypassed and this bit must be set to OSC1_CLK. The reset value for this bit is applied on a cold reset. Warm reset has no affect on this bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_E_SELECT_EOSC1 0x0 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_E_SELECT_INPUT_MUX 0x1 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_LSB 2 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_MSB 2 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_WIDTH 1 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_SET_MSK 0x00000004 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_CLR_MSK 0xfffffffb | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_RESET 0x0 | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_GET(value) (((value) & 0x00000004) >> 2) | |||||||||
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_SET(value) (((value) << 2) & 0x00000004) | |||||||||
Field : Peripheral PLL Bypass - perpll | |
When set, causes the Peripheral PLL VCO and counters to be bypassed so that all clocks generated by the Peripheral PLL are directly driven from either eosc1_clk or the Peripheral PLL input clock. The bypass clock source for Peripheral PLL is determined by the Peripheral PLL Bypass Source Register bit. The reset value for this bit is applied on a cold reset. Warm reset has no affect on this bit. Field Access Macros: | |
#define | ALT_CLKMGR_BYPASS_PERPLL_LSB 3 |
#define | ALT_CLKMGR_BYPASS_PERPLL_MSB 3 |
#define | ALT_CLKMGR_BYPASS_PERPLL_WIDTH 1 |
#define | ALT_CLKMGR_BYPASS_PERPLL_SET_MSK 0x00000008 |
#define | ALT_CLKMGR_BYPASS_PERPLL_CLR_MSK 0xfffffff7 |
#define | ALT_CLKMGR_BYPASS_PERPLL_RESET 0x1 |
#define | ALT_CLKMGR_BYPASS_PERPLL_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_CLKMGR_BYPASS_PERPLL_SET(value) (((value) << 3) & 0x00000008) |
Field : Peripheral PLL Bypass Source - perpllsrc | ||||||||||
This bit defines the bypass source forPeripheral PLL. When changing fields that affect VCO lock the PLL must be bypassed and this bit must be set to OSC1_CLK. The reset value for this bit is applied on a cold reset. Warm reset has no affect on this bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_E_SELECT_EOSC1 0x0 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_E_SELECT_INPUT_MUX 0x1 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_LSB 4 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_MSB 4 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_WIDTH 1 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_SET_MSK 0x00000010 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_CLR_MSK 0xffffffef | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_RESET 0x0 | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_GET(value) (((value) & 0x00000010) >> 4) | |||||||||
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_SET(value) (((value) << 4) & 0x00000010) | |||||||||
Data Structures | |
struct | ALT_CLKMGR_BYPASS_s |
Macros | |
#define | ALT_CLKMGR_BYPASS_OFST 0x4 |
Typedefs | |
typedef struct ALT_CLKMGR_BYPASS_s | ALT_CLKMGR_BYPASS_t |
struct ALT_CLKMGR_BYPASS_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_CLKMGR_BYPASS.
Data Fields | ||
---|---|---|
uint32_t | mainpll: 1 | Main PLL Bypass |
uint32_t | sdrpll: 1 | SDRAM PLL Bypass |
uint32_t | sdrpllsrc: 1 | SDRAM PLL Bypass Source |
uint32_t | perpll: 1 | Peripheral PLL Bypass |
uint32_t | perpllsrc: 1 | Peripheral PLL Bypass Source |
uint32_t | __pad0__: 27 | UNDEFINED |
#define ALT_CLKMGR_BYPASS_MAINPLL_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_BYPASS_MAINPLL register field.
#define ALT_CLKMGR_BYPASS_MAINPLL_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_BYPASS_MAINPLL register field.
#define ALT_CLKMGR_BYPASS_MAINPLL_WIDTH 1 |
The width in bits of the ALT_CLKMGR_BYPASS_MAINPLL register field.
#define ALT_CLKMGR_BYPASS_MAINPLL_SET_MSK 0x00000001 |
The mask used to set the ALT_CLKMGR_BYPASS_MAINPLL register field value.
#define ALT_CLKMGR_BYPASS_MAINPLL_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_CLKMGR_BYPASS_MAINPLL register field value.
#define ALT_CLKMGR_BYPASS_MAINPLL_RESET 0x1 |
The reset value of the ALT_CLKMGR_BYPASS_MAINPLL register field.
#define ALT_CLKMGR_BYPASS_MAINPLL_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_CLKMGR_BYPASS_MAINPLL field value from a register.
#define ALT_CLKMGR_BYPASS_MAINPLL_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_CLKMGR_BYPASS_MAINPLL register field value suitable for setting the register.
#define ALT_CLKMGR_BYPASS_SDRPLL_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_BYPASS_SDRPLL register field.
#define ALT_CLKMGR_BYPASS_SDRPLL_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_BYPASS_SDRPLL register field.
#define ALT_CLKMGR_BYPASS_SDRPLL_WIDTH 1 |
The width in bits of the ALT_CLKMGR_BYPASS_SDRPLL register field.
#define ALT_CLKMGR_BYPASS_SDRPLL_SET_MSK 0x00000002 |
The mask used to set the ALT_CLKMGR_BYPASS_SDRPLL register field value.
#define ALT_CLKMGR_BYPASS_SDRPLL_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_CLKMGR_BYPASS_SDRPLL register field value.
#define ALT_CLKMGR_BYPASS_SDRPLL_RESET 0x1 |
The reset value of the ALT_CLKMGR_BYPASS_SDRPLL register field.
#define ALT_CLKMGR_BYPASS_SDRPLL_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_CLKMGR_BYPASS_SDRPLL field value from a register.
#define ALT_CLKMGR_BYPASS_SDRPLL_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_CLKMGR_BYPASS_SDRPLL register field value suitable for setting the register.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_E_SELECT_EOSC1 0x0 |
Enumerated value for register field ALT_CLKMGR_BYPASS_SDRPLLSRC
Select EOSC1
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_E_SELECT_INPUT_MUX 0x1 |
Enumerated value for register field ALT_CLKMGR_BYPASS_SDRPLLSRC
Select PLL Input Mux
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_BYPASS_SDRPLLSRC register field.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_BYPASS_SDRPLLSRC register field.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_WIDTH 1 |
The width in bits of the ALT_CLKMGR_BYPASS_SDRPLLSRC register field.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_SET_MSK 0x00000004 |
The mask used to set the ALT_CLKMGR_BYPASS_SDRPLLSRC register field value.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_CLKMGR_BYPASS_SDRPLLSRC register field value.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_RESET 0x0 |
The reset value of the ALT_CLKMGR_BYPASS_SDRPLLSRC register field.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_CLKMGR_BYPASS_SDRPLLSRC field value from a register.
#define ALT_CLKMGR_BYPASS_SDRPLLSRC_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_CLKMGR_BYPASS_SDRPLLSRC register field value suitable for setting the register.
#define ALT_CLKMGR_BYPASS_PERPLL_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_BYPASS_PERPLL register field.
#define ALT_CLKMGR_BYPASS_PERPLL_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_BYPASS_PERPLL register field.
#define ALT_CLKMGR_BYPASS_PERPLL_WIDTH 1 |
The width in bits of the ALT_CLKMGR_BYPASS_PERPLL register field.
#define ALT_CLKMGR_BYPASS_PERPLL_SET_MSK 0x00000008 |
The mask used to set the ALT_CLKMGR_BYPASS_PERPLL register field value.
#define ALT_CLKMGR_BYPASS_PERPLL_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_CLKMGR_BYPASS_PERPLL register field value.
#define ALT_CLKMGR_BYPASS_PERPLL_RESET 0x1 |
The reset value of the ALT_CLKMGR_BYPASS_PERPLL register field.
#define ALT_CLKMGR_BYPASS_PERPLL_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_CLKMGR_BYPASS_PERPLL field value from a register.
#define ALT_CLKMGR_BYPASS_PERPLL_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_CLKMGR_BYPASS_PERPLL register field value suitable for setting the register.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_E_SELECT_EOSC1 0x0 |
Enumerated value for register field ALT_CLKMGR_BYPASS_PERPLLSRC
Select EOSC1
#define ALT_CLKMGR_BYPASS_PERPLLSRC_E_SELECT_INPUT_MUX 0x1 |
Enumerated value for register field ALT_CLKMGR_BYPASS_PERPLLSRC
Select PLL Input Mux
#define ALT_CLKMGR_BYPASS_PERPLLSRC_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_BYPASS_PERPLLSRC register field.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_BYPASS_PERPLLSRC register field.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_WIDTH 1 |
The width in bits of the ALT_CLKMGR_BYPASS_PERPLLSRC register field.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_SET_MSK 0x00000010 |
The mask used to set the ALT_CLKMGR_BYPASS_PERPLLSRC register field value.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_CLR_MSK 0xffffffef |
The mask used to clear the ALT_CLKMGR_BYPASS_PERPLLSRC register field value.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_RESET 0x0 |
The reset value of the ALT_CLKMGR_BYPASS_PERPLLSRC register field.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_CLKMGR_BYPASS_PERPLLSRC field value from a register.
#define ALT_CLKMGR_BYPASS_PERPLLSRC_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_CLKMGR_BYPASS_PERPLLSRC register field value suitable for setting the register.
#define ALT_CLKMGR_BYPASS_OFST 0x4 |
The byte offset of the ALT_CLKMGR_BYPASS register from the beginning of the component.
typedef struct ALT_CLKMGR_BYPASS_s ALT_CLKMGR_BYPASS_t |
The typedef declaration for register ALT_CLKMGR_BYPASS.