Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Fast Spd Clock SCL HCNT Register - ic_fs_scl_hcnt

Description

This register sets the SCL clock high-period count for fast speed

Register Layout

Bits Access Reset Description
[15:0] RW 0x3c Fast Spd SCL High Period
[31:16] ??? 0x0 UNDEFINED

Field : Fast Spd SCL High Period - ic_fs_scl_hcnt

This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock high-period count for fast speed. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. This register goes away and becomes read-only returning 0s if in Standard Speed Mode. This register can be written only when the I2C interface is disabled, which corresponds to the Enable Register being set to 0. Writes at other times have no effect. The minimum valid value is 6; hardware prevents values less than this from being written, and if attempted results in 6 being set.

Field Access Macros:

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_LSB   0
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_MSB   15
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_WIDTH   16
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET_MSK   0x0000ffff
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_CLR_MSK   0xffff0000
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_RESET   0x3c
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_GET(value)   (((value) & 0x0000ffff) >> 0)
 
#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET(value)   (((value) << 0) & 0x0000ffff)
 

Data Structures

struct  ALT_I2C_FS_SCL_HCNT_s
 

Macros

#define ALT_I2C_FS_SCL_HCNT_OFST   0x1c
 
#define ALT_I2C_FS_SCL_HCNT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SCL_HCNT_OFST))
 

Typedefs

typedef struct
ALT_I2C_FS_SCL_HCNT_s 
ALT_I2C_FS_SCL_HCNT_t
 

Data Structure Documentation

struct ALT_I2C_FS_SCL_HCNT_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_I2C_FS_SCL_HCNT.

Data Fields
uint32_t ic_fs_scl_hcnt: 16 Fast Spd SCL High Period
uint32_t __pad0__: 16 UNDEFINED

Macro Definitions

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_LSB   0

The Least Significant Bit (LSB) position of the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_MSB   15

The Most Significant Bit (MSB) position of the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_WIDTH   16

The width in bits of the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET_MSK   0x0000ffff

The mask used to set the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field value.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_CLR_MSK   0xffff0000

The mask used to clear the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field value.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_RESET   0x3c

The reset value of the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_GET (   value)    (((value) & 0x0000ffff) >> 0)

Extracts the ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT field value from a register.

#define ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET (   value)    (((value) << 0) & 0x0000ffff)

Produces a ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT register field value suitable for setting the register.

#define ALT_I2C_FS_SCL_HCNT_OFST   0x1c

The byte offset of the ALT_I2C_FS_SCL_HCNT register from the beginning of the component.

#define ALT_I2C_FS_SCL_HCNT_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SCL_HCNT_OFST))

The address of the ALT_I2C_FS_SCL_HCNT register.

Typedef Documentation

The typedef declaration for register ALT_I2C_FS_SCL_HCNT.