Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : L2 Data RAM ECC Enable Register - l2

Description

This register is used to enable ECC on the L2 Data RAM. ECC errors can be injected into the write path using bits in this register. This register contains interrupt status of the ECC single/double bit error.

Only reset by a cold reset (ignores warm reset).

Register Layout

Bits Access Reset Description
[0] RW 0x0 L2 Data RAM ECC Enable
[1] RW 0x0 L2 Data RAM ECC inject single, correctable Error
[2] RW 0x0 L2 Data RAM ECC inject double bit, non-correctable error
[31:3] ??? 0x0 UNDEFINED

Field : L2 Data RAM ECC Enable - en

Enable ECC for L2 Data RAM

Field Access Macros:

#define ALT_SYSMGR_ECC_L2_EN_LSB   0
 
#define ALT_SYSMGR_ECC_L2_EN_MSB   0
 
#define ALT_SYSMGR_ECC_L2_EN_WIDTH   1
 
#define ALT_SYSMGR_ECC_L2_EN_SET_MSK   0x00000001
 
#define ALT_SYSMGR_ECC_L2_EN_CLR_MSK   0xfffffffe
 
#define ALT_SYSMGR_ECC_L2_EN_RESET   0x0
 
#define ALT_SYSMGR_ECC_L2_EN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SYSMGR_ECC_L2_EN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : L2 Data RAM ECC inject single, correctable Error - injs

Changing this bit from zero to one injects a single, correctable error into the L2 Data RAM. This only injects one error into the L2 Data RAM.

Field Access Macros:

#define ALT_SYSMGR_ECC_L2_INJS_LSB   1
 
#define ALT_SYSMGR_ECC_L2_INJS_MSB   1
 
#define ALT_SYSMGR_ECC_L2_INJS_WIDTH   1
 
#define ALT_SYSMGR_ECC_L2_INJS_SET_MSK   0x00000002
 
#define ALT_SYSMGR_ECC_L2_INJS_CLR_MSK   0xfffffffd
 
#define ALT_SYSMGR_ECC_L2_INJS_RESET   0x0
 
#define ALT_SYSMGR_ECC_L2_INJS_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SYSMGR_ECC_L2_INJS_SET(value)   (((value) << 1) & 0x00000002)
 

Field : L2 Data RAM ECC inject double bit, non-correctable error - injd

Changing this bit from zero to one injects a double, non-correctable error into the L2 Data RAM. This only injects one double bit error into the L2 Data RAM.

Field Access Macros:

#define ALT_SYSMGR_ECC_L2_INJD_LSB   2
 
#define ALT_SYSMGR_ECC_L2_INJD_MSB   2
 
#define ALT_SYSMGR_ECC_L2_INJD_WIDTH   1
 
#define ALT_SYSMGR_ECC_L2_INJD_SET_MSK   0x00000004
 
#define ALT_SYSMGR_ECC_L2_INJD_CLR_MSK   0xfffffffb
 
#define ALT_SYSMGR_ECC_L2_INJD_RESET   0x0
 
#define ALT_SYSMGR_ECC_L2_INJD_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_SYSMGR_ECC_L2_INJD_SET(value)   (((value) << 2) & 0x00000004)
 

Data Structures

struct  ALT_SYSMGR_ECC_L2_s
 

Macros

#define ALT_SYSMGR_ECC_L2_OFST   0x0
 

Typedefs

typedef struct ALT_SYSMGR_ECC_L2_s ALT_SYSMGR_ECC_L2_t
 

Data Structure Documentation

struct ALT_SYSMGR_ECC_L2_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_ECC_L2.

Data Fields
uint32_t en: 1 L2 Data RAM ECC Enable
uint32_t injs: 1 L2 Data RAM ECC inject single, correctable Error
uint32_t injd: 1 L2 Data RAM ECC inject double bit, non-correctable error
uint32_t __pad0__: 29 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_ECC_L2_EN_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_L2_EN register field.

#define ALT_SYSMGR_ECC_L2_EN_MSB   0

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_L2_EN register field.

#define ALT_SYSMGR_ECC_L2_EN_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_L2_EN register field.

#define ALT_SYSMGR_ECC_L2_EN_SET_MSK   0x00000001

The mask used to set the ALT_SYSMGR_ECC_L2_EN register field value.

#define ALT_SYSMGR_ECC_L2_EN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SYSMGR_ECC_L2_EN register field value.

#define ALT_SYSMGR_ECC_L2_EN_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_L2_EN register field.

#define ALT_SYSMGR_ECC_L2_EN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SYSMGR_ECC_L2_EN field value from a register.

#define ALT_SYSMGR_ECC_L2_EN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SYSMGR_ECC_L2_EN register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_L2_INJS_LSB   1

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_L2_INJS register field.

#define ALT_SYSMGR_ECC_L2_INJS_MSB   1

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_L2_INJS register field.

#define ALT_SYSMGR_ECC_L2_INJS_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_L2_INJS register field.

#define ALT_SYSMGR_ECC_L2_INJS_SET_MSK   0x00000002

The mask used to set the ALT_SYSMGR_ECC_L2_INJS register field value.

#define ALT_SYSMGR_ECC_L2_INJS_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SYSMGR_ECC_L2_INJS register field value.

#define ALT_SYSMGR_ECC_L2_INJS_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_L2_INJS register field.

#define ALT_SYSMGR_ECC_L2_INJS_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SYSMGR_ECC_L2_INJS field value from a register.

#define ALT_SYSMGR_ECC_L2_INJS_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SYSMGR_ECC_L2_INJS register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_L2_INJD_LSB   2

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_L2_INJD register field.

#define ALT_SYSMGR_ECC_L2_INJD_MSB   2

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_L2_INJD register field.

#define ALT_SYSMGR_ECC_L2_INJD_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_L2_INJD register field.

#define ALT_SYSMGR_ECC_L2_INJD_SET_MSK   0x00000004

The mask used to set the ALT_SYSMGR_ECC_L2_INJD register field value.

#define ALT_SYSMGR_ECC_L2_INJD_CLR_MSK   0xfffffffb

The mask used to clear the ALT_SYSMGR_ECC_L2_INJD register field value.

#define ALT_SYSMGR_ECC_L2_INJD_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_L2_INJD register field.

#define ALT_SYSMGR_ECC_L2_INJD_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_SYSMGR_ECC_L2_INJD field value from a register.

#define ALT_SYSMGR_ECC_L2_INJD_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_SYSMGR_ECC_L2_INJD register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_L2_OFST   0x0

The byte offset of the ALT_SYSMGR_ECC_L2 register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_ECC_L2.