Altera SoCAL  16.0
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alt_noc_fw_h2f_scr.h
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32 
35 #ifndef __ALT_SOCAL_NOC_FW_H2F_SCR_H__
36 #define __ALT_SOCAL_NOC_FW_H2F_SCR_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
88 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_LSB 0
89 
90 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_MSB 0
91 
92 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_WIDTH 1
93 
94 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_SET_MSK 0x00000001
95 
96 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_CLR_MSK 0xfffffffe
97 
98 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_RESET 0x0
99 
100 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_GET(value) (((value) & 0x00000001) >> 0)
101 
102 #define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_SET(value) (((value) << 0) & 0x00000001)
103 
115 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_LSB 8
116 
117 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_MSB 8
118 
119 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_WIDTH 1
120 
121 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_SET_MSK 0x00000100
122 
123 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_CLR_MSK 0xfffffeff
124 
125 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_RESET 0x0
126 
127 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_GET(value) (((value) & 0x00000100) >> 8)
128 
129 #define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_SET(value) (((value) << 8) & 0x00000100)
130 
142 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_LSB 17
143 
144 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_MSB 17
145 
146 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_WIDTH 1
147 
148 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_SET_MSK 0x00020000
149 
150 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_CLR_MSK 0xfffdffff
151 
152 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_RESET 0x0
153 
154 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_GET(value) (((value) & 0x00020000) >> 17)
155 
156 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_SET(value) (((value) << 17) & 0x00020000)
157 
169 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_LSB 18
170 
171 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_MSB 18
172 
173 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_WIDTH 1
174 
175 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_SET_MSK 0x00040000
176 
177 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_CLR_MSK 0xfffbffff
178 
179 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_RESET 0x0
180 
181 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_GET(value) (((value) & 0x00040000) >> 18)
182 
183 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_SET(value) (((value) << 18) & 0x00040000)
184 
196 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_LSB 19
197 
198 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_MSB 19
199 
200 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_WIDTH 1
201 
202 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_SET_MSK 0x00080000
203 
204 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_CLR_MSK 0xfff7ffff
205 
206 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_RESET 0x0
207 
208 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_GET(value) (((value) & 0x00080000) >> 19)
209 
210 #define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_SET(value) (((value) << 19) & 0x00080000)
211 
223 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_LSB 20
224 
225 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_MSB 20
226 
227 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_WIDTH 1
228 
229 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_SET_MSK 0x00100000
230 
231 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_CLR_MSK 0xffefffff
232 
233 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_RESET 0x0
234 
235 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_GET(value) (((value) & 0x00100000) >> 20)
236 
237 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_SET(value) (((value) << 20) & 0x00100000)
238 
250 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_LSB 21
251 
252 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_MSB 21
253 
254 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_WIDTH 1
255 
256 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_SET_MSK 0x00200000
257 
258 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_CLR_MSK 0xffdfffff
259 
260 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_RESET 0x0
261 
262 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_GET(value) (((value) & 0x00200000) >> 21)
263 
264 #define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_SET(value) (((value) << 21) & 0x00200000)
265 
277 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_LSB 22
278 
279 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_MSB 22
280 
281 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_WIDTH 1
282 
283 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_SET_MSK 0x00400000
284 
285 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_CLR_MSK 0xffbfffff
286 
287 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_RESET 0x0
288 
289 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_GET(value) (((value) & 0x00400000) >> 22)
290 
291 #define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_SET(value) (((value) << 22) & 0x00400000)
292 
304 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_LSB 23
305 
306 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_MSB 23
307 
308 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_WIDTH 1
309 
310 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_SET_MSK 0x00800000
311 
312 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_CLR_MSK 0xff7fffff
313 
314 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_RESET 0x0
315 
316 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_GET(value) (((value) & 0x00800000) >> 23)
317 
318 #define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_SET(value) (((value) << 23) & 0x00800000)
319 
331 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_LSB 24
332 
333 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_MSB 24
334 
335 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_WIDTH 1
336 
337 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_SET_MSK 0x01000000
338 
339 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_CLR_MSK 0xfeffffff
340 
341 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_RESET 0x0
342 
343 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_GET(value) (((value) & 0x01000000) >> 24)
344 
345 #define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_SET(value) (((value) << 24) & 0x01000000)
346 
358 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_LSB 25
359 
360 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_MSB 25
361 
362 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_WIDTH 1
363 
364 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_SET_MSK 0x02000000
365 
366 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_CLR_MSK 0xfdffffff
367 
368 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_RESET 0x0
369 
370 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_GET(value) (((value) & 0x02000000) >> 25)
371 
372 #define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_SET(value) (((value) << 25) & 0x02000000)
373 
374 #ifndef __ASSEMBLY__
375 
386 {
387  uint32_t mpu_m0 : 1;
388  uint32_t : 7;
389  uint32_t dma : 1;
390  uint32_t : 8;
391  uint32_t emac0 : 1;
392  uint32_t emac1 : 1;
393  uint32_t emac2 : 1;
394  uint32_t usb0 : 1;
395  uint32_t usb1 : 1;
396  uint32_t sdmmc : 1;
397  uint32_t nand : 1;
398  uint32_t ahb_ap : 1;
399  uint32_t etr : 1;
400  uint32_t : 6;
401 };
402 
405 #endif /* __ASSEMBLY__ */
406 
408 #define ALT_NOC_FW_H2F_SCR_LWH2F_RESET 0x00000000
409 
410 #define ALT_NOC_FW_H2F_SCR_LWH2F_OFST 0x0
411 
448 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_LSB 0
449 
450 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_MSB 0
451 
452 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_WIDTH 1
453 
454 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET_MSK 0x00000001
455 
456 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_CLR_MSK 0xfffffffe
457 
458 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_RESET 0x0
459 
460 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_GET(value) (((value) & 0x00000001) >> 0)
461 
462 #define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET(value) (((value) << 0) & 0x00000001)
463 
475 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_LSB 8
476 
477 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_MSB 8
478 
479 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_WIDTH 1
480 
481 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET_MSK 0x00000100
482 
483 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_CLR_MSK 0xfffffeff
484 
485 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_RESET 0x0
486 
487 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_GET(value) (((value) & 0x00000100) >> 8)
488 
489 #define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET(value) (((value) << 8) & 0x00000100)
490 
502 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_LSB 17
503 
504 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_MSB 17
505 
506 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_WIDTH 1
507 
508 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET_MSK 0x00020000
509 
510 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_CLR_MSK 0xfffdffff
511 
512 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_RESET 0x0
513 
514 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_GET(value) (((value) & 0x00020000) >> 17)
515 
516 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET(value) (((value) << 17) & 0x00020000)
517 
529 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_LSB 18
530 
531 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_MSB 18
532 
533 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_WIDTH 1
534 
535 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET_MSK 0x00040000
536 
537 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_CLR_MSK 0xfffbffff
538 
539 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_RESET 0x0
540 
541 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_GET(value) (((value) & 0x00040000) >> 18)
542 
543 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET(value) (((value) << 18) & 0x00040000)
544 
556 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_LSB 19
557 
558 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_MSB 19
559 
560 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_WIDTH 1
561 
562 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET_MSK 0x00080000
563 
564 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_CLR_MSK 0xfff7ffff
565 
566 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_RESET 0x0
567 
568 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_GET(value) (((value) & 0x00080000) >> 19)
569 
570 #define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET(value) (((value) << 19) & 0x00080000)
571 
583 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_LSB 20
584 
585 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_MSB 20
586 
587 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_WIDTH 1
588 
589 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET_MSK 0x00100000
590 
591 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_CLR_MSK 0xffefffff
592 
593 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_RESET 0x0
594 
595 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_GET(value) (((value) & 0x00100000) >> 20)
596 
597 #define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET(value) (((value) << 20) & 0x00100000)
598 
610 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_LSB 21
611 
612 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_MSB 21
613 
614 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_WIDTH 1
615 
616 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET_MSK 0x00200000
617 
618 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_CLR_MSK 0xffdfffff
619 
620 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_RESET 0x0
621 
622 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_GET(value) (((value) & 0x00200000) >> 21)
623 
624 #define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET(value) (((value) << 21) & 0x00200000)
625 
637 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_LSB 22
638 
639 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_MSB 22
640 
641 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_WIDTH 1
642 
643 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET_MSK 0x00400000
644 
645 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_CLR_MSK 0xffbfffff
646 
647 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_RESET 0x0
648 
649 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_GET(value) (((value) & 0x00400000) >> 22)
650 
651 #define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET(value) (((value) << 22) & 0x00400000)
652 
664 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_LSB 23
665 
666 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_MSB 23
667 
668 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_WIDTH 1
669 
670 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET_MSK 0x00800000
671 
672 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_CLR_MSK 0xff7fffff
673 
674 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_RESET 0x0
675 
676 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_GET(value) (((value) & 0x00800000) >> 23)
677 
678 #define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET(value) (((value) << 23) & 0x00800000)
679 
691 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_LSB 24
692 
693 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_MSB 24
694 
695 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_WIDTH 1
696 
697 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET_MSK 0x01000000
698 
699 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_CLR_MSK 0xfeffffff
700 
701 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_RESET 0x0
702 
703 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_GET(value) (((value) & 0x01000000) >> 24)
704 
705 #define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET(value) (((value) << 24) & 0x01000000)
706 
718 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_LSB 25
719 
720 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_MSB 25
721 
722 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_WIDTH 1
723 
724 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET_MSK 0x02000000
725 
726 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_CLR_MSK 0xfdffffff
727 
728 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_RESET 0x0
729 
730 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_GET(value) (((value) & 0x02000000) >> 25)
731 
732 #define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET(value) (((value) << 25) & 0x02000000)
733 
734 #ifndef __ASSEMBLY__
735 
746 {
747  uint32_t mpu_m0 : 1;
748  uint32_t : 7;
749  uint32_t dma : 1;
750  uint32_t : 8;
751  uint32_t emac0 : 1;
752  uint32_t emac1 : 1;
753  uint32_t emac2 : 1;
754  uint32_t usb0 : 1;
755  uint32_t usb1 : 1;
756  uint32_t sdmmc : 1;
757  uint32_t nand : 1;
758  uint32_t ahb_ap : 1;
759  uint32_t etr : 1;
760  uint32_t : 6;
761 };
762 
765 #endif /* __ASSEMBLY__ */
766 
768 #define ALT_NOC_FW_H2F_SCR_H2F_RESET 0x00000000
769 
770 #define ALT_NOC_FW_H2F_SCR_H2F_OFST 0x4
771 
772 #ifndef __ASSEMBLY__
773 
784 {
787  volatile uint32_t _pad_0x8_0x100[62];
788 };
789 
794 {
795  volatile uint32_t lwsoc2fpga;
796  volatile uint32_t soc2fpga;
797  volatile uint32_t _pad_0x8_0x100[62];
798 };
799 
802 #endif /* __ASSEMBLY__ */
803 
805 #ifdef __cplusplus
806 }
807 #endif /* __cplusplus */
808 #endif /* __ALT_SOCAL_NOC_FW_H2F_SCR_H__ */
809