Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : diepctl0

Description

Device Control IN Endpoint 0 Control Register

Register Layout

Bits Access Reset Description
[1:0] RW 0x0 ALT_USB_DEV_DIEPCTL0_MPS
[14:2] ??? 0x0 UNDEFINED
[15] R 0x1 ALT_USB_DEV_DIEPCTL0_USBACTEP
[16] ??? 0x0 UNDEFINED
[17] R 0x0 ALT_USB_DEV_DIEPCTL0_NAKSTS
[19:18] R 0x0 ALT_USB_DEV_DIEPCTL0_EPTYPE
[20] ??? 0x0 UNDEFINED
[21] R-W once 0x0 ALT_USB_DEV_DIEPCTL0_STALL
[25:22] RW 0x0 ALT_USB_DEV_DIEPCTL0_TXFNUM
[26] W 0x0 ALT_USB_DEV_DIEPCTL0_CNAK
[27] W 0x0 ALT_USB_DEV_DIEPCTL0_SNAK
[29:28] ??? 0x0 UNDEFINED
[30] R-W once 0x0 ALT_USB_DEV_DIEPCTL0_EPDIS
[31] R-W once 0x0 ALT_USB_DEV_DIEPCTL0_EPENA

Field : mps

Maximum Packet Size (MPS)

Applies to IN and OUT endpoints.

The application must program this field with the maximum packet size For

the current logical endpoint.

2'b00: 64 bytes

2'b01: 32 bytes

2'b10: 16 bytes

2'b11: 8 bytes

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES64 0x0 64 bytes
ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES32 0x1 32 bytes
ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES16 0x2 16 bytes
ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES8 0x3 8 bytes

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES64   0x0
 
#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES32   0x1
 
#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES16   0x2
 
#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES8   0x3
 
#define ALT_USB_DEV_DIEPCTL0_MPS_LSB   0
 
#define ALT_USB_DEV_DIEPCTL0_MPS_MSB   1
 
#define ALT_USB_DEV_DIEPCTL0_MPS_WIDTH   2
 
#define ALT_USB_DEV_DIEPCTL0_MPS_SET_MSK   0x00000003
 
#define ALT_USB_DEV_DIEPCTL0_MPS_CLR_MSK   0xfffffffc
 
#define ALT_USB_DEV_DIEPCTL0_MPS_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_MPS_GET(value)   (((value) & 0x00000003) >> 0)
 
#define ALT_USB_DEV_DIEPCTL0_MPS_SET(value)   (((value) << 0) & 0x00000003)
 

Field : usbactep

USB Active Endpoint (USBActEP)

This bit is always SET to 1, indicating that control endpoint 0 is always

active in all configurations and interfaces.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_USBACTEP_E_ACT0 0x1 Control endpoint is always active

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_E_ACT0   0x1
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_LSB   15
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_MSB   15
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_SET_MSK   0x00008000
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_CLR_MSK   0xffff7fff
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_RESET   0x1
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_GET(value)   (((value) & 0x00008000) >> 15)
 
#define ALT_USB_DEV_DIEPCTL0_USBACTEP_SET(value)   (((value) << 15) & 0x00008000)
 

Field : naksts

NAK Status (NAKSts)

Indicates the following:

1'b0: The core is transmitting non-NAK handshakes based on the

FIFO status

1'b1: The core is transmitting NAK handshakes on this endpoint.

When this bit is Set, either by the application or core, the core stops

transmitting data, even If there is data available in the TxFIFO.

Irrespective of this bit's setting, the core always responds to SETUP data

packets with an ACK handshake.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_NAKSTS_E_INACT 0x0 The core is transmitting non-NAK handshakes
: based on the FIFO status
ALT_USB_DEV_DIEPCTL0_NAKSTS_E_ACT 0x1 The core is transmitting NAK handshakes on this
: endpoint

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_E_INACT   0x0
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_E_ACT   0x1
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_LSB   17
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_MSB   17
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_SET_MSK   0x00020000
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_CLR_MSK   0xfffdffff
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_GET(value)   (((value) & 0x00020000) >> 17)
 
#define ALT_USB_DEV_DIEPCTL0_NAKSTS_SET(value)   (((value) << 17) & 0x00020000)
 

Field : eptype

Endpoint Type (EPType)

Hardcoded to 00 For control.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_EPTYPE_E_ACT 0x0 Endpoint Control 0

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_E_ACT   0x0
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_LSB   18
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_MSB   19
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_WIDTH   2
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_SET_MSK   0x000c0000
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_CLR_MSK   0xfff3ffff
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_GET(value)   (((value) & 0x000c0000) >> 18)
 
#define ALT_USB_DEV_DIEPCTL0_EPTYPE_SET(value)   (((value) << 18) & 0x000c0000)
 

Field : stall

STALL Handshake (Stall)

The application can only Set this bit, and the core clears it, when a

SETUP token is received For this endpoint. If a NAK bit, Global Nonperiodic

IN NAK, or Global OUT NAK is Set along with this bit, the STALL

bit takes priority.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_STALL_E_INACT 0x0 No Stall
ALT_USB_DEV_DIEPCTL0_STALL_E_ACT 0x1 Stall Handshake

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_STALL_E_INACT   0x0
 
#define ALT_USB_DEV_DIEPCTL0_STALL_E_ACT   0x1
 
#define ALT_USB_DEV_DIEPCTL0_STALL_LSB   21
 
#define ALT_USB_DEV_DIEPCTL0_STALL_MSB   21
 
#define ALT_USB_DEV_DIEPCTL0_STALL_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_STALL_SET_MSK   0x00200000
 
#define ALT_USB_DEV_DIEPCTL0_STALL_CLR_MSK   0xffdfffff
 
#define ALT_USB_DEV_DIEPCTL0_STALL_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_STALL_GET(value)   (((value) & 0x00200000) >> 21)
 
#define ALT_USB_DEV_DIEPCTL0_STALL_SET(value)   (((value) << 21) & 0x00200000)
 

Field : txfnum

TxFIFO Number (TxFNum)

For Shared FIFO operation, this value is always Set to 0, indicating

that control IN endpoint 0 data is always written in the Non-Periodic

Transmit FIFO.

For Dedicated FIFO operation, this value is Set to the FIFO number

that is assigned to IN Endpoint 0.

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_LSB   22
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_MSB   25
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_WIDTH   4
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_SET_MSK   0x03c00000
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_CLR_MSK   0xfc3fffff
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_GET(value)   (((value) & 0x03c00000) >> 22)
 
#define ALT_USB_DEV_DIEPCTL0_TXFNUM_SET(value)   (((value) << 22) & 0x03c00000)
 

Field : cnak

Clear NAK (CNAK)

A write to this bit clears the NAK bit For the endpoint.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_CNAK_E_NOCLR 0x0 No action
ALT_USB_DEV_DIEPCTL0_CNAK_E_CLR 0x1 Clear NAK

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_CNAK_E_NOCLR   0x0
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_E_CLR   0x1
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_LSB   26
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_MSB   26
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_SET_MSK   0x04000000
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_CLR_MSK   0xfbffffff
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_GET(value)   (((value) & 0x04000000) >> 26)
 
#define ALT_USB_DEV_DIEPCTL0_CNAK_SET(value)   (((value) << 26) & 0x04000000)
 

Field : snak

Set NAK (SNAK)

A write to this bit sets the NAK bit For the endpoint.

Using this bit, the application can control the transmission of NAK

handshakes on an endpoint. The core can also Set this bit For an

endpoint after a SETUP packet is received on that endpoint.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_SNAK_E_NOSET 0x0 No action
ALT_USB_DEV_DIEPCTL0_SNAK_E_SET 0x1 Set NAK

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_SNAK_E_NOSET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_E_SET   0x1
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_LSB   27
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_MSB   27
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_SET_MSK   0x08000000
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_CLR_MSK   0xf7ffffff
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_GET(value)   (((value) & 0x08000000) >> 27)
 
#define ALT_USB_DEV_DIEPCTL0_SNAK_SET(value)   (((value) << 27) & 0x08000000)
 

Field : epdis

Endpoint Disable (EPDis)

The application sets this bit to stop transmitting data on an endpoint,

even before the transfer For that endpoint is complete. The application

must wait For the Endpoint Disabled interrupt before treating the endpoint

as disabled. The core clears this bit before setting the Endpoint Disabled

Interrupt. The application must Set this bit only If Endpoint Enable is

already Set For this endpoint.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_EPDIS_E_INACT 0x0 No action
ALT_USB_DEV_DIEPCTL0_EPDIS_E_ACT 0x1 Stop transmitting data on endpoint

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_EPDIS_E_INACT   0x0
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_E_ACT   0x1
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_LSB   30
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_MSB   30
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_SET_MSK   0x40000000
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_CLR_MSK   0xbfffffff
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_GET(value)   (((value) & 0x40000000) >> 30)
 
#define ALT_USB_DEV_DIEPCTL0_EPDIS_SET(value)   (((value) << 30) & 0x40000000)
 

Field : epena

Endpoint Enable (EPEna)

When Scatter/Gather DMA mode is enabled, For IN endpoints this bit

indicates that the descriptor structure and data buffer with data ready

to transmit is setup.

When Scatter/Gather DMA mode is disabled such as in buffer pointer

based DMA mode this bit indicates that data is ready to be

transmitted on the endpoint.

The core clears this bit before setting the following interrupts on this

endpoint:

Endpoint Disabled

Transfer Completed

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DIEPCTL0_EPENA_E_INACT 0x0 No action
ALT_USB_DEV_DIEPCTL0_EPENA_E_ACT 0x1 Endpoint Enabled

Field Access Macros:

#define ALT_USB_DEV_DIEPCTL0_EPENA_E_INACT   0x0
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_E_ACT   0x1
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_LSB   31
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_MSB   31
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_WIDTH   1
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_SET_MSK   0x80000000
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_CLR_MSK   0x7fffffff
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_RESET   0x0
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_USB_DEV_DIEPCTL0_EPENA_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_USB_DEV_DIEPCTL0_s
 

Macros

#define ALT_USB_DEV_DIEPCTL0_RESET   0x00008000
 
#define ALT_USB_DEV_DIEPCTL0_OFST   0x100
 
#define ALT_USB_DEV_DIEPCTL0_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL0_OFST))
 

Typedefs

typedef struct
ALT_USB_DEV_DIEPCTL0_s 
ALT_USB_DEV_DIEPCTL0_t
 

Data Structure Documentation

struct ALT_USB_DEV_DIEPCTL0_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_USB_DEV_DIEPCTL0.

Data Fields
uint32_t mps: 2 ALT_USB_DEV_DIEPCTL0_MPS
uint32_t __pad0__: 13 UNDEFINED
const uint32_t usbactep: 1 ALT_USB_DEV_DIEPCTL0_USBACTEP
uint32_t __pad1__: 1 UNDEFINED
const uint32_t naksts: 1 ALT_USB_DEV_DIEPCTL0_NAKSTS
const uint32_t eptype: 2 ALT_USB_DEV_DIEPCTL0_EPTYPE
uint32_t __pad2__: 1 UNDEFINED
uint32_t stall: 1 ALT_USB_DEV_DIEPCTL0_STALL
uint32_t txfnum: 4 ALT_USB_DEV_DIEPCTL0_TXFNUM
uint32_t cnak: 1 ALT_USB_DEV_DIEPCTL0_CNAK
uint32_t snak: 1 ALT_USB_DEV_DIEPCTL0_SNAK
uint32_t __pad3__: 2 UNDEFINED
uint32_t epdis: 1 ALT_USB_DEV_DIEPCTL0_EPDIS
uint32_t epena: 1 ALT_USB_DEV_DIEPCTL0_EPENA

Macro Definitions

#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES64   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS

64 bytes

#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES32   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS

32 bytes

#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES16   0x2

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS

16 bytes

#define ALT_USB_DEV_DIEPCTL0_MPS_E_BYTES8   0x3

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_MPS

8 bytes

#define ALT_USB_DEV_DIEPCTL0_MPS_LSB   0

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_MPS register field.

#define ALT_USB_DEV_DIEPCTL0_MPS_MSB   1

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_MPS register field.

#define ALT_USB_DEV_DIEPCTL0_MPS_WIDTH   2

The width in bits of the ALT_USB_DEV_DIEPCTL0_MPS register field.

#define ALT_USB_DEV_DIEPCTL0_MPS_SET_MSK   0x00000003

The mask used to set the ALT_USB_DEV_DIEPCTL0_MPS register field value.

#define ALT_USB_DEV_DIEPCTL0_MPS_CLR_MSK   0xfffffffc

The mask used to clear the ALT_USB_DEV_DIEPCTL0_MPS register field value.

#define ALT_USB_DEV_DIEPCTL0_MPS_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_MPS register field.

#define ALT_USB_DEV_DIEPCTL0_MPS_GET (   value)    (((value) & 0x00000003) >> 0)

Extracts the ALT_USB_DEV_DIEPCTL0_MPS field value from a register.

#define ALT_USB_DEV_DIEPCTL0_MPS_SET (   value)    (((value) << 0) & 0x00000003)

Produces a ALT_USB_DEV_DIEPCTL0_MPS register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_E_ACT0   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_USBACTEP

Control endpoint is always active

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_LSB   15

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_MSB   15

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_SET_MSK   0x00008000

The mask used to set the ALT_USB_DEV_DIEPCTL0_USBACTEP register field value.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_CLR_MSK   0xffff7fff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_USBACTEP register field value.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_RESET   0x1

The reset value of the ALT_USB_DEV_DIEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_GET (   value)    (((value) & 0x00008000) >> 15)

Extracts the ALT_USB_DEV_DIEPCTL0_USBACTEP field value from a register.

#define ALT_USB_DEV_DIEPCTL0_USBACTEP_SET (   value)    (((value) << 15) & 0x00008000)

Produces a ALT_USB_DEV_DIEPCTL0_USBACTEP register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_NAKSTS

The core is transmitting non-NAK handshakes based on the FIFO status

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_NAKSTS

The core is transmitting NAK handshakes on this endpoint

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_LSB   17

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_MSB   17

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_SET_MSK   0x00020000

The mask used to set the ALT_USB_DEV_DIEPCTL0_NAKSTS register field value.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_CLR_MSK   0xfffdffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_NAKSTS register field value.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_GET (   value)    (((value) & 0x00020000) >> 17)

Extracts the ALT_USB_DEV_DIEPCTL0_NAKSTS field value from a register.

#define ALT_USB_DEV_DIEPCTL0_NAKSTS_SET (   value)    (((value) << 17) & 0x00020000)

Produces a ALT_USB_DEV_DIEPCTL0_NAKSTS register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_E_ACT   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPTYPE

Endpoint Control 0

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_LSB   18

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_MSB   19

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_WIDTH   2

The width in bits of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_SET_MSK   0x000c0000

The mask used to set the ALT_USB_DEV_DIEPCTL0_EPTYPE register field value.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_CLR_MSK   0xfff3ffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_EPTYPE register field value.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_GET (   value)    (((value) & 0x000c0000) >> 18)

Extracts the ALT_USB_DEV_DIEPCTL0_EPTYPE field value from a register.

#define ALT_USB_DEV_DIEPCTL0_EPTYPE_SET (   value)    (((value) << 18) & 0x000c0000)

Produces a ALT_USB_DEV_DIEPCTL0_EPTYPE register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_STALL_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_STALL

No Stall

#define ALT_USB_DEV_DIEPCTL0_STALL_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_STALL

Stall Handshake

#define ALT_USB_DEV_DIEPCTL0_STALL_LSB   21

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_STALL register field.

#define ALT_USB_DEV_DIEPCTL0_STALL_MSB   21

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_STALL register field.

#define ALT_USB_DEV_DIEPCTL0_STALL_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_STALL register field.

#define ALT_USB_DEV_DIEPCTL0_STALL_SET_MSK   0x00200000

The mask used to set the ALT_USB_DEV_DIEPCTL0_STALL register field value.

#define ALT_USB_DEV_DIEPCTL0_STALL_CLR_MSK   0xffdfffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_STALL register field value.

#define ALT_USB_DEV_DIEPCTL0_STALL_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_STALL register field.

#define ALT_USB_DEV_DIEPCTL0_STALL_GET (   value)    (((value) & 0x00200000) >> 21)

Extracts the ALT_USB_DEV_DIEPCTL0_STALL field value from a register.

#define ALT_USB_DEV_DIEPCTL0_STALL_SET (   value)    (((value) << 21) & 0x00200000)

Produces a ALT_USB_DEV_DIEPCTL0_STALL register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_LSB   22

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_MSB   25

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_WIDTH   4

The width in bits of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_SET_MSK   0x03c00000

The mask used to set the ALT_USB_DEV_DIEPCTL0_TXFNUM register field value.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_CLR_MSK   0xfc3fffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_TXFNUM register field value.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_TXFNUM register field.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_GET (   value)    (((value) & 0x03c00000) >> 22)

Extracts the ALT_USB_DEV_DIEPCTL0_TXFNUM field value from a register.

#define ALT_USB_DEV_DIEPCTL0_TXFNUM_SET (   value)    (((value) << 22) & 0x03c00000)

Produces a ALT_USB_DEV_DIEPCTL0_TXFNUM register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_CNAK_E_NOCLR   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_CNAK

No action

#define ALT_USB_DEV_DIEPCTL0_CNAK_E_CLR   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_CNAK

Clear NAK

#define ALT_USB_DEV_DIEPCTL0_CNAK_LSB   26

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_CNAK register field.

#define ALT_USB_DEV_DIEPCTL0_CNAK_MSB   26

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_CNAK register field.

#define ALT_USB_DEV_DIEPCTL0_CNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_CNAK register field.

#define ALT_USB_DEV_DIEPCTL0_CNAK_SET_MSK   0x04000000

The mask used to set the ALT_USB_DEV_DIEPCTL0_CNAK register field value.

#define ALT_USB_DEV_DIEPCTL0_CNAK_CLR_MSK   0xfbffffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_CNAK register field value.

#define ALT_USB_DEV_DIEPCTL0_CNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_CNAK register field.

#define ALT_USB_DEV_DIEPCTL0_CNAK_GET (   value)    (((value) & 0x04000000) >> 26)

Extracts the ALT_USB_DEV_DIEPCTL0_CNAK field value from a register.

#define ALT_USB_DEV_DIEPCTL0_CNAK_SET (   value)    (((value) << 26) & 0x04000000)

Produces a ALT_USB_DEV_DIEPCTL0_CNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_SNAK_E_NOSET   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_SNAK

No action

#define ALT_USB_DEV_DIEPCTL0_SNAK_E_SET   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_SNAK

Set NAK

#define ALT_USB_DEV_DIEPCTL0_SNAK_LSB   27

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_SNAK register field.

#define ALT_USB_DEV_DIEPCTL0_SNAK_MSB   27

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_SNAK register field.

#define ALT_USB_DEV_DIEPCTL0_SNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_SNAK register field.

#define ALT_USB_DEV_DIEPCTL0_SNAK_SET_MSK   0x08000000

The mask used to set the ALT_USB_DEV_DIEPCTL0_SNAK register field value.

#define ALT_USB_DEV_DIEPCTL0_SNAK_CLR_MSK   0xf7ffffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_SNAK register field value.

#define ALT_USB_DEV_DIEPCTL0_SNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_SNAK register field.

#define ALT_USB_DEV_DIEPCTL0_SNAK_GET (   value)    (((value) & 0x08000000) >> 27)

Extracts the ALT_USB_DEV_DIEPCTL0_SNAK field value from a register.

#define ALT_USB_DEV_DIEPCTL0_SNAK_SET (   value)    (((value) << 27) & 0x08000000)

Produces a ALT_USB_DEV_DIEPCTL0_SNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPDIS

No action

#define ALT_USB_DEV_DIEPCTL0_EPDIS_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPDIS

Stop transmitting data on endpoint

#define ALT_USB_DEV_DIEPCTL0_EPDIS_LSB   30

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_MSB   30

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_SET_MSK   0x40000000

The mask used to set the ALT_USB_DEV_DIEPCTL0_EPDIS register field value.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_CLR_MSK   0xbfffffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_EPDIS register field value.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_GET (   value)    (((value) & 0x40000000) >> 30)

Extracts the ALT_USB_DEV_DIEPCTL0_EPDIS field value from a register.

#define ALT_USB_DEV_DIEPCTL0_EPDIS_SET (   value)    (((value) << 30) & 0x40000000)

Produces a ALT_USB_DEV_DIEPCTL0_EPDIS register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_EPENA_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPENA

No action

#define ALT_USB_DEV_DIEPCTL0_EPENA_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DIEPCTL0_EPENA

Endpoint Enabled

#define ALT_USB_DEV_DIEPCTL0_EPENA_LSB   31

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DIEPCTL0_EPENA register field.

#define ALT_USB_DEV_DIEPCTL0_EPENA_MSB   31

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DIEPCTL0_EPENA register field.

#define ALT_USB_DEV_DIEPCTL0_EPENA_WIDTH   1

The width in bits of the ALT_USB_DEV_DIEPCTL0_EPENA register field.

#define ALT_USB_DEV_DIEPCTL0_EPENA_SET_MSK   0x80000000

The mask used to set the ALT_USB_DEV_DIEPCTL0_EPENA register field value.

#define ALT_USB_DEV_DIEPCTL0_EPENA_CLR_MSK   0x7fffffff

The mask used to clear the ALT_USB_DEV_DIEPCTL0_EPENA register field value.

#define ALT_USB_DEV_DIEPCTL0_EPENA_RESET   0x0

The reset value of the ALT_USB_DEV_DIEPCTL0_EPENA register field.

#define ALT_USB_DEV_DIEPCTL0_EPENA_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_USB_DEV_DIEPCTL0_EPENA field value from a register.

#define ALT_USB_DEV_DIEPCTL0_EPENA_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_USB_DEV_DIEPCTL0_EPENA register field value suitable for setting the register.

#define ALT_USB_DEV_DIEPCTL0_RESET   0x00008000

The reset value of the ALT_USB_DEV_DIEPCTL0 register.

#define ALT_USB_DEV_DIEPCTL0_OFST   0x100

The byte offset of the ALT_USB_DEV_DIEPCTL0 register from the beginning of the component.

#define ALT_USB_DEV_DIEPCTL0_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DIEPCTL0_OFST))

The address of the ALT_USB_DEV_DIEPCTL0 register.

Typedef Documentation

The typedef declaration for register ALT_USB_DEV_DIEPCTL0.