Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : SDMMC RAM ECC Enable Register - sdmmc

Description

This register is used to enable ECC on the SDMMC RAM.ECC errors can be injected into the write path using bits in this register.

Only reset by a cold reset (ignores warm reset).

Register Layout

Bits Access Reset Description
[0] RW 0x0 SDMMC RAM ECC Enable
[1] RW 0x0 SDMMC Port A RAM ECC inject single, correctable Error at Port A
[2] RW 0x0 SDMMC Port A RAM ECC inject double bit, non-correctable error at Port A
[3] RW 0x0 SDMMC Port B RAM ECC inject single, correctable Error at Port B
[4] RW 0x0 SDMMC Port B RAM ECC inject double bit, non-correctable error at Port B
[5] RW 0x0 SDMMC Port A RAM ECC single, correctable error interrupt status
[6] RW 0x0 SDMMC Port A RAM ECC double bit, non-correctable error interrupt status
[7] RW 0x0 SDMMC Port B RAM ECC single, correctable error interrupt status
[8] RW 0x0 SDMMC Port B RAM ECC double bit, non-correctable error interrupt status
[31:9] ??? 0x0 UNDEFINED

Field : SDMMC RAM ECC Enable - en

Enable ECC for SDMMC RAM

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_EN_LSB   0
 
#define ALT_SYSMGR_ECC_SDMMC_EN_MSB   0
 
#define ALT_SYSMGR_ECC_SDMMC_EN_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_EN_SET_MSK   0x00000001
 
#define ALT_SYSMGR_ECC_SDMMC_EN_CLR_MSK   0xfffffffe
 
#define ALT_SYSMGR_ECC_SDMMC_EN_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_EN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SYSMGR_ECC_SDMMC_EN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : SDMMC Port A RAM ECC inject single, correctable Error at Port A - injsporta

Changing this bit from zero to one injects a single, correctable error into the SDMMC RAM at Port A. This only injects one error into the SDMMC RAM at Port A.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_LSB   1
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_MSB   1
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET_MSK   0x00000002
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_CLR_MSK   0xfffffffd
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET(value)   (((value) << 1) & 0x00000002)
 

Field : SDMMC Port A RAM ECC inject double bit, non-correctable error at Port A - injdporta

Changing this bit from zero to one injects a double, non-correctable error into the SDMMC RAM at Port A. This only injects one double bit error into the SDMMC RAM at Port A.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_LSB   2
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_MSB   2
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET_MSK   0x00000004
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_CLR_MSK   0xfffffffb
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET(value)   (((value) << 2) & 0x00000004)
 

Field : SDMMC Port B RAM ECC inject single, correctable Error at Port B - injsportb

Changing this bit from zero to one injects a single, correctable error into the SDMMC RAM at Port B. This only injects one error into the SDMMC RAM at Port B.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_LSB   3
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_MSB   3
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET_MSK   0x00000008
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_CLR_MSK   0xfffffff7
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET(value)   (((value) << 3) & 0x00000008)
 

Field : SDMMC Port B RAM ECC inject double bit, non-correctable error at Port B - injdportb

Changing this bit from zero to one injects a double, non-correctable error into the SDMMC RAM at Port B. This only injects one double bit error into the SDMMC RAM at Port B.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_LSB   4
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_MSB   4
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET_MSK   0x00000010
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_CLR_MSK   0xffffffef
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET(value)   (((value) << 4) & 0x00000010)
 

Field : SDMMC Port A RAM ECC single, correctable error interrupt status - serrporta

This bit is an interrupt status bit for SDMMC Port A RAM ECC single, correctable error. It is set by hardware when single, correctable error occurs in SDMMC Port A RAM. Software needs to write 1 into this bit to clear the interrupt status.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_LSB   5
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_MSB   5
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET_MSK   0x00000020
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_CLR_MSK   0xffffffdf
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET(value)   (((value) << 5) & 0x00000020)
 

Field : SDMMC Port A RAM ECC double bit, non-correctable error interrupt status - derrporta

This bit is an interrupt status bit for SDMMC Port A RAM ECC double bit, non- correctable error. It is set by hardware when double bit, non-correctable error occurs in SDMMC Port A RAM. Software needs to write 1 into this bit to clear the interrupt status.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_LSB   6
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_MSB   6
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET_MSK   0x00000040
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_CLR_MSK   0xffffffbf
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET(value)   (((value) << 6) & 0x00000040)
 

Field : SDMMC Port B RAM ECC single, correctable error interrupt status - serrportb

This bit is an interrupt status bit for SDMMC Port B RAM ECC single, correctable error. It is set by hardware when single, correctable error occurs in SDMMC Port B RAM. Software needs to write 1 into this bit to clear the interrupt status.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_LSB   7
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_MSB   7
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET_MSK   0x00000080
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_CLR_MSK   0xffffff7f
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET(value)   (((value) << 7) & 0x00000080)
 

Field : SDMMC Port B RAM ECC double bit, non-correctable error interrupt status - derrportb

This bit is an interrupt status bit for SDMMC Port B RAM ECC double bit, non- correctable error. It is set by hardware when double bit, non-correctable error occurs in SDMMC Port B RAM. Software needs to write 1 into this bit to clear the interrupt status.

Field Access Macros:

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_LSB   8
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_MSB   8
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_WIDTH   1
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET_MSK   0x00000100
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_CLR_MSK   0xfffffeff
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_RESET   0x0
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET(value)   (((value) << 8) & 0x00000100)
 

Data Structures

struct  ALT_SYSMGR_ECC_SDMMC_s
 

Macros

#define ALT_SYSMGR_ECC_SDMMC_OFST   0x2c
 

Typedefs

typedef struct
ALT_SYSMGR_ECC_SDMMC_s 
ALT_SYSMGR_ECC_SDMMC_t
 

Data Structure Documentation

struct ALT_SYSMGR_ECC_SDMMC_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_ECC_SDMMC.

Data Fields
uint32_t en: 1 SDMMC RAM ECC Enable
uint32_t injsporta: 1 SDMMC Port A RAM ECC inject single, correctable Error at Port A
uint32_t injdporta: 1 SDMMC Port A RAM ECC inject double bit, non-correctable error at Port A
uint32_t injsportb: 1 SDMMC Port B RAM ECC inject single, correctable Error at Port B
uint32_t injdportb: 1 SDMMC Port B RAM ECC inject double bit, non-correctable error at Port B
uint32_t serrporta: 1 SDMMC Port A RAM ECC single, correctable error interrupt status
uint32_t derrporta: 1 SDMMC Port A RAM ECC double bit, non-correctable error interrupt status
uint32_t serrportb: 1 SDMMC Port B RAM ECC single, correctable error interrupt status
uint32_t derrportb: 1 SDMMC Port B RAM ECC double bit, non-correctable error interrupt status
uint32_t __pad0__: 23 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_ECC_SDMMC_EN_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_EN register field.

#define ALT_SYSMGR_ECC_SDMMC_EN_MSB   0

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_EN register field.

#define ALT_SYSMGR_ECC_SDMMC_EN_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_EN register field.

#define ALT_SYSMGR_ECC_SDMMC_EN_SET_MSK   0x00000001

The mask used to set the ALT_SYSMGR_ECC_SDMMC_EN register field value.

#define ALT_SYSMGR_ECC_SDMMC_EN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_EN register field value.

#define ALT_SYSMGR_ECC_SDMMC_EN_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_EN register field.

#define ALT_SYSMGR_ECC_SDMMC_EN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SYSMGR_ECC_SDMMC_EN field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_EN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SYSMGR_ECC_SDMMC_EN register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_LSB   1

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_MSB   1

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET_MSK   0x00000002

The mask used to set the ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SYSMGR_ECC_SDMMC_INJSPORTA field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SYSMGR_ECC_SDMMC_INJSPORTA register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_LSB   2

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_MSB   2

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET_MSK   0x00000004

The mask used to set the ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_CLR_MSK   0xfffffffb

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_SYSMGR_ECC_SDMMC_INJDPORTA field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_SYSMGR_ECC_SDMMC_INJDPORTA register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_LSB   3

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_MSB   3

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET_MSK   0x00000008

The mask used to set the ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_CLR_MSK   0xfffffff7

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_SYSMGR_ECC_SDMMC_INJSPORTB field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_SYSMGR_ECC_SDMMC_INJSPORTB register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_LSB   4

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_MSB   4

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET_MSK   0x00000010

The mask used to set the ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_CLR_MSK   0xffffffef

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_SYSMGR_ECC_SDMMC_INJDPORTB field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_SYSMGR_ECC_SDMMC_INJDPORTB register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_LSB   5

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_MSB   5

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET_MSK   0x00000020

The mask used to set the ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_CLR_MSK   0xffffffdf

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_SYSMGR_ECC_SDMMC_SERRPORTA field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_SYSMGR_ECC_SDMMC_SERRPORTA register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_LSB   6

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_MSB   6

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET_MSK   0x00000040

The mask used to set the ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_CLR_MSK   0xffffffbf

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field value.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_SYSMGR_ECC_SDMMC_DERRPORTA field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_SYSMGR_ECC_SDMMC_DERRPORTA register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_LSB   7

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_MSB   7

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET_MSK   0x00000080

The mask used to set the ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_CLR_MSK   0xffffff7f

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_SYSMGR_ECC_SDMMC_SERRPORTB field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_SYSMGR_ECC_SDMMC_SERRPORTB register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_LSB   8

The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_MSB   8

The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_WIDTH   1

The width in bits of the ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET_MSK   0x00000100

The mask used to set the ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_CLR_MSK   0xfffffeff

The mask used to clear the ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field value.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_RESET   0x0

The reset value of the ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_SYSMGR_ECC_SDMMC_DERRPORTB field value from a register.

#define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_SYSMGR_ECC_SDMMC_DERRPORTB register field value suitable for setting the register.

#define ALT_SYSMGR_ECC_SDMMC_OFST   0x2c

The byte offset of the ALT_SYSMGR_ECC_SDMMC register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_ECC_SDMMC.