The macro definitions in this section support access to the short-descriptor second-level table entries and their constituent fields.
These macros may be used to create descriptor entry values that are passed to a second level translation table contruction function such as alt_mmu_ttb2_desc_set().
Each short-descriptor has a set of macro definitions of the following form:
- ALT_MMU_TTB2_<type_and_field_name>_MASK - bit mask for the descriptor type and field.
- ALT_MMU_TTB2_<type_and_field_name>_GET(desc) - extracts the field value from the descriptor entry desc.
- ALT_MMU_TTB2_<type_and_field_name>_SET(val) - returns a field val shifted and masked that is suitable for setting a descriptor entry.
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The [B] field of the memory region attributes. [B] is an arcane reference to Bufferable attribute.
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#define | ALT_MMU_TTB2_LARGE_PAGE_B_MASK 0x00000004 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_B_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_B_MASK) >> 2) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_B_SET(val) (((val) << 2) & ALT_MMU_TTB2_LARGE_PAGE_B_MASK) |
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The [C] field of the memory region attributes. [C] is an arcane reference to Cacheable attribute.
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#define | ALT_MMU_TTB2_LARGE_PAGE_C_MASK 0x00000008 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_C_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_C_MASK) >> 3) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_C_SET(val) (((val) << 3) & ALT_MMU_TTB2_LARGE_PAGE_C_MASK) |
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Access Permissions bits.
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#define | ALT_MMU_TTB2_LARGE_PAGE_AP_MASK 0x00000230 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_AP_GET(desc) ((((desc) & 0x00000200) >> 7) | (((desc) & 0x00000030) >> 4)) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_AP_SET(val) ((((val) << 7) & 0x00000200) | (((val) << 4) & 0x00000030)) |
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The Shareable bit. Determines whether the addressed region is shareable memory.
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#define | ALT_MMU_TTB2_LARGE_PAGE_S_MASK 0x00000400 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_S_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_S_MASK) >> 10) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_S_SET(val) (((val) << 10) & ALT_MMU_TTB2_LARGE_PAGE_S_MASK) |
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The not global bit. Determines how the translation is marked in the TLB.
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#define | ALT_MMU_TTB2_LARGE_PAGE_NG_MASK 0x00000800 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_NG_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_NG_MASK) >> 11) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_NG_SET(val) (((val) << 11) & ALT_MMU_TTB2_LARGE_PAGE_NG_MASK) |
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The [TEX] field of the memory region attributes. [TEX] is an arcane reference to Type EXtension attribute.
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#define | ALT_MMU_TTB2_LARGE_PAGE_TEX_MASK 0x00007000 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_TEX_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_TEX_MASK) >> 12) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_TEX_SET(val) (((val) << 12) & ALT_MMU_TTB2_LARGE_PAGE_TEX_MASK) |
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The Execute-Never bit. Determines whether the processor can execute software from the addressed region.
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#define | ALT_MMU_TTB2_LARGE_PAGE_XN_MASK 0x00008000 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_XN_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_XN_MASK) >> 15) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_XN_SET(val) (((val) << 15) & ALT_MMU_TTB2_LARGE_PAGE_XN_MASK) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_BASE_ADDR_MASK 0xffff0000 |
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#define | ALT_MMU_TTB2_LARGE_PAGE_BASE_ADDR_GET(desc) (((desc) & ALT_MMU_TTB2_LARGE_PAGE_BASE_ADDR_MASK) >> 16) |
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#define | ALT_MMU_TTB2_LARGE_PAGE_BASE_ADDR_SET(val) (((val) << 16) & ALT_MMU_TTB2_LARGE_PAGE_BASE_ADDR_MASK) |
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The Execute-Never bit. Determines whether the processor can execute software from the addressed region.
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#define | ALT_MMU_TTB2_SMALL_PAGE_XN_MASK 0x00000001 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_XN_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_XN_MASK) >> 0) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_XN_SET(val) (((val) << 0) & ALT_MMU_TTB2_SMALL_PAGE_XN_MASK) |
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The [B] field of the memory region attributes. [B] is an arcane reference to Bufferable attribute.
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#define | ALT_MMU_TTB2_SMALL_PAGE_B_MASK 0x00000004 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_B_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_B_MASK) >> 2) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_B_SET(val) (((val) << 2) & ALT_MMU_TTB2_SMALL_PAGE_B_MASK) |
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The [C] field of the memory region attributes. [C] is an arcane reference to Cacheable attribute.
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#define | ALT_MMU_TTB2_SMALL_PAGE_C_MASK 0x00000008 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_C_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_C_MASK) >> 3) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_C_SET(val) (((val) << 3) & ALT_MMU_TTB2_SMALL_PAGE_C_MASK) |
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Access Permissions bits.
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#define | ALT_MMU_TTB2_SMALL_PAGE_AP_MASK 0x00000230 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_AP_GET(desc) ((((desc) & 0x00000200) >> 7) | (((desc) & 0x00000030) >> 4)) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_AP_SET(val) ((((val) << 7) & 0x00000200) | (((val) << 4) & 0x00000030)) |
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The [TEX] field of the memory region attributes. [TEX] is an arcane reference to Type EXtension attribute.
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#define | ALT_MMU_TTB2_SMALL_PAGE_TEX_MASK 0x000001c0 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_TEX_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_TEX_MASK) >> 6) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_TEX_SET(val) (((val) << 6) & ALT_MMU_TTB2_SMALL_PAGE_TEX_MASK) |
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The Shareable bit. Determines whether the addressed region is shareable memory.
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#define | ALT_MMU_TTB2_SMALL_PAGE_S_MASK 0x00000400 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_S_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_S_MASK) >> 10) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_S_SET(val) (((val) << 10) & ALT_MMU_TTB2_SMALL_PAGE_S_MASK) |
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The not global bit. Determines how the translation is marked in the TLB.
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#define | ALT_MMU_TTB2_SMALL_PAGE_NG_MASK 0x00000800 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_NG_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_NG_MASK) >> 11) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_NG_SET(val) (((val) << 11) & ALT_MMU_TTB2_SMALL_PAGE_NG_MASK) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_BASE_ADDR_MASK 0xfffff000 |
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#define | ALT_MMU_TTB2_SMALL_PAGE_BASE_ADDR_GET(desc) (((desc) & ALT_MMU_TTB2_SMALL_PAGE_BASE_ADDR_MASK) >> 12) |
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#define | ALT_MMU_TTB2_SMALL_PAGE_BASE_ADDR_SET(val) (((val) << 12) & ALT_MMU_TTB2_SMALL_PAGE_BASE_ADDR_MASK) |
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