Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : SYSTEM Warm Mask Register - syswarmmask

Description

The SYSWARMMASK register is used by software to mask the assertion of module reset signals for hardware sequenced warm resets. There is a writeable bit for each module reset signal that is asserted by default on a hardware sequenced warm reset. If the bit is 1, the module reset signal is asserted by a hardware sequenced warm reset. If the bit is 0, the module reset signal is not changed by a hardware sequenced warm reset. The bit assignments of the *WARMMASK registers match the corresponding *MODRST registers. Any module reset signals that are never asserted by a warm reset have reserved bit offsets and are tied to 0 (read as 0, writes are ignored).

All fields are only reset by a cold reset.

Fields in the SYSMODRST register associated with cold reset or debug domain reset aren't present in the MISCWARMMASK register and are reserved.

Register Layout

Bits Access Reset Description
[0] RW 0x1 Boot ROM
[1] RW 0x1 On-chip RAM
[2] ??? 0x1 UNDEFINED
[3] RW 0x1 FPGA Manager
[4] RW 0x1 HPS to FPGA Core (Cold or Warm)
[5] RW 0x1 System/Debug
[6] RW 0x1 On-chip RAM ECC OCP Diagnostic
[31:7] ??? 0x3 UNDEFINED

Field : Boot ROM - rom

Masks hardware sequenced warm reset for Boot ROM

Field Access Macros:

#define ALT_RSTMGR_SYSWARMMSK_ROM_LSB   0
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_MSB   0
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_WIDTH   1
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_SET_MSK   0x00000001
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_CLR_MSK   0xfffffffe
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_RESET   0x1
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_RSTMGR_SYSWARMMSK_ROM_SET(value)   (((value) << 0) & 0x00000001)
 

Field : On-chip RAM - ocram

Masks hardware sequenced warm reset for On-chip RAM

Field Access Macros:

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_LSB   1
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_MSB   1
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_WIDTH   1
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_SET_MSK   0x00000002
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_CLR_MSK   0xfffffffd
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_RESET   0x1
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAM_SET(value)   (((value) << 1) & 0x00000002)
 

Field : FPGA Manager - fpgamgr

Masks hardware sequenced warm reset for FPGA Manager

Field Access Macros:

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_LSB   3
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_MSB   3
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_WIDTH   1
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_SET_MSK   0x00000008
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_CLR_MSK   0xfffffff7
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_RESET   0x1
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_SET(value)   (((value) << 3) & 0x00000008)
 

Field : HPS to FPGA Core (Cold or Warm) - s2f

Masks hardware sequenced warm reset for logic in FPGA core that doesn't differentiate between HPS cold and warm resets

Field Access Macros:

#define ALT_RSTMGR_SYSWARMMSK_S2F_LSB   4
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_MSB   4
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_WIDTH   1
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_SET_MSK   0x00000010
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_CLR_MSK   0xffffffef
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_RESET   0x1
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_RSTMGR_SYSWARMMSK_S2F_SET(value)   (((value) << 4) & 0x00000010)
 

Field : System/Debug - sysdbg

Masks hardware sequenced warm reset for logic that spans the system and debug domains.

Field Access Macros:

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_LSB   5
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_MSB   5
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_WIDTH   1
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_SET_MSK   0x00000020
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_CLR_MSK   0xffffffdf
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_RESET   0x1
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_SET(value)   (((value) << 5) & 0x00000020)
 

Field : On-chip RAM ECC OCP Diagnostic - ocramocp

Masks hardware sequenced warm reset for On-chip RAM ECC OCP Diagnostic module

Field Access Macros:

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_LSB   6
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_MSB   6
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_WIDTH   1
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_SET_MSK   0x00000040
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_CLR_MSK   0xffffffbf
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_RESET   0x1
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_SET(value)   (((value) << 6) & 0x00000040)
 

Data Structures

struct  ALT_RSTMGR_SYSWARMMSK_s
 

Macros

#define ALT_RSTMGR_SYSWARMMSK_RESET   0x000001ff
 
#define ALT_RSTMGR_SYSWARMMSK_OFST   0x50
 

Typedefs

typedef struct
ALT_RSTMGR_SYSWARMMSK_s 
ALT_RSTMGR_SYSWARMMSK_t
 

Data Structure Documentation

struct ALT_RSTMGR_SYSWARMMSK_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_RSTMGR_SYSWARMMSK.

Data Fields
uint32_t rom: 1 Boot ROM
uint32_t ocram: 1 On-chip RAM
uint32_t __pad0__: 1 UNDEFINED
uint32_t fpgamgr: 1 FPGA Manager
uint32_t s2f: 1 HPS to FPGA Core (Cold or Warm)
uint32_t sysdbg: 1 System/Debug
uint32_t ocramocp: 1 On-chip RAM ECC OCP Diagnostic
uint32_t __pad1__: 25 UNDEFINED

Macro Definitions

#define ALT_RSTMGR_SYSWARMMSK_ROM_LSB   0

The Least Significant Bit (LSB) position of the ALT_RSTMGR_SYSWARMMSK_ROM register field.

#define ALT_RSTMGR_SYSWARMMSK_ROM_MSB   0

The Most Significant Bit (MSB) position of the ALT_RSTMGR_SYSWARMMSK_ROM register field.

#define ALT_RSTMGR_SYSWARMMSK_ROM_WIDTH   1

The width in bits of the ALT_RSTMGR_SYSWARMMSK_ROM register field.

#define ALT_RSTMGR_SYSWARMMSK_ROM_SET_MSK   0x00000001

The mask used to set the ALT_RSTMGR_SYSWARMMSK_ROM register field value.

#define ALT_RSTMGR_SYSWARMMSK_ROM_CLR_MSK   0xfffffffe

The mask used to clear the ALT_RSTMGR_SYSWARMMSK_ROM register field value.

#define ALT_RSTMGR_SYSWARMMSK_ROM_RESET   0x1

The reset value of the ALT_RSTMGR_SYSWARMMSK_ROM register field.

#define ALT_RSTMGR_SYSWARMMSK_ROM_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_RSTMGR_SYSWARMMSK_ROM field value from a register.

#define ALT_RSTMGR_SYSWARMMSK_ROM_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_RSTMGR_SYSWARMMSK_ROM register field value suitable for setting the register.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_LSB   1

The Least Significant Bit (LSB) position of the ALT_RSTMGR_SYSWARMMSK_OCRAM register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_MSB   1

The Most Significant Bit (MSB) position of the ALT_RSTMGR_SYSWARMMSK_OCRAM register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_WIDTH   1

The width in bits of the ALT_RSTMGR_SYSWARMMSK_OCRAM register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_SET_MSK   0x00000002

The mask used to set the ALT_RSTMGR_SYSWARMMSK_OCRAM register field value.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_CLR_MSK   0xfffffffd

The mask used to clear the ALT_RSTMGR_SYSWARMMSK_OCRAM register field value.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_RESET   0x1

The reset value of the ALT_RSTMGR_SYSWARMMSK_OCRAM register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_RSTMGR_SYSWARMMSK_OCRAM field value from a register.

#define ALT_RSTMGR_SYSWARMMSK_OCRAM_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_RSTMGR_SYSWARMMSK_OCRAM register field value suitable for setting the register.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_LSB   3

The Least Significant Bit (LSB) position of the ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_MSB   3

The Most Significant Bit (MSB) position of the ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_WIDTH   1

The width in bits of the ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_SET_MSK   0x00000008

The mask used to set the ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field value.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_CLR_MSK   0xfffffff7

The mask used to clear the ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field value.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_RESET   0x1

The reset value of the ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_RSTMGR_SYSWARMMSK_FPGAMGR field value from a register.

#define ALT_RSTMGR_SYSWARMMSK_FPGAMGR_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_RSTMGR_SYSWARMMSK_FPGAMGR register field value suitable for setting the register.

#define ALT_RSTMGR_SYSWARMMSK_S2F_LSB   4

The Least Significant Bit (LSB) position of the ALT_RSTMGR_SYSWARMMSK_S2F register field.

#define ALT_RSTMGR_SYSWARMMSK_S2F_MSB   4

The Most Significant Bit (MSB) position of the ALT_RSTMGR_SYSWARMMSK_S2F register field.

#define ALT_RSTMGR_SYSWARMMSK_S2F_WIDTH   1

The width in bits of the ALT_RSTMGR_SYSWARMMSK_S2F register field.

#define ALT_RSTMGR_SYSWARMMSK_S2F_SET_MSK   0x00000010

The mask used to set the ALT_RSTMGR_SYSWARMMSK_S2F register field value.

#define ALT_RSTMGR_SYSWARMMSK_S2F_CLR_MSK   0xffffffef

The mask used to clear the ALT_RSTMGR_SYSWARMMSK_S2F register field value.

#define ALT_RSTMGR_SYSWARMMSK_S2F_RESET   0x1

The reset value of the ALT_RSTMGR_SYSWARMMSK_S2F register field.

#define ALT_RSTMGR_SYSWARMMSK_S2F_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_RSTMGR_SYSWARMMSK_S2F field value from a register.

#define ALT_RSTMGR_SYSWARMMSK_S2F_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_RSTMGR_SYSWARMMSK_S2F register field value suitable for setting the register.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_LSB   5

The Least Significant Bit (LSB) position of the ALT_RSTMGR_SYSWARMMSK_SYSDBG register field.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_MSB   5

The Most Significant Bit (MSB) position of the ALT_RSTMGR_SYSWARMMSK_SYSDBG register field.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_WIDTH   1

The width in bits of the ALT_RSTMGR_SYSWARMMSK_SYSDBG register field.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_SET_MSK   0x00000020

The mask used to set the ALT_RSTMGR_SYSWARMMSK_SYSDBG register field value.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_CLR_MSK   0xffffffdf

The mask used to clear the ALT_RSTMGR_SYSWARMMSK_SYSDBG register field value.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_RESET   0x1

The reset value of the ALT_RSTMGR_SYSWARMMSK_SYSDBG register field.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_RSTMGR_SYSWARMMSK_SYSDBG field value from a register.

#define ALT_RSTMGR_SYSWARMMSK_SYSDBG_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_RSTMGR_SYSWARMMSK_SYSDBG register field value suitable for setting the register.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_LSB   6

The Least Significant Bit (LSB) position of the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_MSB   6

The Most Significant Bit (MSB) position of the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_WIDTH   1

The width in bits of the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_SET_MSK   0x00000040

The mask used to set the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field value.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_CLR_MSK   0xffffffbf

The mask used to clear the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field value.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_RESET   0x1

The reset value of the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_RSTMGR_SYSWARMMSK_OCRAMOCP field value from a register.

#define ALT_RSTMGR_SYSWARMMSK_OCRAMOCP_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_RSTMGR_SYSWARMMSK_OCRAMOCP register field value suitable for setting the register.

#define ALT_RSTMGR_SYSWARMMSK_RESET   0x000001ff

The reset value of the ALT_RSTMGR_SYSWARMMSK register.

#define ALT_RSTMGR_SYSWARMMSK_OFST   0x50

The byte offset of the ALT_RSTMGR_SYSWARMMSK register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_RSTMGR_SYSWARMMSK.