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alt_l4wd.h
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32 
35 #ifndef __ALTERA_ALT_L4WD_H__
36 #define __ALTERA_ALT_L4WD_H__
37 
38 #ifdef __cplusplus
39 extern "C"
40 {
41 #endif /* __cplusplus */
42 
87 #define ALT_L4WD_CR_WDT_EN_E_DISD 0x0
88 
93 #define ALT_L4WD_CR_WDT_EN_E_END 0x1
94 
96 #define ALT_L4WD_CR_WDT_EN_LSB 0
97 
98 #define ALT_L4WD_CR_WDT_EN_MSB 0
99 
100 #define ALT_L4WD_CR_WDT_EN_WIDTH 1
101 
102 #define ALT_L4WD_CR_WDT_EN_SET_MSK 0x00000001
103 
104 #define ALT_L4WD_CR_WDT_EN_CLR_MSK 0xfffffffe
105 
106 #define ALT_L4WD_CR_WDT_EN_RESET 0x0
107 
108 #define ALT_L4WD_CR_WDT_EN_GET(value) (((value) & 0x00000001) >> 0)
109 
110 #define ALT_L4WD_CR_WDT_EN_SET(value) (((value) << 0) & 0x00000001)
111 
134 #define ALT_L4WD_CR_RMOD_E_RST 0x0
135 
141 #define ALT_L4WD_CR_RMOD_E_IRQRST 0x1
142 
144 #define ALT_L4WD_CR_RMOD_LSB 1
145 
146 #define ALT_L4WD_CR_RMOD_MSB 1
147 
148 #define ALT_L4WD_CR_RMOD_WIDTH 1
149 
150 #define ALT_L4WD_CR_RMOD_SET_MSK 0x00000002
151 
152 #define ALT_L4WD_CR_RMOD_CLR_MSK 0xfffffffd
153 
154 #define ALT_L4WD_CR_RMOD_RESET 0x1
155 
156 #define ALT_L4WD_CR_RMOD_GET(value) (((value) & 0x00000002) >> 1)
157 
158 #define ALT_L4WD_CR_RMOD_SET(value) (((value) << 1) & 0x00000002)
159 
160 #ifndef __ASSEMBLY__
161 
172 {
173  uint32_t wdt_en : 1;
174  uint32_t rmod : 1;
175  uint32_t : 30;
176 };
177 
179 typedef volatile struct ALT_L4WD_CR_s ALT_L4WD_CR_t;
180 #endif /* __ASSEMBLY__ */
181 
183 #define ALT_L4WD_CR_OFST 0x0
184 
185 #define ALT_L4WD_CR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CR_OFST))
186 
239 #define ALT_L4WD_TORR_TOP_E_TMO64K 0x0
240 
245 #define ALT_L4WD_TORR_TOP_E_TMO128K 0x1
246 
251 #define ALT_L4WD_TORR_TOP_E_TMO256K 0x2
252 
257 #define ALT_L4WD_TORR_TOP_E_TMO512K 0x3
258 
263 #define ALT_L4WD_TORR_TOP_E_TMO1M 0x4
264 
269 #define ALT_L4WD_TORR_TOP_E_TMO2M 0x5
270 
275 #define ALT_L4WD_TORR_TOP_E_TMO4M 0x6
276 
281 #define ALT_L4WD_TORR_TOP_E_TMO8M 0x7
282 
287 #define ALT_L4WD_TORR_TOP_E_TMO16M 0x8
288 
293 #define ALT_L4WD_TORR_TOP_E_TMO32M 0x9
294 
299 #define ALT_L4WD_TORR_TOP_E_TMO64M 0xa
300 
305 #define ALT_L4WD_TORR_TOP_E_TMO128M 0xb
306 
311 #define ALT_L4WD_TORR_TOP_E_TMO256M 0xc
312 
317 #define ALT_L4WD_TORR_TOP_E_TMO512M 0xd
318 
323 #define ALT_L4WD_TORR_TOP_E_TMO1G 0xe
324 
329 #define ALT_L4WD_TORR_TOP_E_TMO2G 0xf
330 
332 #define ALT_L4WD_TORR_TOP_LSB 0
333 
334 #define ALT_L4WD_TORR_TOP_MSB 3
335 
336 #define ALT_L4WD_TORR_TOP_WIDTH 4
337 
338 #define ALT_L4WD_TORR_TOP_SET_MSK 0x0000000f
339 
340 #define ALT_L4WD_TORR_TOP_CLR_MSK 0xfffffff0
341 
342 #define ALT_L4WD_TORR_TOP_RESET 0xf
343 
344 #define ALT_L4WD_TORR_TOP_GET(value) (((value) & 0x0000000f) >> 0)
345 
346 #define ALT_L4WD_TORR_TOP_SET(value) (((value) << 0) & 0x0000000f)
347 
389 #define ALT_L4WD_TORR_TOP_INIT_E_TMO64K 0x0
390 
395 #define ALT_L4WD_TORR_TOP_INIT_E_TMO128K 0x1
396 
401 #define ALT_L4WD_TORR_TOP_INIT_E_TMO256K 0x2
402 
407 #define ALT_L4WD_TORR_TOP_INIT_E_TMO512K 0x3
408 
413 #define ALT_L4WD_TORR_TOP_INIT_E_TMO1M 0x4
414 
419 #define ALT_L4WD_TORR_TOP_INIT_E_TMO2M 0x5
420 
425 #define ALT_L4WD_TORR_TOP_INIT_E_TMO4M 0x6
426 
431 #define ALT_L4WD_TORR_TOP_INIT_E_TMO8M 0x7
432 
437 #define ALT_L4WD_TORR_TOP_INIT_E_TMO16M 0x8
438 
443 #define ALT_L4WD_TORR_TOP_INIT_E_TMO32M 0x9
444 
449 #define ALT_L4WD_TORR_TOP_INIT_E_TMO64M 0xa
450 
455 #define ALT_L4WD_TORR_TOP_INIT_E_TMO128M 0xb
456 
461 #define ALT_L4WD_TORR_TOP_INIT_E_TMO256M 0xc
462 
467 #define ALT_L4WD_TORR_TOP_INIT_E_TMO512M 0xd
468 
473 #define ALT_L4WD_TORR_TOP_INIT_E_TMO1G 0xe
474 
479 #define ALT_L4WD_TORR_TOP_INIT_E_TMO2G 0xf
480 
482 #define ALT_L4WD_TORR_TOP_INIT_LSB 4
483 
484 #define ALT_L4WD_TORR_TOP_INIT_MSB 7
485 
486 #define ALT_L4WD_TORR_TOP_INIT_WIDTH 4
487 
488 #define ALT_L4WD_TORR_TOP_INIT_SET_MSK 0x000000f0
489 
490 #define ALT_L4WD_TORR_TOP_INIT_CLR_MSK 0xffffff0f
491 
492 #define ALT_L4WD_TORR_TOP_INIT_RESET 0xf
493 
494 #define ALT_L4WD_TORR_TOP_INIT_GET(value) (((value) & 0x000000f0) >> 4)
495 
496 #define ALT_L4WD_TORR_TOP_INIT_SET(value) (((value) << 4) & 0x000000f0)
497 
498 #ifndef __ASSEMBLY__
499 
510 {
511  uint32_t top : 4;
512  uint32_t top_init : 4;
513  uint32_t : 24;
514 };
515 
517 typedef volatile struct ALT_L4WD_TORR_s ALT_L4WD_TORR_t;
518 #endif /* __ASSEMBLY__ */
519 
521 #define ALT_L4WD_TORR_OFST 0x4
522 
523 #define ALT_L4WD_TORR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_TORR_OFST))
524 
546 #define ALT_L4WD_CCVR_WDT_CCVR_LSB 0
547 
548 #define ALT_L4WD_CCVR_WDT_CCVR_MSB 31
549 
550 #define ALT_L4WD_CCVR_WDT_CCVR_WIDTH 32
551 
552 #define ALT_L4WD_CCVR_WDT_CCVR_SET_MSK 0xffffffff
553 
554 #define ALT_L4WD_CCVR_WDT_CCVR_CLR_MSK 0x00000000
555 
556 #define ALT_L4WD_CCVR_WDT_CCVR_RESET 0x7fffffff
557 
558 #define ALT_L4WD_CCVR_WDT_CCVR_GET(value) (((value) & 0xffffffff) >> 0)
559 
560 #define ALT_L4WD_CCVR_WDT_CCVR_SET(value) (((value) << 0) & 0xffffffff)
561 
562 #ifndef __ASSEMBLY__
563 
574 {
575  const uint32_t wdt_ccvr : 32;
576 };
577 
579 typedef volatile struct ALT_L4WD_CCVR_s ALT_L4WD_CCVR_t;
580 #endif /* __ASSEMBLY__ */
581 
583 #define ALT_L4WD_CCVR_OFST 0x8
584 
585 #define ALT_L4WD_CCVR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CCVR_OFST))
586 
621 #define ALT_L4WD_CRR_WDT_CRR_E_KICK 0x76
622 
624 #define ALT_L4WD_CRR_WDT_CRR_LSB 0
625 
626 #define ALT_L4WD_CRR_WDT_CRR_MSB 7
627 
628 #define ALT_L4WD_CRR_WDT_CRR_WIDTH 8
629 
630 #define ALT_L4WD_CRR_WDT_CRR_SET_MSK 0x000000ff
631 
632 #define ALT_L4WD_CRR_WDT_CRR_CLR_MSK 0xffffff00
633 
634 #define ALT_L4WD_CRR_WDT_CRR_RESET 0x0
635 
636 #define ALT_L4WD_CRR_WDT_CRR_GET(value) (((value) & 0x000000ff) >> 0)
637 
638 #define ALT_L4WD_CRR_WDT_CRR_SET(value) (((value) << 0) & 0x000000ff)
639 
640 #ifndef __ASSEMBLY__
641 
652 {
653  uint32_t wdt_crr : 8;
654  uint32_t : 24;
655 };
656 
658 typedef volatile struct ALT_L4WD_CRR_s ALT_L4WD_CRR_t;
659 #endif /* __ASSEMBLY__ */
660 
662 #define ALT_L4WD_CRR_OFST 0xc
663 
664 #define ALT_L4WD_CRR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CRR_OFST))
665 
699 #define ALT_L4WD_STAT_WDT_STAT_E_ACT 0x1
700 
705 #define ALT_L4WD_STAT_WDT_STAT_E_INACT 0x0
706 
708 #define ALT_L4WD_STAT_WDT_STAT_LSB 0
709 
710 #define ALT_L4WD_STAT_WDT_STAT_MSB 0
711 
712 #define ALT_L4WD_STAT_WDT_STAT_WIDTH 1
713 
714 #define ALT_L4WD_STAT_WDT_STAT_SET_MSK 0x00000001
715 
716 #define ALT_L4WD_STAT_WDT_STAT_CLR_MSK 0xfffffffe
717 
718 #define ALT_L4WD_STAT_WDT_STAT_RESET 0x0
719 
720 #define ALT_L4WD_STAT_WDT_STAT_GET(value) (((value) & 0x00000001) >> 0)
721 
722 #define ALT_L4WD_STAT_WDT_STAT_SET(value) (((value) << 0) & 0x00000001)
723 
724 #ifndef __ASSEMBLY__
725 
736 {
737  const uint32_t wdt_stat : 1;
738  uint32_t : 31;
739 };
740 
742 typedef volatile struct ALT_L4WD_STAT_s ALT_L4WD_STAT_t;
743 #endif /* __ASSEMBLY__ */
744 
746 #define ALT_L4WD_STAT_OFST 0x10
747 
748 #define ALT_L4WD_STAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_STAT_OFST))
749 
773 #define ALT_L4WD_EOI_WDT_EOI_LSB 0
774 
775 #define ALT_L4WD_EOI_WDT_EOI_MSB 0
776 
777 #define ALT_L4WD_EOI_WDT_EOI_WIDTH 1
778 
779 #define ALT_L4WD_EOI_WDT_EOI_SET_MSK 0x00000001
780 
781 #define ALT_L4WD_EOI_WDT_EOI_CLR_MSK 0xfffffffe
782 
783 #define ALT_L4WD_EOI_WDT_EOI_RESET 0x0
784 
785 #define ALT_L4WD_EOI_WDT_EOI_GET(value) (((value) & 0x00000001) >> 0)
786 
787 #define ALT_L4WD_EOI_WDT_EOI_SET(value) (((value) << 0) & 0x00000001)
788 
789 #ifndef __ASSEMBLY__
790 
801 {
802  const uint32_t wdt_eoi : 1;
803  uint32_t : 31;
804 };
805 
807 typedef volatile struct ALT_L4WD_EOI_s ALT_L4WD_EOI_t;
808 #endif /* __ASSEMBLY__ */
809 
811 #define ALT_L4WD_EOI_OFST 0x14
812 
813 #define ALT_L4WD_EOI_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_EOI_OFST))
814 
837 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_LSB 0
838 
839 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_MSB 31
840 
841 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_WIDTH 32
842 
843 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_SET_MSK 0xffffffff
844 
845 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_CLR_MSK 0x00000000
846 
847 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_RESET 0x0
848 
849 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_GET(value) (((value) & 0xffffffff) >> 0)
850 
851 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_VAL_SET(value) (((value) << 0) & 0xffffffff)
852 
853 #ifndef __ASSEMBLY__
854 
865 {
866  const uint32_t cp_wdt_user_top_max : 32;
867 };
868 
871 #endif /* __ASSEMBLY__ */
872 
874 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_OFST 0xe4
875 
876 #define ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CP_WDT_USER_TOP_MAX_OFST))
877 
900 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_LSB 0
901 
902 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_MSB 31
903 
904 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_WIDTH 32
905 
906 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_SET_MSK 0xffffffff
907 
908 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_CLR_MSK 0x00000000
909 
910 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_RESET 0x0
911 
912 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_GET(value) (((value) & 0xffffffff) >> 0)
913 
914 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_VAL_SET(value) (((value) << 0) & 0xffffffff)
915 
916 #ifndef __ASSEMBLY__
917 
928 {
929  const uint32_t cp_wdt_user_top_init_max : 32;
930 };
931 
934 #endif /* __ASSEMBLY__ */
935 
937 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_OFST 0xe8
938 
939 #define ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_OFST))
940 
963 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_LSB 0
964 
965 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_MSB 31
966 
967 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_WIDTH 32
968 
969 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_SET_MSK 0xffffffff
970 
971 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_CLR_MSK 0x00000000
972 
973 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_RESET 0xff
974 
975 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_GET(value) (((value) & 0xffffffff) >> 0)
976 
977 #define ALT_L4WD_CD_WDT_TOP_RST_CD_WDT_TOP_RST_SET(value) (((value) << 0) & 0xffffffff)
978 
979 #ifndef __ASSEMBLY__
980 
991 {
992  const uint32_t cd_wdt_top_rst : 32;
993 };
994 
997 #endif /* __ASSEMBLY__ */
998 
1000 #define ALT_L4WD_CD_WDT_TOP_RST_OFST 0xec
1001 
1002 #define ALT_L4WD_CD_WDT_TOP_RST_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CD_WDT_TOP_RST_OFST))
1003 
1027 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_LSB 0
1028 
1029 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_MSB 31
1030 
1031 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_WIDTH 32
1032 
1033 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_SET_MSK 0xffffffff
1034 
1035 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_CLR_MSK 0x00000000
1036 
1037 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_RESET 0x7fffffff
1038 
1039 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_GET(value) (((value) & 0xffffffff) >> 0)
1040 
1041 #define ALT_L4WD_CP_WDT_CNT_RST_CP_WDT_CNT_RST_SET(value) (((value) << 0) & 0xffffffff)
1042 
1043 #ifndef __ASSEMBLY__
1044 
1055 {
1056  const uint32_t cp_wdt_cnt_rst : 32;
1057 };
1058 
1061 #endif /* __ASSEMBLY__ */
1062 
1064 #define ALT_L4WD_CP_WDT_CNT_RST_OFST 0xf0
1065 
1066 #define ALT_L4WD_CP_WDT_CNT_RST_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_CP_WDT_CNT_RST_OFST))
1067 
1114 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_E_DISD 0x0
1115 
1117 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_LSB 0
1118 
1119 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_MSB 0
1120 
1121 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_WIDTH 1
1122 
1123 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_SET_MSK 0x00000001
1124 
1125 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_CLR_MSK 0xfffffffe
1126 
1127 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_RESET 0x0
1128 
1129 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_GET(value) (((value) & 0x00000001) >> 0)
1130 
1131 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_ALWAYS_EN_SET(value) (((value) << 0) & 0x00000001)
1132 
1153 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_E_RSTREQ 0x0
1154 
1156 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_LSB 1
1157 
1158 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_MSB 1
1159 
1160 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_WIDTH 1
1161 
1162 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_SET_MSK 0x00000002
1163 
1164 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_CLR_MSK 0xfffffffd
1165 
1166 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_RESET 0x0
1167 
1168 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_GET(value) (((value) & 0x00000002) >> 1)
1169 
1170 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RMOD_SET(value) (((value) << 1) & 0x00000002)
1171 
1192 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_E_DUALTOP 0x1
1193 
1195 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_LSB 2
1196 
1197 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_MSB 2
1198 
1199 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_WIDTH 1
1200 
1201 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_SET_MSK 0x00000004
1202 
1203 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_CLR_MSK 0xfffffffb
1204 
1205 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_RESET 0x1
1206 
1207 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_GET(value) (((value) & 0x00000004) >> 2)
1208 
1209 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DUAL_TOP_SET(value) (((value) << 2) & 0x00000004)
1210 
1231 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_E_PGML 0x0
1232 
1234 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_LSB 3
1235 
1236 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_MSB 3
1237 
1238 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_WIDTH 1
1239 
1240 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_SET_MSK 0x00000008
1241 
1242 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_CLR_MSK 0xfffffff7
1243 
1244 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_RESET 0x0
1245 
1246 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_GET(value) (((value) & 0x00000008) >> 3)
1247 
1248 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RMOD_SET(value) (((value) << 3) & 0x00000008)
1249 
1269 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_E_HARDCODED 0x1
1270 
1272 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_LSB 4
1273 
1274 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_MSB 4
1275 
1276 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_WIDTH 1
1277 
1278 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_SET_MSK 0x00000010
1279 
1280 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_CLR_MSK 0xffffffef
1281 
1282 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_RESET 0x1
1283 
1284 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_GET(value) (((value) & 0x00000010) >> 4)
1285 
1286 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_RPL_SET(value) (((value) << 4) & 0x00000010)
1287 
1307 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_E_PGML 0x0
1308 
1310 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_LSB 5
1311 
1312 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_MSB 5
1313 
1314 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_WIDTH 1
1315 
1316 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_SET_MSK 0x00000020
1317 
1318 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_CLR_MSK 0xffffffdf
1319 
1320 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_RESET 0x0
1321 
1322 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_GET(value) (((value) & 0x00000020) >> 5)
1323 
1324 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_HC_TOP_SET(value) (((value) << 5) & 0x00000020)
1325 
1347 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_E_PREDEFINED 0x1
1348 
1350 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_LSB 6
1351 
1352 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_MSB 6
1353 
1354 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_WIDTH 1
1355 
1356 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_SET_MSK 0x00000040
1357 
1358 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_CLR_MSK 0xffffffbf
1359 
1360 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_RESET 0x1
1361 
1362 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_GET(value) (((value) & 0x00000040) >> 6)
1363 
1364 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_USE_FIX_TOP_SET(value) (((value) << 6) & 0x00000040)
1365 
1378 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_LSB 7
1379 
1380 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_MSB 7
1381 
1382 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_WIDTH 1
1383 
1384 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_SET_MSK 0x00000080
1385 
1386 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_CLR_MSK 0xffffff7f
1387 
1388 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_RESET 0x0
1389 
1390 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_GET(value) (((value) & 0x00000080) >> 7)
1391 
1392 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_PAUSE_SET(value) (((value) << 7) & 0x00000080)
1393 
1413 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_E_WIDTH32BITS 0x2
1414 
1416 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_LSB 8
1417 
1418 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_MSB 9
1419 
1420 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_WIDTH 2
1421 
1422 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_SET_MSK 0x00000300
1423 
1424 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_CLR_MSK 0xfffffcff
1425 
1426 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_RESET 0x2
1427 
1428 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_GET(value) (((value) & 0x00000300) >> 8)
1429 
1430 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_APB_DATA_WIDTH_SET(value) (((value) << 8) & 0x00000300)
1431 
1451 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_E_PULSE2CYCLES 0x0
1452 
1454 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_LSB 10
1455 
1456 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_MSB 12
1457 
1458 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_WIDTH 3
1459 
1460 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_SET_MSK 0x00001c00
1461 
1462 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_CLR_MSK 0xffffe3ff
1463 
1464 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_RESET 0x0
1465 
1466 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_GET(value) (((value) & 0x00001c00) >> 10)
1467 
1468 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_RPL_SET(value) (((value) << 10) & 0x00001c00)
1469 
1489 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_E_TMO15 0xf
1490 
1492 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_LSB 16
1493 
1494 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_MSB 19
1495 
1496 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_WIDTH 4
1497 
1498 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_SET_MSK 0x000f0000
1499 
1500 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_CLR_MSK 0xfff0ffff
1501 
1502 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_RESET 0xf
1503 
1504 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_GET(value) (((value) & 0x000f0000) >> 16)
1505 
1506 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_SET(value) (((value) << 16) & 0x000f0000)
1507 
1527 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_E_TMO15 0xf
1528 
1530 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_LSB 20
1531 
1532 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_MSB 23
1533 
1534 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_WIDTH 4
1535 
1536 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_SET_MSK 0x00f00000
1537 
1538 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_CLR_MSK 0xff0fffff
1539 
1540 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_RESET 0xf
1541 
1542 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_GET(value) (((value) & 0x00f00000) >> 20)
1543 
1544 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_DFLT_TOP_INIT_SET(value) (((value) << 20) & 0x00f00000)
1545 
1565 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_E_WIDTH32BITS 0x10
1566 
1568 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_LSB 24
1569 
1570 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_MSB 28
1571 
1572 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_WIDTH 5
1573 
1574 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_SET_MSK 0x1f000000
1575 
1576 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_CLR_MSK 0xe0ffffff
1577 
1578 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_RESET 0x10
1579 
1580 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_GET(value) (((value) & 0x1f000000) >> 24)
1581 
1582 #define ALT_L4WD_COMP_PARAM_1_CP_WDT_CNT_WIDTH_SET(value) (((value) << 24) & 0x1f000000)
1583 
1584 #ifndef __ASSEMBLY__
1585 
1596 {
1597  const uint32_t cp_wdt_always_en : 1;
1598  const uint32_t cp_wdt_dflt_rmod : 1;
1599  const uint32_t cp_wdt_dual_top : 1;
1600  const uint32_t cp_wdt_hc_rmod : 1;
1601  const uint32_t cp_wdt_hc_rpl : 1;
1602  const uint32_t cp_wdt_hc_top : 1;
1603  const uint32_t cp_wdt_use_fix_top : 1;
1604  const uint32_t cp_wdt_pause : 1;
1605  const uint32_t cp_wdt_apb_data_width : 2;
1606  const uint32_t cp_wdt_dflt_rpl : 3;
1607  uint32_t : 3;
1608  const uint32_t cp_wdt_dflt_top : 4;
1609  const uint32_t cp_wdt_dflt_top_init : 4;
1610  const uint32_t cp_wdt_cnt_width : 5;
1611  uint32_t : 3;
1612 };
1613 
1616 #endif /* __ASSEMBLY__ */
1617 
1619 #define ALT_L4WD_COMP_PARAM_1_OFST 0xf4
1620 
1621 #define ALT_L4WD_COMP_PARAM_1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_COMP_PARAM_1_OFST))
1622 
1643 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_LSB 0
1644 
1645 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_MSB 31
1646 
1647 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_WIDTH 32
1648 
1649 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_SET_MSK 0xffffffff
1650 
1651 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_CLR_MSK 0x00000000
1652 
1653 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_RESET 0x3130362a
1654 
1655 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_GET(value) (((value) & 0xffffffff) >> 0)
1656 
1657 #define ALT_L4WD_COMP_VER_WDT_COMP_VER_SET(value) (((value) << 0) & 0xffffffff)
1658 
1659 #ifndef __ASSEMBLY__
1660 
1671 {
1672  const uint32_t wdt_comp_version : 32;
1673 };
1674 
1677 #endif /* __ASSEMBLY__ */
1678 
1680 #define ALT_L4WD_COMP_VER_OFST 0xf8
1681 
1682 #define ALT_L4WD_COMP_VER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_COMP_VER_OFST))
1683 
1703 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_LSB 0
1704 
1705 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_MSB 31
1706 
1707 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_WIDTH 32
1708 
1709 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_SET_MSK 0xffffffff
1710 
1711 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_CLR_MSK 0x00000000
1712 
1713 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_RESET 0x44570120
1714 
1715 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_GET(value) (((value) & 0xffffffff) >> 0)
1716 
1717 #define ALT_L4WD_COMP_TYPE_WDT_COMP_TYPE_SET(value) (((value) << 0) & 0xffffffff)
1718 
1719 #ifndef __ASSEMBLY__
1720 
1731 {
1732  const uint32_t wdt_comp_type : 32;
1733 };
1734 
1737 #endif /* __ASSEMBLY__ */
1738 
1740 #define ALT_L4WD_COMP_TYPE_OFST 0xfc
1741 
1742 #define ALT_L4WD_COMP_TYPE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L4WD_COMP_TYPE_OFST))
1743 
1744 #ifndef __ASSEMBLY__
1745 
1756 {
1763  volatile uint32_t _pad_0x18_0xe3[51];
1771 };
1772 
1774 typedef volatile struct ALT_L4WD_s ALT_L4WD_t;
1777 {
1778  volatile uint32_t wdt_cr;
1779  volatile uint32_t wdt_torr;
1780  volatile uint32_t wdt_ccvr;
1781  volatile uint32_t wdt_crr;
1782  volatile uint32_t wdt_stat;
1783  volatile uint32_t wdt_eoi;
1784  volatile uint32_t _pad_0x18_0xe3[51];
1785  volatile uint32_t cp_wdt_user_top_max;
1786  volatile uint32_t cp_wdt_user_top_init_max;
1787  volatile uint32_t cd_wdt_top_rst;
1788  volatile uint32_t cp_wdt_cnt_rst;
1789  volatile uint32_t wdt_comp_param_1;
1790  volatile uint32_t wdt_comp_version;
1791  volatile uint32_t wdt_comp_type;
1792 };
1793 
1795 typedef volatile struct ALT_L4WD_raw_s ALT_L4WD_raw_t;
1796 #endif /* __ASSEMBLY__ */
1797 
1799 #ifdef __cplusplus
1800 }
1801 #endif /* __cplusplus */
1802 #endif /* __ALTERA_ALT_L4WD_H__ */
1803