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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register is used to enable ECC on the On-chip RAM. ECC errors can be injected into the write path using bits in this register. This register contains interrupt status of the ECC single/double bit error.
Only reset by a cold reset (ignores warm reset).
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | On-chip RAM ECC Enable |
[1] | RW | 0x0 | On-chip RAM ECC inject single, correctable Error |
[2] | RW | 0x0 | On-chip RAM ECC inject double bit, non-correctable error |
[3] | RW | 0x0 | On-chip RAM ECC single, correctable error interrupt status |
[4] | RW | 0x0 | On-chip RAM ECC double bit, non-correctable error interrupt status |
[31:5] | ??? | 0x0 | UNDEFINED |
Field : On-chip RAM ECC Enable - en | |
Enable ECC for On-chip RAM Field Access Macros: | |
#define | ALT_SYSMGR_ECC_OCRAM_EN_LSB 0 |
#define | ALT_SYSMGR_ECC_OCRAM_EN_MSB 0 |
#define | ALT_SYSMGR_ECC_OCRAM_EN_WIDTH 1 |
#define | ALT_SYSMGR_ECC_OCRAM_EN_SET_MSK 0x00000001 |
#define | ALT_SYSMGR_ECC_OCRAM_EN_CLR_MSK 0xfffffffe |
#define | ALT_SYSMGR_ECC_OCRAM_EN_RESET 0x0 |
#define | ALT_SYSMGR_ECC_OCRAM_EN_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_SYSMGR_ECC_OCRAM_EN_SET(value) (((value) << 0) & 0x00000001) |
Field : On-chip RAM ECC inject single, correctable Error - injs | |
Changing this bit from zero to one injects a single, correctable error into the On-chip RAM. This only injects one error into the On-chip RAM. Field Access Macros: | |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_LSB 1 |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_MSB 1 |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_WIDTH 1 |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_SET_MSK 0x00000002 |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_CLR_MSK 0xfffffffd |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_RESET 0x0 |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_SYSMGR_ECC_OCRAM_INJS_SET(value) (((value) << 1) & 0x00000002) |
Field : On-chip RAM ECC inject double bit, non-correctable error - injd | |
Changing this bit from zero to one injects a double, non-correctable error into the On-chip RAM. This only injects one double bit error into the On-chip RAM. Field Access Macros: | |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_LSB 2 |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_MSB 2 |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_WIDTH 1 |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_SET_MSK 0x00000004 |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_CLR_MSK 0xfffffffb |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_RESET 0x0 |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_SYSMGR_ECC_OCRAM_INJD_SET(value) (((value) << 2) & 0x00000004) |
Field : On-chip RAM ECC single, correctable error interrupt status - serr | |
This bit is an interrupt status bit for On-chip RAM ECC single, correctable error. It is set by hardware when single, correctable error occurs in On-chip RAM. Software needs to write 1 into this bit to clear the interrupt status. Field Access Macros: | |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_LSB 3 |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_MSB 3 |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_WIDTH 1 |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_SET_MSK 0x00000008 |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_CLR_MSK 0xfffffff7 |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_RESET 0x0 |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_SYSMGR_ECC_OCRAM_SERR_SET(value) (((value) << 3) & 0x00000008) |
Field : On-chip RAM ECC double bit, non-correctable error interrupt status - derr | |
This bit is an interrupt status bit for On-chip RAM ECC double bit, non- correctable error. It is set by hardware when double bit, non-correctable error occurs in On-chip RAM. Software needs to write 1 into this bit to clear the interrupt status. Field Access Macros: | |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_LSB 4 |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_MSB 4 |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_WIDTH 1 |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_SET_MSK 0x00000010 |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_CLR_MSK 0xffffffef |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_RESET 0x0 |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_SYSMGR_ECC_OCRAM_DERR_SET(value) (((value) << 4) & 0x00000010) |
Data Structures | |
struct | ALT_SYSMGR_ECC_OCRAM_s |
Macros | |
#define | ALT_SYSMGR_ECC_OCRAM_OFST 0x4 |
Typedefs | |
typedef struct ALT_SYSMGR_ECC_OCRAM_s | ALT_SYSMGR_ECC_OCRAM_t |
struct ALT_SYSMGR_ECC_OCRAM_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SYSMGR_ECC_OCRAM.
Data Fields | ||
---|---|---|
uint32_t | en: 1 | On-chip RAM ECC Enable |
uint32_t | injs: 1 | On-chip RAM ECC inject single, correctable Error |
uint32_t | injd: 1 | On-chip RAM ECC inject double bit, non-correctable error |
uint32_t | serr: 1 | On-chip RAM ECC single, correctable error interrupt status |
uint32_t | derr: 1 | On-chip RAM ECC double bit, non-correctable error interrupt status |
uint32_t | __pad0__: 27 | UNDEFINED |
#define ALT_SYSMGR_ECC_OCRAM_EN_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_OCRAM_EN register field.
#define ALT_SYSMGR_ECC_OCRAM_EN_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_OCRAM_EN register field.
#define ALT_SYSMGR_ECC_OCRAM_EN_WIDTH 1 |
The width in bits of the ALT_SYSMGR_ECC_OCRAM_EN register field.
#define ALT_SYSMGR_ECC_OCRAM_EN_SET_MSK 0x00000001 |
The mask used to set the ALT_SYSMGR_ECC_OCRAM_EN register field value.
#define ALT_SYSMGR_ECC_OCRAM_EN_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SYSMGR_ECC_OCRAM_EN register field value.
#define ALT_SYSMGR_ECC_OCRAM_EN_RESET 0x0 |
The reset value of the ALT_SYSMGR_ECC_OCRAM_EN register field.
#define ALT_SYSMGR_ECC_OCRAM_EN_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SYSMGR_ECC_OCRAM_EN field value from a register.
#define ALT_SYSMGR_ECC_OCRAM_EN_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SYSMGR_ECC_OCRAM_EN register field value suitable for setting the register.
#define ALT_SYSMGR_ECC_OCRAM_INJS_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_OCRAM_INJS register field.
#define ALT_SYSMGR_ECC_OCRAM_INJS_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_OCRAM_INJS register field.
#define ALT_SYSMGR_ECC_OCRAM_INJS_WIDTH 1 |
The width in bits of the ALT_SYSMGR_ECC_OCRAM_INJS register field.
#define ALT_SYSMGR_ECC_OCRAM_INJS_SET_MSK 0x00000002 |
The mask used to set the ALT_SYSMGR_ECC_OCRAM_INJS register field value.
#define ALT_SYSMGR_ECC_OCRAM_INJS_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_SYSMGR_ECC_OCRAM_INJS register field value.
#define ALT_SYSMGR_ECC_OCRAM_INJS_RESET 0x0 |
The reset value of the ALT_SYSMGR_ECC_OCRAM_INJS register field.
#define ALT_SYSMGR_ECC_OCRAM_INJS_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_SYSMGR_ECC_OCRAM_INJS field value from a register.
#define ALT_SYSMGR_ECC_OCRAM_INJS_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_SYSMGR_ECC_OCRAM_INJS register field value suitable for setting the register.
#define ALT_SYSMGR_ECC_OCRAM_INJD_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_OCRAM_INJD register field.
#define ALT_SYSMGR_ECC_OCRAM_INJD_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_OCRAM_INJD register field.
#define ALT_SYSMGR_ECC_OCRAM_INJD_WIDTH 1 |
The width in bits of the ALT_SYSMGR_ECC_OCRAM_INJD register field.
#define ALT_SYSMGR_ECC_OCRAM_INJD_SET_MSK 0x00000004 |
The mask used to set the ALT_SYSMGR_ECC_OCRAM_INJD register field value.
#define ALT_SYSMGR_ECC_OCRAM_INJD_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_SYSMGR_ECC_OCRAM_INJD register field value.
#define ALT_SYSMGR_ECC_OCRAM_INJD_RESET 0x0 |
The reset value of the ALT_SYSMGR_ECC_OCRAM_INJD register field.
#define ALT_SYSMGR_ECC_OCRAM_INJD_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_SYSMGR_ECC_OCRAM_INJD field value from a register.
#define ALT_SYSMGR_ECC_OCRAM_INJD_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_SYSMGR_ECC_OCRAM_INJD register field value suitable for setting the register.
#define ALT_SYSMGR_ECC_OCRAM_SERR_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_OCRAM_SERR register field.
#define ALT_SYSMGR_ECC_OCRAM_SERR_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_OCRAM_SERR register field.
#define ALT_SYSMGR_ECC_OCRAM_SERR_WIDTH 1 |
The width in bits of the ALT_SYSMGR_ECC_OCRAM_SERR register field.
#define ALT_SYSMGR_ECC_OCRAM_SERR_SET_MSK 0x00000008 |
The mask used to set the ALT_SYSMGR_ECC_OCRAM_SERR register field value.
#define ALT_SYSMGR_ECC_OCRAM_SERR_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_SYSMGR_ECC_OCRAM_SERR register field value.
#define ALT_SYSMGR_ECC_OCRAM_SERR_RESET 0x0 |
The reset value of the ALT_SYSMGR_ECC_OCRAM_SERR register field.
#define ALT_SYSMGR_ECC_OCRAM_SERR_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_SYSMGR_ECC_OCRAM_SERR field value from a register.
#define ALT_SYSMGR_ECC_OCRAM_SERR_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_SYSMGR_ECC_OCRAM_SERR register field value suitable for setting the register.
#define ALT_SYSMGR_ECC_OCRAM_DERR_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_ECC_OCRAM_DERR register field.
#define ALT_SYSMGR_ECC_OCRAM_DERR_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_ECC_OCRAM_DERR register field.
#define ALT_SYSMGR_ECC_OCRAM_DERR_WIDTH 1 |
The width in bits of the ALT_SYSMGR_ECC_OCRAM_DERR register field.
#define ALT_SYSMGR_ECC_OCRAM_DERR_SET_MSK 0x00000010 |
The mask used to set the ALT_SYSMGR_ECC_OCRAM_DERR register field value.
#define ALT_SYSMGR_ECC_OCRAM_DERR_CLR_MSK 0xffffffef |
The mask used to clear the ALT_SYSMGR_ECC_OCRAM_DERR register field value.
#define ALT_SYSMGR_ECC_OCRAM_DERR_RESET 0x0 |
The reset value of the ALT_SYSMGR_ECC_OCRAM_DERR register field.
#define ALT_SYSMGR_ECC_OCRAM_DERR_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_SYSMGR_ECC_OCRAM_DERR field value from a register.
#define ALT_SYSMGR_ECC_OCRAM_DERR_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_SYSMGR_ECC_OCRAM_DERR register field value suitable for setting the register.
#define ALT_SYSMGR_ECC_OCRAM_OFST 0x4 |
The byte offset of the ALT_SYSMGR_ECC_OCRAM register from the beginning of the component.
typedef struct ALT_SYSMGR_ECC_OCRAM_s ALT_SYSMGR_ECC_OCRAM_t |
The typedef declaration for register ALT_SYSMGR_ECC_OCRAM.