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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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When you read this register you read the active high pending interrupt status of corresponding bit.
This value is after the masking specified by intr_mask and after the polarity conversion as specified in intr_polarity
Register Layout
Field : f2s_crc_error | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_LSB 0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_MSB 0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_SET_MSK 0x00000001 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_CLR_MSK 0xfffffffe |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_SET(value) (((value) << 0) & 0x00000001) |
Field : f2s_early_usermode | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_LSB 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_MSB 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_SET_MSK 0x00000002 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_CLR_MSK 0xfffffffd |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_SET(value) (((value) << 1) & 0x00000002) |
Field : f2s_usermode | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_LSB 2 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_MSB 2 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_SET_MSK 0x00000004 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_CLR_MSK 0xfffffffb |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_SET(value) (((value) << 2) & 0x00000004) |
Field : f2s_initdone_oe | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_LSB 3 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_MSB 3 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_SET_MSK 0x00000008 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_CLR_MSK 0xfffffff7 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_SET(value) (((value) << 3) & 0x00000008) |
Field : f2s_nstatus_pin | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_LSB 4 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_MSB 4 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_SET_MSK 0x00000010 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_CLR_MSK 0xffffffef |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_SET(value) (((value) << 4) & 0x00000010) |
Field : f2s_nstatus_oe | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_LSB 5 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_MSB 5 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_SET_MSK 0x00000020 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_CLR_MSK 0xffffffdf |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_GET(value) (((value) & 0x00000020) >> 5) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_SET(value) (((value) << 5) & 0x00000020) |
Field : f2s_condone_pin | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_LSB 6 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_MSB 6 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_SET_MSK 0x00000040 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_CLR_MSK 0xffffffbf |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_GET(value) (((value) & 0x00000040) >> 6) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_SET(value) (((value) << 6) & 0x00000040) |
Field : f2s_condone_oe | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_LSB 7 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_MSB 7 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_SET_MSK 0x00000080 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_CLR_MSK 0xffffff7f |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_GET(value) (((value) & 0x00000080) >> 7) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_SET(value) (((value) << 7) & 0x00000080) |
Field : f2s_cvp_conf_done | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_LSB 8 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_MSB 8 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_SET_MSK 0x00000100 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_CLR_MSK 0xfffffeff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_SET(value) (((value) << 8) & 0x00000100) |
Field : f2s_pr_ready | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_LSB 9 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_MSB 9 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_SET_MSK 0x00000200 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_CLR_MSK 0xfffffdff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_GET(value) (((value) & 0x00000200) >> 9) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_SET(value) (((value) << 9) & 0x00000200) |
Field : f2s_pr_done | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_LSB 10 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_MSB 10 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_SET_MSK 0x00000400 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_CLR_MSK 0xfffffbff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_GET(value) (((value) & 0x00000400) >> 10) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_SET(value) (((value) << 10) & 0x00000400) |
Field : f2s_pr_error | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_LSB 11 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_MSB 11 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_SET_MSK 0x00000800 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_CLR_MSK 0xfffff7ff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_GET(value) (((value) & 0x00000800) >> 11) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_SET(value) (((value) << 11) & 0x00000800) |
Field : f2s_nconfig_pin | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_LSB 12 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_MSB 12 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_SET_MSK 0x00001000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_CLR_MSK 0xffffefff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_GET(value) (((value) & 0x00001000) >> 12) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_SET(value) (((value) << 12) & 0x00001000) |
Field : f2s_nceo_oe | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_LSB 13 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_MSB 13 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_SET_MSK 0x00002000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_CLR_MSK 0xffffdfff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_GET(value) (((value) & 0x00002000) >> 13) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_SET(value) (((value) << 13) & 0x00002000) |
Field : f2s_msel0 | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_LSB 16 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_MSB 16 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_SET_MSK 0x00010000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_CLR_MSK 0xfffeffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_GET(value) (((value) & 0x00010000) >> 16) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_SET(value) (((value) << 16) & 0x00010000) |
Field : f2s_msel1 | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_LSB 17 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_MSB 17 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_SET_MSK 0x00020000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_CLR_MSK 0xfffdffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_GET(value) (((value) & 0x00020000) >> 17) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_SET(value) (((value) << 17) & 0x00020000) |
Field : f2s_msel2 | |
Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_LSB 18 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_MSB 18 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_SET_MSK 0x00040000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_CLR_MSK 0xfffbffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_GET(value) (((value) & 0x00040000) >> 18) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_SET(value) (((value) << 18) & 0x00040000) |
Field : imgcfg_FifoEmpty | |
FIfoEmpty Status of FPGA image configuration FIFO Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_LSB 24 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_MSB 24 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_SET_MSK 0x01000000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_CLR_MSK 0xfeffffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_GET(value) (((value) & 0x01000000) >> 24) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_SET(value) (((value) << 24) & 0x01000000) |
Field : imgcfg_FifoFull | |
FIfoFull Status of FPGA image configuration FIFO Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_LSB 25 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_MSB 25 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_SET_MSK 0x02000000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_CLR_MSK 0xfdffffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_GET(value) (((value) & 0x02000000) >> 25) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_SET(value) (((value) << 25) & 0x02000000) |
Field : jtagm | |
JTAG Master Session Status Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_LSB 28 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_MSB 28 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_SET_MSK 0x10000000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_CLR_MSK 0xefffffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_GET(value) (((value) & 0x10000000) >> 28) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_SET(value) (((value) << 28) & 0x10000000) |
Field : emr | |
EMR valid bit Field Access Macros: | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_LSB 29 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_MSB 29 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_WIDTH 1 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_SET_MSK 0x20000000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_CLR_MSK 0xdfffffff |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_RESET 0x0 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_GET(value) (((value) & 0x20000000) >> 29) |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_EMR_SET(value) (((value) << 29) & 0x20000000) |
Data Structures | |
struct | ALT_FPGAMGR_INTR_MSKED_STAT_s |
Macros | |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_RESET 0x00000000 |
#define | ALT_FPGAMGR_INTR_MSKED_STAT_OFST 0x84 |
Typedefs | |
typedef struct ALT_FPGAMGR_INTR_MSKED_STAT_s | ALT_FPGAMGR_INTR_MSKED_STAT_t |
struct ALT_FPGAMGR_INTR_MSKED_STAT_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_FPGAMGR_INTR_MSKED_STAT.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_SET_MSK 0x00000001 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CRC_ERROR register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_SET_MSK 0x00000002 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_EARLY_USERMOD register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_SET_MSK 0x00000004 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_USERMOD register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_SET_MSK 0x00000008 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_INITDONE_OE register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_SET_MSK 0x00000010 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_CLR_MSK 0xffffffef |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_PIN register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_SET_MSK 0x00000020 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NSTAT_OE register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_SET_MSK 0x00000040 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_PIN register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_SET_MSK 0x00000080 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CONDONE_OE register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_SET_MSK 0x00000100 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_CVP_CONF_DONE register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_SET_MSK 0x00000200 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_RDY register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_SET_MSK 0x00000400 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_DONE register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_SET_MSK 0x00000800 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_PR_ERROR register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_LSB 12 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_MSB 12 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_SET_MSK 0x00001000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_CLR_MSK 0xffffefff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_GET | ( | value | ) | (((value) & 0x00001000) >> 12) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN_SET | ( | value | ) | (((value) << 12) & 0x00001000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCFG_PIN register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_LSB 13 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_MSB 13 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_SET_MSK 0x00002000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_CLR_MSK 0xffffdfff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_GET | ( | value | ) | (((value) & 0x00002000) >> 13) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE_SET | ( | value | ) | (((value) << 13) & 0x00002000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_NCEO_OE register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_SET_MSK 0x00010000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL0 register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_LSB 17 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_SET_MSK 0x00020000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_CLR_MSK 0xfffdffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_GET | ( | value | ) | (((value) & 0x00020000) >> 17) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1_SET | ( | value | ) | (((value) << 17) & 0x00020000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL1 register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_LSB 18 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_MSB 18 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_SET_MSK 0x00040000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_CLR_MSK 0xfffbffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_GET | ( | value | ) | (((value) & 0x00040000) >> 18) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2_SET | ( | value | ) | (((value) << 18) & 0x00040000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_F2S_MSEL2 register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_MSB 24 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_SET_MSK 0x01000000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_CLR_MSK 0xfeffffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_GET | ( | value | ) | (((value) & 0x01000000) >> 24) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY_SET | ( | value | ) | (((value) << 24) & 0x01000000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOEMPTY register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_LSB 25 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_MSB 25 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_SET_MSK 0x02000000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_CLR_MSK 0xfdffffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_GET | ( | value | ) | (((value) & 0x02000000) >> 25) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL_SET | ( | value | ) | (((value) << 25) & 0x02000000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_IMGCFG_FIFOFULL register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_LSB 28 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_MSB 28 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_SET_MSK 0x10000000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_CLR_MSK 0xefffffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_GET | ( | value | ) | (((value) & 0x10000000) >> 28) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM_SET | ( | value | ) | (((value) << 28) & 0x10000000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_JTAGM register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_LSB 29 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_MSB 29 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_SET_MSK 0x20000000 |
The mask used to set the ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_CLR_MSK 0xdfffffff |
The mask used to clear the ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field value.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_RESET 0x0 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_GET | ( | value | ) | (((value) & 0x20000000) >> 29) |
Extracts the ALT_FPGAMGR_INTR_MSKED_STAT_EMR field value from a register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_EMR_SET | ( | value | ) | (((value) << 29) & 0x20000000) |
Produces a ALT_FPGAMGR_INTR_MSKED_STAT_EMR register field value suitable for setting the register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_RESET 0x00000000 |
The reset value of the ALT_FPGAMGR_INTR_MSKED_STAT register.
#define ALT_FPGAMGR_INTR_MSKED_STAT_OFST 0x84 |
The byte offset of the ALT_FPGAMGR_INTR_MSKED_STAT register from the beginning of the component.
typedef struct ALT_FPGAMGR_INTR_MSKED_STAT_s ALT_FPGAMGR_INTR_MSKED_STAT_t |
The typedef declaration for register ALT_FPGAMGR_INTR_MSKED_STAT.