![]() |
Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
|
Error Interrupt set
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS |
[1] | RW | 0x0 | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS |
[2] | RW | 0x0 | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS |
[31:3] | ??? | 0x0 | UNDEFINED |
Field : SERRINTS | |
This bit is used to set the single-bit error interrupt bit. Reads reflect SERRINTEN. 1'b0: writing of zero has no effect 1'b1: writing one, this bit will set SERRINTEN bit to 1. This is performing a bitwise writing, not implemented as a FF. Field Access Macros: | |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_LSB 0 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_MSB 0 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_WIDTH 1 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_SET_MSK 0x00000001 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_CLR_MSK 0xfffffffe |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_RESET 0x0 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_SET(value) (((value) << 0) & 0x00000001) |
Field : DERRINTS | |
This bit is used to set the double-bit error interrupt bit. Reads reflect DERRINTEN. 1'b0: writing of zero has no effect 1'b1: writing one, DERRINTEN bit to 1. This is performing a bitwise writing, not implemented as a FF. Field Access Macros: | |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_LSB 1 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_MSB 1 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_WIDTH 1 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_SET_MSK 0x00000002 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_CLR_MSK 0xfffffffd |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_RESET 0x0 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_SET(value) (((value) << 1) & 0x00000002) |
Field : HMI_INTRS | |
This bit is used to set the general purposes HMI interrupt error. 1'b0: writing of zero has no effect 1'b1: writing one, HMI_INTREN bit to 1. This is performing a bitwise writing, not implemented as a FF. Field Access Macros: | |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_LSB 2 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_MSB 2 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_WIDTH 1 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_SET_MSK 0x00000004 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_CLR_MSK 0xfffffffb |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_RESET 0x0 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_SET(value) (((value) << 2) & 0x00000004) |
Data Structures | |
struct | ALT_ECC_HMC_OCP_ERRINTENS_s |
Macros | |
#define | ALT_ECC_HMC_OCP_ERRINTENS_RESET 0x00000000 |
#define | ALT_ECC_HMC_OCP_ERRINTENS_OFST 0x114 |
Typedefs | |
typedef struct ALT_ECC_HMC_OCP_ERRINTENS_s | ALT_ECC_HMC_OCP_ERRINTENS_t |
struct ALT_ECC_HMC_OCP_ERRINTENS_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_ECC_HMC_OCP_ERRINTENS.
Data Fields | ||
---|---|---|
uint32_t | SERRINTS: 1 | ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS |
uint32_t | DERRINTS: 1 | ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS |
uint32_t | HMI_INTRS: 1 | ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS |
uint32_t | __pad0__: 29 | UNDEFINED |
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_WIDTH 1 |
The width in bits of the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_SET_MSK 0x00000001 |
The mask used to set the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field value.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field value.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_RESET 0x0 |
The reset value of the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS field value from a register.
#define ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_ECC_HMC_OCP_ERRINTENS_SERRINTS register field value suitable for setting the register.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_WIDTH 1 |
The width in bits of the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_SET_MSK 0x00000002 |
The mask used to set the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field value.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field value.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_RESET 0x0 |
The reset value of the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS field value from a register.
#define ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_ECC_HMC_OCP_ERRINTENS_DERRINTS register field value suitable for setting the register.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_WIDTH 1 |
The width in bits of the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_SET_MSK 0x00000004 |
The mask used to set the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field value.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field value.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_RESET 0x0 |
The reset value of the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS field value from a register.
#define ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_ECC_HMC_OCP_ERRINTENS_HMI_INTRS register field value suitable for setting the register.
#define ALT_ECC_HMC_OCP_ERRINTENS_RESET 0x00000000 |
The reset value of the ALT_ECC_HMC_OCP_ERRINTENS register.
#define ALT_ECC_HMC_OCP_ERRINTENS_OFST 0x114 |
The byte offset of the ALT_ECC_HMC_OCP_ERRINTENS register from the beginning of the component.
typedef struct ALT_ECC_HMC_OCP_ERRINTENS_s ALT_ECC_HMC_OCP_ERRINTENS_t |
The typedef declaration for register ALT_ECC_HMC_OCP_ERRINTENS.