Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Probe_MPU_main_Probe_MainCtl

Description

Register MainCtl contains probe global control bits. The register has seven bit fields:

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN
[1] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN
[2] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN
[3] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN
[4] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN
[5] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP
[6] R 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD
[7] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN
[31:8] ??? Unknown UNDEFINED

Field : ERREN

Register field ErrEn enables the probe to send on the ObsTx output any packet with Error status, independently of filtering mechanisms, thus constituting a simple supplementary global filter.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_LSB   0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_MSB   0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_SET_MSK   0x00000001
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_CLR_MSK   0xfffffffe
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : TRACEEN

Register field TraceEn enables the probe to send filtered packets (Trace) on the ObsTx observation output.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_LSB   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_MSB   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_SET_MSK   0x00000002
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_CLR_MSK   0xfffffffd
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_SET(value)   (((value) << 1) & 0x00000002)
 

Field : PAYLOADEN

Register field PayloadEn, when set to 1, enables traces to contain headers and payload. When set ot 0, only headers are reported.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_LSB   2
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_MSB   2
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_SET_MSK   0x00000004
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_CLR_MSK   0xfffffffb
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_SET(value)   (((value) << 2) & 0x00000004)
 

Field : STATEN

When set to 1, register field StatEn enables statistics profiling. The probe sendS statistics results to the output for signal ObsTx. All statistics counters are cleared when the StatEn bit goes from 0 to 1. When set to 0, counters are disabled.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_LSB   3
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_MSB   3
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_SET_MSK   0x00000008
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_CLR_MSK   0xfffffff7
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_SET(value)   (((value) << 3) & 0x00000008)
 

Field : ALARMEN

When set, register field AlarmEn enables the probe to collect alarm-related information. When the register field bit is null, both TraceAlarm and StatAlarm outputs are driven to 0.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_LSB   4
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_MSB   4
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_SET_MSK   0x00000010
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_CLR_MSK   0xffffffef
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_SET(value)   (((value) << 4) & 0x00000010)
 

Field : STATCONDDUMP

When set, register field StatCondDump enables the dump of a statistics frame to the range of counter values set for registers StatAlarmMin, StatAlarmMax, and AlarmMode. This field also renders register StatAlarmStatus inoperative. When parameter statisticsCounterAlarm is set to False, the StatCondDump register bit is reserved.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_LSB   5
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_MSB   5
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_SET_MSK   0x00000020
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_CLR_MSK   0xffffffdf
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_SET(value)   (((value) << 5) & 0x00000020)
 

Field : INTRUSIVEMODE

When set to 1, register field IntrusiveMode enables trace operation in Intrusive flow-control mode. When set to 0, the register enables trace operation in Overflow flow-control mode

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_LSB   6
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_MSB   6
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_SET_MSK   0x00000040
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_CLR_MSK   0xffffffbf
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_SET(value)   (((value) << 6) & 0x00000040)
 

Field : FILTBYTEALWAYSCHAINABLEEN

When set to 0, filters are mapped to all statistic counters when counting bytes or enabled bytes. Therefore, only filter events mapped to even counters can be counted using a pair of chained counters.When set to 1, filters are mapped only to even statistic counters when counting bytes or enabled bytes. Thus events from any filter can be counted using a pair of chained counters.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_LSB   7
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_MSB   7
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_WIDTH   1
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET_MSK   0x00000080
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_CLR_MSK   0xffffff7f
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET(value)   (((value) << 7) & 0x00000080)
 

Data Structures

struct  ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_s
 

Macros

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_RESET   0x00000000
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_OFST   0x8
 

Typedefs

typedef struct
ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_s 
ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_t
 

Data Structure Documentation

struct ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL.

Data Fields
uint32_t ERREN: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN
uint32_t TRACEEN: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN
uint32_t PAYLOADEN: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN
uint32_t STATEN: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN
uint32_t ALARMEN: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN
uint32_t STATCONDDUMP: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP
const uint32_t INTRUSIVEMODE: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD
uint32_t FILTBYTEALWAYSCHAINABLEEN: 1 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN
uint32_t __pad0__: 24 UNDEFINED

Macro Definitions

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_MSB   0

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_SET_MSK   0x00000001

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_LSB   1

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_MSB   1

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_SET_MSK   0x00000002

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_CLR_MSK   0xfffffffd

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_LSB   2

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_MSB   2

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_SET_MSK   0x00000004

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_CLR_MSK   0xfffffffb

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_LSB   3

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_MSB   3

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_SET_MSK   0x00000008

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_CLR_MSK   0xfffffff7

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_LSB   4

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_MSB   4

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_SET_MSK   0x00000010

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_CLR_MSK   0xffffffef

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_LSB   5

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_MSB   5

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_SET_MSK   0x00000020

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_CLR_MSK   0xffffffdf

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_LSB   6

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_MSB   6

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_SET_MSK   0x00000040

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_CLR_MSK   0xffffffbf

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_LSB   7

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_MSB   7

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_WIDTH   1

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET_MSK   0x00000080

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_CLR_MSK   0xffffff7f

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_RESET   0x0

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_RESET   0x00000000

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_OFST   0x8

The byte offset of the ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL register from the beginning of the component.

Typedef Documentation