Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Enable Register - ic_enable

Description

Enable and disable i2c operation

Register Layout

Bits Access Reset Description
[0] RW 0x0 Enable Bit
[1] RW 0x0 TX abort Bit
[31:2] ??? 0x0 UNDEFINED

Field : Enable Bit - enable

Controls whether the I2C is enabled. Software can disable I2C while it is active. However, it is important that care be taken to ensure that I2C is disabled properly. When the I2C is disabled, the following occurs:

The TX FIFO and RX FIFO get flushed. Status bits in the IC_INTR_STAT register are still active until I2C goes into IDLE state. If the module is transmitting, it stops as well as deletes the contents of the transmit buffer after the current transfer is complete. If the module is receiving, the I2C stops the current transfer at the end of the current byte and does not acknowledge the transfer. The l4_sp_clk synchronizes pclk and ic_clk. The register ic_enable_status is added to allow software to determine when the hardware has completely shutdown in response to the IC_ENABLE register being set from 1 to 0. Only one register is required to be monitored. Procedure for Disabling I2C

  1. Define a timer interval (ti2c_poll) equal to the 10 times the signaling period for the highest I2C transfer speed used in the system and supported by I2C. For example, if the highest I2C transfer mode is 400 kb/s, then this ti2c_poll is 25us.
  1. Define a maximum time-out parameter, MAX_T_POLL_COUNT, such that if any repeated polling operation exceeds this maximum value, an error is reported. 3. Execute a blocking thread/process/function that prevents any further I2C master transactions to be started by software, but allows any pending transfers to be completed.
  1. The variable POLL_COUNT is initialized to zero. 5. Set IC_ENABLE to 0.
  1. Read the IC_ENABLE_STATUS register and test the IC_EN bit (bit 0). Increment POLL_COUNT by one. If POLL_COUNT >= MAX_T_POLL_COUNT, exit with the relevant error code.
  1. If IC_ENABLE_STATUS[0] is 1, then sleep for ti2c_poll and proceed to the previous step. Otherwise, exit with a relevant success code.

Field Enumeration Values:

Enum Value Description
ALT_I2C_EN_EN_E_DIS 0x0 Disables i2c. TX and RX FIFOs are held in an
: erased state
ALT_I2C_EN_EN_E_EN 0x1 Enables i2c. Software can disable i2c while it
: is active

Field Access Macros:

#define ALT_I2C_EN_EN_E_DIS   0x0
 
#define ALT_I2C_EN_EN_E_EN   0x1
 
#define ALT_I2C_EN_EN_LSB   0
 
#define ALT_I2C_EN_EN_MSB   0
 
#define ALT_I2C_EN_EN_WIDTH   1
 
#define ALT_I2C_EN_EN_SET_MSK   0x00000001
 
#define ALT_I2C_EN_EN_CLR_MSK   0xfffffffe
 
#define ALT_I2C_EN_EN_RESET   0x0
 
#define ALT_I2C_EN_EN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_I2C_EN_EN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : TX abort Bit - txabort

Write 1 does a TX abort. Self cleared on abort completion

Field Access Macros:

#define ALT_I2C_EN_TXABT_LSB   1
 
#define ALT_I2C_EN_TXABT_MSB   1
 
#define ALT_I2C_EN_TXABT_WIDTH   1
 
#define ALT_I2C_EN_TXABT_SET_MSK   0x00000002
 
#define ALT_I2C_EN_TXABT_CLR_MSK   0xfffffffd
 
#define ALT_I2C_EN_TXABT_RESET   0x0
 
#define ALT_I2C_EN_TXABT_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_I2C_EN_TXABT_SET(value)   (((value) << 1) & 0x00000002)
 

Data Structures

struct  ALT_I2C_EN_s
 

Macros

#define ALT_I2C_EN_OFST   0x6c
 
#define ALT_I2C_EN_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_OFST))
 

Typedefs

typedef struct ALT_I2C_EN_s ALT_I2C_EN_t
 

Data Structure Documentation

struct ALT_I2C_EN_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_I2C_EN.

Data Fields
uint32_t enable: 1 Enable Bit
uint32_t txabort: 1 TX abort Bit
uint32_t __pad0__: 30 UNDEFINED

Macro Definitions

#define ALT_I2C_EN_EN_E_DIS   0x0

Enumerated value for register field ALT_I2C_EN_EN

Disables i2c. TX and RX FIFOs are held in an erased state

#define ALT_I2C_EN_EN_E_EN   0x1

Enumerated value for register field ALT_I2C_EN_EN

Enables i2c. Software can disable i2c while it is active

#define ALT_I2C_EN_EN_LSB   0

The Least Significant Bit (LSB) position of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_MSB   0

The Most Significant Bit (MSB) position of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_WIDTH   1

The width in bits of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_SET_MSK   0x00000001

The mask used to set the ALT_I2C_EN_EN register field value.

#define ALT_I2C_EN_EN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_I2C_EN_EN register field value.

#define ALT_I2C_EN_EN_RESET   0x0

The reset value of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_I2C_EN_EN field value from a register.

#define ALT_I2C_EN_EN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_I2C_EN_EN register field value suitable for setting the register.

#define ALT_I2C_EN_TXABT_LSB   1

The Least Significant Bit (LSB) position of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_MSB   1

The Most Significant Bit (MSB) position of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_WIDTH   1

The width in bits of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_SET_MSK   0x00000002

The mask used to set the ALT_I2C_EN_TXABT register field value.

#define ALT_I2C_EN_TXABT_CLR_MSK   0xfffffffd

The mask used to clear the ALT_I2C_EN_TXABT register field value.

#define ALT_I2C_EN_TXABT_RESET   0x0

The reset value of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_I2C_EN_TXABT field value from a register.

#define ALT_I2C_EN_TXABT_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_I2C_EN_TXABT register field value suitable for setting the register.

#define ALT_I2C_EN_OFST   0x6c

The byte offset of the ALT_I2C_EN register from the beginning of the component.

#define ALT_I2C_EN_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_OFST))

The address of the ALT_I2C_EN register.

Typedef Documentation

typedef struct ALT_I2C_EN_s ALT_I2C_EN_t

The typedef declaration for register ALT_I2C_EN.