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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Line Control Register
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[1:0] | RW | 0x0 | ALT_UART_LCR_DLS |
[2] | RW | 0x0 | ALT_UART_LCR_STOP |
[3] | RW | 0x0 | ALT_UART_LCR_PEN |
[4] | RW | 0x0 | ALT_UART_LCR_EPS |
[5] | RW | 0x0 | ALT_UART_LCR_SP |
[6] | RW | 0x0 | ALT_UART_LCR_BREAK |
[7] | RW | 0x0 | ALT_UART_LCR_DLAB |
[31:8] | R | 0x0 | ALT_UART_LCR_RSVD_LCR_31TO8 |
Field : dls | ||||||||||||||||
Data Length Select. If UART_16550_COMPATIBLE == NO then, writeable only when UART is not busy (USR[0] is zero), otherwise always writable, always readable. This is used to select the number of data bits per character that the peripheral will transmit and receive. The number of bit that may be selected areas follows: 00 = 5 bits 01 = 6 bits 10 = 7 bits 11 = 8 bits Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_UART_LCR_DLS_E_LEN5 0x0 | |||||||||||||||
#define | ALT_UART_LCR_DLS_E_LEN6 0x1 | |||||||||||||||
#define | ALT_UART_LCR_DLS_E_LEN7 0x2 | |||||||||||||||
#define | ALT_UART_LCR_DLS_E_LEN8 0x3 | |||||||||||||||
#define | ALT_UART_LCR_DLS_LSB 0 | |||||||||||||||
#define | ALT_UART_LCR_DLS_MSB 1 | |||||||||||||||
#define | ALT_UART_LCR_DLS_WIDTH 2 | |||||||||||||||
#define | ALT_UART_LCR_DLS_SET_MSK 0x00000003 | |||||||||||||||
#define | ALT_UART_LCR_DLS_CLR_MSK 0xfffffffc | |||||||||||||||
#define | ALT_UART_LCR_DLS_RESET 0x0 | |||||||||||||||
#define | ALT_UART_LCR_DLS_GET(value) (((value) & 0x00000003) >> 0) | |||||||||||||||
#define | ALT_UART_LCR_DLS_SET(value) (((value) << 0) & 0x00000003) | |||||||||||||||
Field : stop | ||||||||||
Number of stop bits. If UART_16550_COMPATIBLE == NO then, writeable only when UART is not busy (USR[0] is zero), otherwise always writable, always readable. This is used to select the number of stop bits per character that the peripheral will transmit and receive. If set to zero, one stop bit is transmitted in the serial data. If set to one and the data bits are set to 5 (LCR[1:0] set to zero) one and a half stop bits is transmitted. Otherwise, two stop bits are transmitted. Note that regardless of the number of stop bits selected the receiver will only check the first stop bit. 0 = 1 stop bit 1 = 1.5 stop bits when DLS (LCR[1:0]) is zero, else 2 stop bit Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LCR_STOP_E_ONESTOP 0x0 | |||||||||
#define | ALT_UART_LCR_STOP_E_ONEPOINT5STOP 0x1 | |||||||||
#define | ALT_UART_LCR_STOP_LSB 2 | |||||||||
#define | ALT_UART_LCR_STOP_MSB 2 | |||||||||
#define | ALT_UART_LCR_STOP_WIDTH 1 | |||||||||
#define | ALT_UART_LCR_STOP_SET_MSK 0x00000004 | |||||||||
#define | ALT_UART_LCR_STOP_CLR_MSK 0xfffffffb | |||||||||
#define | ALT_UART_LCR_STOP_RESET 0x0 | |||||||||
#define | ALT_UART_LCR_STOP_GET(value) (((value) & 0x00000004) >> 2) | |||||||||
#define | ALT_UART_LCR_STOP_SET(value) (((value) << 2) & 0x00000004) | |||||||||
Field : pen | ||||||||||
Parity Enable. If UART_16550_COMPATIBLE == NO then, writeable only when UART is not busy (USR[0] is zero), otherwise always writable, always readable. This bit is used to enable and disable parity generation and detection in transmitted and received serial character respectively. 0 = parity disabled 1 = parity enabled Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LCR_PEN_E_DISD 0x0 | |||||||||
#define | ALT_UART_LCR_PEN_E_END 0x1 | |||||||||
#define | ALT_UART_LCR_PEN_LSB 3 | |||||||||
#define | ALT_UART_LCR_PEN_MSB 3 | |||||||||
#define | ALT_UART_LCR_PEN_WIDTH 1 | |||||||||
#define | ALT_UART_LCR_PEN_SET_MSK 0x00000008 | |||||||||
#define | ALT_UART_LCR_PEN_CLR_MSK 0xfffffff7 | |||||||||
#define | ALT_UART_LCR_PEN_RESET 0x0 | |||||||||
#define | ALT_UART_LCR_PEN_GET(value) (((value) & 0x00000008) >> 3) | |||||||||
#define | ALT_UART_LCR_PEN_SET(value) (((value) << 3) & 0x00000008) | |||||||||
Field : eps | ||||||||||
Even Parity Select. If UART_16550_COMPATIBLE == NO then, writeable only when UART is not busy (USR[0] is zero), otherwise always writable, always readable. This is used to select between even and odd parity, when parity is enabled (PEN set to one). If set to one, an even number of logic '1's is transmitted or checked. If set to zero, an odd number of logic '1's is transmitted or checked. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LCR_EPS_E_ODDPAR 0x0 | |||||||||
#define | ALT_UART_LCR_EPS_E_EVENPAR 0x1 | |||||||||
#define | ALT_UART_LCR_EPS_LSB 4 | |||||||||
#define | ALT_UART_LCR_EPS_MSB 4 | |||||||||
#define | ALT_UART_LCR_EPS_WIDTH 1 | |||||||||
#define | ALT_UART_LCR_EPS_SET_MSK 0x00000010 | |||||||||
#define | ALT_UART_LCR_EPS_CLR_MSK 0xffffffef | |||||||||
#define | ALT_UART_LCR_EPS_RESET 0x0 | |||||||||
#define | ALT_UART_LCR_EPS_GET(value) (((value) & 0x00000010) >> 4) | |||||||||
#define | ALT_UART_LCR_EPS_SET(value) (((value) << 4) & 0x00000010) | |||||||||
Field : sp | ||||||||||
From DW_apb_uart_regfile.sv: // aaraujo @ 17/05/2011 : CRM_9000431453 // Stick parity lcr_ir[5] is now programmable lcr_ir[5:0] <= ipwdata[5:0]; Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_LCR_SP_E_DISD 0x0 | |||||||||
#define | ALT_UART_LCR_SP_E_END 0x1 | |||||||||
#define | ALT_UART_LCR_SP_LSB 5 | |||||||||
#define | ALT_UART_LCR_SP_MSB 5 | |||||||||
#define | ALT_UART_LCR_SP_WIDTH 1 | |||||||||
#define | ALT_UART_LCR_SP_SET_MSK 0x00000020 | |||||||||
#define | ALT_UART_LCR_SP_CLR_MSK 0xffffffdf | |||||||||
#define | ALT_UART_LCR_SP_RESET 0x0 | |||||||||
#define | ALT_UART_LCR_SP_GET(value) (((value) & 0x00000020) >> 5) | |||||||||
#define | ALT_UART_LCR_SP_SET(value) (((value) << 5) & 0x00000020) | |||||||||
Field : break | |
Break Control Bit. This is used to cause a break condition to be transmitted to the receiving device. If set to one the serial output is forced to the spacing (logic 0) state. When not in Loopback Mode, as determined by MCR[4], the sout line is forced low until the Break bit is cleared. If SIR_MODE == Enabled and active (MCR[6] set to one) the sir_out_n line is continuously pulsed. When in Loopback Mode, the break condition is internally looped back to the receiver and the sir_out_n line is forced low. Field Access Macros: | |
#define | ALT_UART_LCR_BREAK_LSB 6 |
#define | ALT_UART_LCR_BREAK_MSB 6 |
#define | ALT_UART_LCR_BREAK_WIDTH 1 |
#define | ALT_UART_LCR_BREAK_SET_MSK 0x00000040 |
#define | ALT_UART_LCR_BREAK_CLR_MSK 0xffffffbf |
#define | ALT_UART_LCR_BREAK_RESET 0x0 |
#define | ALT_UART_LCR_BREAK_GET(value) (((value) & 0x00000040) >> 6) |
#define | ALT_UART_LCR_BREAK_SET(value) (((value) << 6) & 0x00000040) |
Field : dlab | |
Divisor Latch Access Bit. If UART_16550_COMPATIBLE == NO then, writeable only when UART is not busy (USR[0] is zero), otherwise always writable, always readable. This bit is used to enable reading and writing of the Divisor Latch register (DLL and DLH) to set the baud rate of the UART. This bit must be cleared after initial baud rate setup in order to access other registers. Field Access Macros: | |
#define | ALT_UART_LCR_DLAB_LSB 7 |
#define | ALT_UART_LCR_DLAB_MSB 7 |
#define | ALT_UART_LCR_DLAB_WIDTH 1 |
#define | ALT_UART_LCR_DLAB_SET_MSK 0x00000080 |
#define | ALT_UART_LCR_DLAB_CLR_MSK 0xffffff7f |
#define | ALT_UART_LCR_DLAB_RESET 0x0 |
#define | ALT_UART_LCR_DLAB_GET(value) (((value) & 0x00000080) >> 7) |
#define | ALT_UART_LCR_DLAB_SET(value) (((value) << 7) & 0x00000080) |
Field : rsvd_lcr_31to8 | |
Reserved bits [31:8] - Read Only Field Access Macros: | |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_LSB 8 |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_MSB 31 |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_WIDTH 24 |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_SET_MSK 0xffffff00 |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_CLR_MSK 0x000000ff |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_RESET 0x0 |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_GET(value) (((value) & 0xffffff00) >> 8) |
#define | ALT_UART_LCR_RSVD_LCR_31TO8_SET(value) (((value) << 8) & 0xffffff00) |
Data Structures | |
struct | ALT_UART_LCR_s |
Macros | |
#define | ALT_UART_LCR_RESET 0x00000000 |
#define | ALT_UART_LCR_OFST 0xc |
#define | ALT_UART_LCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LCR_OFST)) |
Typedefs | |
typedef struct ALT_UART_LCR_s | ALT_UART_LCR_t |
struct ALT_UART_LCR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_UART_LCR.
Data Fields | ||
---|---|---|
uint32_t | dls: 2 | ALT_UART_LCR_DLS |
uint32_t | stop: 1 | ALT_UART_LCR_STOP |
uint32_t | pen: 1 | ALT_UART_LCR_PEN |
uint32_t | eps: 1 | ALT_UART_LCR_EPS |
uint32_t | sp: 1 | ALT_UART_LCR_SP |
uint32_t | break_: 1 | ALT_UART_LCR_BREAK |
uint32_t | dlab: 1 | ALT_UART_LCR_DLAB |
const uint32_t | rsvd_lcr_31to8: 24 | ALT_UART_LCR_RSVD_LCR_31TO8 |
#define ALT_UART_LCR_DLS_E_LEN5 0x0 |
Enumerated value for register field ALT_UART_LCR_DLS
5 bits
#define ALT_UART_LCR_DLS_E_LEN6 0x1 |
Enumerated value for register field ALT_UART_LCR_DLS
6 bits
#define ALT_UART_LCR_DLS_E_LEN7 0x2 |
Enumerated value for register field ALT_UART_LCR_DLS
7 bits
#define ALT_UART_LCR_DLS_E_LEN8 0x3 |
Enumerated value for register field ALT_UART_LCR_DLS
8 bits
#define ALT_UART_LCR_DLS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_DLS register field.
#define ALT_UART_LCR_DLS_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_DLS register field.
#define ALT_UART_LCR_DLS_WIDTH 2 |
The width in bits of the ALT_UART_LCR_DLS register field.
#define ALT_UART_LCR_DLS_SET_MSK 0x00000003 |
The mask used to set the ALT_UART_LCR_DLS register field value.
#define ALT_UART_LCR_DLS_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_UART_LCR_DLS register field value.
#define ALT_UART_LCR_DLS_RESET 0x0 |
The reset value of the ALT_UART_LCR_DLS register field.
#define ALT_UART_LCR_DLS_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_UART_LCR_DLS field value from a register.
#define ALT_UART_LCR_DLS_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_UART_LCR_DLS register field value suitable for setting the register.
#define ALT_UART_LCR_STOP_E_ONESTOP 0x0 |
Enumerated value for register field ALT_UART_LCR_STOP
one stop bit
#define ALT_UART_LCR_STOP_E_ONEPOINT5STOP 0x1 |
Enumerated value for register field ALT_UART_LCR_STOP
1.5 stop bits when DLS (LCR[1:0]) is zero
#define ALT_UART_LCR_STOP_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_STOP register field.
#define ALT_UART_LCR_STOP_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_STOP register field.
#define ALT_UART_LCR_STOP_WIDTH 1 |
The width in bits of the ALT_UART_LCR_STOP register field.
#define ALT_UART_LCR_STOP_SET_MSK 0x00000004 |
The mask used to set the ALT_UART_LCR_STOP register field value.
#define ALT_UART_LCR_STOP_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_UART_LCR_STOP register field value.
#define ALT_UART_LCR_STOP_RESET 0x0 |
The reset value of the ALT_UART_LCR_STOP register field.
#define ALT_UART_LCR_STOP_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_UART_LCR_STOP field value from a register.
#define ALT_UART_LCR_STOP_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_UART_LCR_STOP register field value suitable for setting the register.
#define ALT_UART_LCR_PEN_E_DISD 0x0 |
Enumerated value for register field ALT_UART_LCR_PEN
parity disabled
#define ALT_UART_LCR_PEN_E_END 0x1 |
Enumerated value for register field ALT_UART_LCR_PEN
parity enabled
#define ALT_UART_LCR_PEN_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_PEN register field.
#define ALT_UART_LCR_PEN_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_PEN register field.
#define ALT_UART_LCR_PEN_WIDTH 1 |
The width in bits of the ALT_UART_LCR_PEN register field.
#define ALT_UART_LCR_PEN_SET_MSK 0x00000008 |
The mask used to set the ALT_UART_LCR_PEN register field value.
#define ALT_UART_LCR_PEN_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_UART_LCR_PEN register field value.
#define ALT_UART_LCR_PEN_RESET 0x0 |
The reset value of the ALT_UART_LCR_PEN register field.
#define ALT_UART_LCR_PEN_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_UART_LCR_PEN field value from a register.
#define ALT_UART_LCR_PEN_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_UART_LCR_PEN register field value suitable for setting the register.
#define ALT_UART_LCR_EPS_E_ODDPAR 0x0 |
Enumerated value for register field ALT_UART_LCR_EPS
odd parity
#define ALT_UART_LCR_EPS_E_EVENPAR 0x1 |
Enumerated value for register field ALT_UART_LCR_EPS
even parity
#define ALT_UART_LCR_EPS_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_EPS register field.
#define ALT_UART_LCR_EPS_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_EPS register field.
#define ALT_UART_LCR_EPS_WIDTH 1 |
The width in bits of the ALT_UART_LCR_EPS register field.
#define ALT_UART_LCR_EPS_SET_MSK 0x00000010 |
The mask used to set the ALT_UART_LCR_EPS register field value.
#define ALT_UART_LCR_EPS_CLR_MSK 0xffffffef |
The mask used to clear the ALT_UART_LCR_EPS register field value.
#define ALT_UART_LCR_EPS_RESET 0x0 |
The reset value of the ALT_UART_LCR_EPS register field.
#define ALT_UART_LCR_EPS_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_UART_LCR_EPS field value from a register.
#define ALT_UART_LCR_EPS_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_UART_LCR_EPS register field value suitable for setting the register.
#define ALT_UART_LCR_SP_E_DISD 0x0 |
Enumerated value for register field ALT_UART_LCR_SP
Stick Parity Disabled
#define ALT_UART_LCR_SP_E_END 0x1 |
Enumerated value for register field ALT_UART_LCR_SP
Stick Parity Enabled
#define ALT_UART_LCR_SP_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_SP register field.
#define ALT_UART_LCR_SP_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_SP register field.
#define ALT_UART_LCR_SP_WIDTH 1 |
The width in bits of the ALT_UART_LCR_SP register field.
#define ALT_UART_LCR_SP_SET_MSK 0x00000020 |
The mask used to set the ALT_UART_LCR_SP register field value.
#define ALT_UART_LCR_SP_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_UART_LCR_SP register field value.
#define ALT_UART_LCR_SP_RESET 0x0 |
The reset value of the ALT_UART_LCR_SP register field.
#define ALT_UART_LCR_SP_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_UART_LCR_SP field value from a register.
#define ALT_UART_LCR_SP_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_UART_LCR_SP register field value suitable for setting the register.
#define ALT_UART_LCR_BREAK_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_BREAK register field.
#define ALT_UART_LCR_BREAK_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_BREAK register field.
#define ALT_UART_LCR_BREAK_WIDTH 1 |
The width in bits of the ALT_UART_LCR_BREAK register field.
#define ALT_UART_LCR_BREAK_SET_MSK 0x00000040 |
The mask used to set the ALT_UART_LCR_BREAK register field value.
#define ALT_UART_LCR_BREAK_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_UART_LCR_BREAK register field value.
#define ALT_UART_LCR_BREAK_RESET 0x0 |
The reset value of the ALT_UART_LCR_BREAK register field.
#define ALT_UART_LCR_BREAK_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_UART_LCR_BREAK field value from a register.
#define ALT_UART_LCR_BREAK_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_UART_LCR_BREAK register field value suitable for setting the register.
#define ALT_UART_LCR_DLAB_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_DLAB register field.
#define ALT_UART_LCR_DLAB_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_DLAB register field.
#define ALT_UART_LCR_DLAB_WIDTH 1 |
The width in bits of the ALT_UART_LCR_DLAB register field.
#define ALT_UART_LCR_DLAB_SET_MSK 0x00000080 |
The mask used to set the ALT_UART_LCR_DLAB register field value.
#define ALT_UART_LCR_DLAB_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_UART_LCR_DLAB register field value.
#define ALT_UART_LCR_DLAB_RESET 0x0 |
The reset value of the ALT_UART_LCR_DLAB register field.
#define ALT_UART_LCR_DLAB_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_UART_LCR_DLAB field value from a register.
#define ALT_UART_LCR_DLAB_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_UART_LCR_DLAB register field value suitable for setting the register.
#define ALT_UART_LCR_RSVD_LCR_31TO8_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_UART_LCR_RSVD_LCR_31TO8 register field.
#define ALT_UART_LCR_RSVD_LCR_31TO8_MSB 31 |
The Most Significant Bit (MSB) position of the ALT_UART_LCR_RSVD_LCR_31TO8 register field.
#define ALT_UART_LCR_RSVD_LCR_31TO8_WIDTH 24 |
The width in bits of the ALT_UART_LCR_RSVD_LCR_31TO8 register field.
#define ALT_UART_LCR_RSVD_LCR_31TO8_SET_MSK 0xffffff00 |
The mask used to set the ALT_UART_LCR_RSVD_LCR_31TO8 register field value.
#define ALT_UART_LCR_RSVD_LCR_31TO8_CLR_MSK 0x000000ff |
The mask used to clear the ALT_UART_LCR_RSVD_LCR_31TO8 register field value.
#define ALT_UART_LCR_RSVD_LCR_31TO8_RESET 0x0 |
The reset value of the ALT_UART_LCR_RSVD_LCR_31TO8 register field.
#define ALT_UART_LCR_RSVD_LCR_31TO8_GET | ( | value | ) | (((value) & 0xffffff00) >> 8) |
Extracts the ALT_UART_LCR_RSVD_LCR_31TO8 field value from a register.
#define ALT_UART_LCR_RSVD_LCR_31TO8_SET | ( | value | ) | (((value) << 8) & 0xffffff00) |
Produces a ALT_UART_LCR_RSVD_LCR_31TO8 register field value suitable for setting the register.
#define ALT_UART_LCR_RESET 0x00000000 |
The reset value of the ALT_UART_LCR register.
#define ALT_UART_LCR_OFST 0xc |
The byte offset of the ALT_UART_LCR register from the beginning of the component.
#define ALT_UART_LCR_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LCR_OFST)) |
The address of the ALT_UART_LCR register.
typedef struct ALT_UART_LCR_s ALT_UART_LCR_t |
The typedef declaration for register ALT_UART_LCR.