Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Group : Power and Clock Gating Register - ALT_USB_PWRCLK

Description

Power and Clock Gating Register

There is a single register for power and clock gating. It is available in both Host and Device modes.

Members

 Register : Power and Clock Gating Control Register - pcgcctl
 

Data Structures

struct  ALT_USB_PWRCLK_s
 
struct  ALT_USB_PWRCLK_raw_s
 

Typedefs

typedef struct ALT_USB_PWRCLK_s ALT_USB_PWRCLK_t
 
typedef struct ALT_USB_PWRCLK_raw_s ALT_USB_PWRCLK_raw_t
 

Data Structure Documentation

struct ALT_USB_PWRCLK_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register group ALT_USB_PWRCLK.

Data Fields
volatile ALT_USB_PWRCLK_PCGCCTL_t pcgcctl ALT_USB_PWRCLK_PCGCCTL
struct ALT_USB_PWRCLK_raw_s

The struct declaration for the raw register contents of register group ALT_USB_PWRCLK.

Data Fields
volatile uint32_t pcgcctl ALT_USB_PWRCLK_PCGCCTL

Typedef Documentation

The typedef declaration for register group ALT_USB_PWRCLK.

The typedef declaration for the raw register contents of register group ALT_USB_PWRCLK.