Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : ECC_Addrbus

Description

MSB bit of address is determined by ADR.

Register Layout

Bits Access Reset Description
[9:0] RW 0x0 ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS
[31:10] ??? 0x0 UNDEFINED

Field : ECC_AddrBUS

Address will be driven to RAM to either read or write the data. Address will be latched by the RAM when the Enbus is asserted.

Field Access Macros:

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_LSB   0
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_MSB   9
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_WIDTH   10
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_SET_MSK   0x000003ff
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_CLR_MSK   0xfffffc00
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_RESET   0x0
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_GET(value)   (((value) & 0x000003ff) >> 0)
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_SET(value)   (((value) << 0) & 0x000003ff)
 

Data Structures

struct  ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_s
 

Macros

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_RESET   0x00000000
 
#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_OFST   0x40
 

Typedefs

typedef struct
ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_s 
ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_t
 

Data Structure Documentation

struct ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS.

Data Fields
uint32_t ECC_AddrBUS: 10 ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS
uint32_t __pad0__: 22 UNDEFINED

Macro Definitions

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_LSB   0

The Least Significant Bit (LSB) position of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_MSB   9

The Most Significant Bit (MSB) position of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_WIDTH   10

The width in bits of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_SET_MSK   0x000003ff

The mask used to set the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field value.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_CLR_MSK   0xfffffc00

The mask used to clear the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field value.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_RESET   0x0

The reset value of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_GET (   value)    (((value) & 0x000003ff) >> 0)

Extracts the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS field value from a register.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS_SET (   value)    (((value) << 0) & 0x000003ff)

Produces a ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_ECC_ADDRBUS register field value suitable for setting the register.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_RESET   0x00000000

The reset value of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS register.

#define ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS_OFST   0x40

The byte offset of the ALT_ECC_EMAC1_TX_ECC_ECC_ADDRBUS register from the beginning of the component.

Typedef Documentation