Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : SD/MMC L3 Master HPROT Register - sdmmc_l3master

Description

Controls the L3 master HPROT AHB-Lite signal.

These register bits should be updated only during system initialization prior to removing the peripheral from reset. They may not be changed dynamically during peripheral operation

All fields are reset by a cold or warm reset.

Register Layout

Bits Access Reset Description
[4:0] RW 0x3 ALT_SYSMGR_SDMMC_L3MST_HPROT
[31:5] ??? 0x0 UNDEFINED

Field : hprot


HPROT[4] Allocate

0: L3 master accesses for the module are non-allocatable

1: L3 master accesses for the module are allocatable


HPROT[3] Cachable

0: L3 master accesses for the module are non-cacheable.

1: L3 master accesses for the module are cacheable.


HPROT[2] Bufferable

0: L3 master accesses for the module are not bufferable.

1: L3 master accesses for the module are bufferable.


HPROT[1] Privileged

0: L3 master accesses for the module are not privileged.

1: L3 master accesses for the module are privileged.


HPROT[0] Data/Opcode

0: Specifies if the L3 master access is for opcode

1: Specifies if the L3 master access is for data


HPROT[4:2] Example Encodings


0 0 0 Strongly Ordered, cannot be buffered

0 0 1 Device, can be buffered

0 1 0 Cachable (Outer Noncachable, do not allocate on reads or writes)

1 1 0 Cachable Write-Through (allocate on reads only, no allocate on write)

0 1 1 Cachable Write-Back (allocate on reads and writes)

1 1 1 Cachable Write-Back (allocate on reads only, no allocate on write)


HPROT[1:0] Example Encodings


  • 0 Opcode Fetch
  • 1 Data Access

0 - User Access

1 - Privileged Access


Field Access Macros:

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_LSB   0
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_MSB   4
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_WIDTH   5
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_SET_MSK   0x0000001f
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_CLR_MSK   0xffffffe0
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_RESET   0x3
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_GET(value)   (((value) & 0x0000001f) >> 0)
 
#define ALT_SYSMGR_SDMMC_L3MST_HPROT_SET(value)   (((value) << 0) & 0x0000001f)
 

Data Structures

struct  ALT_SYSMGR_SDMMC_L3MST_s
 

Macros

#define ALT_SYSMGR_SDMMC_L3MST_RESET   0x00000003
 
#define ALT_SYSMGR_SDMMC_L3MST_OFST   0x2c
 

Typedefs

typedef struct
ALT_SYSMGR_SDMMC_L3MST_s 
ALT_SYSMGR_SDMMC_L3MST_t
 

Data Structure Documentation

struct ALT_SYSMGR_SDMMC_L3MST_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_SDMMC_L3MST.

Data Fields
uint32_t hprot: 5 ALT_SYSMGR_SDMMC_L3MST_HPROT
uint32_t __pad0__: 27 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROT register field.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_MSB   4

The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROT register field.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_WIDTH   5

The width in bits of the ALT_SYSMGR_SDMMC_L3MST_HPROT register field.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_SET_MSK   0x0000001f

The mask used to set the ALT_SYSMGR_SDMMC_L3MST_HPROT register field value.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_CLR_MSK   0xffffffe0

The mask used to clear the ALT_SYSMGR_SDMMC_L3MST_HPROT register field value.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_RESET   0x3

The reset value of the ALT_SYSMGR_SDMMC_L3MST_HPROT register field.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_GET (   value)    (((value) & 0x0000001f) >> 0)

Extracts the ALT_SYSMGR_SDMMC_L3MST_HPROT field value from a register.

#define ALT_SYSMGR_SDMMC_L3MST_HPROT_SET (   value)    (((value) << 0) & 0x0000001f)

Produces a ALT_SYSMGR_SDMMC_L3MST_HPROT register field value suitable for setting the register.

#define ALT_SYSMGR_SDMMC_L3MST_RESET   0x00000003

The reset value of the ALT_SYSMGR_SDMMC_L3MST register.

#define ALT_SYSMGR_SDMMC_L3MST_OFST   0x2c

The byte offset of the ALT_SYSMGR_SDMMC_L3MST register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_SDMMC_L3MST.