Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Group : Device parameters - ALT_NAND_PARAM

Description

Device parameters

Controller reads device parameters after initialization and stores in the following registers for software

Members

 Register : manufacturer_id
 
 Register : device_id
 
 Register : device_param_0
 
 Register : device_param_1
 
 Register : device_param_2
 
 Register : logical_page_data_size
 
 Register : logical_page_spare_size
 
 Register : revision
 
 Register : onfi_device_features
 
 Register : onfi_optional_commands
 
 Register : onfi_timing_mode
 
 Register : onfi_pgm_cache_timing_mode
 
 Register : onfi_device_no_of_luns
 
 Register : onfi_device_no_of_blocks_per_lun_l
 
 Register : onfi_device_no_of_blocks_per_lun_u
 
 Register : features
 

Data Structures

struct  ALT_NAND_PARAM_s
 
struct  ALT_NAND_PARAM_raw_s
 

Typedefs

typedef struct ALT_NAND_PARAM_s ALT_NAND_PARAM_t
 
typedef struct ALT_NAND_PARAM_raw_s ALT_NAND_PARAM_raw_t
 

Data Structure Documentation

struct ALT_NAND_PARAM_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register group ALT_NAND_PARAM.

Data Fields
volatile
ALT_NAND_PARAM_MANUFACTURER_ID_t
manufacturer_id ALT_NAND_PARAM_MANUFACTURER_ID
volatile uint32_t _pad_0x4_0xf UNDEFINED
volatile ALT_NAND_PARAM_DEVICE_ID_t device_id ALT_NAND_PARAM_DEVICE_ID
volatile uint32_t _pad_0x14_0x1f UNDEFINED
volatile
ALT_NAND_PARAM_DEVICE_PARAM_0_t
device_param_0 ALT_NAND_PARAM_DEVICE_PARAM_0
volatile uint32_t _pad_0x24_0x2f UNDEFINED
volatile
ALT_NAND_PARAM_DEVICE_PARAM_1_t
device_param_1 ALT_NAND_PARAM_DEVICE_PARAM_1
volatile uint32_t _pad_0x34_0x3f UNDEFINED
volatile
ALT_NAND_PARAM_DEVICE_PARAM_2_t
device_param_2 ALT_NAND_PARAM_DEVICE_PARAM_2
volatile uint32_t _pad_0x44_0x4f UNDEFINED
volatile
ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_t
logical_page_data_size ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE
volatile uint32_t _pad_0x54_0x5f UNDEFINED
volatile
ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_t
logical_page_spare_size ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE
volatile uint32_t _pad_0x64_0x6f UNDEFINED
volatile ALT_NAND_PARAM_REVISION_t revision ALT_NAND_PARAM_REVISION
volatile uint32_t _pad_0x74_0x7f UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_DEV_FEATURES_t
onfi_device_features ALT_NAND_PARAM_ONFI_DEV_FEATURES
volatile uint32_t _pad_0x84_0x8f UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_t
onfi_optional_commands ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS
volatile uint32_t _pad_0x94_0x9f UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_TIMING_MOD_t
onfi_timing_mode ALT_NAND_PARAM_ONFI_TIMING_MOD
volatile uint32_t _pad_0xa4_0xaf UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_t
onfi_pgm_cache_timing_mode ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD
volatile uint32_t _pad_0xb4_0xbf UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_t
onfi_device_no_of_luns ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS
volatile uint32_t _pad_0xc4_0xcf UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_t
onfi_device_no_of_blocks_per_lun_l ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L
volatile uint32_t _pad_0xd4_0xdf UNDEFINED
volatile
ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_t
onfi_device_no_of_blocks_per_lun_u ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U
volatile uint32_t _pad_0xe4_0xef UNDEFINED
volatile ALT_NAND_PARAM_FEATURES_t features ALT_NAND_PARAM_FEATURES
struct ALT_NAND_PARAM_raw_s

The struct declaration for the raw register contents of register group ALT_NAND_PARAM.

Data Fields
volatile uint32_t manufacturer_id ALT_NAND_PARAM_MANUFACTURER_ID
volatile uint32_t _pad_0x4_0xf UNDEFINED
volatile uint32_t device_id ALT_NAND_PARAM_DEVICE_ID
volatile uint32_t _pad_0x14_0x1f UNDEFINED
volatile uint32_t device_param_0 ALT_NAND_PARAM_DEVICE_PARAM_0
volatile uint32_t _pad_0x24_0x2f UNDEFINED
volatile uint32_t device_param_1 ALT_NAND_PARAM_DEVICE_PARAM_1
volatile uint32_t _pad_0x34_0x3f UNDEFINED
volatile uint32_t device_param_2 ALT_NAND_PARAM_DEVICE_PARAM_2
volatile uint32_t _pad_0x44_0x4f UNDEFINED
volatile uint32_t logical_page_data_size ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE
volatile uint32_t _pad_0x54_0x5f UNDEFINED
volatile uint32_t logical_page_spare_size ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE
volatile uint32_t _pad_0x64_0x6f UNDEFINED
volatile uint32_t revision ALT_NAND_PARAM_REVISION
volatile uint32_t _pad_0x74_0x7f UNDEFINED
volatile uint32_t onfi_device_features ALT_NAND_PARAM_ONFI_DEV_FEATURES
volatile uint32_t _pad_0x84_0x8f UNDEFINED
volatile uint32_t onfi_optional_commands ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS
volatile uint32_t _pad_0x94_0x9f UNDEFINED
volatile uint32_t onfi_timing_mode ALT_NAND_PARAM_ONFI_TIMING_MOD
volatile uint32_t _pad_0xa4_0xaf UNDEFINED
volatile uint32_t onfi_pgm_cache_timing_mode ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD
volatile uint32_t _pad_0xb4_0xbf UNDEFINED
volatile uint32_t onfi_device_no_of_luns ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS
volatile uint32_t _pad_0xc4_0xcf UNDEFINED
volatile uint32_t onfi_device_no_of_blocks_per_lun_l ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L
volatile uint32_t _pad_0xd4_0xdf UNDEFINED
volatile uint32_t onfi_device_no_of_blocks_per_lun_u ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U
volatile uint32_t _pad_0xe4_0xef UNDEFINED
volatile uint32_t features ALT_NAND_PARAM_FEATURES

Typedef Documentation

The typedef declaration for register group ALT_NAND_PARAM.

The typedef declaration for the raw register contents of register group ALT_NAND_PARAM.