Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : Interrupt Enable Register - intren

Description

Contain fields that enable the interrupt

Register Layout

Bits Access Reset Description
[0] RW 0x0 Main PLL Achieved Lock Interrupt Enable
[1] RW 0x0 Peripheral PLL Achieved Lock Interrupt Enable
[2] RW 0x0 Main PLL Achieved Lock Interrupt Enable
[3] RW 0x0 Peripheral PLL Achieved Lock Interrupt Enable
[7:4] ??? 0x0 UNDEFINED
[8] RW 0x0 Main PLL RF Slip Interrupt Enable
[9] RW 0x0 Peripheral PLL RF Slip Interrupt Enable
[10] RW 0x0 Main PLL FB Slip Interrupt Enable
[11] RW 0x0 Peripheral PLL FB Slip Interrupt Enable
[31:12] ??? 0x0 UNDEFINED

Field : Main PLL Achieved Lock Interrupt Enable - mainpllachieved

When set to 1, the Main PLL achieved lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Main PLL achieved lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_LSB   0
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_MSB   0
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_SET_MSK   0x00000001
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_CLR_MSK   0xfffffffe
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Peripheral PLL Achieved Lock Interrupt Enable - perpllachieved

When set to 1, the Peripheral PLL achieved lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Peripheral PLL achieved lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_LSB   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_MSB   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_SET_MSK   0x00000002
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_CLR_MSK   0xfffffffd
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_SET(value)   (((value) << 1) & 0x00000002)
 

Field : Main PLL Achieved Lock Interrupt Enable - mainplllost

When set to 1, the Main PLL lost lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Main PLL lost lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_LSB   2
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_MSB   2
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_SET_MSK   0x00000004
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_CLR_MSK   0xfffffffb
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_SET(value)   (((value) << 2) & 0x00000004)
 

Field : Peripheral PLL Achieved Lock Interrupt Enable - perplllost

When set to 1, the Peripheral PLL lost lock bit is ORed into the Clock Manager interrupt output. When set to 0 the Peripheral PLL lost lock bit is not ORed into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_LSB   3
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_MSB   3
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_SET_MSK   0x00000008
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_CLR_MSK   0xfffffff7
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_SET(value)   (((value) << 3) & 0x00000008)
 

Field : Main PLL RF Slip Interrupt Enable - mainpllrfslip

When set to 1,the Main PLL reference cycle slipped bit is ORed into the Clock Manager interrupt output. When set to 0, the Main PLL reference cylce slipped bit is Ored into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_LSB   8
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_MSB   8
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_SET_MSK   0x00000100
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_CLR_MSK   0xfffffeff
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_SET(value)   (((value) << 8) & 0x00000100)
 

Field : Peripheral PLL RF Slip Interrupt Enable - perpllrfslip

When set to 1,the Peripheral PLL reference cycle slipped bit is ORed into the Clock Manager interrupt output. When set to 0, the Peripheral PLL reference cylce slipped bit is Ored into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_LSB   9
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_MSB   9
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_SET_MSK   0x00000200
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_CLR_MSK   0xfffffdff
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_GET(value)   (((value) & 0x00000200) >> 9)
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_SET(value)   (((value) << 9) & 0x00000200)
 

Field : Main PLL FB Slip Interrupt Enable - mainpllfbslip

When set to 1,the Main PLL feedback cycle slipped bit is ORed into the Clock Manager interrupt output. When set to 0, the Main PLL feedback cylce slipped bit is Ored into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_LSB   10
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_MSB   10
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_SET_MSK   0x00000400
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_CLR_MSK   0xfffffbff
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_GET(value)   (((value) & 0x00000400) >> 10)
 
#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_SET(value)   (((value) << 10) & 0x00000400)
 

Field : Peripheral PLL FB Slip Interrupt Enable - perpllfbslip

When set to 1,the Peripheral PLL feedback cycle slipped bit is ORed into the Clock Manager interrupt output. When set to 0, the Peripheral PLL feedback cylce slipped bit is Ored into the Clock Manager interrupt output.

Field Access Macros:

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_LSB   11
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_MSB   11
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_WIDTH   1
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_SET_MSK   0x00000800
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_CLR_MSK   0xfffff7ff
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_RESET   0x0
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_GET(value)   (((value) & 0x00000800) >> 11)
 
#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_SET(value)   (((value) << 11) & 0x00000800)
 

Data Structures

struct  ALT_CLKMGR_CLKMGR_INTREN_s
 

Macros

#define ALT_CLKMGR_CLKMGR_INTREN_RESET   0x00000000
 
#define ALT_CLKMGR_CLKMGR_INTREN_OFST   0x10
 

Typedefs

typedef struct
ALT_CLKMGR_CLKMGR_INTREN_s 
ALT_CLKMGR_CLKMGR_INTREN_t
 

Data Structure Documentation

struct ALT_CLKMGR_CLKMGR_INTREN_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_CLKMGR_CLKMGR_INTREN.

Data Fields
uint32_t mainpllachieved: 1 Main PLL Achieved Lock Interrupt Enable
uint32_t perpllachieved: 1 Peripheral PLL Achieved Lock Interrupt Enable
uint32_t mainplllost: 1 Main PLL Achieved Lock Interrupt Enable
uint32_t perplllost: 1 Peripheral PLL Achieved Lock Interrupt Enable
uint32_t __pad0__: 4 UNDEFINED
uint32_t mainpllrfslip: 1 Main PLL RF Slip Interrupt Enable
uint32_t perpllrfslip: 1 Peripheral PLL RF Slip Interrupt Enable
uint32_t mainpllfbslip: 1 Main PLL FB Slip Interrupt Enable
uint32_t perpllfbslip: 1 Peripheral PLL FB Slip Interrupt Enable
uint32_t __pad1__: 20 UNDEFINED

Macro Definitions

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_LSB   0

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_MSB   0

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_SET_MSK   0x00000001

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_CLR_MSK   0xfffffffe

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_LSB   1

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_MSB   1

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_SET_MSK   0x00000002

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_CLR_MSK   0xfffffffd

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_LSB   2

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_MSB   2

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_SET_MSK   0x00000004

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_CLR_MSK   0xfffffffb

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_LSB   3

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_MSB   3

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_SET_MSK   0x00000008

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_CLR_MSK   0xfffffff7

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_LSB   8

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_MSB   8

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_SET_MSK   0x00000100

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_CLR_MSK   0xfffffeff

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_LSB   9

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_MSB   9

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_SET_MSK   0x00000200

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_CLR_MSK   0xfffffdff

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_GET (   value)    (((value) & 0x00000200) >> 9)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_SET (   value)    (((value) << 9) & 0x00000200)

Produces a ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_LSB   10

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_MSB   10

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_SET_MSK   0x00000400

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_CLR_MSK   0xfffffbff

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_GET (   value)    (((value) & 0x00000400) >> 10)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_SET (   value)    (((value) << 10) & 0x00000400)

Produces a ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_LSB   11

The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_MSB   11

The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_WIDTH   1

The width in bits of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_SET_MSK   0x00000800

The mask used to set the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_CLR_MSK   0xfffff7ff

The mask used to clear the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field value.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_RESET   0x0

The reset value of the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_GET (   value)    (((value) & 0x00000800) >> 11)

Extracts the ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP field value from a register.

#define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_SET (   value)    (((value) << 11) & 0x00000800)

Produces a ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP register field value suitable for setting the register.

#define ALT_CLKMGR_CLKMGR_INTREN_RESET   0x00000000

The reset value of the ALT_CLKMGR_CLKMGR_INTREN register.

#define ALT_CLKMGR_CLKMGR_INTREN_OFST   0x10

The byte offset of the ALT_CLKMGR_CLKMGR_INTREN register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_CLKMGR_CLKMGR_INTREN.