Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Bypass Set Register - bypasss

Description

Write One to Set corresponding fields in Bypass Register.

Register Layout

Bits Access Reset Description
[0] RW 0x1 EMACA Bypass
[1] RW 0x1 EMACB Bypass
[2] RW 0x1 EMAC PTP Bypass
[3] RW 0x1 GPIO Debounce Bypass
[4] RW 0x1 SDMMC Bypass
[5] RW 0x1 S2F User1 Bypass
[6] RW 0x1 PLL RFEN Clock Bypass
[7] RW 0x1 PLL FBEN Clock Bypass
[31:8] ??? 0x0 UNDEFINED

Field : EMACA Bypass - emaca

If set, the emaca_free_clk will be bypassed to the input clock reference of the Periphal PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_LSB   0
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_MSB   0
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_SET_MSK   0x00000001
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_CLR_MSK   0xfffffffe
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_SET(value)   (((value) << 0) & 0x00000001)
 

Field : EMACB Bypass - emacb

If set, the emacb_free_clk will be bypassed to the input clock reference of the Main PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_LSB   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_MSB   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_SET_MSK   0x00000002
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_CLR_MSK   0xfffffffd
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_SET(value)   (((value) << 1) & 0x00000002)
 

Field : EMAC PTP Bypass - emacptp

If set, the emac_ptp_clk will be bypassed to the input clock reference of the Peripheral PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_LSB   2
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_MSB   2
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_SET_MSK   0x00000004
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_CLR_MSK   0xfffffffb
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_SET(value)   (((value) << 2) & 0x00000004)
 

Field : GPIO Debounce Bypass - gpiodb

If set, the gpio_db_clk will be bypassed to the input clock reference of the Peripheral PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_LSB   3
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_MSB   3
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_SET_MSK   0x00000008
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_CLR_MSK   0xfffffff7
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_SET(value)   (((value) << 3) & 0x00000008)
 

Field : SDMMC Bypass - sdmmc

If set, the sdmmc_clk will be bypassed to the input clock reference of the Peripheral PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_LSB   4
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_MSB   4
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_SET_MSK   0x00000010
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_CLR_MSK   0xffffffef
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_SET(value)   (((value) << 4) & 0x00000010)
 

Field : S2F User1 Bypass - s2fuser1

If set, the s2f_user1_clk will be bypassed to the input clock reference of the Peripheral PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_LSB   5
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_MSB   5
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_SET_MSK   0x00000020
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_CLR_MSK   0xffffffdf
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_SET(value)   (((value) << 5) & 0x00000020)
 

Field : PLL RFEN Clock Bypass - rfen

If set, the pll_peri_rfen_clk will be bypassed to the boot_clk. The pll_peri_rfen_clk is used to synchronously update the Denominator to the Peripheral PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_LSB   6
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_MSB   6
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_SET_MSK   0x00000040
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_CLR_MSK   0xffffffbf
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_SET(value)   (((value) << 6) & 0x00000040)
 

Field : PLL FBEN Clock Bypass - fben

If set, the pll_main_fben_clk will be bypassed to the boot_clk. The pll_main_fben_clk is used to synchronously update the Numerator to the Main PLL.

Field Access Macros:

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_LSB   7
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_MSB   7
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_WIDTH   1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_SET_MSK   0x00000080
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_CLR_MSK   0xffffff7f
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_RESET   0x1
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_SET(value)   (((value) << 7) & 0x00000080)
 

Data Structures

struct  ALT_CLKMGR_PERPLL_BYPASSS_s
 

Macros

#define ALT_CLKMGR_PERPLL_BYPASSS_RESET   0x000000ff
 
#define ALT_CLKMGR_PERPLL_BYPASSS_OFST   0x18
 

Typedefs

typedef struct
ALT_CLKMGR_PERPLL_BYPASSS_s 
ALT_CLKMGR_PERPLL_BYPASSS_t
 

Data Structure Documentation

struct ALT_CLKMGR_PERPLL_BYPASSS_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_CLKMGR_PERPLL_BYPASSS.

Data Fields
uint32_t emaca: 1 EMACA Bypass
uint32_t emacb: 1 EMACB Bypass
uint32_t emacptp: 1 EMAC PTP Bypass
uint32_t gpiodb: 1 GPIO Debounce Bypass
uint32_t sdmmc: 1 SDMMC Bypass
uint32_t s2fuser1: 1 S2F User1 Bypass
uint32_t rfen: 1 PLL RFEN Clock Bypass
uint32_t fben: 1 PLL FBEN Clock Bypass
uint32_t __pad0__: 24 UNDEFINED

Macro Definitions

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_LSB   0

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_MSB   0

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_SET_MSK   0x00000001

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_CLR_MSK   0xfffffffe

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_EMACA field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_EMACA register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_LSB   1

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_MSB   1

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_SET_MSK   0x00000002

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_CLR_MSK   0xfffffffd

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_EMACB field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_EMACB register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_LSB   2

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_MSB   2

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_SET_MSK   0x00000004

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_CLR_MSK   0xfffffffb

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_LSB   3

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_MSB   3

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_SET_MSK   0x00000008

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_CLR_MSK   0xfffffff7

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_GPIODB field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_GPIODB register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_LSB   4

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_MSB   4

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_SET_MSK   0x00000010

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_CLR_MSK   0xffffffef

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_SDMMC field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_SDMMC register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_LSB   5

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_MSB   5

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_SET_MSK   0x00000020

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_CLR_MSK   0xffffffdf

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1 register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_LSB   6

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_MSB   6

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_SET_MSK   0x00000040

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_CLR_MSK   0xffffffbf

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_RFEN field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_RFEN register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_LSB   7

The Least Significant Bit (LSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_MSB   7

The Most Significant Bit (MSB) position of the ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_WIDTH   1

The width in bits of the ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_SET_MSK   0x00000080

The mask used to set the ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_CLR_MSK   0xffffff7f

The mask used to clear the ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field value.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_RESET   0x1

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_CLKMGR_PERPLL_BYPASSS_FBEN field value from a register.

#define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_CLKMGR_PERPLL_BYPASSS_FBEN register field value suitable for setting the register.

#define ALT_CLKMGR_PERPLL_BYPASSS_RESET   0x000000ff

The reset value of the ALT_CLKMGR_PERPLL_BYPASSS register.

#define ALT_CLKMGR_PERPLL_BYPASSS_OFST   0x18

The byte offset of the ALT_CLKMGR_PERPLL_BYPASSS register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_CLKMGR_PERPLL_BYPASSS.