Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : gmacgrp_mac_address120_high

Description

Register 719 (MAC Address120 High Register)

The MAC Address120 High register holds the upper 16 bits of the 6-byte 121st MAC address of the station.

If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains, then

the synchronization is triggered only when Bits[31:24] (in little-endian mode) or Bits[7:0] (in big-endian mode) of the MAC Address120 Low Register are written. For proper synchronization updates, consecutive writes to this MAC Address120 Low Register must be performed after at least four clock cycles in the destination clock domain.

Register Layout

Bits Access Reset Description
[15:0] RW 0xffff ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI
[30:16] R 0x0 ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16
[31] RW 0x0 ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE

Field : addrhi

MAC Address120 [47:32]

This field contains the upper 16 bits (47:32) of the 6-byte 121st MAC address.

Field Access Macros:

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_LSB   0
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_MSB   15
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_WIDTH   16
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_SET_MSK   0x0000ffff
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_CLR_MSK   0xffff0000
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_RESET   0xffff
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_GET(value)   (((value) & 0x0000ffff) >> 0)
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_SET(value)   (((value) << 0) & 0x0000ffff)
 

Field : reserved_30_16

Reserved

Field Access Macros:

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_LSB   16
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_MSB   30
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_WIDTH   15
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_SET_MSK   0x7fff0000
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_CLR_MSK   0x8000ffff
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_RESET   0x0
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_GET(value)   (((value) & 0x7fff0000) >> 16)
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_SET(value)   (((value) << 16) & 0x7fff0000)
 

Field : ae

Address Enable

When this bit is set, the address filter module uses the 121st MAC address for perfect filtering.

When this bit is reset, the address filter module ignores the address for filtering.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_E_DISD | 0x0 | ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_E_DISD   0x0
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_E_END   0x1
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_LSB   31
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_MSB   31
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_WIDTH   1
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_SET_MSK   0x80000000
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_CLR_MSK   0x7fffffff
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_RESET   0x0
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_EMAC_GMAC_MAC_ADDR120_HIGH_s
 

Macros

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RESET   0x0000ffff
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_OFST   0xb40
 
#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_MAC_ADDR120_HIGH_OFST))
 

Typedefs

typedef struct
ALT_EMAC_GMAC_MAC_ADDR120_HIGH_s 
ALT_EMAC_GMAC_MAC_ADDR120_HIGH_t
 

Data Structure Documentation

struct ALT_EMAC_GMAC_MAC_ADDR120_HIGH_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_GMAC_MAC_ADDR120_HIGH.

Data Fields
uint32_t addrhi: 16 ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI
const uint32_t reserved_30_16: 15 ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16
uint32_t ae: 1 ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE

Macro Definitions

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_LSB   0

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_MSB   15

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_WIDTH   16

The width in bits of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_SET_MSK   0x0000ffff

The mask used to set the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field value.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_CLR_MSK   0xffff0000

The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field value.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_RESET   0xffff

The reset value of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_GET (   value)    (((value) & 0x0000ffff) >> 0)

Extracts the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI field value from a register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI_SET (   value)    (((value) << 0) & 0x0000ffff)

Produces a ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDRHI register field value suitable for setting the register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_LSB   16

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_MSB   30

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_WIDTH   15

The width in bits of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_SET_MSK   0x7fff0000

The mask used to set the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field value.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_CLR_MSK   0x8000ffff

The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field value.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_RESET   0x0

The reset value of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_GET (   value)    (((value) & 0x7fff0000) >> 16)

Extracts the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 field value from a register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16_SET (   value)    (((value) << 16) & 0x7fff0000)

Produces a ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RSVD_30_16 register field value suitable for setting the register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_E_DISD   0x0

Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_E_END   0x1

Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_LSB   31

The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_MSB   31

The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_WIDTH   1

The width in bits of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_SET_MSK   0x80000000

The mask used to set the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field value.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_CLR_MSK   0x7fffffff

The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field value.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_RESET   0x0

The reset value of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE field value from a register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_EMAC_GMAC_MAC_ADDR120_HIGH_AE register field value suitable for setting the register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_RESET   0x0000ffff

The reset value of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH register.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_OFST   0xb40

The byte offset of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH register from the beginning of the component.

#define ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_MAC_ADDR120_HIGH_OFST))

The address of the ALT_EMAC_GMAC_MAC_ADDR120_HIGH register.

Typedef Documentation