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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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UHS-1 Register
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | High Voltage Mode |
[15:1] | ??? | 0x0 | UNDEFINED |
[16] | RW | 0x0 | DDR Mode |
[31:17] | ??? | 0x0 | UNDEFINED |
Field : High Voltage Mode - volt_reg | ||||||||||
Determines the voltage fed to the buffers by an external voltage regulator. These bits function as the output of the host controller and are fed to an external voltage regulator. The voltage regulator must switch the voltage of the buffers of a particular card to either 3.3V or 1.8V, depending on the value programmed in the register. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_E_BUF33V 0x0 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_E_BUF18V 0x1 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_LSB 0 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_MSB 0 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_WIDTH 1 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_SET_MSK 0x00000001 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_RESET 0x0 | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_SDMMC_UHS_REG_VOLT_REG_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : DDR Mode - ddr_reg | ||||||||||
Determines the voltage fed to the buffers by an external voltage regulator. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_E_NONDDR 0x0 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_E_DDR 0x1 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_LSB 16 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_MSB 16 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_WIDTH 1 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_SET_MSK 0x00010000 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_CLR_MSK 0xfffeffff | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_RESET 0x0 | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_GET(value) (((value) & 0x00010000) >> 16) | |||||||||
#define | ALT_SDMMC_UHS_REG_DDR_REG_SET(value) (((value) << 16) & 0x00010000) | |||||||||
Data Structures | |
struct | ALT_SDMMC_UHS_REG_s |
Macros | |
#define | ALT_SDMMC_UHS_REG_OFST 0x74 |
Typedefs | |
typedef struct ALT_SDMMC_UHS_REG_s | ALT_SDMMC_UHS_REG_t |
struct ALT_SDMMC_UHS_REG_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SDMMC_UHS_REG.
Data Fields | ||
---|---|---|
uint32_t | volt_reg: 1 | High Voltage Mode |
uint32_t | __pad0__: 15 | UNDEFINED |
uint32_t | ddr_reg: 1 | DDR Mode |
uint32_t | __pad1__: 15 | UNDEFINED |
#define ALT_SDMMC_UHS_REG_VOLT_REG_E_BUF33V 0x0 |
Enumerated value for register field ALT_SDMMC_UHS_REG_VOLT_REG
Buffers supplied with 3.3V Vdd
#define ALT_SDMMC_UHS_REG_VOLT_REG_E_BUF18V 0x1 |
Enumerated value for register field ALT_SDMMC_UHS_REG_VOLT_REG
Buffers supplied with 1.8V Vdd
#define ALT_SDMMC_UHS_REG_VOLT_REG_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_UHS_REG_VOLT_REG register field.
#define ALT_SDMMC_UHS_REG_VOLT_REG_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_UHS_REG_VOLT_REG register field.
#define ALT_SDMMC_UHS_REG_VOLT_REG_WIDTH 1 |
The width in bits of the ALT_SDMMC_UHS_REG_VOLT_REG register field.
#define ALT_SDMMC_UHS_REG_VOLT_REG_SET_MSK 0x00000001 |
The mask used to set the ALT_SDMMC_UHS_REG_VOLT_REG register field value.
#define ALT_SDMMC_UHS_REG_VOLT_REG_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SDMMC_UHS_REG_VOLT_REG register field value.
#define ALT_SDMMC_UHS_REG_VOLT_REG_RESET 0x0 |
The reset value of the ALT_SDMMC_UHS_REG_VOLT_REG register field.
#define ALT_SDMMC_UHS_REG_VOLT_REG_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SDMMC_UHS_REG_VOLT_REG field value from a register.
#define ALT_SDMMC_UHS_REG_VOLT_REG_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SDMMC_UHS_REG_VOLT_REG register field value suitable for setting the register.
#define ALT_SDMMC_UHS_REG_DDR_REG_E_NONDDR 0x0 |
Enumerated value for register field ALT_SDMMC_UHS_REG_DDR_REG
Non-DDR mode
#define ALT_SDMMC_UHS_REG_DDR_REG_E_DDR 0x1 |
Enumerated value for register field ALT_SDMMC_UHS_REG_DDR_REG
DDR mode
#define ALT_SDMMC_UHS_REG_DDR_REG_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_UHS_REG_DDR_REG register field.
#define ALT_SDMMC_UHS_REG_DDR_REG_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_UHS_REG_DDR_REG register field.
#define ALT_SDMMC_UHS_REG_DDR_REG_WIDTH 1 |
The width in bits of the ALT_SDMMC_UHS_REG_DDR_REG register field.
#define ALT_SDMMC_UHS_REG_DDR_REG_SET_MSK 0x00010000 |
The mask used to set the ALT_SDMMC_UHS_REG_DDR_REG register field value.
#define ALT_SDMMC_UHS_REG_DDR_REG_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_SDMMC_UHS_REG_DDR_REG register field value.
#define ALT_SDMMC_UHS_REG_DDR_REG_RESET 0x0 |
The reset value of the ALT_SDMMC_UHS_REG_DDR_REG register field.
#define ALT_SDMMC_UHS_REG_DDR_REG_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_SDMMC_UHS_REG_DDR_REG field value from a register.
#define ALT_SDMMC_UHS_REG_DDR_REG_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_SDMMC_UHS_REG_DDR_REG register field value suitable for setting the register.
#define ALT_SDMMC_UHS_REG_OFST 0x74 |
The byte offset of the ALT_SDMMC_UHS_REG register from the beginning of the component.
typedef struct ALT_SDMMC_UHS_REG_s ALT_SDMMC_UHS_REG_t |
The typedef declaration for register ALT_SDMMC_UHS_REG.