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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register contains configuration options.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[2:0] | R | 0x0 | Mode of Operation |
[4:3] | R | 0x2 | Architecture |
[5] | R | 0x0 | Point-to-Point |
[7:6] | R | 0x2 | High Speed PHY Interface Type |
[9:8] | R | 0x0 | Full Speed PHY Interface Type |
[13:10] | R | 0xf | Number of Device Endpoints |
[17:14] | R | 0xf | Number of Host Channels |
[18] | R | 0x1 | Periodic OUT Channels Supported in Host Mode |
[19] | R | 0x1 | Dynamic FIFO Sizing Enabled |
[20] | R | 0x0 | Multi Processor Interrupt Enabled |
[21] | ??? | 0x0 | UNDEFINED |
[23:22] | R | 0x2 | Non Periodic Request Queue Depth |
[25:24] | R | 0x0 | Host Mode Periodic Request Queue Depth |
[30:26] | R | 0x8 | Device Mode IN Token Sequence Learning Queue Depth |
[31] | ??? | 0x0 | UNDEFINED |
Field : Architecture - otgarch | |||||||
DMA Architecture. Field Enumeration Values:
Field Access Macros: | |||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_E_DMAMOD 0x2 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_LSB 3 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_MSB 4 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_WIDTH 2 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_SET_MSK 0x00000018 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_CLR_MSK 0xffffffe7 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_RESET 0x2 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_GET(value) (((value) & 0x00000018) >> 3) | ||||||
#define | ALT_USB_GLOB_GHWCFG2_OTGARCH_SET(value) (((value) << 3) & 0x00000018) | ||||||
Field : Point-to-Point - singpnt | |||||||
Single Point Only. Field Enumeration Values:
Field Access Macros: | |||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_E_SINGLEPOINT 0x1 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_LSB 5 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_MSB 5 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_WIDTH 1 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_SET_MSK 0x00000020 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_CLR_MSK 0xffffffdf | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_RESET 0x0 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_GET(value) (((value) & 0x00000020) >> 5) | ||||||
#define | ALT_USB_GLOB_GHWCFG2_SINGPNT_SET(value) (((value) << 5) & 0x00000020) | ||||||
Field : High Speed PHY Interface Type - hsphytype | ||||||||||
Specifies the High Speed PHY in use. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_NOHS 0x0 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_ULPI 0x2 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_LSB 6 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_MSB 7 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_WIDTH 2 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_SET_MSK 0x000000c0 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_CLR_MSK 0xffffff3f | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_RESET 0x2 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_GET(value) (((value) & 0x000000c0) >> 6) | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_SET(value) (((value) << 6) & 0x000000c0) | |||||||||
Field : Full Speed PHY Interface Type - fsphytype | |||||||
Specifies the Full Speed PHY in use. Field Enumeration Values:
Field Access Macros: | |||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_E_FULLSPEED 0x2 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_LSB 8 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_MSB 9 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_WIDTH 2 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_SET_MSK 0x00000300 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_CLR_MSK 0xfffffcff | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_RESET 0x0 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_GET(value) (((value) & 0x00000300) >> 8) | ||||||
#define | ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_SET(value) (((value) << 8) & 0x00000300) | ||||||
Field : Number of Device Endpoints - numdeveps | ||||||||||||||||||||||||||||||||||||||||||||||||||||
The number of endpoints is 1 to 15 in Device mode in addition to control endpoint 0. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT0 0x0 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT1 0x1 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT2 0x2 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT3 0x3 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT4 0x4 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT5 0x5 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT6 0x6 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT7 0x7 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT8 0x8 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT9 0x9 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT10 0xa | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT11 0xb | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT12 0xc | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT13 0xd | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT14 0xe | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT15 0xf | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_LSB 10 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_MSB 13 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_WIDTH 4 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_SET_MSK 0x00003c00 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_CLR_MSK 0xffffc3ff | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_RESET 0xf | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_GET(value) (((value) & 0x00003c00) >> 10) | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_SET(value) (((value) << 10) & 0x00003c00) | |||||||||||||||||||||||||||||||||||||||||||||||||||
Field : Number of Host Channels - numhstchnl | ||||||||||||||||||||||||||||||||||||||||||||||||||||
Indicates the number of host channels supported by the core in Host mode. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH0 0x0 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH1 0x1 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH2 0x2 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH3 0x3 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH4 0x4 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH5 0x5 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH6 0x6 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH7 0x7 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH8 0x8 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH9 0x9 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH10 0xa | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH11 0xb | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH12 0xc | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH13 0xd | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH14 0xe | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH15 0xf | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_LSB 14 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_MSB 17 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_WIDTH 4 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_SET_MSK 0x0003c000 | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_CLR_MSK 0xfffc3fff | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_RESET 0xf | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_GET(value) (((value) & 0x0003c000) >> 14) | |||||||||||||||||||||||||||||||||||||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_SET(value) (((value) << 14) & 0x0003c000) | |||||||||||||||||||||||||||||||||||||||||||||||||||
Field : Periodic OUT Channels Supported in Host Mode - periosupport | ||||||||||
Feature supported. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_E_END 0x1 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_LSB 18 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_MSB 18 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_WIDTH 1 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_SET_MSK 0x00040000 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_CLR_MSK 0xfffbffff | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_RESET 0x1 | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_GET(value) (((value) & 0x00040000) >> 18) | |||||||||
#define | ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_SET(value) (((value) << 18) & 0x00040000) | |||||||||
Field : Dynamic FIFO Sizing Enabled - dynfifosizing | |||||||
Feature supported. Field Enumeration Values:
Field Access Macros: | |||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_E_END 0x1 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_LSB 19 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_MSB 19 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_WIDTH 1 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_SET_MSK 0x00080000 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_CLR_MSK 0xfff7ffff | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_RESET 0x1 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_GET(value) (((value) & 0x00080000) >> 19) | ||||||
#define | ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_SET(value) (((value) << 19) & 0x00080000) | ||||||
Field : Multi Processor Interrupt Enabled - multiprocintrpt | |||||||
Not implemented. Field Enumeration Values:
Field Access Macros: | |||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_E_DISD 0x0 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_LSB 20 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_MSB 20 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_WIDTH 1 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_SET_MSK 0x00100000 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_CLR_MSK 0xffefffff | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_RESET 0x0 | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_GET(value) (((value) & 0x00100000) >> 20) | ||||||
#define | ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_SET(value) (((value) << 20) & 0x00100000) | ||||||
Field : Non Periodic Request Queue Depth - nptxqdepth | |||||||||||||
Specifies the Non-periodic Request Queue depth, the maximum number of packets that can reside in the Non-periodic TxFIFO. In Device mode, the queue is used only in Shared FIFO Mode (Enable Dedicated Transmit FIFO for device IN Endpoints? =No). In this mode, there is one entry in the Non-periodic Request Queue for each packet in the Non-periodic TxFIFO. In Host mode, this queue holds one entry corresponding to each IN or OUT nonperiodic request. This queue is seven bits wide. Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_TWO 0x0 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_FOUR 0x1 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_EIGHT 0x2 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_LSB 22 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_MSB 23 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_WIDTH 2 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_SET_MSK 0x00c00000 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_CLR_MSK 0xff3fffff | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_RESET 0x2 | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_GET(value) (((value) & 0x00c00000) >> 22) | ||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_SET(value) (((value) << 22) & 0x00c00000) | ||||||||||||
Field : Host Mode Periodic Request Queue Depth - ptxqdepth | ||||||||||||||||
Specifies the Host mode Periodic Request Queue depth.That is, the maximum number of packets that can reside in the Host Periodic TxFIFO. This queue holds one entry corresponding to each IN or OUT periodic request. This queue is 9 bits wide. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE2 0x0 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE4 0x1 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE8 0x2 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE16 0x3 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_LSB 24 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_MSB 25 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_WIDTH 2 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_SET_MSK 0x03000000 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_CLR_MSK 0xfcffffff | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_RESET 0x0 | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_GET(value) (((value) & 0x03000000) >> 24) | |||||||||||||||
#define | ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_SET(value) (((value) << 24) & 0x03000000) | |||||||||||||||
Field : Device Mode IN Token Sequence Learning Queue Depth - tknqdepth | |
Range: 0 to 30. Field Access Macros: | |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_LSB 26 |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_MSB 30 |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_WIDTH 5 |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_SET_MSK 0x7c000000 |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_CLR_MSK 0x83ffffff |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_RESET 0x8 |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_GET(value) (((value) & 0x7c000000) >> 26) |
#define | ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_SET(value) (((value) << 26) & 0x7c000000) |
Data Structures | |
struct | ALT_USB_GLOB_GHWCFG2_s |
Macros | |
#define | ALT_USB_GLOB_GHWCFG2_OFST 0x48 |
#define | ALT_USB_GLOB_GHWCFG2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GHWCFG2_OFST)) |
Typedefs | |
typedef struct ALT_USB_GLOB_GHWCFG2_s | ALT_USB_GLOB_GHWCFG2_t |
struct ALT_USB_GLOB_GHWCFG2_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_USB_GLOB_GHWCFG2.
Data Fields | ||
---|---|---|
const uint32_t | otgmode: 3 | Mode of Operation |
const uint32_t | otgarch: 2 | Architecture |
const uint32_t | singpnt: 1 | Point-to-Point |
const uint32_t | hsphytype: 2 | High Speed PHY Interface Type |
const uint32_t | fsphytype: 2 | Full Speed PHY Interface Type |
const uint32_t | numdeveps: 4 | Number of Device Endpoints |
const uint32_t | numhstchnl: 4 | Number of Host Channels |
const uint32_t | periosupport: 1 | Periodic OUT Channels Supported in Host Mode |
const uint32_t | dynfifosizing: 1 | Dynamic FIFO Sizing Enabled |
const uint32_t | multiprocintrpt: 1 | Multi Processor Interrupt Enabled |
uint32_t | __pad0__: 1 | UNDEFINED |
const uint32_t | nptxqdepth: 2 | Non Periodic Request Queue Depth |
const uint32_t | ptxqdepth: 2 | Host Mode Periodic Request Queue Depth |
const uint32_t | tknqdepth: 5 | Device Mode IN Token Sequence Learning Queue Depth |
uint32_t | __pad1__: 1 | UNDEFINED |
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_HNPSRP 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
HNP- and SRP-Capable OTG (Host & Device
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPOTG 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
SRP-Capable OTG (Host & Device)
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NHNPNSRP 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
Non-HNP and Non-SRP Capable OTG (Host & Device)
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPCAPD 0x3 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
SRP-Capable Device
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NONOTGD 0x4 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
Non-OTG Device
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_SRPCAPH 0x5 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
SRP-Capable Host
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_E_NONOTGH 0x6 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGMOD
Non-OTG Host
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_WIDTH 3 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_SET_MSK 0x00000007 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_OTGMOD register field value.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_CLR_MSK 0xfffffff8 |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_OTGMOD register field value.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_RESET 0x0 |
The reset value of the ALT_USB_GLOB_GHWCFG2_OTGMOD register field.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_GET | ( | value | ) | (((value) & 0x00000007) >> 0) |
Extracts the ALT_USB_GLOB_GHWCFG2_OTGMOD field value from a register.
#define ALT_USB_GLOB_GHWCFG2_OTGMOD_SET | ( | value | ) | (((value) << 0) & 0x00000007) |
Produces a ALT_USB_GLOB_GHWCFG2_OTGMOD register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_E_DMAMOD 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_OTGARCH
Internal DMA
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_WIDTH 2 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_SET_MSK 0x00000018 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_OTGARCH register field value.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_CLR_MSK 0xffffffe7 |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_OTGARCH register field value.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_RESET 0x2 |
The reset value of the ALT_USB_GLOB_GHWCFG2_OTGARCH register field.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_GET | ( | value | ) | (((value) & 0x00000018) >> 3) |
Extracts the ALT_USB_GLOB_GHWCFG2_OTGARCH field value from a register.
#define ALT_USB_GLOB_GHWCFG2_OTGARCH_SET | ( | value | ) | (((value) << 3) & 0x00000018) |
Produces a ALT_USB_GLOB_GHWCFG2_OTGARCH register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_E_SINGLEPOINT 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_SINGPNT
Single-point applicatio
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_WIDTH 1 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_SET_MSK 0x00000020 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_SINGPNT register field value.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_SINGPNT register field value.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_RESET 0x0 |
The reset value of the ALT_USB_GLOB_GHWCFG2_SINGPNT register field.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_USB_GLOB_GHWCFG2_SINGPNT field value from a register.
#define ALT_USB_GLOB_GHWCFG2_SINGPNT_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_USB_GLOB_GHWCFG2_SINGPNT register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_NOHS 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_HSPHYTYPE
High-Speed interface not supported
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_E_ULPI 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_HSPHYTYPE
ULPI
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_WIDTH 2 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_SET_MSK 0x000000c0 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field value.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_CLR_MSK 0xffffff3f |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field value.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_RESET 0x2 |
The reset value of the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_GET | ( | value | ) | (((value) & 0x000000c0) >> 6) |
Extracts the ALT_USB_GLOB_GHWCFG2_HSPHYTYPE field value from a register.
#define ALT_USB_GLOB_GHWCFG2_HSPHYTYPE_SET | ( | value | ) | (((value) << 6) & 0x000000c0) |
Produces a ALT_USB_GLOB_GHWCFG2_HSPHYTYPE register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_E_FULLSPEED 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_FSPHYTYPE
ULPI Type
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_WIDTH 2 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_SET_MSK 0x00000300 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field value.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_CLR_MSK 0xfffffcff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field value.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_RESET 0x0 |
The reset value of the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_GET | ( | value | ) | (((value) & 0x00000300) >> 8) |
Extracts the ALT_USB_GLOB_GHWCFG2_FSPHYTYPE field value from a register.
#define ALT_USB_GLOB_GHWCFG2_FSPHYTYPE_SET | ( | value | ) | (((value) << 8) & 0x00000300) |
Produces a ALT_USB_GLOB_GHWCFG2_FSPHYTYPE register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT0 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 0
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT1 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 1
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT2 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 2
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT3 0x3 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 3
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT4 0x4 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 4
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT5 0x5 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 5
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT6 0x6 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 6
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT7 0x7 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 7
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT8 0x8 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 8
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT9 0x9 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 9
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT10 0xa |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 10
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT11 0xb |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 11
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT12 0xc |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 12
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT13 0xd |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 13
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT14 0xe |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 14
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_E_ENDPT15 0xf |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMDEVEPS
End point 15
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_MSB 13 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_WIDTH 4 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_SET_MSK 0x00003c00 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field value.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_CLR_MSK 0xffffc3ff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field value.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_RESET 0xf |
The reset value of the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_GET | ( | value | ) | (((value) & 0x00003c00) >> 10) |
Extracts the ALT_USB_GLOB_GHWCFG2_NUMDEVEPS field value from a register.
#define ALT_USB_GLOB_GHWCFG2_NUMDEVEPS_SET | ( | value | ) | (((value) << 10) & 0x00003c00) |
Produces a ALT_USB_GLOB_GHWCFG2_NUMDEVEPS register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH0 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 1
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH1 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 2
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH2 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 3
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH3 0x3 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 4
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH4 0x4 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 5
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH5 0x5 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 6
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH6 0x6 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 7
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH7 0x7 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 8
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH8 0x8 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 9
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH9 0x9 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 10
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH10 0xa |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 11
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH11 0xb |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 12
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH12 0xc |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 13
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH13 0xd |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 14
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH14 0xe |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 15
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_E_HOSTCH15 0xf |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL
Host Channel 16
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_LSB 14 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_WIDTH 4 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_SET_MSK 0x0003c000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field value.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_CLR_MSK 0xfffc3fff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field value.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_RESET 0xf |
The reset value of the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_GET | ( | value | ) | (((value) & 0x0003c000) >> 14) |
Extracts the ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL field value from a register.
#define ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL_SET | ( | value | ) | (((value) << 14) & 0x0003c000) |
Produces a ALT_USB_GLOB_GHWCFG2_NUMHSTCHNL register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_E_END 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT
Periodic OUT Channels Supported in Host Mode Supported
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_LSB 18 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_MSB 18 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_WIDTH 1 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_SET_MSK 0x00040000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field value.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_CLR_MSK 0xfffbffff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field value.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_RESET 0x1 |
The reset value of the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_GET | ( | value | ) | (((value) & 0x00040000) >> 18) |
Extracts the ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT field value from a register.
#define ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT_SET | ( | value | ) | (((value) << 18) & 0x00040000) |
Produces a ALT_USB_GLOB_GHWCFG2_PERIOSUPPORT register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_E_END 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING
Dynamic FIFO Sizing Enabled
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_LSB 19 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_MSB 19 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_WIDTH 1 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_SET_MSK 0x00080000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field value.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_CLR_MSK 0xfff7ffff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field value.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_RESET 0x1 |
The reset value of the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_GET | ( | value | ) | (((value) & 0x00080000) >> 19) |
Extracts the ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING field value from a register.
#define ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING_SET | ( | value | ) | (((value) << 19) & 0x00080000) |
Produces a ALT_USB_GLOB_GHWCFG2_DYNFIFOSIZING register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_E_DISD 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT
No Multi Processor Interrupt Enabled
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_LSB 20 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_MSB 20 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_WIDTH 1 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_SET_MSK 0x00100000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field value.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_CLR_MSK 0xffefffff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field value.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_RESET 0x0 |
The reset value of the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_GET | ( | value | ) | (((value) & 0x00100000) >> 20) |
Extracts the ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT field value from a register.
#define ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT_SET | ( | value | ) | (((value) << 20) & 0x00100000) |
Produces a ALT_USB_GLOB_GHWCFG2_MULTIPROCINTRPT register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_TWO 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH
Que size 2
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_FOUR 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH
Que size 4
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_E_EIGHT 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH
Que size 8
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_LSB 22 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_MSB 23 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_WIDTH 2 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_SET_MSK 0x00c00000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field value.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_CLR_MSK 0xff3fffff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field value.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_RESET 0x2 |
The reset value of the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_GET | ( | value | ) | (((value) & 0x00c00000) >> 22) |
Extracts the ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH field value from a register.
#define ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH_SET | ( | value | ) | (((value) << 22) & 0x00c00000) |
Produces a ALT_USB_GLOB_GHWCFG2_NPTXQDEPTH register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE2 0x0 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
Que Depth 2
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE4 0x1 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
Que Depth 4
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE8 0x2 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
Que Depth 8
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_E_QUE16 0x3 |
Enumerated value for register field ALT_USB_GLOB_GHWCFG2_PTXQDEPTH
Que Depth 16
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_MSB 25 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_WIDTH 2 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_SET_MSK 0x03000000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field value.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_CLR_MSK 0xfcffffff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field value.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_RESET 0x0 |
The reset value of the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_GET | ( | value | ) | (((value) & 0x03000000) >> 24) |
Extracts the ALT_USB_GLOB_GHWCFG2_PTXQDEPTH field value from a register.
#define ALT_USB_GLOB_GHWCFG2_PTXQDEPTH_SET | ( | value | ) | (((value) << 24) & 0x03000000) |
Produces a ALT_USB_GLOB_GHWCFG2_PTXQDEPTH register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_LSB 26 |
The Least Significant Bit (LSB) position of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_MSB 30 |
The Most Significant Bit (MSB) position of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_WIDTH 5 |
The width in bits of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_SET_MSK 0x7c000000 |
The mask used to set the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field value.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_CLR_MSK 0x83ffffff |
The mask used to clear the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field value.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_RESET 0x8 |
The reset value of the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_GET | ( | value | ) | (((value) & 0x7c000000) >> 26) |
Extracts the ALT_USB_GLOB_GHWCFG2_TKNQDEPTH field value from a register.
#define ALT_USB_GLOB_GHWCFG2_TKNQDEPTH_SET | ( | value | ) | (((value) << 26) & 0x7c000000) |
Produces a ALT_USB_GLOB_GHWCFG2_TKNQDEPTH register field value suitable for setting the register.
#define ALT_USB_GLOB_GHWCFG2_OFST 0x48 |
The byte offset of the ALT_USB_GLOB_GHWCFG2 register from the beginning of the component.
#define ALT_USB_GLOB_GHWCFG2_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_GLOB_GHWCFG2_OFST)) |
The address of the ALT_USB_GLOB_GHWCFG2 register.
typedef struct ALT_USB_GLOB_GHWCFG2_s ALT_USB_GLOB_GHWCFG2_t |
The typedef declaration for register ALT_USB_GLOB_GHWCFG2.