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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Instance i_io48_pin_mux_dedicated_io_grp of component ALT_PINMUX_DCTD_IO_GRP.
#define ALT_PINMUX_DCTD_IO_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_1_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_1 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_2_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_2 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_3_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_3 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_4_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_4 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_5_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_5 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_6_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_6 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_7_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_7 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_8_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_8 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_9_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_9 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_10_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_10 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_11_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_11 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_12_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_12 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_13_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_13 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_14_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_14 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_15_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_15 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_16_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_16 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_17_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_17 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_BANK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_BANK_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_BANK register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_1_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_1 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_2_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_2 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_3_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_3 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_4_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_4 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_5_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_5 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_6_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_6 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_7_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_7 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_8_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_8 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_9_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_9 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_10_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_10 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_11_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_11 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_12_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_12 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_13_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_13 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_14_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_14 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_15_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_15 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_16_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_16 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_CFG_17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + ALT_PINMUX_DCTD_IO_CFG_17_OFST)) |
The address of the ALT_PINMUX_DCTD_IO_CFG_17 register for the ALT_PINMUX_DCTD_IO_GRP instance.
#define ALT_PINMUX_DCTD_IO_GRP_OFST 0xffd07200 |
The base address byte offset for the start of the ALT_PINMUX_DCTD_IO_GRP component.
#define ALT_PINMUX_DCTD_IO_GRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_PINMUX_DCTD_IO_GRP_OFST)) |
The start address of the ALT_PINMUX_DCTD_IO_GRP component.
#define ALT_PINMUX_DCTD_IO_GRP_LB_ADDR ALT_PINMUX_DCTD_IO_GRP_ADDR |
The lower bound address range of the ALT_PINMUX_DCTD_IO_GRP component.
#define ALT_PINMUX_DCTD_IO_GRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_PINMUX_DCTD_IO_GRP_ADDR) + 0x200) - 1)) |
The upper bound address range of the ALT_PINMUX_DCTD_IO_GRP component.