Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : DERRADDRA

Description

This register shows the address of PORTA current double-bit error. RAM size will determine the maximum number of address bits.

Register Layout

Bits Access Reset Description
[6:0] RW 0x0 ALT_ECC_NANDW_DERRADDRA_ADDR
[31:7] ??? 0x0 UNDEFINED

Field : Address

Recent double-bit error address.

Field Access Macros:

#define ALT_ECC_NANDW_DERRADDRA_ADDR_LSB   0
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_MSB   6
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_WIDTH   7
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_SET_MSK   0x0000007f
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_CLR_MSK   0xffffff80
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_RESET   0x0
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_GET(value)   (((value) & 0x0000007f) >> 0)
 
#define ALT_ECC_NANDW_DERRADDRA_ADDR_SET(value)   (((value) << 0) & 0x0000007f)
 

Data Structures

struct  ALT_ECC_NANDW_DERRADDRA_s
 

Macros

#define ALT_ECC_NANDW_DERRADDRA_RESET   0x00000000
 
#define ALT_ECC_NANDW_DERRADDRA_OFST   0x2c
 

Typedefs

typedef struct
ALT_ECC_NANDW_DERRADDRA_s 
ALT_ECC_NANDW_DERRADDRA_t
 

Data Structure Documentation

struct ALT_ECC_NANDW_DERRADDRA_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_ECC_NANDW_DERRADDRA.

Data Fields
uint32_t Address: 7 ALT_ECC_NANDW_DERRADDRA_ADDR
uint32_t __pad0__: 25 UNDEFINED

Macro Definitions

#define ALT_ECC_NANDW_DERRADDRA_ADDR_LSB   0

The Least Significant Bit (LSB) position of the ALT_ECC_NANDW_DERRADDRA_ADDR register field.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_MSB   6

The Most Significant Bit (MSB) position of the ALT_ECC_NANDW_DERRADDRA_ADDR register field.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_WIDTH   7

The width in bits of the ALT_ECC_NANDW_DERRADDRA_ADDR register field.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_SET_MSK   0x0000007f

The mask used to set the ALT_ECC_NANDW_DERRADDRA_ADDR register field value.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_CLR_MSK   0xffffff80

The mask used to clear the ALT_ECC_NANDW_DERRADDRA_ADDR register field value.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_RESET   0x0

The reset value of the ALT_ECC_NANDW_DERRADDRA_ADDR register field.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_GET (   value)    (((value) & 0x0000007f) >> 0)

Extracts the ALT_ECC_NANDW_DERRADDRA_ADDR field value from a register.

#define ALT_ECC_NANDW_DERRADDRA_ADDR_SET (   value)    (((value) << 0) & 0x0000007f)

Produces a ALT_ECC_NANDW_DERRADDRA_ADDR register field value suitable for setting the register.

#define ALT_ECC_NANDW_DERRADDRA_RESET   0x00000000

The reset value of the ALT_ECC_NANDW_DERRADDRA register.

#define ALT_ECC_NANDW_DERRADDRA_OFST   0x2c

The byte offset of the ALT_ECC_NANDW_DERRADDRA register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_ECC_NANDW_DERRADDRA.