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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register has 16 bits that indicate the source of the TX_ABRT bit. Except for Bit 9, this register is cleared whenever the ic_clr_tx_abrt register or the ic_clr_intr register is read. To clear Bit 9, the source of the abrt_sbyte_norstrt must be fixed first; RESTART must be enabled (ic_con[5]=1), the special bit must be cleared (ic_tar[11]), or the gc_or_start bit must be cleared (ic_tar[10]). Once the source of the abrt_sbyte_norstrt is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the abrt_sbyte_norstrt is not fixed before attempting to clear this bit, Bit 9 clears for one cycle and is then re-asserted.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | Master Abort 7 Bit Address |
[1] | RW | 0x0 | Master Abort 10 Bit Address Byte 1 |
[2] | RW | 0x0 | Master Abort 10 Bit Address Byte 2 |
[3] | RW | 0x0 | Master Abort TX Noack Bit |
[4] | RW | 0x0 | Master Abort GC Noack Bit |
[5] | RW | 0x0 | Master Abort GC Read Bit |
[6] | RW | 0x0 | Master HS MC Ack |
[7] | RW | 0x0 | Master Abort START Byte |
[8] | RW | 0x0 | Master HS Restart Disabled |
[9] | RW | 0x0 | Master Abort START No Restart |
[10] | RW | 0x0 | Master Abort 10 Bit No Restart |
[11] | RW | 0x0 | Master Oper Master Dis |
[12] | RW | 0x0 | Master Abort Arbitration Lost |
[13] | RW | 0x0 | Slave Abort Flush TXFIFO |
[14] | RW | 0x0 | Slave Abort Arbitration Lost |
[15] | RW | 0x0 | Slave Abort Read TX |
[31:16] | ??? | 0x0 | UNDEFINED |
Field : Master Abort 7 Bit Address - abrt_7b_addr_noack | |
Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave. Role of i2c: Master-Transmitter or Master-Receiver Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_LSB 0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_MSB 0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET_MSK 0x00000001 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_CLR_MSK 0xfffffffe |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET(value) (((value) << 0) & 0x00000001) |
Field : Master Abort 10 Bit Address Byte 1 - abrt_10addr1_noack | |
Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave. Role of i2c: Master-Transmitter or Master-Receiver Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_LSB 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_MSB 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET_MSK 0x00000002 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_CLR_MSK 0xfffffffd |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET(value) (((value) << 1) & 0x00000002) |
Field : Master Abort 10 Bit Address Byte 2 - abrt_10addr2_noack | |
Master is in 10-bit address mode and the second address byte of the 10-bit address was not acknowledged by any slave. Role of i2c: Master-Transmitter or Master-Receiver Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_LSB 2 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_MSB 2 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET_MSK 0x00000004 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_CLR_MSK 0xfffffffb |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET(value) (((value) << 2) & 0x00000004) |
Field : Master Abort TX Noack Bit - abrt_txdata_noack | |
This is a master-mode only bit. Master has received an acknowledgement for the address, but when it sent data byte(s) following the address, it did not receive an acknowledge from the remote slave(s). Role of i2c: Master-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_LSB 3 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_MSB 3 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET_MSK 0x00000008 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_CLR_MSK 0xfffffff7 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET(value) (((value) << 3) & 0x00000008) |
Field : Master Abort GC Noack Bit - abrt_gcall_noack | |
i2c in master mode sent a General Call and no slave on the bus acknowledged the General Call. Role of i2c: Master-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_LSB 4 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_MSB 4 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET_MSK 0x00000010 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_CLR_MSK 0xffffffef |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET(value) (((value) << 4) & 0x00000010) |
Field : Master Abort GC Read Bit - abrt_gcall_read | |
i2c in master mode sent a General Call but the user programmed the byte following the General Call to be a read from the bus (IC_DATA_CMD[9] is set to 1). Role of i2c: Master-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_LSB 5 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_MSB 5 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET_MSK 0x00000020 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_CLR_MSK 0xffffffdf |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_GET(value) (((value) & 0x00000020) >> 5) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET(value) (((value) << 5) & 0x00000020) |
Field : Master HS MC Ack - abrt_hs_ackdet | |
Master is in High Speed mode and the High Speed Master code was acknowledged (wrong behavior). Role of i2c: Master Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_LSB 6 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_MSB 6 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET_MSK 0x00000040 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_CLR_MSK 0xffffffbf |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_GET(value) (((value) & 0x00000040) >> 6) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET(value) (((value) << 6) & 0x00000040) |
Field : Master Abort START Byte - abrt_sbyte_ackdet | |
Master has sent a START Byte and the START Byte was acknowledged (wrong behavior). Role of i2c: Master Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_LSB 7 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_MSB 7 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET_MSK 0x00000080 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_CLR_MSK 0xffffff7f |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_GET(value) (((value) & 0x00000080) >> 7) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET(value) (((value) << 7) & 0x00000080) |
Field : Master HS Restart Disabled - abrt_hs_norstrt | |
The restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =0) and the user is trying to use the master to transfer data in High Speed mode. Role of i2c: Master-Transmitter or Master-Receiver Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_LSB 8 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_MSB 8 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET_MSK 0x00000100 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_CLR_MSK 0xfffffeff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET(value) (((value) << 8) & 0x00000100) |
Field : Master Abort START No Restart - abrt_sbyte_norstrt | |
To clear Bit 9, the source of then abrt_sbyte_norstrt must be fixed first; restart must be enabled (ic_con[5]=1), the SPECIAL bit must be cleared (ic_tar[11]), or the GC_OR_START bit must be cleared (ic_tar[10]). Once the source of the abrt_sbyte_norstrt is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the abrt_sbyte_norstrt is not fixed before attempting to clear this bit, bit 9 clears for one cycle and then gets reasserted. 1: The restart is disabled (IC_RESTART_EN bit (ic_con[5]) =0) and the user is trying to send a START Byte. Role of I2C: Master Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_LSB 9 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_MSB 9 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET_MSK 0x00000200 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_CLR_MSK 0xfffffdff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_GET(value) (((value) & 0x00000200) >> 9) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET(value) (((value) << 9) & 0x00000200) |
Field : Master Abort 10 Bit No Restart - abrt_10b_rd_norstrt | |
The restart is disabled (ic_restart_en bit (ic_con[5]) =0) and the master sends a read command in 10-bit addressing mode. Role of I2C: Master-Receiver Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_LSB 10 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_MSB 10 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET_MSK 0x00000400 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_CLR_MSK 0xfffffbff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_GET(value) (((value) & 0x00000400) >> 10) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET(value) (((value) << 10) & 0x00000400) |
Field : Master Oper Master Dis - abrt_master_dis | |
User tries to initiate a Master operation with the Master mode disabled. Role of I2C: Master-Transmitter or Master-Receiver Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_LSB 11 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_MSB 11 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET_MSK 0x00000800 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_CLR_MSK 0xfffff7ff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_GET(value) (((value) & 0x00000800) >> 11) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET(value) (((value) << 11) & 0x00000800) |
Field : Master Abort Arbitration Lost - arb_lost | |
Master has lost arbitration, or if IC_TX_ABRT_SOURCE[14] is also set, then the slave transmitter has lost arbitration. Note: I2C can be both master and slave at the same time. Role of i2c: Master-Transmitter or Slave-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_LSB 12 |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_MSB 12 |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET_MSK 0x00001000 |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_CLR_MSK 0xffffefff |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_GET(value) (((value) & 0x00001000) >> 12) |
#define | ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET(value) (((value) << 12) & 0x00001000) |
Field : Slave Abort Flush TXFIFO - abrt_slvflush_txfifo | |
Slave has received a read command and some data exists in the TX FIFO so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO. Role of I2C: Slave-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_LSB 13 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_MSB 13 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET_MSK 0x00002000 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_CLR_MSK 0xffffdfff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_GET(value) (((value) & 0x00002000) >> 13) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET(value) (((value) << 13) & 0x00002000) |
Field : Slave Abort Arbitration Lost - abrt_slv_arblost | |
Slave lost the bus while transmitting data to a remote master. IC_TX_ABRT_SOURCE[12] is set at the same time. Note: Even though the slave never 'owns' the bus, something could go wrong on the bus. This is a fail safe check. For instance, during a data transmission at the low-to-high transition of SCL, if what is on the data bus is not what is supposed to be transmitted, then i2c no longer own the bus. Role of I2C: Slave-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_LSB 14 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_MSB 14 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET_MSK 0x00004000 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_CLR_MSK 0xffffbfff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_GET(value) (((value) & 0x00004000) >> 14) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET(value) (((value) << 14) & 0x00004000) |
Field : Slave Abort Read TX - abrt_slvrd_intx | |
When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes a 1 in CMD (bit 8) of IC_DATA_CMD register. Role of I2C: Slave-Transmitter Field Access Macros: | |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_LSB 15 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_MSB 15 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_WIDTH 1 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET_MSK 0x00008000 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_CLR_MSK 0xffff7fff |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_RESET 0x0 |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_GET(value) (((value) & 0x00008000) >> 15) |
#define | ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET(value) (((value) << 15) & 0x00008000) |
Data Structures | |
struct | ALT_I2C_TX_ABRT_SRC_s |
Macros | |
#define | ALT_I2C_TX_ABRT_SRC_OFST 0x80 |
#define | ALT_I2C_TX_ABRT_SRC_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TX_ABRT_SRC_OFST)) |
Typedefs | |
typedef struct ALT_I2C_TX_ABRT_SRC_s | ALT_I2C_TX_ABRT_SRC_t |
struct ALT_I2C_TX_ABRT_SRC_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_I2C_TX_ABRT_SRC.
Data Fields | ||
---|---|---|
uint32_t | abrt_7b_addr_noack: 1 | Master Abort 7 Bit Address |
uint32_t | abrt_10addr1_noack: 1 | Master Abort 10 Bit Address Byte 1 |
uint32_t | abrt_10addr2_noack: 1 | Master Abort 10 Bit Address Byte 2 |
uint32_t | abrt_txdata_noack: 1 | Master Abort TX Noack Bit |
uint32_t | abrt_gcall_noack: 1 | Master Abort GC Noack Bit |
uint32_t | abrt_gcall_read: 1 | Master Abort GC Read Bit |
uint32_t | abrt_hs_ackdet: 1 | Master HS MC Ack |
uint32_t | abrt_sbyte_ackdet: 1 | Master Abort START Byte |
uint32_t | abrt_hs_norstrt: 1 | Master HS Restart Disabled |
uint32_t | abrt_sbyte_norstrt: 1 | Master Abort START No Restart |
uint32_t | abrt_10b_rd_norstrt: 1 | Master Abort 10 Bit No Restart |
uint32_t | abrt_master_dis: 1 | Master Oper Master Dis |
uint32_t | arb_lost: 1 | Master Abort Arbitration Lost |
uint32_t | abrt_slvflush_txfifo: 1 | Slave Abort Flush TXFIFO |
uint32_t | abrt_slv_arblost: 1 | Slave Abort Arbitration Lost |
uint32_t | abrt_slvrd_intx: 1 | Slave Abort Read TX |
uint32_t | __pad0__: 16 | UNDEFINED |
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET_MSK 0x00000001 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET_MSK 0x00000002 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET_MSK 0x00000004 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET_MSK 0x00000008 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET_MSK 0x00000010 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_CLR_MSK 0xffffffef |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET_MSK 0x00000020 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET_MSK 0x00000040 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET_MSK 0x00000080 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET_MSK 0x00000100 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET_MSK 0x00000200 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET_MSK 0x00000400 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET_MSK 0x00000800 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_LSB 12 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ARB_LOST register field.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_MSB 12 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ARB_LOST register field.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ARB_LOST register field.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET_MSK 0x00001000 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ARB_LOST register field value.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_CLR_MSK 0xffffefff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ARB_LOST register field value.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ARB_LOST register field.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_GET | ( | value | ) | (((value) & 0x00001000) >> 12) |
Extracts the ALT_I2C_TX_ABRT_SRC_ARB_LOST field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET | ( | value | ) | (((value) << 12) & 0x00001000) |
Produces a ALT_I2C_TX_ABRT_SRC_ARB_LOST register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_LSB 13 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_MSB 13 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET_MSK 0x00002000 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_CLR_MSK 0xffffdfff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_GET | ( | value | ) | (((value) & 0x00002000) >> 13) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET | ( | value | ) | (((value) << 13) & 0x00002000) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_LSB 14 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_MSB 14 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET_MSK 0x00004000 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_CLR_MSK 0xffffbfff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_GET | ( | value | ) | (((value) & 0x00004000) >> 14) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET | ( | value | ) | (((value) << 14) & 0x00004000) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_LSB 15 |
The Least Significant Bit (LSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_WIDTH 1 |
The width in bits of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET_MSK 0x00008000 |
The mask used to set the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_CLR_MSK 0xffff7fff |
The mask used to clear the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field value.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_RESET 0x0 |
The reset value of the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_GET | ( | value | ) | (((value) & 0x00008000) >> 15) |
Extracts the ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX field value from a register.
#define ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET | ( | value | ) | (((value) << 15) & 0x00008000) |
Produces a ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX register field value suitable for setting the register.
#define ALT_I2C_TX_ABRT_SRC_OFST 0x80 |
The byte offset of the ALT_I2C_TX_ABRT_SRC register from the beginning of the component.
#define ALT_I2C_TX_ABRT_SRC_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TX_ABRT_SRC_OFST)) |
The address of the ALT_I2C_TX_ABRT_SRC register.
typedef struct ALT_I2C_TX_ABRT_SRC_s ALT_I2C_TX_ABRT_SRC_t |
The typedef declaration for register ALT_I2C_TX_ABRT_SRC.