SPI master controllers can configure a delay in the sample time of the rxd signal in order to increase the maximum achievable frequency on the serial bus.
The delay value specifies an additional amount of delay applied to the rxd sample, in number of spi_m_clk clock cycles, up to ALT_SPI_RXD_SAMPLE_DELAY_MAX cycles.
The functions in this group only apply to SPI master controllers.
#define ALT_SPI_RXD_SAMPLE_DELAY_MAX 4 |
The maximum number of clock cycles that can be used to delay the sampling of the rxd input signal.
ALT_STATUS_CODE alt_spi_rx_sample_delay_get |
( |
ALT_SPI_DEV_t * |
spi_dev, |
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|
uint32_t * |
delay |
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) |
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Get the configured Rx sample delay value.
- Parameters
-
spi_dev | A pointer to the SPI controller device block instance. |
delay | [out] The configured Rx sample delay in spi_m_clk clock cycles for the rxd signal. |
- Return values
-
ALT_E_SUCCESS | Successful status. |
ALT_E_ERROR | Details about error status code |
ALT_STATUS_CODE alt_spi_rx_sample_delay_set |
( |
ALT_SPI_DEV_t * |
spi_dev, |
|
|
const uint32_t |
delay |
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) |
| |
Set the configured Rx sample delay value.
- Parameters
-
spi_dev | A pointer to the SPI controller device block instance. |
delay | The desired Rx sample delay in spi_m_clk clock cycles for the rxd signal. Must be in the range 0 .. ALT_SPI_RXD_SAMPLE_DELAY_MAX. |
- Return values
-
ALT_E_SUCCESS | Successful status. |
ALT_E_ERROR | Details about error status code |