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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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The PER1MODRST register is used by software to trigger module resets for Slow Peripheral Group. Software explicitly asserts and de-asserts module reset signals by writing bits in the appropriate *MODRST register. It is up to software to ensure module reset signals are asserted for the appropriate length of time and are de-asserted in the correct order. It is also up to software to not assert a module reset signal that would prevent software from de-asserting the module reset signal. For example, software should not assert the module reset to the CPU executing the software.
Software writes a bit to 1 to assert the module reset signal and to 0 to de- assert the module reset signal.
All fields are reset by a cold reset.All fields are also reset by a warm reset if not masked by the corresponding PERWARMMASK field.
The reset value of all fields is 1. This holds the corresponding module in reset until software is ready to release the module from reset by writing 0 to its field.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x1 | Watch Dog0 |
[1] | RW | 0x1 | Watch Dog1 |
[2] | RW | 0x1 | l4systimer0 |
[3] | RW | 0x1 | l4sys_timer1 |
[4] | RW | 0x1 | SP Timer 0 |
[5] | RW | 0x1 | SP Timer 1 |
[7:6] | ??? | 0x0 | UNDEFINED |
[8] | RW | 0x1 | I2C0 |
[9] | RW | 0x1 | I2C1 |
[10] | RW | 0x1 | I2C2 |
[11] | RW | 0x1 | I2C3 |
[12] | RW | 0x1 | I2C4 |
[15:13] | ??? | 0x0 | UNDEFINED |
[16] | RW | 0x1 | UART0 |
[17] | RW | 0x1 | UART1 |
[23:18] | ??? | 0x0 | UNDEFINED |
[24] | RW | 0x1 | GPIO0 |
[25] | RW | 0x1 | GPIO1 |
[26] | RW | 0x1 | GPIO2 |
[31:27] | ??? | 0x0 | UNDEFINED |
Field : Watch Dog0 - watchdog0 | |
Resets Watchdog 0 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_WD0_LSB 0 |
#define | ALT_RSTMGR_PER1MODRST_WD0_MSB 0 |
#define | ALT_RSTMGR_PER1MODRST_WD0_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_WD0_SET_MSK 0x00000001 |
#define | ALT_RSTMGR_PER1MODRST_WD0_CLR_MSK 0xfffffffe |
#define | ALT_RSTMGR_PER1MODRST_WD0_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_WD0_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_RSTMGR_PER1MODRST_WD0_SET(value) (((value) << 0) & 0x00000001) |
Field : Watch Dog1 - watchdog1 | |
Resets Watchdog 1 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_WD1_LSB 1 |
#define | ALT_RSTMGR_PER1MODRST_WD1_MSB 1 |
#define | ALT_RSTMGR_PER1MODRST_WD1_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_WD1_SET_MSK 0x00000002 |
#define | ALT_RSTMGR_PER1MODRST_WD1_CLR_MSK 0xfffffffd |
#define | ALT_RSTMGR_PER1MODRST_WD1_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_WD1_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_RSTMGR_PER1MODRST_WD1_SET(value) (((value) << 1) & 0x00000002) |
Field : l4systimer0 - l4systimer0 | |
Resets l4sys_timer0 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_LSB 2 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_MSB 2 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_SET_MSK 0x00000004 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_CLR_MSK 0xfffffffb |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR0_SET(value) (((value) << 2) & 0x00000004) |
Field : l4sys_timer1 - l4systimer1 | |
Resets l4sys_timer1 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_LSB 3 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_MSB 3 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_SET_MSK 0x00000008 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_CLR_MSK 0xfffffff7 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_RSTMGR_PER1MODRST_L4SYSTMR1_SET(value) (((value) << 3) & 0x00000008) |
Field : SP Timer 0 - sptimer0 | |
Resets SP timer 0 connected to L4 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_LSB 4 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_MSB 4 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_SET_MSK 0x00000010 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_CLR_MSK 0xffffffef |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_RSTMGR_PER1MODRST_SPTMR0_SET(value) (((value) << 4) & 0x00000010) |
Field : SP Timer 1 - sptimer1 | |
Resets SP timer 1 connected to L4 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_LSB 5 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_MSB 5 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_SET_MSK 0x00000020 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_CLR_MSK 0xffffffdf |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_GET(value) (((value) & 0x00000020) >> 5) |
#define | ALT_RSTMGR_PER1MODRST_SPTMR1_SET(value) (((value) << 5) & 0x00000020) |
Field : I2C0 - i2c0 | |
Resets I2C0 controller Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_I2C0_LSB 8 |
#define | ALT_RSTMGR_PER1MODRST_I2C0_MSB 8 |
#define | ALT_RSTMGR_PER1MODRST_I2C0_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_I2C0_SET_MSK 0x00000100 |
#define | ALT_RSTMGR_PER1MODRST_I2C0_CLR_MSK 0xfffffeff |
#define | ALT_RSTMGR_PER1MODRST_I2C0_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_I2C0_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_RSTMGR_PER1MODRST_I2C0_SET(value) (((value) << 8) & 0x00000100) |
Field : I2C1 - i2c1 | |
Resets I2C1 controller Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_I2C1_LSB 9 |
#define | ALT_RSTMGR_PER1MODRST_I2C1_MSB 9 |
#define | ALT_RSTMGR_PER1MODRST_I2C1_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_I2C1_SET_MSK 0x00000200 |
#define | ALT_RSTMGR_PER1MODRST_I2C1_CLR_MSK 0xfffffdff |
#define | ALT_RSTMGR_PER1MODRST_I2C1_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_I2C1_GET(value) (((value) & 0x00000200) >> 9) |
#define | ALT_RSTMGR_PER1MODRST_I2C1_SET(value) (((value) << 9) & 0x00000200) |
Field : I2C2 - i2c2 | |
Resets I2C2 controller Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_I2C2_LSB 10 |
#define | ALT_RSTMGR_PER1MODRST_I2C2_MSB 10 |
#define | ALT_RSTMGR_PER1MODRST_I2C2_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_I2C2_SET_MSK 0x00000400 |
#define | ALT_RSTMGR_PER1MODRST_I2C2_CLR_MSK 0xfffffbff |
#define | ALT_RSTMGR_PER1MODRST_I2C2_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_I2C2_GET(value) (((value) & 0x00000400) >> 10) |
#define | ALT_RSTMGR_PER1MODRST_I2C2_SET(value) (((value) << 10) & 0x00000400) |
Field : I2C3 - i2c3 | |
Resets I2C3 controller Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_I2C3_LSB 11 |
#define | ALT_RSTMGR_PER1MODRST_I2C3_MSB 11 |
#define | ALT_RSTMGR_PER1MODRST_I2C3_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_I2C3_SET_MSK 0x00000800 |
#define | ALT_RSTMGR_PER1MODRST_I2C3_CLR_MSK 0xfffff7ff |
#define | ALT_RSTMGR_PER1MODRST_I2C3_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_I2C3_GET(value) (((value) & 0x00000800) >> 11) |
#define | ALT_RSTMGR_PER1MODRST_I2C3_SET(value) (((value) << 11) & 0x00000800) |
Field : I2C4 - i2c4 | |
Resets I2C4 controller Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_I2C4_LSB 12 |
#define | ALT_RSTMGR_PER1MODRST_I2C4_MSB 12 |
#define | ALT_RSTMGR_PER1MODRST_I2C4_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_I2C4_SET_MSK 0x00001000 |
#define | ALT_RSTMGR_PER1MODRST_I2C4_CLR_MSK 0xffffefff |
#define | ALT_RSTMGR_PER1MODRST_I2C4_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_I2C4_GET(value) (((value) & 0x00001000) >> 12) |
#define | ALT_RSTMGR_PER1MODRST_I2C4_SET(value) (((value) << 12) & 0x00001000) |
Field : UART0 - uart0 | |
Resets UART0 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_UART0_LSB 16 |
#define | ALT_RSTMGR_PER1MODRST_UART0_MSB 16 |
#define | ALT_RSTMGR_PER1MODRST_UART0_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_UART0_SET_MSK 0x00010000 |
#define | ALT_RSTMGR_PER1MODRST_UART0_CLR_MSK 0xfffeffff |
#define | ALT_RSTMGR_PER1MODRST_UART0_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_UART0_GET(value) (((value) & 0x00010000) >> 16) |
#define | ALT_RSTMGR_PER1MODRST_UART0_SET(value) (((value) << 16) & 0x00010000) |
Field : UART1 - uart1 | |
Resets UART1 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_UART1_LSB 17 |
#define | ALT_RSTMGR_PER1MODRST_UART1_MSB 17 |
#define | ALT_RSTMGR_PER1MODRST_UART1_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_UART1_SET_MSK 0x00020000 |
#define | ALT_RSTMGR_PER1MODRST_UART1_CLR_MSK 0xfffdffff |
#define | ALT_RSTMGR_PER1MODRST_UART1_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_UART1_GET(value) (((value) & 0x00020000) >> 17) |
#define | ALT_RSTMGR_PER1MODRST_UART1_SET(value) (((value) << 17) & 0x00020000) |
Field : GPIO0 - gpio0 | |
Resets GPIO0 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_LSB 24 |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_MSB 24 |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_SET_MSK 0x01000000 |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_CLR_MSK 0xfeffffff |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_GET(value) (((value) & 0x01000000) >> 24) |
#define | ALT_RSTMGR_PER1MODRST_GPIO0_SET(value) (((value) << 24) & 0x01000000) |
Field : GPIO1 - gpio1 | |
Resets GPIO1 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_LSB 25 |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_MSB 25 |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_SET_MSK 0x02000000 |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_CLR_MSK 0xfdffffff |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_GET(value) (((value) & 0x02000000) >> 25) |
#define | ALT_RSTMGR_PER1MODRST_GPIO1_SET(value) (((value) << 25) & 0x02000000) |
Field : GPIO2 - gpio2 | |
Resets GPIO2 Field Access Macros: | |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_LSB 26 |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_MSB 26 |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_WIDTH 1 |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_SET_MSK 0x04000000 |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_CLR_MSK 0xfbffffff |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_RESET 0x1 |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_GET(value) (((value) & 0x04000000) >> 26) |
#define | ALT_RSTMGR_PER1MODRST_GPIO2_SET(value) (((value) << 26) & 0x04000000) |
Data Structures | |
struct | ALT_RSTMGR_PER1MODRST_s |
Macros | |
#define | ALT_RSTMGR_PER1MODRST_RESET 0x07031f3f |
#define | ALT_RSTMGR_PER1MODRST_OFST 0x28 |
Typedefs | |
typedef struct ALT_RSTMGR_PER1MODRST_s | ALT_RSTMGR_PER1MODRST_t |
struct ALT_RSTMGR_PER1MODRST_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_RSTMGR_PER1MODRST.
Data Fields | ||
---|---|---|
uint32_t | watchdog0: 1 | Watch Dog0 |
uint32_t | watchdog1: 1 | Watch Dog1 |
uint32_t | l4systimer0: 1 | l4systimer0 |
uint32_t | l4systimer1: 1 | l4sys_timer1 |
uint32_t | sptimer0: 1 | SP Timer 0 |
uint32_t | sptimer1: 1 | SP Timer 1 |
uint32_t | __pad0__: 2 | UNDEFINED |
uint32_t | i2c0: 1 | I2C0 |
uint32_t | i2c1: 1 | I2C1 |
uint32_t | i2c2: 1 | I2C2 |
uint32_t | i2c3: 1 | I2C3 |
uint32_t | i2c4: 1 | I2C4 |
uint32_t | __pad1__: 3 | UNDEFINED |
uint32_t | uart0: 1 | UART0 |
uint32_t | uart1: 1 | UART1 |
uint32_t | __pad2__: 6 | UNDEFINED |
uint32_t | gpio0: 1 | GPIO0 |
uint32_t | gpio1: 1 | GPIO1 |
uint32_t | gpio2: 1 | GPIO2 |
uint32_t | __pad3__: 5 | UNDEFINED |
#define ALT_RSTMGR_PER1MODRST_WD0_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_WD0 register field.
#define ALT_RSTMGR_PER1MODRST_WD0_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_WD0 register field.
#define ALT_RSTMGR_PER1MODRST_WD0_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_WD0 register field.
#define ALT_RSTMGR_PER1MODRST_WD0_SET_MSK 0x00000001 |
The mask used to set the ALT_RSTMGR_PER1MODRST_WD0 register field value.
#define ALT_RSTMGR_PER1MODRST_WD0_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_RSTMGR_PER1MODRST_WD0 register field value.
#define ALT_RSTMGR_PER1MODRST_WD0_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_WD0 register field.
#define ALT_RSTMGR_PER1MODRST_WD0_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_RSTMGR_PER1MODRST_WD0 field value from a register.
#define ALT_RSTMGR_PER1MODRST_WD0_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_RSTMGR_PER1MODRST_WD0 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_WD1_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_WD1 register field.
#define ALT_RSTMGR_PER1MODRST_WD1_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_WD1 register field.
#define ALT_RSTMGR_PER1MODRST_WD1_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_WD1 register field.
#define ALT_RSTMGR_PER1MODRST_WD1_SET_MSK 0x00000002 |
The mask used to set the ALT_RSTMGR_PER1MODRST_WD1 register field value.
#define ALT_RSTMGR_PER1MODRST_WD1_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_RSTMGR_PER1MODRST_WD1 register field value.
#define ALT_RSTMGR_PER1MODRST_WD1_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_WD1 register field.
#define ALT_RSTMGR_PER1MODRST_WD1_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_RSTMGR_PER1MODRST_WD1 field value from a register.
#define ALT_RSTMGR_PER1MODRST_WD1_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_RSTMGR_PER1MODRST_WD1 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_SET_MSK 0x00000004 |
The mask used to set the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field value.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field value.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_RSTMGR_PER1MODRST_L4SYSTMR0 field value from a register.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR0_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_RSTMGR_PER1MODRST_L4SYSTMR0 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_SET_MSK 0x00000008 |
The mask used to set the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field value.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field value.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_RSTMGR_PER1MODRST_L4SYSTMR1 field value from a register.
#define ALT_RSTMGR_PER1MODRST_L4SYSTMR1_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_RSTMGR_PER1MODRST_L4SYSTMR1 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_SPTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_SPTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_SPTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_SET_MSK 0x00000010 |
The mask used to set the ALT_RSTMGR_PER1MODRST_SPTMR0 register field value.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_CLR_MSK 0xffffffef |
The mask used to clear the ALT_RSTMGR_PER1MODRST_SPTMR0 register field value.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_SPTMR0 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_RSTMGR_PER1MODRST_SPTMR0 field value from a register.
#define ALT_RSTMGR_PER1MODRST_SPTMR0_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_RSTMGR_PER1MODRST_SPTMR0 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_SPTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_SPTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_SPTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_SET_MSK 0x00000020 |
The mask used to set the ALT_RSTMGR_PER1MODRST_SPTMR1 register field value.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_RSTMGR_PER1MODRST_SPTMR1 register field value.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_SPTMR1 register field.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_RSTMGR_PER1MODRST_SPTMR1 field value from a register.
#define ALT_RSTMGR_PER1MODRST_SPTMR1_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_RSTMGR_PER1MODRST_SPTMR1 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_I2C0_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_I2C0 register field.
#define ALT_RSTMGR_PER1MODRST_I2C0_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_I2C0 register field.
#define ALT_RSTMGR_PER1MODRST_I2C0_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_I2C0 register field.
#define ALT_RSTMGR_PER1MODRST_I2C0_SET_MSK 0x00000100 |
The mask used to set the ALT_RSTMGR_PER1MODRST_I2C0 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C0_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_I2C0 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C0_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_I2C0 register field.
#define ALT_RSTMGR_PER1MODRST_I2C0_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_RSTMGR_PER1MODRST_I2C0 field value from a register.
#define ALT_RSTMGR_PER1MODRST_I2C0_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_RSTMGR_PER1MODRST_I2C0 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_I2C1_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_I2C1 register field.
#define ALT_RSTMGR_PER1MODRST_I2C1_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_I2C1 register field.
#define ALT_RSTMGR_PER1MODRST_I2C1_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_I2C1 register field.
#define ALT_RSTMGR_PER1MODRST_I2C1_SET_MSK 0x00000200 |
The mask used to set the ALT_RSTMGR_PER1MODRST_I2C1 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C1_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_I2C1 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C1_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_I2C1 register field.
#define ALT_RSTMGR_PER1MODRST_I2C1_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_RSTMGR_PER1MODRST_I2C1 field value from a register.
#define ALT_RSTMGR_PER1MODRST_I2C1_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_RSTMGR_PER1MODRST_I2C1 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_I2C2_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_I2C2 register field.
#define ALT_RSTMGR_PER1MODRST_I2C2_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_I2C2 register field.
#define ALT_RSTMGR_PER1MODRST_I2C2_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_I2C2 register field.
#define ALT_RSTMGR_PER1MODRST_I2C2_SET_MSK 0x00000400 |
The mask used to set the ALT_RSTMGR_PER1MODRST_I2C2 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C2_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_I2C2 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C2_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_I2C2 register field.
#define ALT_RSTMGR_PER1MODRST_I2C2_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_RSTMGR_PER1MODRST_I2C2 field value from a register.
#define ALT_RSTMGR_PER1MODRST_I2C2_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_RSTMGR_PER1MODRST_I2C2 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_I2C3_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_I2C3 register field.
#define ALT_RSTMGR_PER1MODRST_I2C3_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_I2C3 register field.
#define ALT_RSTMGR_PER1MODRST_I2C3_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_I2C3 register field.
#define ALT_RSTMGR_PER1MODRST_I2C3_SET_MSK 0x00000800 |
The mask used to set the ALT_RSTMGR_PER1MODRST_I2C3 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C3_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_I2C3 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C3_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_I2C3 register field.
#define ALT_RSTMGR_PER1MODRST_I2C3_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_RSTMGR_PER1MODRST_I2C3 field value from a register.
#define ALT_RSTMGR_PER1MODRST_I2C3_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_RSTMGR_PER1MODRST_I2C3 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_I2C4_LSB 12 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_I2C4 register field.
#define ALT_RSTMGR_PER1MODRST_I2C4_MSB 12 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_I2C4 register field.
#define ALT_RSTMGR_PER1MODRST_I2C4_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_I2C4 register field.
#define ALT_RSTMGR_PER1MODRST_I2C4_SET_MSK 0x00001000 |
The mask used to set the ALT_RSTMGR_PER1MODRST_I2C4 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C4_CLR_MSK 0xffffefff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_I2C4 register field value.
#define ALT_RSTMGR_PER1MODRST_I2C4_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_I2C4 register field.
#define ALT_RSTMGR_PER1MODRST_I2C4_GET | ( | value | ) | (((value) & 0x00001000) >> 12) |
Extracts the ALT_RSTMGR_PER1MODRST_I2C4 field value from a register.
#define ALT_RSTMGR_PER1MODRST_I2C4_SET | ( | value | ) | (((value) << 12) & 0x00001000) |
Produces a ALT_RSTMGR_PER1MODRST_I2C4 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_UART0_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_UART0 register field.
#define ALT_RSTMGR_PER1MODRST_UART0_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_UART0 register field.
#define ALT_RSTMGR_PER1MODRST_UART0_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_UART0 register field.
#define ALT_RSTMGR_PER1MODRST_UART0_SET_MSK 0x00010000 |
The mask used to set the ALT_RSTMGR_PER1MODRST_UART0 register field value.
#define ALT_RSTMGR_PER1MODRST_UART0_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_UART0 register field value.
#define ALT_RSTMGR_PER1MODRST_UART0_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_UART0 register field.
#define ALT_RSTMGR_PER1MODRST_UART0_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_RSTMGR_PER1MODRST_UART0 field value from a register.
#define ALT_RSTMGR_PER1MODRST_UART0_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_RSTMGR_PER1MODRST_UART0 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_UART1_LSB 17 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_UART1 register field.
#define ALT_RSTMGR_PER1MODRST_UART1_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_UART1 register field.
#define ALT_RSTMGR_PER1MODRST_UART1_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_UART1 register field.
#define ALT_RSTMGR_PER1MODRST_UART1_SET_MSK 0x00020000 |
The mask used to set the ALT_RSTMGR_PER1MODRST_UART1 register field value.
#define ALT_RSTMGR_PER1MODRST_UART1_CLR_MSK 0xfffdffff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_UART1 register field value.
#define ALT_RSTMGR_PER1MODRST_UART1_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_UART1 register field.
#define ALT_RSTMGR_PER1MODRST_UART1_GET | ( | value | ) | (((value) & 0x00020000) >> 17) |
Extracts the ALT_RSTMGR_PER1MODRST_UART1 field value from a register.
#define ALT_RSTMGR_PER1MODRST_UART1_SET | ( | value | ) | (((value) << 17) & 0x00020000) |
Produces a ALT_RSTMGR_PER1MODRST_UART1 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_GPIO0_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_GPIO0 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO0_MSB 24 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_GPIO0 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO0_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_GPIO0 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO0_SET_MSK 0x01000000 |
The mask used to set the ALT_RSTMGR_PER1MODRST_GPIO0 register field value.
#define ALT_RSTMGR_PER1MODRST_GPIO0_CLR_MSK 0xfeffffff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_GPIO0 register field value.
#define ALT_RSTMGR_PER1MODRST_GPIO0_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_GPIO0 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO0_GET | ( | value | ) | (((value) & 0x01000000) >> 24) |
Extracts the ALT_RSTMGR_PER1MODRST_GPIO0 field value from a register.
#define ALT_RSTMGR_PER1MODRST_GPIO0_SET | ( | value | ) | (((value) << 24) & 0x01000000) |
Produces a ALT_RSTMGR_PER1MODRST_GPIO0 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_GPIO1_LSB 25 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_GPIO1 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO1_MSB 25 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_GPIO1 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO1_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_GPIO1 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO1_SET_MSK 0x02000000 |
The mask used to set the ALT_RSTMGR_PER1MODRST_GPIO1 register field value.
#define ALT_RSTMGR_PER1MODRST_GPIO1_CLR_MSK 0xfdffffff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_GPIO1 register field value.
#define ALT_RSTMGR_PER1MODRST_GPIO1_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_GPIO1 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO1_GET | ( | value | ) | (((value) & 0x02000000) >> 25) |
Extracts the ALT_RSTMGR_PER1MODRST_GPIO1 field value from a register.
#define ALT_RSTMGR_PER1MODRST_GPIO1_SET | ( | value | ) | (((value) << 25) & 0x02000000) |
Produces a ALT_RSTMGR_PER1MODRST_GPIO1 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_GPIO2_LSB 26 |
The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER1MODRST_GPIO2 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO2_MSB 26 |
The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER1MODRST_GPIO2 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO2_WIDTH 1 |
The width in bits of the ALT_RSTMGR_PER1MODRST_GPIO2 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO2_SET_MSK 0x04000000 |
The mask used to set the ALT_RSTMGR_PER1MODRST_GPIO2 register field value.
#define ALT_RSTMGR_PER1MODRST_GPIO2_CLR_MSK 0xfbffffff |
The mask used to clear the ALT_RSTMGR_PER1MODRST_GPIO2 register field value.
#define ALT_RSTMGR_PER1MODRST_GPIO2_RESET 0x1 |
The reset value of the ALT_RSTMGR_PER1MODRST_GPIO2 register field.
#define ALT_RSTMGR_PER1MODRST_GPIO2_GET | ( | value | ) | (((value) & 0x04000000) >> 26) |
Extracts the ALT_RSTMGR_PER1MODRST_GPIO2 field value from a register.
#define ALT_RSTMGR_PER1MODRST_GPIO2_SET | ( | value | ) | (((value) << 26) & 0x04000000) |
Produces a ALT_RSTMGR_PER1MODRST_GPIO2 register field value suitable for setting the register.
#define ALT_RSTMGR_PER1MODRST_RESET 0x07031f3f |
The reset value of the ALT_RSTMGR_PER1MODRST register.
#define ALT_RSTMGR_PER1MODRST_OFST 0x28 |
The byte offset of the ALT_RSTMGR_PER1MODRST register from the beginning of the component.
typedef struct ALT_RSTMGR_PER1MODRST_s ALT_RSTMGR_PER1MODRST_t |
The typedef declaration for register ALT_RSTMGR_PER1MODRST.