Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : soc2fpga

Description

Per-Master Security bit for SOC2FPGA

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_MPU_M0
[7:1] ??? 0x0 UNDEFINED
[8] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_DMA
[16:9] ??? 0x0 UNDEFINED
[17] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_EMAC0
[18] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_EMAC1
[19] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_EMAC2
[20] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_USB0
[21] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_USB1
[22] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_SDMMC
[23] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_NAND
[24] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_AHB_AP
[25] RW 0x0 ALT_NOC_FW_H2F_SCR_H2F_ETR
[31:26] ??? 0x0 UNDEFINED

Field : mpu_m0

Security bit configuration for transactions from mpu0 to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_LSB   0
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_MSB   0
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET_MSK   0x00000001
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_CLR_MSK   0xfffffffe
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET(value)   (((value) << 0) & 0x00000001)
 

Field : dma

Security bit configuration for transactions from dma to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_LSB   8
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_MSB   8
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET_MSK   0x00000100
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_CLR_MSK   0xfffffeff
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET(value)   (((value) << 8) & 0x00000100)
 

Field : emac0

Security bit configuration for transactions from emac0 to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_LSB   17
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_MSB   17
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET_MSK   0x00020000
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_CLR_MSK   0xfffdffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_GET(value)   (((value) & 0x00020000) >> 17)
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET(value)   (((value) << 17) & 0x00020000)
 

Field : emac1

Security bit configuration for transactions from emac1 to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_LSB   18
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_MSB   18
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET_MSK   0x00040000
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_CLR_MSK   0xfffbffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_GET(value)   (((value) & 0x00040000) >> 18)
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET(value)   (((value) << 18) & 0x00040000)
 

Field : emac2

Security bit configuration for transactions from emac2 to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_LSB   19
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_MSB   19
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET_MSK   0x00080000
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_CLR_MSK   0xfff7ffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_GET(value)   (((value) & 0x00080000) >> 19)
 
#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET(value)   (((value) << 19) & 0x00080000)
 

Field : usb0

Security bit configuration for transactions from usb0 to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_LSB   20
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_MSB   20
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET_MSK   0x00100000
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_CLR_MSK   0xffefffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_GET(value)   (((value) & 0x00100000) >> 20)
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET(value)   (((value) << 20) & 0x00100000)
 

Field : usb1

Security bit configuration for transactions from usb1 to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_LSB   21
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_MSB   21
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET_MSK   0x00200000
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_CLR_MSK   0xffdfffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_GET(value)   (((value) & 0x00200000) >> 21)
 
#define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET(value)   (((value) << 21) & 0x00200000)
 

Field : sdmmc

Security bit configuration for transactions from sdmmc to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_LSB   22
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_MSB   22
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET_MSK   0x00400000
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_CLR_MSK   0xffbfffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_GET(value)   (((value) & 0x00400000) >> 22)
 
#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET(value)   (((value) << 22) & 0x00400000)
 

Field : nand

Security bit configuration for transactions from nand to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_LSB   23
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_MSB   23
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET_MSK   0x00800000
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_CLR_MSK   0xff7fffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_GET(value)   (((value) & 0x00800000) >> 23)
 
#define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET(value)   (((value) << 23) & 0x00800000)
 

Field : ahb_ap

Security bit configuration for transactions from ahb_ap to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non-Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_LSB   24
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_MSB   24
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET_MSK   0x01000000
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_CLR_MSK   0xfeffffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET(value)   (((value) << 24) & 0x01000000)
 

Field : etr

Security bit configuration for transactions from etr to soc2fpga. When cleared (0), only Secure transactions are allowed. When set (1), both Secure and Non- Secure transactions are allowed.

Field Access Macros:

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_LSB   25
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_MSB   25
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_WIDTH   1
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET_MSK   0x02000000
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_CLR_MSK   0xfdffffff
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_RESET   0x0
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_GET(value)   (((value) & 0x02000000) >> 25)
 
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET(value)   (((value) << 25) & 0x02000000)
 

Data Structures

struct  ALT_NOC_FW_H2F_SCR_H2F_s
 

Macros

#define ALT_NOC_FW_H2F_SCR_H2F_RESET   0x00000000
 
#define ALT_NOC_FW_H2F_SCR_H2F_OFST   0x4
 

Typedefs

typedef struct
ALT_NOC_FW_H2F_SCR_H2F_s 
ALT_NOC_FW_H2F_SCR_H2F_t
 

Data Structure Documentation

struct ALT_NOC_FW_H2F_SCR_H2F_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_FW_H2F_SCR_H2F.

Data Fields
uint32_t mpu_m0: 1 ALT_NOC_FW_H2F_SCR_H2F_MPU_M0
uint32_t __pad0__: 7 UNDEFINED
uint32_t dma: 1 ALT_NOC_FW_H2F_SCR_H2F_DMA
uint32_t __pad1__: 8 UNDEFINED
uint32_t emac0: 1 ALT_NOC_FW_H2F_SCR_H2F_EMAC0
uint32_t emac1: 1 ALT_NOC_FW_H2F_SCR_H2F_EMAC1
uint32_t emac2: 1 ALT_NOC_FW_H2F_SCR_H2F_EMAC2
uint32_t usb0: 1 ALT_NOC_FW_H2F_SCR_H2F_USB0
uint32_t usb1: 1 ALT_NOC_FW_H2F_SCR_H2F_USB1
uint32_t sdmmc: 1 ALT_NOC_FW_H2F_SCR_H2F_SDMMC
uint32_t nand: 1 ALT_NOC_FW_H2F_SCR_H2F_NAND
uint32_t ahb_ap: 1 ALT_NOC_FW_H2F_SCR_H2F_AHB_AP
uint32_t etr: 1 ALT_NOC_FW_H2F_SCR_H2F_ETR
uint32_t __pad2__: 6 UNDEFINED

Macro Definitions

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_MSB   0

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET_MSK   0x00000001

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_CLR_MSK   0xfffffffe

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_NOC_FW_H2F_SCR_H2F_MPU_M0 register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_LSB   8

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_DMA register field.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_MSB   8

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_DMA register field.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_DMA register field.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET_MSK   0x00000100

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_DMA register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_CLR_MSK   0xfffffeff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_DMA register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_DMA register field.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_DMA field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_NOC_FW_H2F_SCR_H2F_DMA register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_LSB   17

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_MSB   17

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET_MSK   0x00020000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_CLR_MSK   0xfffdffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_GET (   value)    (((value) & 0x00020000) >> 17)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_EMAC0 field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET (   value)    (((value) << 17) & 0x00020000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_EMAC0 register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_LSB   18

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_MSB   18

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET_MSK   0x00040000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_CLR_MSK   0xfffbffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_GET (   value)    (((value) & 0x00040000) >> 18)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_EMAC1 field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET (   value)    (((value) << 18) & 0x00040000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_EMAC1 register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_LSB   19

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_MSB   19

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET_MSK   0x00080000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_CLR_MSK   0xfff7ffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_GET (   value)    (((value) & 0x00080000) >> 19)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_EMAC2 field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET (   value)    (((value) << 19) & 0x00080000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_EMAC2 register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_LSB   20

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_USB0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_MSB   20

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_USB0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_USB0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET_MSK   0x00100000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_USB0 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_CLR_MSK   0xffefffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_USB0 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_USB0 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_GET (   value)    (((value) & 0x00100000) >> 20)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_USB0 field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET (   value)    (((value) << 20) & 0x00100000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_USB0 register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_LSB   21

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_USB1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_MSB   21

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_USB1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_USB1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET_MSK   0x00200000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_USB1 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_CLR_MSK   0xffdfffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_USB1 register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_USB1 register field.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_GET (   value)    (((value) & 0x00200000) >> 21)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_USB1 field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET (   value)    (((value) << 21) & 0x00200000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_USB1 register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_LSB   22

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_MSB   22

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET_MSK   0x00400000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_CLR_MSK   0xffbfffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_GET (   value)    (((value) & 0x00400000) >> 22)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_SDMMC field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET (   value)    (((value) << 22) & 0x00400000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_SDMMC register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_LSB   23

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_NAND register field.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_MSB   23

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_NAND register field.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_NAND register field.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET_MSK   0x00800000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_NAND register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_CLR_MSK   0xff7fffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_NAND register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_NAND register field.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_GET (   value)    (((value) & 0x00800000) >> 23)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_NAND field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET (   value)    (((value) << 23) & 0x00800000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_NAND register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_LSB   24

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_MSB   24

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET_MSK   0x01000000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_CLR_MSK   0xfeffffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_AHB_AP field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_AHB_AP register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_LSB   25

The Least Significant Bit (LSB) position of the ALT_NOC_FW_H2F_SCR_H2F_ETR register field.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_MSB   25

The Most Significant Bit (MSB) position of the ALT_NOC_FW_H2F_SCR_H2F_ETR register field.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_WIDTH   1

The width in bits of the ALT_NOC_FW_H2F_SCR_H2F_ETR register field.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET_MSK   0x02000000

The mask used to set the ALT_NOC_FW_H2F_SCR_H2F_ETR register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_CLR_MSK   0xfdffffff

The mask used to clear the ALT_NOC_FW_H2F_SCR_H2F_ETR register field value.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_RESET   0x0

The reset value of the ALT_NOC_FW_H2F_SCR_H2F_ETR register field.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_GET (   value)    (((value) & 0x02000000) >> 25)

Extracts the ALT_NOC_FW_H2F_SCR_H2F_ETR field value from a register.

#define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET (   value)    (((value) << 25) & 0x02000000)

Produces a ALT_NOC_FW_H2F_SCR_H2F_ETR register field value suitable for setting the register.

#define ALT_NOC_FW_H2F_SCR_H2F_RESET   0x00000000

The reset value of the ALT_NOC_FW_H2F_SCR_H2F register.

#define ALT_NOC_FW_H2F_SCR_H2F_OFST   0x4

The byte offset of the ALT_NOC_FW_H2F_SCR_H2F register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_NOC_FW_H2F_SCR_H2F.