Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Component Instance : i_io48_hmc_mmr_io48_mmr

Description

Instance i_io48_hmc_mmr_io48_mmr of component ALT_IO48_HMC_MMR.

Macros

#define ALT_IO48_HMC_MMR_DBGCFG0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG0_OFST))
 
#define ALT_IO48_HMC_MMR_DBGCFG1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG1_OFST))
 
#define ALT_IO48_HMC_MMR_DBGCFG2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG2_OFST))
 
#define ALT_IO48_HMC_MMR_DBGCFG3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG3_OFST))
 
#define ALT_IO48_HMC_MMR_DBGCFG4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG4_OFST))
 
#define ALT_IO48_HMC_MMR_DBGCFG5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG5_OFST))
 
#define ALT_IO48_HMC_MMR_DBGCFG6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG6_OFST))
 
#define ALT_IO48_HMC_MMR_RESERVE0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE0_OFST))
 
#define ALT_IO48_HMC_MMR_RESERVE1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE1_OFST))
 
#define ALT_IO48_HMC_MMR_RESERVE2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE2_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG0_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG1_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG2_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG3_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG4_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG5_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG6_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG7_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG8_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG8_OFST))
 
#define ALT_IO48_HMC_MMR_CTLCFG9_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG9_OFST))
 
#define ALT_IO48_HMC_MMR_DRAMTIMING0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMTIMING0_OFST))
 
#define ALT_IO48_HMC_MMR_DRAMODT0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT0_OFST))
 
#define ALT_IO48_HMC_MMR_DRAMODT1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT1_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG0_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG1_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG2_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG3_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG4_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG5_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG6_OFST))
 
#define ALT_IO48_HMC_MMR_SBCFG7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG7_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING0_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING1_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING2_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING3_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING4_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING5_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING6_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING7_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING8_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING8_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING9_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING9_OFST))
 
#define ALT_IO48_HMC_MMR_CALTIMING10_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING10_OFST))
 
#define ALT_IO48_HMC_MMR_DRAMADDRW_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMADDRW_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND0_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND1_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND2_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND3_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND4_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND5_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND6_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND7_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND8_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND8_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND9_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND9_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND10_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND10_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND11_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND11_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND12_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND12_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND13_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND13_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND14_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND14_OFST))
 
#define ALT_IO48_HMC_MMR_SIDEBAND15_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND15_OFST))
 
#define ALT_IO48_HMC_MMR_DRAMSTS_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMSTS_OFST))
 
#define ALT_IO48_HMC_MMR_DBGDONE_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGDONE_OFST))
 
#define ALT_IO48_HMC_MMR_DBGSIGNALS_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGSIGNALS_OFST))
 
#define ALT_IO48_HMC_MMR_DBGRST_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGRST_OFST))
 
#define ALT_IO48_HMC_MMR_DBGMATCH_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGMATCH_OFST))
 
#define ALT_IO48_HMC_MMR_CNTR0MSK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MSK_OFST))
 
#define ALT_IO48_HMC_MMR_CNTR1MSK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MSK_OFST))
 
#define ALT_IO48_HMC_MMR_CNTR0MATCH_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MATCH_OFST))
 
#define ALT_IO48_HMC_MMR_CNTR1MATCH_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MATCH_OFST))
 
#define ALT_IO48_HMC_MMR_NIOSRESERVE0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE0_OFST))
 
#define ALT_IO48_HMC_MMR_NIOSRESERVE1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE1_OFST))
 
#define ALT_IO48_HMC_MMR_NIOSRESERVE2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE2_OFST))
 
#define ALT_IO48_HMC_MMR_OFST   0xffcfa000
 
#define ALT_IO48_HMC_MMR_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_IO48_HMC_MMR_OFST))
 
#define ALT_IO48_HMC_MMR_LB_ADDR   ALT_IO48_HMC_MMR_ADDR
 
#define ALT_IO48_HMC_MMR_UB_ADDR   ALT_CAST(void *, ((ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + 0x1000) - 1))
 

Macro Definitions

#define ALT_IO48_HMC_MMR_DBGCFG0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG0_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGCFG1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG1_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGCFG2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG2_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGCFG3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG3_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG3 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGCFG4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG4_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG4 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGCFG5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG5_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG5 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGCFG6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGCFG6_OFST))

The address of the ALT_IO48_HMC_MMR_DBGCFG6 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_RESERVE0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE0_OFST))

The address of the ALT_IO48_HMC_MMR_RESERVE0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_RESERVE1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE1_OFST))

The address of the ALT_IO48_HMC_MMR_RESERVE1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_RESERVE2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_RESERVE2_OFST))

The address of the ALT_IO48_HMC_MMR_RESERVE2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG0_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG1_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG2_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG3_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG3 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG4_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG4 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG5_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG5 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG6_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG6 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG7_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG7 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG8_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG8_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG8 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CTLCFG9_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CTLCFG9_OFST))

The address of the ALT_IO48_HMC_MMR_CTLCFG9 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DRAMTIMING0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMTIMING0_OFST))

The address of the ALT_IO48_HMC_MMR_DRAMTIMING0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DRAMODT0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT0_OFST))

The address of the ALT_IO48_HMC_MMR_DRAMODT0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DRAMODT1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMODT1_OFST))

The address of the ALT_IO48_HMC_MMR_DRAMODT1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG0_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG1_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG2_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG3_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG3 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG4_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG4 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG5_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG5 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG6_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG6 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SBCFG7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SBCFG7_OFST))

The address of the ALT_IO48_HMC_MMR_SBCFG7 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING0_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING1_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING2_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING3_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING3 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING4_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING4 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING5_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING5 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING6_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING6 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING7_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING7 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING8_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING8_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING8 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING9_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING9_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING9 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CALTIMING10_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CALTIMING10_OFST))

The address of the ALT_IO48_HMC_MMR_CALTIMING10 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DRAMADDRW_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMADDRW_OFST))

The address of the ALT_IO48_HMC_MMR_DRAMADDRW register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND0_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND1_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND2_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND3_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND3_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND3 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND4_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND4_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND4 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND5_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND5_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND5 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND6_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND6_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND6 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND7_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND7_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND7 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND8_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND8_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND8 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND9_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND9_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND9 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND10_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND10_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND10 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND11_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND11_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND11 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND12_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND12_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND12 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND13_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND13_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND13 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND14_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND14_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND14 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_SIDEBAND15_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_SIDEBAND15_OFST))

The address of the ALT_IO48_HMC_MMR_SIDEBAND15 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DRAMSTS_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DRAMSTS_OFST))

The address of the ALT_IO48_HMC_MMR_DRAMSTS register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGDONE_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGDONE_OFST))

The address of the ALT_IO48_HMC_MMR_DBGDONE register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGSIGNALS_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGSIGNALS_OFST))

The address of the ALT_IO48_HMC_MMR_DBGSIGNALS register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGRST_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGRST_OFST))

The address of the ALT_IO48_HMC_MMR_DBGRST register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_DBGMATCH_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_DBGMATCH_OFST))

The address of the ALT_IO48_HMC_MMR_DBGMATCH register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CNTR0MSK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MSK_OFST))

The address of the ALT_IO48_HMC_MMR_CNTR0MSK register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CNTR1MSK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MSK_OFST))

The address of the ALT_IO48_HMC_MMR_CNTR1MSK register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CNTR0MATCH_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR0MATCH_OFST))

The address of the ALT_IO48_HMC_MMR_CNTR0MATCH register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_CNTR1MATCH_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_CNTR1MATCH_OFST))

The address of the ALT_IO48_HMC_MMR_CNTR1MATCH register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_NIOSRESERVE0_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE0_OFST))

The address of the ALT_IO48_HMC_MMR_NIOSRESERVE0 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_NIOSRESERVE1_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE1_OFST))

The address of the ALT_IO48_HMC_MMR_NIOSRESERVE1 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_NIOSRESERVE2_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + ALT_IO48_HMC_MMR_NIOSRESERVE2_OFST))

The address of the ALT_IO48_HMC_MMR_NIOSRESERVE2 register for the ALT_IO48_HMC_MMR instance.

#define ALT_IO48_HMC_MMR_OFST   0xffcfa000

The base address byte offset for the start of the ALT_IO48_HMC_MMR component.

#define ALT_IO48_HMC_MMR_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_IO48_HMC_MMR_OFST))

The start address of the ALT_IO48_HMC_MMR component.

#define ALT_IO48_HMC_MMR_LB_ADDR   ALT_IO48_HMC_MMR_ADDR

The lower bound address range of the ALT_IO48_HMC_MMR component.

#define ALT_IO48_HMC_MMR_UB_ADDR   ALT_CAST(void *, ((ALT_CAST(char *, ALT_IO48_HMC_MMR_ADDR) + 0x1000) - 1))

The upper bound address range of the ALT_IO48_HMC_MMR component.