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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x1 | Bypass |
[4:1] | RW | 0x0 | Read Delay |
[31:5] | ??? | 0x0 | UNDEFINED |
Field : Bypass - byp | ||||||||||
Controls bypass of the adapted loopback clock circuit Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_QSPI_RDDATACAP_BYP_E_NOBYPASS 0x0 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_E_BYPASS 0x1 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_LSB 0 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_MSB 0 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_WIDTH 1 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_SET_MSK 0x00000001 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_RESET 0x1 | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_QSPI_RDDATACAP_BYP_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Read Delay - delay | |
Delay the read data capturing logic by the programmed number of qspi_clk cycles Field Access Macros: | |
#define | ALT_QSPI_RDDATACAP_DELAY_LSB 1 |
#define | ALT_QSPI_RDDATACAP_DELAY_MSB 4 |
#define | ALT_QSPI_RDDATACAP_DELAY_WIDTH 4 |
#define | ALT_QSPI_RDDATACAP_DELAY_SET_MSK 0x0000001e |
#define | ALT_QSPI_RDDATACAP_DELAY_CLR_MSK 0xffffffe1 |
#define | ALT_QSPI_RDDATACAP_DELAY_RESET 0x0 |
#define | ALT_QSPI_RDDATACAP_DELAY_GET(value) (((value) & 0x0000001e) >> 1) |
#define | ALT_QSPI_RDDATACAP_DELAY_SET(value) (((value) << 1) & 0x0000001e) |
Data Structures | |
struct | ALT_QSPI_RDDATACAP_s |
Macros | |
#define | ALT_QSPI_RDDATACAP_OFST 0x10 |
Typedefs | |
typedef struct ALT_QSPI_RDDATACAP_s | ALT_QSPI_RDDATACAP_t |
struct ALT_QSPI_RDDATACAP_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_QSPI_RDDATACAP.
Data Fields | ||
---|---|---|
uint32_t | byp: 1 | Bypass |
uint32_t | delay: 4 | Read Delay |
uint32_t | __pad0__: 27 | UNDEFINED |
#define ALT_QSPI_RDDATACAP_BYP_E_NOBYPASS 0x0 |
Enumerated value for register field ALT_QSPI_RDDATACAP_BYP
No Bypass
#define ALT_QSPI_RDDATACAP_BYP_E_BYPASS 0x1 |
Enumerated value for register field ALT_QSPI_RDDATACAP_BYP
Bypass loopback clock circuit
#define ALT_QSPI_RDDATACAP_BYP_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_QSPI_RDDATACAP_BYP register field.
#define ALT_QSPI_RDDATACAP_BYP_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_QSPI_RDDATACAP_BYP register field.
#define ALT_QSPI_RDDATACAP_BYP_WIDTH 1 |
The width in bits of the ALT_QSPI_RDDATACAP_BYP register field.
#define ALT_QSPI_RDDATACAP_BYP_SET_MSK 0x00000001 |
The mask used to set the ALT_QSPI_RDDATACAP_BYP register field value.
#define ALT_QSPI_RDDATACAP_BYP_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_QSPI_RDDATACAP_BYP register field value.
#define ALT_QSPI_RDDATACAP_BYP_RESET 0x1 |
The reset value of the ALT_QSPI_RDDATACAP_BYP register field.
#define ALT_QSPI_RDDATACAP_BYP_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_QSPI_RDDATACAP_BYP field value from a register.
#define ALT_QSPI_RDDATACAP_BYP_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_QSPI_RDDATACAP_BYP register field value suitable for setting the register.
#define ALT_QSPI_RDDATACAP_DELAY_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_QSPI_RDDATACAP_DELAY register field.
#define ALT_QSPI_RDDATACAP_DELAY_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_QSPI_RDDATACAP_DELAY register field.
#define ALT_QSPI_RDDATACAP_DELAY_WIDTH 4 |
The width in bits of the ALT_QSPI_RDDATACAP_DELAY register field.
#define ALT_QSPI_RDDATACAP_DELAY_SET_MSK 0x0000001e |
The mask used to set the ALT_QSPI_RDDATACAP_DELAY register field value.
#define ALT_QSPI_RDDATACAP_DELAY_CLR_MSK 0xffffffe1 |
The mask used to clear the ALT_QSPI_RDDATACAP_DELAY register field value.
#define ALT_QSPI_RDDATACAP_DELAY_RESET 0x0 |
The reset value of the ALT_QSPI_RDDATACAP_DELAY register field.
#define ALT_QSPI_RDDATACAP_DELAY_GET | ( | value | ) | (((value) & 0x0000001e) >> 1) |
Extracts the ALT_QSPI_RDDATACAP_DELAY field value from a register.
#define ALT_QSPI_RDDATACAP_DELAY_SET | ( | value | ) | (((value) << 1) & 0x0000001e) |
Produces a ALT_QSPI_RDDATACAP_DELAY register field value suitable for setting the register.
#define ALT_QSPI_RDDATACAP_OFST 0x10 |
The byte offset of the ALT_QSPI_RDDATACAP register from the beginning of the component.
typedef struct ALT_QSPI_RDDATACAP_s ALT_QSPI_RDDATACAP_t |
The typedef declaration for register ALT_QSPI_RDDATACAP.