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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Controls the L3 master HPROT AHB-Lite signal.
These register bits should be updated only during system initialization prior to removing the peripheral from reset. They may not be changed dynamically during peripheral operation
All fields are reset by a cold or warm reset.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x1 | SD/MMC HPROT Data/Opcode |
[1] | RW | 0x1 | SD/MMC HPROT Privileged |
[2] | RW | 0x0 | SD/MMC HPROT Bufferable |
[3] | RW | 0x0 | SD/MMC HPROT Cacheable |
[31:4] | ??? | 0x0 | UNDEFINED |
Field : SD/MMC HPROT Data/Opcode - hprotdata_0 | ||||||||||
Specifies if the L3 master access is for data or opcode for the SD/MMC module. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_OPCODE 0x0 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_DATA 0x1 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_LSB 0 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_MSB 0 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_WIDTH 1 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET_MSK 0x00000001 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_RESET 0x1 | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : SD/MMC HPROT Privileged - hprotpriv_0 | |
If 1, L3 master accesses for the SD/MMC module are privileged. Field Access Macros: | |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_LSB 1 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_MSB 1 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_WIDTH 1 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET_MSK 0x00000002 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_CLR_MSK 0xfffffffd |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_RESET 0x1 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET(value) (((value) << 1) & 0x00000002) |
Field : SD/MMC HPROT Bufferable - hprotbuff_0 | |
If 1, L3 master accesses for the SD/MMC module are bufferable. Field Access Macros: | |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_LSB 2 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_MSB 2 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_WIDTH 1 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET_MSK 0x00000004 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_CLR_MSK 0xfffffffb |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_RESET 0x0 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET(value) (((value) << 2) & 0x00000004) |
Field : SD/MMC HPROT Cacheable - hprotcache_0 | |
If 1, L3 master accesses for the SD/MMC module are cacheable. Field Access Macros: | |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_LSB 3 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_MSB 3 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_WIDTH 1 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET_MSK 0x00000008 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_CLR_MSK 0xfffffff7 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_RESET 0x0 |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET(value) (((value) << 3) & 0x00000008) |
Data Structures | |
struct | ALT_SYSMGR_SDMMC_L3MST_s |
Macros | |
#define | ALT_SYSMGR_SDMMC_L3MST_OFST 0x4 |
Typedefs | |
typedef struct ALT_SYSMGR_SDMMC_L3MST_s | ALT_SYSMGR_SDMMC_L3MST_t |
struct ALT_SYSMGR_SDMMC_L3MST_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SYSMGR_SDMMC_L3MST.
Data Fields | ||
---|---|---|
uint32_t | hprotdata_0: 1 | SD/MMC HPROT Data/Opcode |
uint32_t | hprotpriv_0: 1 | SD/MMC HPROT Privileged |
uint32_t | hprotbuff_0: 1 | SD/MMC HPROT Bufferable |
uint32_t | hprotcache_0: 1 | SD/MMC HPROT Cacheable |
uint32_t | __pad0__: 28 | UNDEFINED |
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_OPCODE 0x0 |
Enumerated value for register field ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0
Opcode fetch
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_DATA 0x1 |
Enumerated value for register field ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0
Data access
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET_MSK 0x00000001 |
The mask used to set the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_RESET 0x1 |
The reset value of the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 field value from a register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0 register field value suitable for setting the register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET_MSK 0x00000002 |
The mask used to set the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_RESET 0x1 |
The reset value of the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 field value from a register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0 register field value suitable for setting the register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET_MSK 0x00000004 |
The mask used to set the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 field value from a register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0 register field value suitable for setting the register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET_MSK 0x00000008 |
The mask used to set the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field value.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 field value from a register.
#define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0 register field value suitable for setting the register.
#define ALT_SYSMGR_SDMMC_L3MST_OFST 0x4 |
The byte offset of the ALT_SYSMGR_SDMMC_L3MST register from the beginning of the component.
typedef struct ALT_SYSMGR_SDMMC_L3MST_s ALT_SYSMGR_SDMMC_L3MST_t |
The typedef declaration for register ALT_SYSMGR_SDMMC_L3MST.