Altera HWLIB  16.0
The Altera HW Manager API Reference Manual
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Groups
SPI Flash Controller Module

Description

This module defines an API for configuring and managing the HPS serial peripheral interface (SPI) master and slave controller instances.

The hard processor system (HPS) provides two SPI masters and two SPI slaves. The SPI masters and slaves are instances of the Synopsys DesignWare Synchronous Serial Interface (SSI) controller.

Members

 Interrupt Status Conditions
 
 RX Sample Delay Configuration
 
 RX FIFO Management
 
 TX FIFO Management
 
 Transfer Functions
 
 DMA Interface
 

Data Structures

struct  ALT_SPI_CONFIG_s
 
struct  ALT_SPI_MW_CONFIG_s
 

Macros

#define ALT_SPI_MW_CTL_FRAME_SIZE_MAX   (16)
 
#define ALT_SPI_SLAVE_MASK_ALL   0xF
 

Typedefs

typedef enum ALT_SPI_CTLR_e ALT_SPI_CTLR_t
 
typedef enum ALT_SPI_FRF_e ALT_SPI_FRF_t
 
typedef enum ALT_SPI_SCPOL_e ALT_SPI_SCPOL_t
 
typedef enum ALT_SPI_SCPH_e ALT_SPI_SCPH_t
 
typedef enum ALT_SPI_DFS_e ALT_SPI_DFS_t
 
typedef enum ALT_SPI_TMOD_e ALT_SPI_TMOD_t
 
typedef enum ALT_SPI_OP_MODE_e ALT_SPI_OP_MODE_t
 
typedef struct ALT_SPI_CONFIG_s ALT_SPI_CONFIG_t
 
typedef enum ALT_SPI_MW_MODE_e ALT_SPI_MW_MODE_t
 
typedef enum ALT_SPI_SS_e ALT_SPI_SS_t
 
typedef enum ALT_SPI_MW_DIR_e ALT_SPI_MW_DIR_t
 
typedef struct ALT_SPI_MW_CONFIG_s ALT_SPI_MW_CONFIG_t
 

ENUMS

enum  ALT_SPI_CTLR_e { ALT_SPI_SPIM0 = (int32_t)ALT_SPIM0_OFST, ALT_SPI_SPIM1 = (int32_t)ALT_SPIM1_OFST, ALT_SPI_SPIS0 = (int32_t)ALT_SPIS0_OFST, ALT_SPI_SPIS1 = (int32_t)ALT_SPIS1_OFST }
 
enum  ALT_SPI_FRF_e { ALT_SPI_FRF_SPI = 0, ALT_SPI_FRF_SSP = 1, ALT_SPI_FRF_MICROWIRE = 2 }
 
enum  ALT_SPI_SCPOL_e { ALT_SPI_SCPOL_INACTIVE_LOW = 0, ALT_SPI_SCPOL_INACTIVE_HIGH = 1 }
 
enum  ALT_SPI_SCPH_e { ALT_SPI_SCPH_TOGGLE_MIDDLE = 0, ALT_SPI_SCPH_TOGGLE_START = 1 }
 
enum  ALT_SPI_DFS_e {
  ALT_SPI_DFS_4BIT = 3, ALT_SPI_DFS_5BIT = 4, ALT_SPI_DFS_6BIT = 5, ALT_SPI_DFS_7BIT = 6,
  ALT_SPI_DFS_8BIT = 7, ALT_SPI_DFS_9BIT = 8, ALT_SPI_DFS_10BIT = 9, ALT_SPI_DFS_11BIT = 10,
  ALT_SPI_DFS_12BIT = 11, ALT_SPI_DFS_13BIT = 12, ALT_SPI_DFS_14BIT = 13, ALT_SPI_DFS_15BIT = 14,
  ALT_SPI_DFS_16BIT = 15
}
 
enum  ALT_SPI_TMOD_e { ALT_SPI_TMOD_TXRX = 0, ALT_SPI_TMOD_TX = 1, ALT_SPI_TMOD_RX = 2, ALT_SPI_TMOD_EEPROM = 3 }
 
enum  ALT_SPI_OP_MODE_e { ALT_SPI_OP_MODE_SLAVE = 0, ALT_SPI_OP_MODE_MASTER = 1 }
 
enum  ALT_SPI_MW_MODE_e { ALT_SPI_MW_NON_SEQUENTIAL = 0, ALT_SPI_MW_SEQUENTIAL = 1 }
 
enum  ALT_SPI_SS_e { ALT_SPI_SS0 = 1UL << 0, ALT_SPI_SS1 = 1UL << 1, ALT_SPI_SS2 = 1UL << 2, ALT_SPI_SS3 = 1UL << 3 }
 
enum  ALT_SPI_MW_DIR_e { ALT_SPI_MW_DIR_RX = 0, ALT_SPI_MW_DIR_TX = 1 }
 

Functions

ALT_STATUS_CODE alt_spi_init (const ALT_SPI_CTLR_t spi, ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_reset (ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_uninit (ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_disable (ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_enable (ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_is_enabled (ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_is_busy (ALT_SPI_DEV_t *spi_dev)
 
ALT_STATUS_CODE alt_spi_config_get (ALT_SPI_DEV_t *spi_dev, ALT_SPI_CONFIG_t *cfg)
 
ALT_STATUS_CODE alt_spi_config_set (ALT_SPI_DEV_t *spi_dev, const ALT_SPI_CONFIG_t *cfg)
 
ALT_STATUS_CODE alt_spi_mw_config_get (ALT_SPI_DEV_t *spi_dev, ALT_SPI_MW_CONFIG_t *cfg)
 
ALT_STATUS_CODE alt_spi_mw_config_set (ALT_SPI_DEV_t *spi_dev, const ALT_SPI_MW_CONFIG_t *cfg)
 
ALT_STATUS_CODE alt_spi_slave_select_disable (ALT_SPI_DEV_t *spi_dev, const uint32_t mask)
 
ALT_STATUS_CODE alt_spi_slave_select_enable (ALT_SPI_DEV_t *spi_dev, const uint32_t mask)
 
ALT_STATUS_CODE alt_spi_divider_get (ALT_SPI_DEV_t *spi_dev, uint32_t *div)
 
ALT_STATUS_CODE alt_spi_divider_set (ALT_SPI_DEV_t *spi_dev, const uint32_t div)
 
ALT_STATUS_CODE alt_spi_speed_get (ALT_SPI_DEV_t *spi_dev, uint32_t *speed_in_hz)
 
ALT_STATUS_CODE alt_spi_speed_set (ALT_SPI_DEV_t *spi_dev, uint32_t speed_in_hz)
 
ALT_STATUS_CODE alt_spi_num_data_frames_get (ALT_SPI_DEV_t *spi_dev, uint32_t *num_data_frames)
 
ALT_STATUS_CODE alt_spi_num_data_frames_set (ALT_SPI_DEV_t *spi_dev, const uint32_t num_data_frames)
 

Data Structure Documentation

struct ALT_SPI_CONFIG_s

This type defines a structure for specifying configuration parameters for a SPI controller.

Data Fields
ALT_SPI_DFS_t frame_size Data Frame Size. Selects the data frame length. When the data frame size is programmed to be less than 16 bits, the receive data are automatically right-justified by the receive logic, with the upper bits of the receive FIFO zero-padded. You must right-justify transmit data before writing into the transmit FIFO. The transmit logic ignores the upper unused bits when transmitting the data. Valid range 4..16.
ALT_SPI_FRF_t frame_format Frame Format. Selects which serial protocol transfers the data.
ALT_SPI_SCPH_t clk_phase Serial Clock Phase. Valid when the frame format (FRF) is set to Motorola SPI. The serial clock phase selects the relationship of the serial clock with the slave select signal.
ALT_SPI_SCPOL_t clk_polarity Serial Clock Polarity. Only valid when the frame format (FRF) is set to Motorola SPI. Used to select the polarity of the inactive serial clock.
ALT_SPI_TMOD_t transfer_mode Transfer Mode. Selects the mode of transfer for serial communication.
bool slave_output_enable Slave Output Enable. Relevant only for SPI controller slaves. This data member has no applicability for SPI controller masters. This data member specifies whether the ssi_oe_n output is enabled or disabled from the SPI controller slave. When true, the ssi_oe_n output can never be active. When the ssi_oe_n output controls the tri-state buffer on the txd output from the slave, a high impedance state is always present on the slave txd output when slv_oe = true. This is useful when the master transmits in broadcast mode. Only one slave may respond with data on the master rxd line. This data member is enabled after reset and must be disabled by software (when broadcast mode is used), if you do not want this device to respond with data.
bool loopback_mode Used for testing purposes only. When true, creates an internal loopback by connecting the transmit shift register output to the receive shift register input. Can be used in both serial- slave and serial-master modes. For SPI controller slaves in loopback mode, the ss_in_n and ssi_clk signals must be provided by an external source. In this mode, the slave cannot generate these signals because there is nothing to which to loop back. For normal operation this data member should be set to false.
struct ALT_SPI_MW_CONFIG_s

This type defines a structure for configuration of the SPI controller when using the Microwire serial protocol.

Data Fields
uint32_t ctl_frame_size Control Frame Size. Selects the length of the control word for the Microwire frame format. Valid range 0 <= n <= 16 where n sets the bit field to n - 1.
ALT_SPI_MW_MODE_t mode Transfer Mode. Specifies whether the Microwire transfer is sequential or non-sequential.
ALT_SPI_MW_DIR_t dir Direction. This setting controls the direction of the data word for the half-duplex Microwire serial protocol.
bool handshake_enabled Microwire handshaking enable flag. Relevant only when the SPI controller is a master. Used to enable and disable the "busy/ready" handshaking interface for the Microwire protocol. When enabled (true), the SPI controller checks for a ready status from the target slave, after the transfer of the last data/control bit, before clearing the controller busy status.

Macro Definitions

#define ALT_SPI_MW_CTL_FRAME_SIZE_MAX   (16)

This definition specifies the largest possible control frame size.

#define ALT_SPI_SLAVE_MASK_ALL   0xF

This definition specifies a mask that applies to all slaves.

Typedef Documentation

This type enumerates the HPS SPI controller instances.

This type enumerates the serial protocol frame formats supported by the SPI controller.

See: Functional Description of the SPI Controller section of Chapter 19. SPI Controller in the Cyclone V Device Handbook Volume 3: Hard Processor System Technical Reference Manual for a full description of the supported protocols.

This type enumerates the SPI serial clock polarity choices. Only valid when the frame format is set to Motorola SPI. Used to select the polarity of the inactive serial clock, which is held inactive when the SPI controller master is not actively transferring data on the serial bus.

This type enumerates the SPI serial clock phase choices. Only valid when the frame format is set to Motorola SPI. The serial clock phase selects the relationship of the serial clock with the slave select signal. When ALT_SPI_SCPH_TOGGLE_MIDDLE, data are captured on the first edge of the serial clock. When ALT_SPI_SCPH_TOGGLE_START, the serial clock starts toggling one cycle after the slave select line is activated, and data are captured on the second edge of the serial clock.

This type enumerates the SPI available frame size. Specifies the frame size of transfer for serial communication.

This type enumerates the SPI transfer mode choices. Specifies the mode of transfer for serial communication.

This type enumerates the HPS SPI controller type mode.

This type defines a structure for specifying configuration parameters for a SPI controller.

This type enumerates the Microwire transfer mode choices. Specifies whether the Microwire transfer is sequential or non-sequential. When sequential mode is used, only one control word is needed to transmit or receive a block of data words. When non-sequential mode is used, there must be a control word for each data word that is transmitted or received.

typedef enum ALT_SPI_SS_e ALT_SPI_SS_t

This type enumerates the slave select output lines for SPI controller modules configured as masters.

This type enumerates the Microwire direction control choices. The enumerations specify the direction of the data word when the Microwire serial protocol is used.

This type defines a structure for configuration of the SPI controller when using the Microwire serial protocol.

Enumeration Type Documentation

This type enumerates the HPS SPI controller instances.

Enumerator:
ALT_SPI_SPIM0 

SPI Master Controller 0 instance

ALT_SPI_SPIM1 

SPI Master Controller 1 instance

ALT_SPI_SPIS0 

SPI Slave Controller 0 instance

ALT_SPI_SPIS1 

SPI Slave Controller 1 instance

This type enumerates the serial protocol frame formats supported by the SPI controller.

See: Functional Description of the SPI Controller section of Chapter 19. SPI Controller in the Cyclone V Device Handbook Volume 3: Hard Processor System Technical Reference Manual for a full description of the supported protocols.

Enumerator:
ALT_SPI_FRF_SPI 

Motorola SPI protocol - A four-wire, full-duplex serial protocol from Motorola.

ALT_SPI_FRF_SSP 

Texas Instruments Serial Protocol (SSP) - A four-wire, full-duplex serial protocol.

ALT_SPI_FRF_MICROWIRE 

National Semiconductor Microwire - A half-duplex serial protocol, which uses a control word transmitted from the serial master to the target serial slave.

This type enumerates the SPI serial clock polarity choices. Only valid when the frame format is set to Motorola SPI. Used to select the polarity of the inactive serial clock, which is held inactive when the SPI controller master is not actively transferring data on the serial bus.

Enumerator:
ALT_SPI_SCPOL_INACTIVE_LOW 

Inactive state of serial clock is low

ALT_SPI_SCPOL_INACTIVE_HIGH 

Inactive state of serial clock is high

This type enumerates the SPI serial clock phase choices. Only valid when the frame format is set to Motorola SPI. The serial clock phase selects the relationship of the serial clock with the slave select signal. When ALT_SPI_SCPH_TOGGLE_MIDDLE, data are captured on the first edge of the serial clock. When ALT_SPI_SCPH_TOGGLE_START, the serial clock starts toggling one cycle after the slave select line is activated, and data are captured on the second edge of the serial clock.

Enumerator:
ALT_SPI_SCPH_TOGGLE_MIDDLE 

Serial clock toggles in middle of first data bit.

ALT_SPI_SCPH_TOGGLE_START 

Serial clock toggles at start of first data bit.

This type enumerates the SPI available frame size. Specifies the frame size of transfer for serial communication.

Enumerator:
ALT_SPI_DFS_4BIT 

4-bit serial data transfer

ALT_SPI_DFS_5BIT 

5-bit serial data transfer

ALT_SPI_DFS_6BIT 

6-bit serial data transfer

ALT_SPI_DFS_7BIT 

7-bit serial data transfer

ALT_SPI_DFS_8BIT 

8-bit serial data transfer

ALT_SPI_DFS_9BIT 

9-bit serial data transfer

ALT_SPI_DFS_10BIT 

10-bit serial data transfer

ALT_SPI_DFS_11BIT 

11-bit serial data transfer

ALT_SPI_DFS_12BIT 

12-bit serial data transfer

ALT_SPI_DFS_13BIT 

13-bit serial data transfer

ALT_SPI_DFS_14BIT 

14-bit serial data transfer

ALT_SPI_DFS_15BIT 

15-bit serial data transfer

ALT_SPI_DFS_16BIT 

16-bit serial data transfer

This type enumerates the SPI transfer mode choices. Specifies the mode of transfer for serial communication.

Enumerator:
ALT_SPI_TMOD_TXRX 

Transmit & Receive

ALT_SPI_TMOD_TX 

Transmit Only

ALT_SPI_TMOD_RX 

Receive Only

ALT_SPI_TMOD_EEPROM 

EEPROM Read

This type enumerates the HPS SPI controller type mode.

Enumerator:
ALT_SPI_OP_MODE_SLAVE 

SPI Slave Controller

ALT_SPI_OP_MODE_MASTER 

SPI Master Controller

This type enumerates the Microwire transfer mode choices. Specifies whether the Microwire transfer is sequential or non-sequential. When sequential mode is used, only one control word is needed to transmit or receive a block of data words. When non-sequential mode is used, there must be a control word for each data word that is transmitted or received.

Enumerator:
ALT_SPI_MW_NON_SEQUENTIAL 

Non-Sequential Transfer

ALT_SPI_MW_SEQUENTIAL 

Sequential Transfer

This type enumerates the slave select output lines for SPI controller modules configured as masters.

Enumerator:
ALT_SPI_SS0 

Slave select 0 output ss_0_n

ALT_SPI_SS1 

Slave select 1 output ss_1_n

ALT_SPI_SS2 

Slave select 2 output ss_2_n

ALT_SPI_SS3 

Slave select 3 output ss_3_n

This type enumerates the Microwire direction control choices. The enumerations specify the direction of the data word when the Microwire serial protocol is used.

Enumerator:
ALT_SPI_MW_DIR_RX 

The data word is received by the controller from an external serial device.

ALT_SPI_MW_DIR_TX 

The data word is transmitted from the controller to an external serial device.

Function Documentation

ALT_STATUS_CODE alt_spi_init ( const ALT_SPI_CTLR_t  spi,
ALT_SPI_DEV_t *  spi_dev 
)

Initialize the specified SPI controller instance for use and return a device handle referencing it.

Parameters
spiThe HPS SPI controller instance to initialize.
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_reset ( ALT_SPI_DEV_t *  spi_dev)

Reset the specified SPI controller instance for use.

Parameters
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_uninit ( ALT_SPI_DEV_t *  spi_dev)

Uninitialize the SPI controller referenced by the spi_dev handle.

This function attempts to gracefully shutdown the SPI controller by waiting for any incomplete transactions to finish and then putting the SPI controller into reset.

Parameters
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_disable ( ALT_SPI_DEV_t *  spi_dev)

Disables the SPI controller.

When the SPI controller is disabled, the following occurs:

  • All transfers are halted immediately.
  • The TX FIFO and RX FIFO are cleared.
Parameters
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_enable ( ALT_SPI_DEV_t *  spi_dev)

Enables the SPI controller.

Parameters
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_is_enabled ( ALT_SPI_DEV_t *  spi_dev)

Returns ALT_E_TRUE if the SPI controller is enabled.

Parameters
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_BAD_ARGDetails about error status code
ALT_E_TRUESPI controller is enabled.
ALT_E_FALSESPI controller is not enabled.
ALT_STATUS_CODE alt_spi_is_busy ( ALT_SPI_DEV_t *  spi_dev)

Returns ALT_E_TRUE if the SPI controller is busy. The SPI controller is busy if a serial transfer is in progress. If ALT_E_FALSE is returned, then the SPI controller is idle or disabled.

NOTE: A busy status is not indicated when data is written into the transmit FIFO. The busy status only is set only when the target slave has been selected and the actual transfer is underway.

Parameters
spi_devA pointer to the SPI controller device block instance.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_config_get ( ALT_SPI_DEV_t *  spi_dev,
ALT_SPI_CONFIG_t cfg 
)

Gets the current configuration of the SPI controller.

Parameters
spi_devA pointer to the SPI controller device block instance.
cfg[out] Pointer to a ALT_SPI_CONFIG_t structure for holding the returned SPI controller configuration parameters.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_config_set ( ALT_SPI_DEV_t *  spi_dev,
const ALT_SPI_CONFIG_t cfg 
)

Sets the configuration of the SPI controller.

Parameters
spi_devA pointer to the SPI controller device block instance.
cfgPointer to a ALT_SPI_CONFIG_t structure holding the desired SPI controller configuration parameters.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_mw_config_get ( ALT_SPI_DEV_t *  spi_dev,
ALT_SPI_MW_CONFIG_t cfg 
)

Gets the current Microwire specific configuration parameters of the SPI controller.

Parameters
spi_devA pointer to the SPI controller device block instance.
cfg[out] Pointer to a ALT_SPI_MW_CONFIG_t structure for holding the returned SPI controller Microwire specific configuration parameters.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_mw_config_set ( ALT_SPI_DEV_t *  spi_dev,
const ALT_SPI_MW_CONFIG_t cfg 
)

Sets the Microwire specific configuration parameters of the SPI controller.

Parameters
spi_devA pointer to the SPI controller device block instance.
cfgPointer to a ALT_SPI_MW_CONFIG_t structure holding the desired SPI controller Microwire specific configuration parameters.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_slave_select_disable ( ALT_SPI_DEV_t *  spi_dev,
const uint32_t  mask 
)

Disable the specified SPI controller slave select output lines.

This function is only valid for SPI controllers configured as masters.

Parameters
spi_devA pointer to the SPI controller device block instance.
maskSpecifies the slave select output signal line(s) to disable. mask is a mask of logically OR'ed ALT_SPI_SS_t values that designate the slave select outputs to disable.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_slave_select_enable ( ALT_SPI_DEV_t *  spi_dev,
const uint32_t  mask 
)

Enable the specified SPI controller slave select output lines.

Normally, unless operating in broadcast mode, only one slave select output should be specified in mask.

This function is only valid for SPI controllers configured as masters.

Parameters
spi_devA pointer to the SPI controller device block instance.
maskSpecifies the slave select output signal line(s) to enable. mask is a mask of logically OR'ed ALT_SPI_SS_t values that designate the slave select outputs to enable.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_divider_get ( ALT_SPI_DEV_t *  spi_dev,
uint32_t *  div 
)

Get the configured baud rate divider value for the specified SPI controller.

This function is only valid for SPI master controllers.

Parameters
spi_devA pointer to the SPI controller device block instance.
div[out] The configured clock divider value. A returned value of 0 indicates that sclk_out is disabled.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_divider_set ( ALT_SPI_DEV_t *  spi_dev,
const uint32_t  div 
)

Set the baud rate divider to configure the generated sclk_out frequency.

The generated sclk_out frequency is defined by the formula:

Fsclk_out = Fspi_m_clk / DIV

Where:

  • Fsclk_out is the generated frequency of sclk_out.
  • Fspi_m_clk is the input clock frequency to the SPI master peripheral module.
  • DIV is the baud rate divider value.

This function is only valid for SPI master controllers.

Parameters
spi_devA pointer to the SPI controller device block instance.
divThe clock divider value. Valid clock divider values must be an even value in the range 2 to 65,534. If div is 0, then sclk_out is disabled.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_speed_get ( ALT_SPI_DEV_t *  spi_dev,
uint32_t *  speed_in_hz 
)

Gets the speed of the SPI master, which is calculated from divider value and the SPI controller internal clock.

Parameters
spi_devA pointer to the SPI controller device block instance.
speed_in_hzSpeed (Hz) of the SPI bus.
divClock divider.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_speed_set ( ALT_SPI_DEV_t *  spi_dev,
uint32_t  speed_in_hz 
)

Attempts to sets the speed of the SPI master to the requested speed by calculating and setting the most suitable divider value.

Parameters
spi_devA pointer to the SPI controller device block instance.
speed_in_hzSpeed (Hz) of the SPI bus.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_num_data_frames_get ( ALT_SPI_DEV_t *  spi_dev,
uint32_t *  num_data_frames 
)

Get the current number of data frames configured for the SPI controller.

Parameters
spi_devA pointer to the SPI controller device block instance.
num_data_frames[out] The current number of data frames parameter configured for the SPI controller.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code
ALT_STATUS_CODE alt_spi_num_data_frames_set ( ALT_SPI_DEV_t *  spi_dev,
const uint32_t  num_data_frames 
)

Set the number of data frames configured for the SPI controller.

Sets the number of data frames to be continuously received by the SPI controller. The SPI controller continues to receive serial data until the number of data frames received is equal to this parameter, which enables you to receive up to 64 KiB of data in a continuous transfer.

This function is only valid for SPI master controller instances.

Parameters
spi_devA pointer to the SPI controller device block instance.
num_data_framesThe desired number of data frames for the SPI controller to receive. valid range: 1 to 65536.
Return values
ALT_E_SUCCESSSuccessful status.
ALT_E_ERRORDetails about error status code