Altera SoCAL  16.0
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hps.h
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32 
35 #ifndef __ALTERA_HPS_H__
36 #define __ALTERA_HPS_H__
37 
38 #ifdef __cplusplus
39 extern "C"
40 {
41 #endif /* __cplusplus */
42 
43 #define ALT_HPS_ADDR 0
44 
56 #define ALT_STM_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_STM_ADDR) + ALT_STM_REG_OFST))
57 
58 #define ALT_STM_OFST 0xfc000000
59 
60 #define ALT_STM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_STM_OFST))
61 
62 #define ALT_STM_LB_ADDR ALT_STM_ADDR
63 
64 #define ALT_STM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_STM_ADDR) + 0x4) - 1))
65 
75 #define ALT_DAP_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_DAP_ADDR) + ALT_DAP_REG_OFST))
76 
77 #define ALT_DAP_OFST 0xff000000
78 
79 #define ALT_DAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DAP_OFST))
80 
81 #define ALT_DAP_LB_ADDR ALT_DAP_ADDR
82 
83 #define ALT_DAP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DAP_ADDR) + 0x4) - 1))
84 
94 #define ALT_LWFPGASLVS_OFST 0xff200000
95 
96 #define ALT_LWFPGASLVS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_LWFPGASLVS_OFST))
97 
98 #define ALT_LWFPGASLVS_LB_ADDR ALT_LWFPGASLVS_ADDR
99 
100 #define ALT_LWFPGASLVS_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWFPGASLVS_ADDR) + 0x200000) - 1))
101 
118 #define ALT_LWH2F_ID_PERIPH_ID_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_PERIPH_ID_4_OFST))
119 
120 #define ALT_LWH2F_ID_PERIPH_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_PERIPH_ID_0_OFST))
121 
122 #define ALT_LWH2F_ID_PERIPH_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_PERIPH_ID_1_OFST))
123 
124 #define ALT_LWH2F_ID_PERIPH_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_PERIPH_ID_2_OFST))
125 
126 #define ALT_LWH2F_ID_PERIPH_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_PERIPH_ID_3_OFST))
127 
128 #define ALT_LWH2F_ID_COMP_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_COMP_ID_0_OFST))
129 
130 #define ALT_LWH2F_ID_COMP_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_COMP_ID_1_OFST))
131 
132 #define ALT_LWH2F_ID_COMP_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_COMP_ID_2_OFST))
133 
134 #define ALT_LWH2F_ID_COMP_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + ALT_LWH2F_ID_COMP_ID_3_OFST))
135 
136 #define ALT_LWH2F_ID_OFST 0x1000
137 
138 #define ALT_LWH2F_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ADDR) + ALT_LWH2F_ID_OFST))
139 
140 #define ALT_LWH2F_ID_LB_ADDR ALT_LWH2F_ID_ADDR
141 
142 #define ALT_LWH2F_ID_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_ID_ADDR) + 0x1000) - 1))
143 
160 #define ALT_LWH2F_MST_MST_F2H_FN_MOD_BM_ISS_ADDR ALT_LWH2F_FN_MOD_BM_ISS_ADDR(ALT_LWH2F_MST_MST_F2H_ADDR)
161 
162 #define ALT_LWH2F_MST_MST_F2H_AHB_CNTL_ADDR ALT_LWH2F_AHB_CNTL_ADDR(ALT_LWH2F_MST_MST_F2H_ADDR)
163 
164 #define ALT_LWH2F_MST_MST_F2H_OFST 0x0
165 
166 #define ALT_LWH2F_MST_MST_F2H_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_MST_ADDR) + ALT_LWH2F_MST_MST_F2H_OFST))
167 
168 #define ALT_LWH2F_MST_MST_F2H_LB_ADDR ALT_LWH2F_MST_MST_F2H_ADDR
169 
170 #define ALT_LWH2F_MST_MST_F2H_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_MST_MST_F2H_ADDR) + 0x48) - 1))
171 
181 #define ALT_LWH2F_MST_MST_H2F_FN_MOD_BM_ISS_ADDR ALT_LWH2F_FN_MOD_BM_ISS_ADDR(ALT_LWH2F_MST_MST_H2F_ADDR)
182 
183 #define ALT_LWH2F_MST_MST_H2F_AHB_CNTL_ADDR ALT_LWH2F_AHB_CNTL_ADDR(ALT_LWH2F_MST_MST_H2F_ADDR)
184 
185 #define ALT_LWH2F_MST_MST_H2F_OFST 0x1000
186 
187 #define ALT_LWH2F_MST_MST_H2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_MST_ADDR) + ALT_LWH2F_MST_MST_H2F_OFST))
188 
189 #define ALT_LWH2F_MST_MST_H2F_LB_ADDR ALT_LWH2F_MST_MST_H2F_ADDR
190 
191 #define ALT_LWH2F_MST_MST_H2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_MST_MST_H2F_ADDR) + 0x48) - 1))
192 
202 #define ALT_LWH2F_MST_MST_B32_FN_MOD_BM_ISS_ADDR ALT_LWH2F_FN_MOD_BM_ISS_ADDR(ALT_LWH2F_MST_MST_B32_ADDR)
203 
204 #define ALT_LWH2F_MST_MST_B32_WR_TIDEMARK_ADDR ALT_LWH2F_WR_TIDEMARK_ADDR(ALT_LWH2F_MST_MST_B32_ADDR)
205 
206 #define ALT_LWH2F_MST_MST_B32_FN_MOD_ADDR ALT_LWH2F_FN_MOD_ADDR(ALT_LWH2F_MST_MST_B32_ADDR)
207 
208 #define ALT_LWH2F_MST_MST_B32_OFST 0x3000
209 
210 #define ALT_LWH2F_MST_MST_B32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_MST_ADDR) + ALT_LWH2F_MST_MST_B32_OFST))
211 
212 #define ALT_LWH2F_MST_MST_B32_LB_ADDR ALT_LWH2F_MST_MST_B32_ADDR
213 
214 #define ALT_LWH2F_MST_MST_B32_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_MST_MST_B32_ADDR) + 0x10c) - 1))
215 
218 #define ALT_LWH2F_MST_OFST 0x2000
219 
220 #define ALT_LWH2F_MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ADDR) + ALT_LWH2F_MST_OFST))
221 
222 #define ALT_LWH2F_MST_LB_ADDR ALT_LWH2F_MST_ADDR
223 
224 #define ALT_LWH2F_MST_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_MST_ADDR) + 0x310c) - 1))
225 
242 #define ALT_LWH2F_SLV_SLV_B32_FN_MOD_ADDR ALT_LWH2F_FN_MOD_ADDR(ALT_LWH2F_SLV_SLV_B32_ADDR)
243 
244 #define ALT_LWH2F_SLV_SLV_B32_OFST 0x3000
245 
246 #define ALT_LWH2F_SLV_SLV_B32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_SLV_ADDR) + ALT_LWH2F_SLV_SLV_B32_OFST))
247 
248 #define ALT_LWH2F_SLV_SLV_B32_LB_ADDR ALT_LWH2F_SLV_SLV_B32_ADDR
249 
250 #define ALT_LWH2F_SLV_SLV_B32_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_SLV_SLV_B32_ADDR) + 0x10c) - 1))
251 
254 #define ALT_LWH2F_SLV_OFST 0x42000
255 
256 #define ALT_LWH2F_SLV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_LWH2F_ADDR) + ALT_LWH2F_SLV_OFST))
257 
258 #define ALT_LWH2F_SLV_LB_ADDR ALT_LWH2F_SLV_ADDR
259 
260 #define ALT_LWH2F_SLV_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_SLV_ADDR) + 0x310c) - 1))
261 
264 #define ALT_LWH2F_OFST 0xff400000
265 
266 #define ALT_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_LWH2F_OFST))
267 
268 #define ALT_LWH2F_LB_ADDR ALT_LWH2F_ADDR
269 
270 #define ALT_LWH2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_LWH2F_ADDR) + 0x80000) - 1))
271 
288 #define ALT_H2F_ID_PERIPH_ID_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_PERIPH_ID_4_OFST))
289 
290 #define ALT_H2F_ID_PERIPH_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_PERIPH_ID_0_OFST))
291 
292 #define ALT_H2F_ID_PERIPH_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_PERIPH_ID_1_OFST))
293 
294 #define ALT_H2F_ID_PERIPH_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_PERIPH_ID_2_OFST))
295 
296 #define ALT_H2F_ID_PERIPH_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_PERIPH_ID_3_OFST))
297 
298 #define ALT_H2F_ID_COMP_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_COMP_ID_0_OFST))
299 
300 #define ALT_H2F_ID_COMP_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_COMP_ID_1_OFST))
301 
302 #define ALT_H2F_ID_COMP_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_COMP_ID_2_OFST))
303 
304 #define ALT_H2F_ID_COMP_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + ALT_H2F_ID_COMP_ID_3_OFST))
305 
306 #define ALT_H2F_IDGRP_OFST 0x1000
307 
308 #define ALT_H2F_IDGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_ADDR) + ALT_H2F_IDGRP_OFST))
309 
310 #define ALT_H2F_IDGRP_LB_ADDR ALT_H2F_IDGRP_ADDR
311 
312 #define ALT_H2F_IDGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_H2F_IDGRP_ADDR) + 0x1000) - 1))
313 
330 #define ALT_H2F_MST_MST_B32_FN_MOD2_ADDR ALT_H2F_FN_MOD2_ADDR(ALT_H2F_MST_MST_B32_ADDR)
331 
332 #define ALT_H2F_MST_MST_B32_FN_MOD_ADDR ALT_H2F_FN_MOD_ADDR(ALT_H2F_MST_MST_B32_ADDR)
333 
334 #define ALT_H2F_MST_MST_B32_OFST 0x0
335 
336 #define ALT_H2F_MST_MST_B32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_MSTGRP_ADDR) + ALT_H2F_MST_MST_B32_OFST))
337 
338 #define ALT_H2F_MST_MST_B32_LB_ADDR ALT_H2F_MST_MST_B32_ADDR
339 
340 #define ALT_H2F_MST_MST_B32_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_H2F_MST_MST_B32_ADDR) + 0x10c) - 1))
341 
351 #define ALT_H2F_MST_MST_B128_FN_MOD2_ADDR ALT_H2F_FN_MOD2_ADDR(ALT_H2F_MST_MST_B128_ADDR)
352 
353 #define ALT_H2F_MST_MST_B128_FN_MOD_ADDR ALT_H2F_FN_MOD_ADDR(ALT_H2F_MST_MST_B128_ADDR)
354 
355 #define ALT_H2F_MST_MST_B128_OFST 0x2000
356 
357 #define ALT_H2F_MST_MST_B128_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_MSTGRP_ADDR) + ALT_H2F_MST_MST_B128_OFST))
358 
359 #define ALT_H2F_MST_MST_B128_LB_ADDR ALT_H2F_MST_MST_B128_ADDR
360 
361 #define ALT_H2F_MST_MST_B128_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_H2F_MST_MST_B128_ADDR) + 0x10c) - 1))
362 
365 #define ALT_H2F_MSTGRP_OFST 0x2000
366 
367 #define ALT_H2F_MSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_H2F_ADDR) + ALT_H2F_MSTGRP_OFST))
368 
369 #define ALT_H2F_MSTGRP_LB_ADDR ALT_H2F_MSTGRP_ADDR
370 
371 #define ALT_H2F_MSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_H2F_MSTGRP_ADDR) + 0x210c) - 1))
372 
375 #define ALT_H2F_OFST 0xff500000
376 
377 #define ALT_H2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_H2F_OFST))
378 
379 #define ALT_H2F_LB_ADDR ALT_H2F_ADDR
380 
381 #define ALT_H2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_H2F_ADDR) + 0x8000) - 1))
382 
399 #define ALT_F2H_ID_PERIPH_ID_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_PERIPH_ID_4_OFST))
400 
401 #define ALT_F2H_ID_PERIPH_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_PERIPH_ID_0_OFST))
402 
403 #define ALT_F2H_ID_PERIPH_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_PERIPH_ID_1_OFST))
404 
405 #define ALT_F2H_ID_PERIPH_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_PERIPH_ID_2_OFST))
406 
407 #define ALT_F2H_ID_PERIPH_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_PERIPH_ID_3_OFST))
408 
409 #define ALT_F2H_ID_COMP_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_COMP_ID_0_OFST))
410 
411 #define ALT_F2H_ID_COMP_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_COMP_ID_1_OFST))
412 
413 #define ALT_F2H_ID_COMP_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_COMP_ID_2_OFST))
414 
415 #define ALT_F2H_ID_COMP_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + ALT_F2H_ID_COMP_ID_3_OFST))
416 
417 #define ALT_F2H_IDGRP_OFST 0x1000
418 
419 #define ALT_F2H_IDGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_ADDR) + ALT_F2H_IDGRP_OFST))
420 
421 #define ALT_F2H_IDGRP_LB_ADDR ALT_F2H_IDGRP_ADDR
422 
423 #define ALT_F2H_IDGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_F2H_IDGRP_ADDR) + 0x1000) - 1))
424 
441 #define ALT_F2H_SLV_SLV_B32_FN_MOD2_ADDR ALT_F2H_FN_MOD2_ADDR(ALT_F2H_SLV_SLV_B32_ADDR)
442 
443 #define ALT_F2H_SLV_SLV_B32_FN_MOD_ADDR ALT_F2H_FN_MOD_ADDR(ALT_F2H_SLV_SLV_B32_ADDR)
444 
445 #define ALT_F2H_SLV_SLV_B32_OFST 0x0
446 
447 #define ALT_F2H_SLV_SLV_B32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_SLVGRP_ADDR) + ALT_F2H_SLV_SLV_B32_OFST))
448 
449 #define ALT_F2H_SLV_SLV_B32_LB_ADDR ALT_F2H_SLV_SLV_B32_ADDR
450 
451 #define ALT_F2H_SLV_SLV_B32_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_F2H_SLV_SLV_B32_ADDR) + 0x10c) - 1))
452 
462 #define ALT_F2H_SLV_SLV_B128_FN_MOD2_ADDR ALT_F2H_FN_MOD2_ADDR(ALT_F2H_SLV_SLV_B128_ADDR)
463 
464 #define ALT_F2H_SLV_SLV_B128_FN_MOD_ADDR ALT_F2H_FN_MOD_ADDR(ALT_F2H_SLV_SLV_B128_ADDR)
465 
466 #define ALT_F2H_SLV_SLV_B128_OFST 0x2000
467 
468 #define ALT_F2H_SLV_SLV_B128_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_SLVGRP_ADDR) + ALT_F2H_SLV_SLV_B128_OFST))
469 
470 #define ALT_F2H_SLV_SLV_B128_LB_ADDR ALT_F2H_SLV_SLV_B128_ADDR
471 
472 #define ALT_F2H_SLV_SLV_B128_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_F2H_SLV_SLV_B128_ADDR) + 0x10c) - 1))
473 
476 #define ALT_F2H_SLVGRP_OFST 0x42000
477 
478 #define ALT_F2H_SLVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_F2H_ADDR) + ALT_F2H_SLVGRP_OFST))
479 
480 #define ALT_F2H_SLVGRP_LB_ADDR ALT_F2H_SLVGRP_ADDR
481 
482 #define ALT_F2H_SLVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_F2H_SLVGRP_ADDR) + 0x210c) - 1))
483 
486 #define ALT_F2H_OFST 0xff600000
487 
488 #define ALT_F2H_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_F2H_OFST))
489 
490 #define ALT_F2H_LB_ADDR ALT_F2H_ADDR
491 
492 #define ALT_F2H_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_F2H_ADDR) + 0x80000) - 1))
493 
510 #define ALT_EMAC0_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC0_GMACGRP_ADDR)
511 
512 #define ALT_EMAC0_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
513 
514 #define ALT_EMAC0_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
515 
516 #define ALT_EMAC0_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC0_GMACGRP_ADDR)
517 
518 #define ALT_EMAC0_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
519 
520 #define ALT_EMAC0_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC0_GMACGRP_ADDR)
521 
522 #define ALT_EMAC0_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC0_GMACGRP_ADDR)
523 
524 #define ALT_EMAC0_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC0_GMACGRP_ADDR)
525 
526 #define ALT_EMAC0_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
527 
528 #define ALT_EMAC0_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
529 
530 #define ALT_EMAC0_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
531 
532 #define ALT_EMAC0_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC0_GMACGRP_ADDR)
533 
534 #define ALT_EMAC0_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
535 
536 #define ALT_EMAC0_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
537 
538 #define ALT_EMAC0_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
539 
540 #define ALT_EMAC0_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
541 
542 #define ALT_EMAC0_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
543 
544 #define ALT_EMAC0_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
545 
546 #define ALT_EMAC0_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
547 
548 #define ALT_EMAC0_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
549 
550 #define ALT_EMAC0_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
551 
552 #define ALT_EMAC0_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
553 
554 #define ALT_EMAC0_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
555 
556 #define ALT_EMAC0_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
557 
558 #define ALT_EMAC0_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
559 
560 #define ALT_EMAC0_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
561 
562 #define ALT_EMAC0_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
563 
564 #define ALT_EMAC0_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
565 
566 #define ALT_EMAC0_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
567 
568 #define ALT_EMAC0_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
569 
570 #define ALT_EMAC0_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
571 
572 #define ALT_EMAC0_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
573 
574 #define ALT_EMAC0_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
575 
576 #define ALT_EMAC0_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
577 
578 #define ALT_EMAC0_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
579 
580 #define ALT_EMAC0_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
581 
582 #define ALT_EMAC0_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
583 
584 #define ALT_EMAC0_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
585 
586 #define ALT_EMAC0_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
587 
588 #define ALT_EMAC0_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
589 
590 #define ALT_EMAC0_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
591 
592 #define ALT_EMAC0_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
593 
594 #define ALT_EMAC0_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
595 
596 #define ALT_EMAC0_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
597 
598 #define ALT_EMAC0_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
599 
600 #define ALT_EMAC0_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
601 
602 #define ALT_EMAC0_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
603 
604 #define ALT_EMAC0_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
605 
606 #define ALT_EMAC0_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC0_GMACGRP_ADDR)
607 
608 #define ALT_EMAC0_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC0_GMACGRP_ADDR)
609 
610 #define ALT_EMAC0_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
611 
612 #define ALT_EMAC0_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
613 
614 #define ALT_EMAC0_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
615 
616 #define ALT_EMAC0_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
617 
618 #define ALT_EMAC0_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
619 
620 #define ALT_EMAC0_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
621 
622 #define ALT_EMAC0_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
623 
624 #define ALT_EMAC0_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
625 
626 #define ALT_EMAC0_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
627 
628 #define ALT_EMAC0_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
629 
630 #define ALT_EMAC0_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
631 
632 #define ALT_EMAC0_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
633 
634 #define ALT_EMAC0_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
635 
636 #define ALT_EMAC0_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
637 
638 #define ALT_EMAC0_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
639 
640 #define ALT_EMAC0_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
641 
642 #define ALT_EMAC0_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC0_GMACGRP_ADDR)
643 
644 #define ALT_EMAC0_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
645 
646 #define ALT_EMAC0_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
647 
648 #define ALT_EMAC0_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
649 
650 #define ALT_EMAC0_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
651 
652 #define ALT_EMAC0_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
653 
654 #define ALT_EMAC0_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC0_GMACGRP_ADDR)
655 
656 #define ALT_EMAC0_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
657 
658 #define ALT_EMAC0_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
659 
660 #define ALT_EMAC0_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
661 
662 #define ALT_EMAC0_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
663 
664 #define ALT_EMAC0_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
665 
666 #define ALT_EMAC0_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
667 
668 #define ALT_EMAC0_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
669 
670 #define ALT_EMAC0_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
671 
672 #define ALT_EMAC0_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
673 
674 #define ALT_EMAC0_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
675 
676 #define ALT_EMAC0_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
677 
678 #define ALT_EMAC0_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
679 
680 #define ALT_EMAC0_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
681 
682 #define ALT_EMAC0_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
683 
684 #define ALT_EMAC0_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
685 
686 #define ALT_EMAC0_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
687 
688 #define ALT_EMAC0_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
689 
690 #define ALT_EMAC0_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
691 
692 #define ALT_EMAC0_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
693 
694 #define ALT_EMAC0_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
695 
696 #define ALT_EMAC0_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
697 
698 #define ALT_EMAC0_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
699 
700 #define ALT_EMAC0_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC0_GMACGRP_ADDR)
701 
702 #define ALT_EMAC0_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
703 
704 #define ALT_EMAC0_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC0_GMACGRP_ADDR)
705 
706 #define ALT_EMAC0_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC0_GMACGRP_ADDR)
707 
708 #define ALT_EMAC0_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
709 
710 #define ALT_EMAC0_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC0_GMACGRP_ADDR)
711 
712 #define ALT_EMAC0_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC0_GMACGRP_ADDR)
713 
714 #define ALT_EMAC0_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC0_GMACGRP_ADDR)
715 
716 #define ALT_EMAC0_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
717 
718 #define ALT_EMAC0_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
719 
720 #define ALT_EMAC0_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
721 
722 #define ALT_EMAC0_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
723 
724 #define ALT_EMAC0_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
725 
726 #define ALT_EMAC0_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
727 
728 #define ALT_EMAC0_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
729 
730 #define ALT_EMAC0_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
731 
732 #define ALT_EMAC0_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
733 
734 #define ALT_EMAC0_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
735 
736 #define ALT_EMAC0_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
737 
738 #define ALT_EMAC0_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
739 
740 #define ALT_EMAC0_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
741 
742 #define ALT_EMAC0_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
743 
744 #define ALT_EMAC0_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
745 
746 #define ALT_EMAC0_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
747 
748 #define ALT_EMAC0_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
749 
750 #define ALT_EMAC0_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
751 
752 #define ALT_EMAC0_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
753 
754 #define ALT_EMAC0_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
755 
756 #define ALT_EMAC0_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
757 
758 #define ALT_EMAC0_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
759 
760 #define ALT_EMAC0_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
761 
762 #define ALT_EMAC0_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
763 
764 #define ALT_EMAC0_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
765 
766 #define ALT_EMAC0_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
767 
768 #define ALT_EMAC0_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
769 
770 #define ALT_EMAC0_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
771 
772 #define ALT_EMAC0_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
773 
774 #define ALT_EMAC0_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
775 
776 #define ALT_EMAC0_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
777 
778 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
779 
780 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
781 
782 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
783 
784 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
785 
786 #define ALT_EMAC0_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
787 
788 #define ALT_EMAC0_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
789 
790 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
791 
792 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
793 
794 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
795 
796 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
797 
798 #define ALT_EMAC0_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
799 
800 #define ALT_EMAC0_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
801 
802 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
803 
804 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
805 
806 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
807 
808 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
809 
810 #define ALT_EMAC0_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
811 
812 #define ALT_EMAC0_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
813 
814 #define ALT_EMAC0_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
815 
816 #define ALT_EMAC0_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
817 
818 #define ALT_EMAC0_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
819 
820 #define ALT_EMAC0_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
821 
822 #define ALT_EMAC0_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC0_GMACGRP_ADDR)
823 
824 #define ALT_EMAC0_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC0_GMACGRP_ADDR)
825 
826 #define ALT_EMAC0_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC0_GMACGRP_ADDR)
827 
828 #define ALT_EMAC0_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC0_GMACGRP_ADDR)
829 
830 #define ALT_EMAC0_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC0_GMACGRP_ADDR)
831 
832 #define ALT_EMAC0_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC0_GMACGRP_ADDR)
833 
834 #define ALT_EMAC0_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC0_GMACGRP_ADDR)
835 
836 #define ALT_EMAC0_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC0_GMACGRP_ADDR)
837 
838 #define ALT_EMAC0_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC0_GMACGRP_ADDR)
839 
840 #define ALT_EMAC0_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC0_GMACGRP_ADDR)
841 
842 #define ALT_EMAC0_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
843 
844 #define ALT_EMAC0_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
845 
846 #define ALT_EMAC0_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
847 
848 #define ALT_EMAC0_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
849 
850 #define ALT_EMAC0_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC0_GMACGRP_ADDR)
851 
852 #define ALT_EMAC0_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC0_GMACGRP_ADDR)
853 
854 #define ALT_EMAC0_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC0_GMACGRP_ADDR)
855 
856 #define ALT_EMAC0_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
857 
858 #define ALT_EMAC0_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
859 
860 #define ALT_EMAC0_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
861 
862 #define ALT_EMAC0_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC0_GMACGRP_ADDR)
863 
864 #define ALT_EMAC0_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
865 
866 #define ALT_EMAC0_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
867 
868 #define ALT_EMAC0_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC0_GMACGRP_ADDR)
869 
870 #define ALT_EMAC0_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC0_GMACGRP_ADDR)
871 
872 #define ALT_EMAC0_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
873 
874 #define ALT_EMAC0_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
875 
876 #define ALT_EMAC0_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
877 
878 #define ALT_EMAC0_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
879 
880 #define ALT_EMAC0_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
881 
882 #define ALT_EMAC0_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
883 
884 #define ALT_EMAC0_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
885 
886 #define ALT_EMAC0_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
887 
888 #define ALT_EMAC0_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
889 
890 #define ALT_EMAC0_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
891 
892 #define ALT_EMAC0_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
893 
894 #define ALT_EMAC0_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
895 
896 #define ALT_EMAC0_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
897 
898 #define ALT_EMAC0_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
899 
900 #define ALT_EMAC0_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
901 
902 #define ALT_EMAC0_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
903 
904 #define ALT_EMAC0_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
905 
906 #define ALT_EMAC0_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
907 
908 #define ALT_EMAC0_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
909 
910 #define ALT_EMAC0_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
911 
912 #define ALT_EMAC0_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
913 
914 #define ALT_EMAC0_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
915 
916 #define ALT_EMAC0_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
917 
918 #define ALT_EMAC0_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
919 
920 #define ALT_EMAC0_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
921 
922 #define ALT_EMAC0_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
923 
924 #define ALT_EMAC0_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
925 
926 #define ALT_EMAC0_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
927 
928 #define ALT_EMAC0_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
929 
930 #define ALT_EMAC0_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
931 
932 #define ALT_EMAC0_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
933 
934 #define ALT_EMAC0_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
935 
936 #define ALT_EMAC0_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
937 
938 #define ALT_EMAC0_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
939 
940 #define ALT_EMAC0_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
941 
942 #define ALT_EMAC0_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
943 
944 #define ALT_EMAC0_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
945 
946 #define ALT_EMAC0_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
947 
948 #define ALT_EMAC0_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
949 
950 #define ALT_EMAC0_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
951 
952 #define ALT_EMAC0_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
953 
954 #define ALT_EMAC0_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
955 
956 #define ALT_EMAC0_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
957 
958 #define ALT_EMAC0_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
959 
960 #define ALT_EMAC0_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
961 
962 #define ALT_EMAC0_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
963 
964 #define ALT_EMAC0_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
965 
966 #define ALT_EMAC0_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
967 
968 #define ALT_EMAC0_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
969 
970 #define ALT_EMAC0_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
971 
972 #define ALT_EMAC0_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
973 
974 #define ALT_EMAC0_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
975 
976 #define ALT_EMAC0_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
977 
978 #define ALT_EMAC0_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
979 
980 #define ALT_EMAC0_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
981 
982 #define ALT_EMAC0_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
983 
984 #define ALT_EMAC0_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
985 
986 #define ALT_EMAC0_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
987 
988 #define ALT_EMAC0_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
989 
990 #define ALT_EMAC0_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
991 
992 #define ALT_EMAC0_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
993 
994 #define ALT_EMAC0_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
995 
996 #define ALT_EMAC0_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
997 
998 #define ALT_EMAC0_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
999 
1000 #define ALT_EMAC0_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1001 
1002 #define ALT_EMAC0_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1003 
1004 #define ALT_EMAC0_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1005 
1006 #define ALT_EMAC0_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1007 
1008 #define ALT_EMAC0_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1009 
1010 #define ALT_EMAC0_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1011 
1012 #define ALT_EMAC0_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1013 
1014 #define ALT_EMAC0_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1015 
1016 #define ALT_EMAC0_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1017 
1018 #define ALT_EMAC0_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1019 
1020 #define ALT_EMAC0_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1021 
1022 #define ALT_EMAC0_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1023 
1024 #define ALT_EMAC0_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1025 
1026 #define ALT_EMAC0_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1027 
1028 #define ALT_EMAC0_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1029 
1030 #define ALT_EMAC0_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1031 
1032 #define ALT_EMAC0_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1033 
1034 #define ALT_EMAC0_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1035 
1036 #define ALT_EMAC0_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1037 
1038 #define ALT_EMAC0_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1039 
1040 #define ALT_EMAC0_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1041 
1042 #define ALT_EMAC0_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1043 
1044 #define ALT_EMAC0_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1045 
1046 #define ALT_EMAC0_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1047 
1048 #define ALT_EMAC0_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1049 
1050 #define ALT_EMAC0_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1051 
1052 #define ALT_EMAC0_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1053 
1054 #define ALT_EMAC0_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1055 
1056 #define ALT_EMAC0_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1057 
1058 #define ALT_EMAC0_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1059 
1060 #define ALT_EMAC0_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1061 
1062 #define ALT_EMAC0_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1063 
1064 #define ALT_EMAC0_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1065 
1066 #define ALT_EMAC0_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1067 
1068 #define ALT_EMAC0_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1069 
1070 #define ALT_EMAC0_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1071 
1072 #define ALT_EMAC0_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1073 
1074 #define ALT_EMAC0_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1075 
1076 #define ALT_EMAC0_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1077 
1078 #define ALT_EMAC0_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1079 
1080 #define ALT_EMAC0_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1081 
1082 #define ALT_EMAC0_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1083 
1084 #define ALT_EMAC0_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1085 
1086 #define ALT_EMAC0_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1087 
1088 #define ALT_EMAC0_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1089 
1090 #define ALT_EMAC0_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1091 
1092 #define ALT_EMAC0_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1093 
1094 #define ALT_EMAC0_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1095 
1096 #define ALT_EMAC0_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1097 
1098 #define ALT_EMAC0_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1099 
1100 #define ALT_EMAC0_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1101 
1102 #define ALT_EMAC0_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1103 
1104 #define ALT_EMAC0_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1105 
1106 #define ALT_EMAC0_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1107 
1108 #define ALT_EMAC0_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1109 
1110 #define ALT_EMAC0_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1111 
1112 #define ALT_EMAC0_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1113 
1114 #define ALT_EMAC0_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1115 
1116 #define ALT_EMAC0_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1117 
1118 #define ALT_EMAC0_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1119 
1120 #define ALT_EMAC0_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1121 
1122 #define ALT_EMAC0_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1123 
1124 #define ALT_EMAC0_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1125 
1126 #define ALT_EMAC0_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1127 
1128 #define ALT_EMAC0_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1129 
1130 #define ALT_EMAC0_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1131 
1132 #define ALT_EMAC0_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1133 
1134 #define ALT_EMAC0_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1135 
1136 #define ALT_EMAC0_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1137 
1138 #define ALT_EMAC0_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1139 
1140 #define ALT_EMAC0_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1141 
1142 #define ALT_EMAC0_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1143 
1144 #define ALT_EMAC0_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1145 
1146 #define ALT_EMAC0_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1147 
1148 #define ALT_EMAC0_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1149 
1150 #define ALT_EMAC0_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1151 
1152 #define ALT_EMAC0_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1153 
1154 #define ALT_EMAC0_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1155 
1156 #define ALT_EMAC0_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1157 
1158 #define ALT_EMAC0_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1159 
1160 #define ALT_EMAC0_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1161 
1162 #define ALT_EMAC0_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1163 
1164 #define ALT_EMAC0_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1165 
1166 #define ALT_EMAC0_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1167 
1168 #define ALT_EMAC0_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1169 
1170 #define ALT_EMAC0_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1171 
1172 #define ALT_EMAC0_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1173 
1174 #define ALT_EMAC0_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1175 
1176 #define ALT_EMAC0_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1177 
1178 #define ALT_EMAC0_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1179 
1180 #define ALT_EMAC0_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1181 
1182 #define ALT_EMAC0_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1183 
1184 #define ALT_EMAC0_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1185 
1186 #define ALT_EMAC0_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1187 
1188 #define ALT_EMAC0_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1189 
1190 #define ALT_EMAC0_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1191 
1192 #define ALT_EMAC0_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1193 
1194 #define ALT_EMAC0_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1195 
1196 #define ALT_EMAC0_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1197 
1198 #define ALT_EMAC0_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1199 
1200 #define ALT_EMAC0_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1201 
1202 #define ALT_EMAC0_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1203 
1204 #define ALT_EMAC0_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1205 
1206 #define ALT_EMAC0_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1207 
1208 #define ALT_EMAC0_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1209 
1210 #define ALT_EMAC0_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1211 
1212 #define ALT_EMAC0_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1213 
1214 #define ALT_EMAC0_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1215 
1216 #define ALT_EMAC0_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1217 
1218 #define ALT_EMAC0_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1219 
1220 #define ALT_EMAC0_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1221 
1222 #define ALT_EMAC0_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1223 
1224 #define ALT_EMAC0_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1225 
1226 #define ALT_EMAC0_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1227 
1228 #define ALT_EMAC0_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1229 
1230 #define ALT_EMAC0_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1231 
1232 #define ALT_EMAC0_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1233 
1234 #define ALT_EMAC0_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1235 
1236 #define ALT_EMAC0_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1237 
1238 #define ALT_EMAC0_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1239 
1240 #define ALT_EMAC0_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1241 
1242 #define ALT_EMAC0_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1243 
1244 #define ALT_EMAC0_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1245 
1246 #define ALT_EMAC0_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1247 
1248 #define ALT_EMAC0_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1249 
1250 #define ALT_EMAC0_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1251 
1252 #define ALT_EMAC0_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1253 
1254 #define ALT_EMAC0_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1255 
1256 #define ALT_EMAC0_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1257 
1258 #define ALT_EMAC0_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1259 
1260 #define ALT_EMAC0_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1261 
1262 #define ALT_EMAC0_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1263 
1264 #define ALT_EMAC0_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1265 
1266 #define ALT_EMAC0_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1267 
1268 #define ALT_EMAC0_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1269 
1270 #define ALT_EMAC0_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1271 
1272 #define ALT_EMAC0_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1273 
1274 #define ALT_EMAC0_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1275 
1276 #define ALT_EMAC0_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1277 
1278 #define ALT_EMAC0_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1279 
1280 #define ALT_EMAC0_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1281 
1282 #define ALT_EMAC0_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1283 
1284 #define ALT_EMAC0_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1285 
1286 #define ALT_EMAC0_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1287 
1288 #define ALT_EMAC0_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1289 
1290 #define ALT_EMAC0_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1291 
1292 #define ALT_EMAC0_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1293 
1294 #define ALT_EMAC0_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1295 
1296 #define ALT_EMAC0_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1297 
1298 #define ALT_EMAC0_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1299 
1300 #define ALT_EMAC0_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1301 
1302 #define ALT_EMAC0_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1303 
1304 #define ALT_EMAC0_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1305 
1306 #define ALT_EMAC0_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1307 
1308 #define ALT_EMAC0_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1309 
1310 #define ALT_EMAC0_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1311 
1312 #define ALT_EMAC0_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1313 
1314 #define ALT_EMAC0_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1315 
1316 #define ALT_EMAC0_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1317 
1318 #define ALT_EMAC0_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1319 
1320 #define ALT_EMAC0_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC0_GMACGRP_ADDR)
1321 
1322 #define ALT_EMAC0_GMACGRP_OFST 0x0
1323 
1324 #define ALT_EMAC0_GMACGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_EMAC0_ADDR) + ALT_EMAC0_GMACGRP_OFST))
1325 
1326 #define ALT_EMAC0_GMACGRP_LB_ADDR ALT_EMAC0_GMACGRP_ADDR
1327 
1328 #define ALT_EMAC0_GMACGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC0_GMACGRP_ADDR) + 0xb80) - 1))
1329 
1339 #define ALT_EMAC0_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1340 
1341 #define ALT_EMAC0_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1342 
1343 #define ALT_EMAC0_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1344 
1345 #define ALT_EMAC0_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1346 
1347 #define ALT_EMAC0_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1348 
1349 #define ALT_EMAC0_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1350 
1351 #define ALT_EMAC0_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1352 
1353 #define ALT_EMAC0_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1354 
1355 #define ALT_EMAC0_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1356 
1357 #define ALT_EMAC0_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1358 
1359 #define ALT_EMAC0_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1360 
1361 #define ALT_EMAC0_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1362 
1363 #define ALT_EMAC0_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1364 
1365 #define ALT_EMAC0_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1366 
1367 #define ALT_EMAC0_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1368 
1369 #define ALT_EMAC0_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1370 
1371 #define ALT_EMAC0_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC0_DMAGRP_ADDR)
1372 
1373 #define ALT_EMAC0_DMAGRP_OFST 0x1000
1374 
1375 #define ALT_EMAC0_DMAGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_EMAC0_ADDR) + ALT_EMAC0_DMAGRP_OFST))
1376 
1377 #define ALT_EMAC0_DMAGRP_LB_ADDR ALT_EMAC0_DMAGRP_ADDR
1378 
1379 #define ALT_EMAC0_DMAGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC0_DMAGRP_ADDR) + 0x5c) - 1))
1380 
1383 #define ALT_EMAC0_OFST 0xff700000
1384 
1385 #define ALT_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC0_OFST))
1386 
1387 #define ALT_EMAC0_LB_ADDR ALT_EMAC0_ADDR
1388 
1389 #define ALT_EMAC0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC0_ADDR) + 0x2000) - 1))
1390 
1407 #define ALT_EMAC1_GMAC_MAC_CFG_ADDR ALT_EMAC_GMAC_MAC_CFG_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1408 
1409 #define ALT_EMAC1_GMAC_MAC_FRM_FLT_ADDR ALT_EMAC_GMAC_MAC_FRM_FLT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1410 
1411 #define ALT_EMAC1_GMAC_GMII_ADDR_ADDR ALT_EMAC_GMAC_GMII_ADDR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1412 
1413 #define ALT_EMAC1_GMAC_GMII_DATA_ADDR ALT_EMAC_GMAC_GMII_DATA_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1414 
1415 #define ALT_EMAC1_GMAC_FLOW_CTL_ADDR ALT_EMAC_GMAC_FLOW_CTL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1416 
1417 #define ALT_EMAC1_GMAC_VLAN_TAG_ADDR ALT_EMAC_GMAC_VLAN_TAG_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1418 
1419 #define ALT_EMAC1_GMAC_VER_ADDR ALT_EMAC_GMAC_VER_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1420 
1421 #define ALT_EMAC1_GMAC_DBG_ADDR ALT_EMAC_GMAC_DBG_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1422 
1423 #define ALT_EMAC1_GMAC_LPI_CTL_STAT_ADDR ALT_EMAC_GMAC_LPI_CTL_STAT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1424 
1425 #define ALT_EMAC1_GMAC_LPI_TMRS_CTL_ADDR ALT_EMAC_GMAC_LPI_TMRS_CTL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1426 
1427 #define ALT_EMAC1_GMAC_INT_STAT_ADDR ALT_EMAC_GMAC_INT_STAT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1428 
1429 #define ALT_EMAC1_GMAC_INT_MSK_ADDR ALT_EMAC_GMAC_INT_MSK_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1430 
1431 #define ALT_EMAC1_GMAC_MAC_ADDR0_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR0_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1432 
1433 #define ALT_EMAC1_GMAC_MAC_ADDR0_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR0_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1434 
1435 #define ALT_EMAC1_GMAC_MAC_ADDR1_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR1_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1436 
1437 #define ALT_EMAC1_GMAC_MAC_ADDR1_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR1_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1438 
1439 #define ALT_EMAC1_GMAC_MAC_ADDR2_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR2_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1440 
1441 #define ALT_EMAC1_GMAC_MAC_ADDR2_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR2_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1442 
1443 #define ALT_EMAC1_GMAC_MAC_ADDR3_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR3_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1444 
1445 #define ALT_EMAC1_GMAC_MAC_ADDR3_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR3_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1446 
1447 #define ALT_EMAC1_GMAC_MAC_ADDR4_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR4_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1448 
1449 #define ALT_EMAC1_GMAC_MAC_ADDR4_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR4_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1450 
1451 #define ALT_EMAC1_GMAC_MAC_ADDR5_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR5_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1452 
1453 #define ALT_EMAC1_GMAC_MAC_ADDR5_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR5_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1454 
1455 #define ALT_EMAC1_GMAC_MAC_ADDR6_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR6_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1456 
1457 #define ALT_EMAC1_GMAC_MAC_ADDR6_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR6_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1458 
1459 #define ALT_EMAC1_GMAC_MAC_ADDR7_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR7_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1460 
1461 #define ALT_EMAC1_GMAC_MAC_ADDR7_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR7_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1462 
1463 #define ALT_EMAC1_GMAC_MAC_ADDR8_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR8_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1464 
1465 #define ALT_EMAC1_GMAC_MAC_ADDR8_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR8_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1466 
1467 #define ALT_EMAC1_GMAC_MAC_ADDR9_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR9_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1468 
1469 #define ALT_EMAC1_GMAC_MAC_ADDR9_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR9_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1470 
1471 #define ALT_EMAC1_GMAC_MAC_ADDR10_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR10_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1472 
1473 #define ALT_EMAC1_GMAC_MAC_ADDR10_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR10_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1474 
1475 #define ALT_EMAC1_GMAC_MAC_ADDR11_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR11_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1476 
1477 #define ALT_EMAC1_GMAC_MAC_ADDR11_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR11_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1478 
1479 #define ALT_EMAC1_GMAC_MAC_ADDR12_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR12_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1480 
1481 #define ALT_EMAC1_GMAC_MAC_ADDR12_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR12_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1482 
1483 #define ALT_EMAC1_GMAC_MAC_ADDR13_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR13_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1484 
1485 #define ALT_EMAC1_GMAC_MAC_ADDR13_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR13_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1486 
1487 #define ALT_EMAC1_GMAC_MAC_ADDR14_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR14_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1488 
1489 #define ALT_EMAC1_GMAC_MAC_ADDR14_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR14_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1490 
1491 #define ALT_EMAC1_GMAC_MAC_ADDR15_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR15_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1492 
1493 #define ALT_EMAC1_GMAC_MAC_ADDR15_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR15_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1494 
1495 #define ALT_EMAC1_GMAC_SGMII_RGMII_SMII_CTL_STAT_ADDR ALT_EMAC_GMAC_MII_CTL_STAT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1496 
1497 #define ALT_EMAC1_GMAC_MMC_CTL_ADDR ALT_EMAC_GMAC_MMC_CTL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1498 
1499 #define ALT_EMAC1_GMAC_MMC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_RX_INT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1500 
1501 #define ALT_EMAC1_GMAC_MMC_TX_INT_ADDR ALT_EMAC_GMAC_MMC_TX_INT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1502 
1503 #define ALT_EMAC1_GMAC_MMC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_RX_INT_MSK_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1504 
1505 #define ALT_EMAC1_GMAC_MMC_TX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_TX_INT_MSK_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1506 
1507 #define ALT_EMAC1_GMAC_TXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_TXOCTETCOUNT_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1508 
1509 #define ALT_EMAC1_GMAC_TXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1510 
1511 #define ALT_EMAC1_GMAC_TXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1512 
1513 #define ALT_EMAC1_GMAC_TXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1514 
1515 #define ALT_EMAC1_GMAC_TX64OCTETS_GB_ADDR ALT_EMAC_GMAC_TX64OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1516 
1517 #define ALT_EMAC1_GMAC_TX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_TX65TO127OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1518 
1519 #define ALT_EMAC1_GMAC_TX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_TX128TO255OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1520 
1521 #define ALT_EMAC1_GMAC_TX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_TX256TO511OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1522 
1523 #define ALT_EMAC1_GMAC_TX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_TX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1524 
1525 #define ALT_EMAC1_GMAC_TX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_TX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1526 
1527 #define ALT_EMAC1_GMAC_TXUNICASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXUNICASTFRMS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1528 
1529 #define ALT_EMAC1_GMAC_TXMCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXMCASTFRMS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1530 
1531 #define ALT_EMAC1_GMAC_TXBCASTFRMS_GB_ADDR ALT_EMAC_GMAC_TXBCASTFRMS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1532 
1533 #define ALT_EMAC1_GMAC_TXUNDERFLOWERROR_ADDR ALT_EMAC_GMAC_TXUNDERFLOWERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1534 
1535 #define ALT_EMAC1_GMAC_TXSINGLECOL_G_ADDR ALT_EMAC_GMAC_TXSINGLECOL_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1536 
1537 #define ALT_EMAC1_GMAC_TXMULTICOL_G_ADDR ALT_EMAC_GMAC_TXMULTICOL_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1538 
1539 #define ALT_EMAC1_GMAC_TXDEFERRED_ADDR ALT_EMAC_GMAC_TXDEFERRED_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1540 
1541 #define ALT_EMAC1_GMAC_TXLATECOL_ADDR ALT_EMAC_GMAC_TXLATECOL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1542 
1543 #define ALT_EMAC1_GMAC_TXEXESSCOL_ADDR ALT_EMAC_GMAC_TXEXESSCOL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1544 
1545 #define ALT_EMAC1_GMAC_TXCARRIERERR_ADDR ALT_EMAC_GMAC_TXCARRIERERR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1546 
1547 #define ALT_EMAC1_GMAC_TXOCTETCNT_ADDR ALT_EMAC_GMAC_TXOCTETCNT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1548 
1549 #define ALT_EMAC1_GMAC_TXFRMCOUNT_G_ADDR ALT_EMAC_GMAC_TXFRMCOUNT_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1550 
1551 #define ALT_EMAC1_GMAC_TXEXCESSDEF_ADDR ALT_EMAC_GMAC_TXEXCESSDEF_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1552 
1553 #define ALT_EMAC1_GMAC_TXPAUSEFRMS_ADDR ALT_EMAC_GMAC_TXPAUSEFRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1554 
1555 #define ALT_EMAC1_GMAC_TXVLANFRMS_G_ADDR ALT_EMAC_GMAC_TXVLANFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1556 
1557 #define ALT_EMAC1_GMAC_TXOVERSIZE_G_ADDR ALT_EMAC_GMAC_TXOVERSIZE_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1558 
1559 #define ALT_EMAC1_GMAC_RXFRMCOUNT_GB_ADDR ALT_EMAC_GMAC_RXFRMCOUNT_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1560 
1561 #define ALT_EMAC1_GMAC_RXOCTETCOUNT_GB_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1562 
1563 #define ALT_EMAC1_GMAC_RXOCTETCOUNT_G_ADDR ALT_EMAC_GMAC_RXOCTETCOUNT_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1564 
1565 #define ALT_EMAC1_GMAC_RXBCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXBCASTFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1566 
1567 #define ALT_EMAC1_GMAC_RXMCASTFRMS_G_ADDR ALT_EMAC_GMAC_RXMCASTFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1568 
1569 #define ALT_EMAC1_GMAC_RXCRCERROR_ADDR ALT_EMAC_GMAC_RXCRCERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1570 
1571 #define ALT_EMAC1_GMAC_RXALIGNMENTERROR_ADDR ALT_EMAC_GMAC_RXALIGNMENTERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1572 
1573 #define ALT_EMAC1_GMAC_RXRUNTERROR_ADDR ALT_EMAC_GMAC_RXRUNTERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1574 
1575 #define ALT_EMAC1_GMAC_RXJABBERERROR_ADDR ALT_EMAC_GMAC_RXJABBERERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1576 
1577 #define ALT_EMAC1_GMAC_RXUNDERSIZE_G_ADDR ALT_EMAC_GMAC_RXUNDERSIZE_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1578 
1579 #define ALT_EMAC1_GMAC_RXOVERSIZE_G_ADDR ALT_EMAC_GMAC_RXOVERSIZE_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1580 
1581 #define ALT_EMAC1_GMAC_RX64OCTETS_GB_ADDR ALT_EMAC_GMAC_RX64OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1582 
1583 #define ALT_EMAC1_GMAC_RX65TO127OCTETS_GB_ADDR ALT_EMAC_GMAC_RX65TO127OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1584 
1585 #define ALT_EMAC1_GMAC_RX128TO255OCTETS_GB_ADDR ALT_EMAC_GMAC_RX128TO255OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1586 
1587 #define ALT_EMAC1_GMAC_RX256TO511OCTETS_GB_ADDR ALT_EMAC_GMAC_RX256TO511OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1588 
1589 #define ALT_EMAC1_GMAC_RX512TO1023OCTETS_GB_ADDR ALT_EMAC_GMAC_RX512TO1023OCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1590 
1591 #define ALT_EMAC1_GMAC_RX1024TOMAXOCTETS_GB_ADDR ALT_EMAC_GMAC_RX1024TOMAXOCTETS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1592 
1593 #define ALT_EMAC1_GMAC_RXUNICASTFRMS_G_ADDR ALT_EMAC_GMAC_RXUNICASTFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1594 
1595 #define ALT_EMAC1_GMAC_RXLENERROR_ADDR ALT_EMAC_GMAC_RXLENERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1596 
1597 #define ALT_EMAC1_GMAC_RXOUTOFRANGETYPE_ADDR ALT_EMAC_GMAC_RXOUTOFRANGETYPE_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1598 
1599 #define ALT_EMAC1_GMAC_RXPAUSEFRMS_ADDR ALT_EMAC_GMAC_RXPAUSEFRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1600 
1601 #define ALT_EMAC1_GMAC_RXFIFOOVF_ADDR ALT_EMAC_GMAC_RXFIFOOVF_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1602 
1603 #define ALT_EMAC1_GMAC_RXVLANFRMS_GB_ADDR ALT_EMAC_GMAC_RXVLANFRMS_GB_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1604 
1605 #define ALT_EMAC1_GMAC_RXWDERROR_ADDR ALT_EMAC_GMAC_RXWDERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1606 
1607 #define ALT_EMAC1_GMAC_RXRCVERROR_ADDR ALT_EMAC_GMAC_RXRCVERROR_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1608 
1609 #define ALT_EMAC1_GMAC_RXCTLFRMS_G_ADDR ALT_EMAC_GMAC_RXCTLFRMS_G_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1610 
1611 #define ALT_EMAC1_GMAC_MMC_IPC_RX_INT_MSK_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_MSK_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1612 
1613 #define ALT_EMAC1_GMAC_MMC_IPC_RX_INT_ADDR ALT_EMAC_GMAC_MMC_IPC_RX_INT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1614 
1615 #define ALT_EMAC1_GMAC_RXIPV4_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1616 
1617 #define ALT_EMAC1_GMAC_RXIPV4_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1618 
1619 #define ALT_EMAC1_GMAC_RXIPV4_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1620 
1621 #define ALT_EMAC1_GMAC_RXIPV4_FRAG_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1622 
1623 #define ALT_EMAC1_GMAC_RXIPV4_UDSBL_FRMS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1624 
1625 #define ALT_EMAC1_GMAC_RXIPV6_GD_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1626 
1627 #define ALT_EMAC1_GMAC_RXIPV6_HDRERR_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1628 
1629 #define ALT_EMAC1_GMAC_RXIPV6_NOPAY_FRMS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1630 
1631 #define ALT_EMAC1_GMAC_RXUDP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_GD_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1632 
1633 #define ALT_EMAC1_GMAC_RXUDP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1634 
1635 #define ALT_EMAC1_GMAC_RXTCP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_GD_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1636 
1637 #define ALT_EMAC1_GMAC_RXTCP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXTCP_ERR_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1638 
1639 #define ALT_EMAC1_GMAC_RXICMP_GD_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_GD_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1640 
1641 #define ALT_EMAC1_GMAC_RXICMP_ERR_FRMS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_FRMS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1642 
1643 #define ALT_EMAC1_GMAC_RXIPV4_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_GD_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1644 
1645 #define ALT_EMAC1_GMAC_RXIPV4_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_HDRERR_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1646 
1647 #define ALT_EMAC1_GMAC_RXIPV4_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_NOPAY_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1648 
1649 #define ALT_EMAC1_GMAC_RXIPV4_FRAG_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_FRAG_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1650 
1651 #define ALT_EMAC1_GMAC_RXIPV4_UDSBL_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV4_UDSBL_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1652 
1653 #define ALT_EMAC1_GMAC_RXIPV6_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_GD_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1654 
1655 #define ALT_EMAC1_GMAC_RXIPV6_HDRERR_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_HDRERR_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1656 
1657 #define ALT_EMAC1_GMAC_RXIPV6_NOPAY_OCTETS_ADDR ALT_EMAC_GMAC_RXIPV6_NOPAY_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1658 
1659 #define ALT_EMAC1_GMAC_RXUDP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_GD_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1660 
1661 #define ALT_EMAC1_GMAC_RXUDP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXUDP_ERR_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1662 
1663 #define ALT_EMAC1_GMAC_RXTCP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXTCP_GD_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1664 
1665 #define ALT_EMAC1_GMAC_RXTCPERROCTETS_ADDR ALT_EMAC_GMAC_RXTCPERROCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1666 
1667 #define ALT_EMAC1_GMAC_RXICMP_GD_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_GD_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1668 
1669 #define ALT_EMAC1_GMAC_RXICMP_ERR_OCTETS_ADDR ALT_EMAC_GMAC_RXICMP_ERR_OCTETS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1670 
1671 #define ALT_EMAC1_GMAC_L3_L4_CTL0_ADDR ALT_EMAC_GMAC_L3_L4_CTL0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1672 
1673 #define ALT_EMAC1_GMAC_LYR4_ADDR0_ADDR ALT_EMAC_GMAC_LYR4_ADDR0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1674 
1675 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1676 
1677 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1678 
1679 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1680 
1681 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG0_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1682 
1683 #define ALT_EMAC1_GMAC_L3_L4_CTL1_ADDR ALT_EMAC_GMAC_L3_L4_CTL1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1684 
1685 #define ALT_EMAC1_GMAC_LYR4_ADDR1_ADDR ALT_EMAC_GMAC_LYR4_ADDR1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1686 
1687 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1688 
1689 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1690 
1691 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1692 
1693 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG1_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1694 
1695 #define ALT_EMAC1_GMAC_L3_L4_CTL2_ADDR ALT_EMAC_GMAC_L3_L4_CTL2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1696 
1697 #define ALT_EMAC1_GMAC_LYR4_ADDR2_ADDR ALT_EMAC_GMAC_LYR4_ADDR2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1698 
1699 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1700 
1701 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1702 
1703 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1704 
1705 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG2_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1706 
1707 #define ALT_EMAC1_GMAC_L3_L4_CTL3_ADDR ALT_EMAC_GMAC_L3_L4_CTL3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1708 
1709 #define ALT_EMAC1_GMAC_LYR4_ADDR3_ADDR ALT_EMAC_GMAC_LYR4_ADDR3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1710 
1711 #define ALT_EMAC1_GMAC_LYR3_ADDR0_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR0_REG3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1712 
1713 #define ALT_EMAC1_GMAC_LYR3_ADDR1_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR1_REG3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1714 
1715 #define ALT_EMAC1_GMAC_LYR3_ADDR2_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR2_REG3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1716 
1717 #define ALT_EMAC1_GMAC_LYR3_ADDR3_REG3_ADDR ALT_EMAC_GMAC_LYR3_ADDR3_REG3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1718 
1719 #define ALT_EMAC1_GMAC_HASH_TABLE_REG0_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG0_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1720 
1721 #define ALT_EMAC1_GMAC_HASH_TABLE_REG1_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG1_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1722 
1723 #define ALT_EMAC1_GMAC_HASH_TABLE_REG2_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG2_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1724 
1725 #define ALT_EMAC1_GMAC_HASH_TABLE_REG3_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG3_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1726 
1727 #define ALT_EMAC1_GMAC_HASH_TABLE_REG4_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG4_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1728 
1729 #define ALT_EMAC1_GMAC_HASH_TABLE_REG5_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG5_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1730 
1731 #define ALT_EMAC1_GMAC_HASH_TABLE_REG6_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG6_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1732 
1733 #define ALT_EMAC1_GMAC_HASH_TABLE_REG7_ADDR ALT_EMAC_GMAC_HASH_TABLE_REG7_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1734 
1735 #define ALT_EMAC1_GMAC_VLAN_INCL_REG_ADDR ALT_EMAC_GMAC_VLAN_INCL_REG_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1736 
1737 #define ALT_EMAC1_GMAC_VLAN_HASH_TABLE_REG_ADDR ALT_EMAC_GMAC_VLAN_HASH_TABLE_REG_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1738 
1739 #define ALT_EMAC1_GMAC_TS_CTL_ADDR ALT_EMAC_GMAC_TS_CTL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1740 
1741 #define ALT_EMAC1_GMAC_SUB_SEC_INCREMENT_ADDR ALT_EMAC_GMAC_SUB_SEC_INCREMENT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1742 
1743 #define ALT_EMAC1_GMAC_SYS_TIME_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1744 
1745 #define ALT_EMAC1_GMAC_SYS_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1746 
1747 #define ALT_EMAC1_GMAC_SYS_TIME_SECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_SECS_UPDATE_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1748 
1749 #define ALT_EMAC1_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR ALT_EMAC_GMAC_SYS_TIME_NANOSECS_UPDATE_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1750 
1751 #define ALT_EMAC1_GMAC_TS_ADDEND_ADDR ALT_EMAC_GMAC_TS_ADDEND_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1752 
1753 #define ALT_EMAC1_GMAC_TGT_TIME_SECS_ADDR ALT_EMAC_GMAC_TGT_TIME_SECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1754 
1755 #define ALT_EMAC1_GMAC_TGT_TIME_NANOSECS_ADDR ALT_EMAC_GMAC_TGT_TIME_NANOSECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1756 
1757 #define ALT_EMAC1_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR ALT_EMAC_GMAC_SYS_TIME_HIGHER_WORD_SECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1758 
1759 #define ALT_EMAC1_GMAC_TS_STAT_ADDR ALT_EMAC_GMAC_TS_STAT_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1760 
1761 #define ALT_EMAC1_GMAC_PPS_CTL_ADDR ALT_EMAC_GMAC_PPS_CTL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1762 
1763 #define ALT_EMAC1_GMAC_AUX_TS_NANOSECS_ADDR ALT_EMAC_GMAC_AUX_TS_NANOSECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1764 
1765 #define ALT_EMAC1_GMAC_AUX_TS_SECS_ADDR ALT_EMAC_GMAC_AUX_TS_SECS_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1766 
1767 #define ALT_EMAC1_GMAC_PPS0_INTERVAL_ADDR ALT_EMAC_GMAC_PPS0_INTERVAL_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1768 
1769 #define ALT_EMAC1_GMAC_PPS0_WIDTH_ADDR ALT_EMAC_GMAC_PPS0_WIDTH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1770 
1771 #define ALT_EMAC1_GMAC_MAC_ADDR16_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR16_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1772 
1773 #define ALT_EMAC1_GMAC_MAC_ADDR16_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR16_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1774 
1775 #define ALT_EMAC1_GMAC_MAC_ADDR17_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR17_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1776 
1777 #define ALT_EMAC1_GMAC_MAC_ADDR17_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR17_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1778 
1779 #define ALT_EMAC1_GMAC_MAC_ADDR18_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR18_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1780 
1781 #define ALT_EMAC1_GMAC_MAC_ADDR18_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR18_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1782 
1783 #define ALT_EMAC1_GMAC_MAC_ADDR19_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR19_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1784 
1785 #define ALT_EMAC1_GMAC_MAC_ADDR19_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR19_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1786 
1787 #define ALT_EMAC1_GMAC_MAC_ADDR20_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR20_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1788 
1789 #define ALT_EMAC1_GMAC_MAC_ADDR20_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR20_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1790 
1791 #define ALT_EMAC1_GMAC_MAC_ADDR21_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR21_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1792 
1793 #define ALT_EMAC1_GMAC_MAC_ADDR21_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR21_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1794 
1795 #define ALT_EMAC1_GMAC_MAC_ADDR22_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR22_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1796 
1797 #define ALT_EMAC1_GMAC_MAC_ADDR22_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR22_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1798 
1799 #define ALT_EMAC1_GMAC_MAC_ADDR23_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR23_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1800 
1801 #define ALT_EMAC1_GMAC_MAC_ADDR23_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR23_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1802 
1803 #define ALT_EMAC1_GMAC_MAC_ADDR24_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR24_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1804 
1805 #define ALT_EMAC1_GMAC_MAC_ADDR24_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR24_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1806 
1807 #define ALT_EMAC1_GMAC_MAC_ADDR25_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR25_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1808 
1809 #define ALT_EMAC1_GMAC_MAC_ADDR25_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR25_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1810 
1811 #define ALT_EMAC1_GMAC_MAC_ADDR26_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR26_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1812 
1813 #define ALT_EMAC1_GMAC_MAC_ADDR26_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR26_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1814 
1815 #define ALT_EMAC1_GMAC_MAC_ADDR27_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR27_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1816 
1817 #define ALT_EMAC1_GMAC_MAC_ADDR27_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR27_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1818 
1819 #define ALT_EMAC1_GMAC_MAC_ADDR28_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR28_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1820 
1821 #define ALT_EMAC1_GMAC_MAC_ADDR28_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR28_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1822 
1823 #define ALT_EMAC1_GMAC_MAC_ADDR29_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR29_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1824 
1825 #define ALT_EMAC1_GMAC_MAC_ADDR29_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR29_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1826 
1827 #define ALT_EMAC1_GMAC_MAC_ADDR30_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR30_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1828 
1829 #define ALT_EMAC1_GMAC_MAC_ADDR30_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR30_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1830 
1831 #define ALT_EMAC1_GMAC_MAC_ADDR31_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR31_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1832 
1833 #define ALT_EMAC1_GMAC_MAC_ADDR31_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR31_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1834 
1835 #define ALT_EMAC1_GMAC_MAC_ADDR32_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR32_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1836 
1837 #define ALT_EMAC1_GMAC_MAC_ADDR32_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR32_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1838 
1839 #define ALT_EMAC1_GMAC_MAC_ADDR33_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR33_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1840 
1841 #define ALT_EMAC1_GMAC_MAC_ADDR33_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR33_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1842 
1843 #define ALT_EMAC1_GMAC_MAC_ADDR34_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR34_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1844 
1845 #define ALT_EMAC1_GMAC_MAC_ADDR34_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR34_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1846 
1847 #define ALT_EMAC1_GMAC_MAC_ADDR35_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR35_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1848 
1849 #define ALT_EMAC1_GMAC_MAC_ADDR35_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR35_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1850 
1851 #define ALT_EMAC1_GMAC_MAC_ADDR36_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR36_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1852 
1853 #define ALT_EMAC1_GMAC_MAC_ADDR36_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR36_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1854 
1855 #define ALT_EMAC1_GMAC_MAC_ADDR37_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR37_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1856 
1857 #define ALT_EMAC1_GMAC_MAC_ADDR37_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR37_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1858 
1859 #define ALT_EMAC1_GMAC_MAC_ADDR38_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR38_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1860 
1861 #define ALT_EMAC1_GMAC_MAC_ADDR38_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR38_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1862 
1863 #define ALT_EMAC1_GMAC_MAC_ADDR39_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR39_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1864 
1865 #define ALT_EMAC1_GMAC_MAC_ADDR39_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR39_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1866 
1867 #define ALT_EMAC1_GMAC_MAC_ADDR40_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR40_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1868 
1869 #define ALT_EMAC1_GMAC_MAC_ADDR40_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR40_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1870 
1871 #define ALT_EMAC1_GMAC_MAC_ADDR41_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR41_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1872 
1873 #define ALT_EMAC1_GMAC_MAC_ADDR41_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR41_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1874 
1875 #define ALT_EMAC1_GMAC_MAC_ADDR42_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR42_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1876 
1877 #define ALT_EMAC1_GMAC_MAC_ADDR42_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR42_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1878 
1879 #define ALT_EMAC1_GMAC_MAC_ADDR43_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR43_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1880 
1881 #define ALT_EMAC1_GMAC_MAC_ADDR43_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR43_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1882 
1883 #define ALT_EMAC1_GMAC_MAC_ADDR44_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR44_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1884 
1885 #define ALT_EMAC1_GMAC_MAC_ADDR44_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR44_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1886 
1887 #define ALT_EMAC1_GMAC_MAC_ADDR45_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR45_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1888 
1889 #define ALT_EMAC1_GMAC_MAC_ADDR45_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR45_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1890 
1891 #define ALT_EMAC1_GMAC_MAC_ADDR46_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR46_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1892 
1893 #define ALT_EMAC1_GMAC_MAC_ADDR46_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR46_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1894 
1895 #define ALT_EMAC1_GMAC_MAC_ADDR47_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR47_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1896 
1897 #define ALT_EMAC1_GMAC_MAC_ADDR47_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR47_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1898 
1899 #define ALT_EMAC1_GMAC_MAC_ADDR48_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR48_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1900 
1901 #define ALT_EMAC1_GMAC_MAC_ADDR48_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR48_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1902 
1903 #define ALT_EMAC1_GMAC_MAC_ADDR49_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR49_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1904 
1905 #define ALT_EMAC1_GMAC_MAC_ADDR49_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR49_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1906 
1907 #define ALT_EMAC1_GMAC_MAC_ADDR50_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR50_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1908 
1909 #define ALT_EMAC1_GMAC_MAC_ADDR50_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR50_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1910 
1911 #define ALT_EMAC1_GMAC_MAC_ADDR51_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR51_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1912 
1913 #define ALT_EMAC1_GMAC_MAC_ADDR51_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR51_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1914 
1915 #define ALT_EMAC1_GMAC_MAC_ADDR52_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR52_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1916 
1917 #define ALT_EMAC1_GMAC_MAC_ADDR52_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR52_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1918 
1919 #define ALT_EMAC1_GMAC_MAC_ADDR53_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR53_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1920 
1921 #define ALT_EMAC1_GMAC_MAC_ADDR53_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR53_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1922 
1923 #define ALT_EMAC1_GMAC_MAC_ADDR54_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR54_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1924 
1925 #define ALT_EMAC1_GMAC_MAC_ADDR54_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR54_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1926 
1927 #define ALT_EMAC1_GMAC_MAC_ADDR55_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1928 
1929 #define ALT_EMAC1_GMAC_MAC_ADDR55_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR55_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1930 
1931 #define ALT_EMAC1_GMAC_MAC_ADDR56_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR56_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1932 
1933 #define ALT_EMAC1_GMAC_MAC_ADDR56_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR56_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1934 
1935 #define ALT_EMAC1_GMAC_MAC_ADDR57_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR57_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1936 
1937 #define ALT_EMAC1_GMAC_MAC_ADDR57_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR57_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1938 
1939 #define ALT_EMAC1_GMAC_MAC_ADDR58_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR58_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1940 
1941 #define ALT_EMAC1_GMAC_MAC_ADDR58_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR58_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1942 
1943 #define ALT_EMAC1_GMAC_MAC_ADDR59_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR59_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1944 
1945 #define ALT_EMAC1_GMAC_MAC_ADDR59_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR59_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1946 
1947 #define ALT_EMAC1_GMAC_MAC_ADDR60_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR60_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1948 
1949 #define ALT_EMAC1_GMAC_MAC_ADDR60_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR60_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1950 
1951 #define ALT_EMAC1_GMAC_MAC_ADDR61_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR61_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1952 
1953 #define ALT_EMAC1_GMAC_MAC_ADDR61_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR61_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1954 
1955 #define ALT_EMAC1_GMAC_MAC_ADDR62_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR62_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1956 
1957 #define ALT_EMAC1_GMAC_MAC_ADDR62_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR62_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1958 
1959 #define ALT_EMAC1_GMAC_MAC_ADDR63_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR63_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1960 
1961 #define ALT_EMAC1_GMAC_MAC_ADDR63_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR63_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1962 
1963 #define ALT_EMAC1_GMAC_MAC_ADDR64_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR64_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1964 
1965 #define ALT_EMAC1_GMAC_MAC_ADDR64_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR64_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1966 
1967 #define ALT_EMAC1_GMAC_MAC_ADDR65_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR65_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1968 
1969 #define ALT_EMAC1_GMAC_MAC_ADDR65_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR65_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1970 
1971 #define ALT_EMAC1_GMAC_MAC_ADDR66_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR66_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1972 
1973 #define ALT_EMAC1_GMAC_MAC_ADDR66_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR66_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1974 
1975 #define ALT_EMAC1_GMAC_MAC_ADDR67_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR67_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1976 
1977 #define ALT_EMAC1_GMAC_MAC_ADDR67_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR67_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1978 
1979 #define ALT_EMAC1_GMAC_MAC_ADDR68_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR68_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1980 
1981 #define ALT_EMAC1_GMAC_MAC_ADDR68_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR68_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1982 
1983 #define ALT_EMAC1_GMAC_MAC_ADDR69_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR69_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1984 
1985 #define ALT_EMAC1_GMAC_MAC_ADDR69_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR69_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1986 
1987 #define ALT_EMAC1_GMAC_MAC_ADDR70_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR70_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1988 
1989 #define ALT_EMAC1_GMAC_MAC_ADDR70_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR70_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1990 
1991 #define ALT_EMAC1_GMAC_MAC_ADDR71_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR71_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1992 
1993 #define ALT_EMAC1_GMAC_MAC_ADDR71_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR71_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1994 
1995 #define ALT_EMAC1_GMAC_MAC_ADDR72_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR72_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1996 
1997 #define ALT_EMAC1_GMAC_MAC_ADDR72_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR72_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
1998 
1999 #define ALT_EMAC1_GMAC_MAC_ADDR73_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR73_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2000 
2001 #define ALT_EMAC1_GMAC_MAC_ADDR73_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR73_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2002 
2003 #define ALT_EMAC1_GMAC_MAC_ADDR74_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR74_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2004 
2005 #define ALT_EMAC1_GMAC_MAC_ADDR74_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR74_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2006 
2007 #define ALT_EMAC1_GMAC_MAC_ADDR75_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR75_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2008 
2009 #define ALT_EMAC1_GMAC_MAC_ADDR75_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR75_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2010 
2011 #define ALT_EMAC1_GMAC_MAC_ADDR76_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR76_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2012 
2013 #define ALT_EMAC1_GMAC_MAC_ADDR76_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR76_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2014 
2015 #define ALT_EMAC1_GMAC_MAC_ADDR77_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR77_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2016 
2017 #define ALT_EMAC1_GMAC_MAC_ADDR77_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR77_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2018 
2019 #define ALT_EMAC1_GMAC_MAC_ADDR78_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR78_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2020 
2021 #define ALT_EMAC1_GMAC_MAC_ADDR78_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR78_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2022 
2023 #define ALT_EMAC1_GMAC_MAC_ADDR79_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR79_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2024 
2025 #define ALT_EMAC1_GMAC_MAC_ADDR79_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR79_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2026 
2027 #define ALT_EMAC1_GMAC_MAC_ADDR80_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR80_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2028 
2029 #define ALT_EMAC1_GMAC_MAC_ADDR80_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR80_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2030 
2031 #define ALT_EMAC1_GMAC_MAC_ADDR81_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR81_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2032 
2033 #define ALT_EMAC1_GMAC_MAC_ADDR81_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR81_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2034 
2035 #define ALT_EMAC1_GMAC_MAC_ADDR82_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR82_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2036 
2037 #define ALT_EMAC1_GMAC_MAC_ADDR82_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR82_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2038 
2039 #define ALT_EMAC1_GMAC_MAC_ADDR83_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR83_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2040 
2041 #define ALT_EMAC1_GMAC_MAC_ADDR83_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR83_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2042 
2043 #define ALT_EMAC1_GMAC_MAC_ADDR84_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR84_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2044 
2045 #define ALT_EMAC1_GMAC_MAC_ADDR84_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR84_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2046 
2047 #define ALT_EMAC1_GMAC_MAC_ADDR85_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR85_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2048 
2049 #define ALT_EMAC1_GMAC_MAC_ADDR85_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR85_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2050 
2051 #define ALT_EMAC1_GMAC_MAC_ADDR86_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR86_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2052 
2053 #define ALT_EMAC1_GMAC_MAC_ADDR86_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR86_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2054 
2055 #define ALT_EMAC1_GMAC_MAC_ADDR87_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR87_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2056 
2057 #define ALT_EMAC1_GMAC_MAC_ADDR87_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR87_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2058 
2059 #define ALT_EMAC1_GMAC_MAC_ADDR88_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR88_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2060 
2061 #define ALT_EMAC1_GMAC_MAC_ADDR88_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR88_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2062 
2063 #define ALT_EMAC1_GMAC_MAC_ADDR89_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR89_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2064 
2065 #define ALT_EMAC1_GMAC_MAC_ADDR89_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR89_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2066 
2067 #define ALT_EMAC1_GMAC_MAC_ADDR90_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR90_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2068 
2069 #define ALT_EMAC1_GMAC_MAC_ADDR90_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR90_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2070 
2071 #define ALT_EMAC1_GMAC_MAC_ADDR91_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR91_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2072 
2073 #define ALT_EMAC1_GMAC_MAC_ADDR91_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR91_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2074 
2075 #define ALT_EMAC1_GMAC_MAC_ADDR92_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR92_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2076 
2077 #define ALT_EMAC1_GMAC_MAC_ADDR92_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR92_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2078 
2079 #define ALT_EMAC1_GMAC_MAC_ADDR93_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR93_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2080 
2081 #define ALT_EMAC1_GMAC_MAC_ADDR93_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR93_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2082 
2083 #define ALT_EMAC1_GMAC_MAC_ADDR94_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR94_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2084 
2085 #define ALT_EMAC1_GMAC_MAC_ADDR94_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR94_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2086 
2087 #define ALT_EMAC1_GMAC_MAC_ADDR95_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR95_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2088 
2089 #define ALT_EMAC1_GMAC_MAC_ADDR95_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR95_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2090 
2091 #define ALT_EMAC1_GMAC_MAC_ADDR96_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR96_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2092 
2093 #define ALT_EMAC1_GMAC_MAC_ADDR96_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR96_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2094 
2095 #define ALT_EMAC1_GMAC_MAC_ADDR97_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR97_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2096 
2097 #define ALT_EMAC1_GMAC_MAC_ADDR97_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR97_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2098 
2099 #define ALT_EMAC1_GMAC_MAC_ADDR98_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR98_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2100 
2101 #define ALT_EMAC1_GMAC_MAC_ADDR98_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR98_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2102 
2103 #define ALT_EMAC1_GMAC_MAC_ADDR99_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR99_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2104 
2105 #define ALT_EMAC1_GMAC_MAC_ADDR99_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR99_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2106 
2107 #define ALT_EMAC1_GMAC_MAC_ADDR100_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR100_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2108 
2109 #define ALT_EMAC1_GMAC_MAC_ADDR100_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR100_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2110 
2111 #define ALT_EMAC1_GMAC_MAC_ADDR101_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR101_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2112 
2113 #define ALT_EMAC1_GMAC_MAC_ADDR101_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR101_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2114 
2115 #define ALT_EMAC1_GMAC_MAC_ADDR102_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR102_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2116 
2117 #define ALT_EMAC1_GMAC_MAC_ADDR102_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR102_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2118 
2119 #define ALT_EMAC1_GMAC_MAC_ADDR103_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR103_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2120 
2121 #define ALT_EMAC1_GMAC_MAC_ADDR103_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR103_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2122 
2123 #define ALT_EMAC1_GMAC_MAC_ADDR104_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR104_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2124 
2125 #define ALT_EMAC1_GMAC_MAC_ADDR104_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR104_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2126 
2127 #define ALT_EMAC1_GMAC_MAC_ADDR105_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR105_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2128 
2129 #define ALT_EMAC1_GMAC_MAC_ADDR105_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR105_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2130 
2131 #define ALT_EMAC1_GMAC_MAC_ADDR106_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR106_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2132 
2133 #define ALT_EMAC1_GMAC_MAC_ADDR106_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR106_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2134 
2135 #define ALT_EMAC1_GMAC_MAC_ADDR107_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR107_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2136 
2137 #define ALT_EMAC1_GMAC_MAC_ADDR107_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR107_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2138 
2139 #define ALT_EMAC1_GMAC_MAC_ADDR108_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR108_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2140 
2141 #define ALT_EMAC1_GMAC_MAC_ADDR108_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR108_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2142 
2143 #define ALT_EMAC1_GMAC_MAC_ADDR109_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR109_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2144 
2145 #define ALT_EMAC1_GMAC_MAC_ADDR109_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR109_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2146 
2147 #define ALT_EMAC1_GMAC_MAC_ADDR110_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR110_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2148 
2149 #define ALT_EMAC1_GMAC_MAC_ADDR110_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR110_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2150 
2151 #define ALT_EMAC1_GMAC_MAC_ADDR111_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR111_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2152 
2153 #define ALT_EMAC1_GMAC_MAC_ADDR111_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR111_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2154 
2155 #define ALT_EMAC1_GMAC_MAC_ADDR112_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR112_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2156 
2157 #define ALT_EMAC1_GMAC_MAC_ADDR112_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR112_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2158 
2159 #define ALT_EMAC1_GMAC_MAC_ADDR113_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR113_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2160 
2161 #define ALT_EMAC1_GMAC_MAC_ADDR113_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR113_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2162 
2163 #define ALT_EMAC1_GMAC_MAC_ADDR114_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR114_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2164 
2165 #define ALT_EMAC1_GMAC_MAC_ADDR114_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR114_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2166 
2167 #define ALT_EMAC1_GMAC_MAC_ADDR115_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR115_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2168 
2169 #define ALT_EMAC1_GMAC_MAC_ADDR115_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR115_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2170 
2171 #define ALT_EMAC1_GMAC_MAC_ADDR116_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR116_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2172 
2173 #define ALT_EMAC1_GMAC_MAC_ADDR116_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR116_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2174 
2175 #define ALT_EMAC1_GMAC_MAC_ADDR117_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR117_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2176 
2177 #define ALT_EMAC1_GMAC_MAC_ADDR117_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR117_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2178 
2179 #define ALT_EMAC1_GMAC_MAC_ADDR118_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR118_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2180 
2181 #define ALT_EMAC1_GMAC_MAC_ADDR118_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR118_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2182 
2183 #define ALT_EMAC1_GMAC_MAC_ADDR119_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR119_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2184 
2185 #define ALT_EMAC1_GMAC_MAC_ADDR119_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR119_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2186 
2187 #define ALT_EMAC1_GMAC_MAC_ADDR120_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR120_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2188 
2189 #define ALT_EMAC1_GMAC_MAC_ADDR120_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR120_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2190 
2191 #define ALT_EMAC1_GMAC_MAC_ADDR121_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR121_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2192 
2193 #define ALT_EMAC1_GMAC_MAC_ADDR121_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR121_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2194 
2195 #define ALT_EMAC1_GMAC_MAC_ADDR122_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR122_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2196 
2197 #define ALT_EMAC1_GMAC_MAC_ADDR122_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR122_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2198 
2199 #define ALT_EMAC1_GMAC_MAC_ADDR123_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR123_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2200 
2201 #define ALT_EMAC1_GMAC_MAC_ADDR123_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR123_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2202 
2203 #define ALT_EMAC1_GMAC_MAC_ADDR124_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR124_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2204 
2205 #define ALT_EMAC1_GMAC_MAC_ADDR124_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR124_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2206 
2207 #define ALT_EMAC1_GMAC_MAC_ADDR125_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR125_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2208 
2209 #define ALT_EMAC1_GMAC_MAC_ADDR125_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR125_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2210 
2211 #define ALT_EMAC1_GMAC_MAC_ADDR126_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR126_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2212 
2213 #define ALT_EMAC1_GMAC_MAC_ADDR126_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR126_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2214 
2215 #define ALT_EMAC1_GMAC_MAC_ADDR127_HIGH_ADDR ALT_EMAC_GMAC_MAC_ADDR127_HIGH_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2216 
2217 #define ALT_EMAC1_GMAC_MAC_ADDR127_LOW_ADDR ALT_EMAC_GMAC_MAC_ADDR127_LOW_ADDR(ALT_EMAC1_GMACGRP_ADDR)
2218 
2219 #define ALT_EMAC1_GMACGRP_OFST 0x0
2220 
2221 #define ALT_EMAC1_GMACGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_EMAC1_ADDR) + ALT_EMAC1_GMACGRP_OFST))
2222 
2223 #define ALT_EMAC1_GMACGRP_LB_ADDR ALT_EMAC1_GMACGRP_ADDR
2224 
2225 #define ALT_EMAC1_GMACGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC1_GMACGRP_ADDR) + 0xb80) - 1))
2226 
2236 #define ALT_EMAC1_DMA_BUS_MOD_ADDR ALT_EMAC_DMA_BUS_MOD_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2237 
2238 #define ALT_EMAC1_DMA_TX_POLL_DEMAND_ADDR ALT_EMAC_DMA_TX_POLL_DEMAND_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2239 
2240 #define ALT_EMAC1_DMA_RX_POLL_DEMAND_ADDR ALT_EMAC_DMA_RX_POLL_DEMAND_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2241 
2242 #define ALT_EMAC1_DMA_RX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2243 
2244 #define ALT_EMAC1_DMA_TX_DESC_LIST_ADDR_ADDR ALT_EMAC_DMA_TX_DESC_LIST_ADDR_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2245 
2246 #define ALT_EMAC1_DMA_STAT_ADDR ALT_EMAC_DMA_STAT_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2247 
2248 #define ALT_EMAC1_DMA_OP_MOD_ADDR ALT_EMAC_DMA_OP_MOD_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2249 
2250 #define ALT_EMAC1_DMA_INT_EN_ADDR ALT_EMAC_DMA_INT_EN_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2251 
2252 #define ALT_EMAC1_DMA_MISSED_FRM_AND_BUF_OVF_CNTR_ADDR ALT_EMAC_DMA_MFRM_BUF_OVF_CNTR_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2253 
2254 #define ALT_EMAC1_DMA_RX_INT_WDT_ADDR ALT_EMAC_DMA_RX_INT_WDT_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2255 
2256 #define ALT_EMAC1_DMA_AXI_BUS_MOD_ADDR ALT_EMAC_DMA_AXI_BUS_MOD_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2257 
2258 #define ALT_EMAC1_DMA_AHB_OR_AXI_STAT_ADDR ALT_EMAC_DMA_AHB_OR_AXI_STAT_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2259 
2260 #define ALT_EMAC1_DMA_CUR_HOST_TX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_TX_DESC_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2261 
2262 #define ALT_EMAC1_DMA_CUR_HOST_RX_DESC_ADDR ALT_EMAC_DMA_CUR_HOST_RX_DESC_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2263 
2264 #define ALT_EMAC1_DMA_CUR_HOST_TX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_TX_BUF_ADDR_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2265 
2266 #define ALT_EMAC1_DMA_CUR_HOST_RX_BUF_ADDR_ADDR ALT_EMAC_DMA_CUR_HOST_RX_BUF_ADDR_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2267 
2268 #define ALT_EMAC1_DMA_HW_FEATURE_ADDR ALT_EMAC_DMA_HW_FEATURE_ADDR(ALT_EMAC1_DMAGRP_ADDR)
2269 
2270 #define ALT_EMAC1_DMAGRP_OFST 0x1000
2271 
2272 #define ALT_EMAC1_DMAGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_EMAC1_ADDR) + ALT_EMAC1_DMAGRP_OFST))
2273 
2274 #define ALT_EMAC1_DMAGRP_LB_ADDR ALT_EMAC1_DMAGRP_ADDR
2275 
2276 #define ALT_EMAC1_DMAGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC1_DMAGRP_ADDR) + 0x5c) - 1))
2277 
2280 #define ALT_EMAC1_OFST 0xff702000
2281 
2282 #define ALT_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_EMAC1_OFST))
2283 
2284 #define ALT_EMAC1_LB_ADDR ALT_EMAC1_ADDR
2285 
2286 #define ALT_EMAC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_EMAC1_ADDR) + 0x2000) - 1))
2287 
2297 #define ALT_SDMMC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CTL_OFST))
2298 
2299 #define ALT_SDMMC_PWREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_PWREN_OFST))
2300 
2301 #define ALT_SDMMC_CLKDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKDIV_OFST))
2302 
2303 #define ALT_SDMMC_CLKSRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKSRC_OFST))
2304 
2305 #define ALT_SDMMC_CLKENA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CLKENA_OFST))
2306 
2307 #define ALT_SDMMC_TMOUT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TMOUT_OFST))
2308 
2309 #define ALT_SDMMC_CTYPE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CTYPE_OFST))
2310 
2311 #define ALT_SDMMC_BLKSIZ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BLKSIZ_OFST))
2312 
2313 #define ALT_SDMMC_BYTCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BYTCNT_OFST))
2314 
2315 #define ALT_SDMMC_INTMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_INTMSK_OFST))
2316 
2317 #define ALT_SDMMC_CMDARG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CMDARG_OFST))
2318 
2319 #define ALT_SDMMC_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CMD_OFST))
2320 
2321 #define ALT_SDMMC_RESP0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP0_OFST))
2322 
2323 #define ALT_SDMMC_RESP1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP1_OFST))
2324 
2325 #define ALT_SDMMC_RESP2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP2_OFST))
2326 
2327 #define ALT_SDMMC_RESP3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RESP3_OFST))
2328 
2329 #define ALT_SDMMC_MINTSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_MINTSTS_OFST))
2330 
2331 #define ALT_SDMMC_RINTSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RINTSTS_OFST))
2332 
2333 #define ALT_SDMMC_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_STAT_OFST))
2334 
2335 #define ALT_SDMMC_FIFOTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_FIFOTH_OFST))
2336 
2337 #define ALT_SDMMC_CDETECT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CDETECT_OFST))
2338 
2339 #define ALT_SDMMC_WRTPRT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_WRTPRT_OFST))
2340 
2341 #define ALT_SDMMC_TCBCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TCBCNT_OFST))
2342 
2343 #define ALT_SDMMC_TBBCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_TBBCNT_OFST))
2344 
2345 #define ALT_SDMMC_DEBNCE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DEBNCE_OFST))
2346 
2347 #define ALT_SDMMC_USRID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_USRID_OFST))
2348 
2349 #define ALT_SDMMC_VERID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_VERID_OFST))
2350 
2351 #define ALT_SDMMC_HCON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_HCON_OFST))
2352 
2353 #define ALT_SDMMC_UHS_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_UHS_REG_OFST))
2354 
2355 #define ALT_SDMMC_RST_N_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_RST_N_OFST))
2356 
2357 #define ALT_SDMMC_BMOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BMOD_OFST))
2358 
2359 #define ALT_SDMMC_PLDMND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_PLDMND_OFST))
2360 
2361 #define ALT_SDMMC_DBADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DBADDR_OFST))
2362 
2363 #define ALT_SDMMC_IDSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_IDSTS_OFST))
2364 
2365 #define ALT_SDMMC_IDINTEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_IDINTEN_OFST))
2366 
2367 #define ALT_SDMMC_DSCADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DSCADDR_OFST))
2368 
2369 #define ALT_SDMMC_BUFADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BUFADDR_OFST))
2370 
2371 #define ALT_SDMMC_CARDTHRCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_CARDTHRCTL_OFST))
2372 
2373 #define ALT_SDMMC_BACK_END_POWER_R_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_BACK_END_POWER_R_OFST))
2374 
2375 #define ALT_SDMMC_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDMMC_ADDR) + ALT_SDMMC_DATA_OFST))
2376 
2377 #define ALT_SDMMC_OFST 0xff704000
2378 
2379 #define ALT_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDMMC_OFST))
2380 
2381 #define ALT_SDMMC_LB_ADDR ALT_SDMMC_ADDR
2382 
2383 #define ALT_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDMMC_ADDR) + 0x400) - 1))
2384 
2394 #define ALT_QSPI_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_CFG_OFST))
2395 
2396 #define ALT_QSPI_DEVRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVRD_OFST))
2397 
2398 #define ALT_QSPI_DEVWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVWR_OFST))
2399 
2400 #define ALT_QSPI_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DELAY_OFST))
2401 
2402 #define ALT_QSPI_RDDATACAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_RDDATACAP_OFST))
2403 
2404 #define ALT_QSPI_DEVSZ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DEVSZ_OFST))
2405 
2406 #define ALT_QSPI_SRAMPART_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_SRAMPART_OFST))
2407 
2408 #define ALT_QSPI_INDADDRTRIG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDADDRTRIG_OFST))
2409 
2410 #define ALT_QSPI_DMAPER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_DMAPER_OFST))
2411 
2412 #define ALT_QSPI_REMAPADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_REMAPADDR_OFST))
2413 
2414 #define ALT_QSPI_MODBIT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_MODBIT_OFST))
2415 
2416 #define ALT_QSPI_SRAMFILL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_SRAMFILL_OFST))
2417 
2418 #define ALT_QSPI_TXTHRESH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_TXTHRESH_OFST))
2419 
2420 #define ALT_QSPI_RXTHRESH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_RXTHRESH_OFST))
2421 
2422 #define ALT_QSPI_IRQSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_IRQSTAT_OFST))
2423 
2424 #define ALT_QSPI_IRQMSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_IRQMSK_OFST))
2425 
2426 #define ALT_QSPI_LOWWRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_LOWWRPROT_OFST))
2427 
2428 #define ALT_QSPI_UPPWRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_UPPWRPROT_OFST))
2429 
2430 #define ALT_QSPI_WRPROT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_WRPROT_OFST))
2431 
2432 #define ALT_QSPI_INDRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRD_OFST))
2433 
2434 #define ALT_QSPI_INDRDWATER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDWATER_OFST))
2435 
2436 #define ALT_QSPI_INDRDSTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDSTADDR_OFST))
2437 
2438 #define ALT_QSPI_INDRDCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDRDCNT_OFST))
2439 
2440 #define ALT_QSPI_INDWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWR_OFST))
2441 
2442 #define ALT_QSPI_INDWRWATER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRWATER_OFST))
2443 
2444 #define ALT_QSPI_INDWRSTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRSTADDR_OFST))
2445 
2446 #define ALT_QSPI_INDWRCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_INDWRCNT_OFST))
2447 
2448 #define ALT_QSPI_FLSHCMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMD_OFST))
2449 
2450 #define ALT_QSPI_FLSHCMDADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDADDR_OFST))
2451 
2452 #define ALT_QSPI_FLSHCMDRDDATALO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDRDDATALO_OFST))
2453 
2454 #define ALT_QSPI_FLSHCMDRDDATAUP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDRDDATAUP_OFST))
2455 
2456 #define ALT_QSPI_FLSHCMDWRDATALO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDWRDATALO_OFST))
2457 
2458 #define ALT_QSPI_FLSHCMDWRDATAUP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_FLSHCMDWRDATAUP_OFST))
2459 
2460 #define ALT_QSPI_MODULEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_QSPI_ADDR) + ALT_QSPI_MODULEID_OFST))
2461 
2462 #define ALT_QSPI_OFST 0xff705000
2463 
2464 #define ALT_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_QSPI_OFST))
2465 
2466 #define ALT_QSPI_LB_ADDR ALT_QSPI_ADDR
2467 
2468 #define ALT_QSPI_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_QSPI_ADDR) + 0x100) - 1))
2469 
2479 #define ALT_FPGAMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_STAT_OFST))
2480 
2481 #define ALT_FPGAMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_CTL_OFST))
2482 
2483 #define ALT_FPGAMGR_DCLKCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DCLKCNT_OFST))
2484 
2485 #define ALT_FPGAMGR_DCLKSTAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_DCLKSTAT_OFST))
2486 
2487 #define ALT_FPGAMGR_GPO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_GPO_OFST))
2488 
2489 #define ALT_FPGAMGR_GPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_GPI_OFST))
2490 
2491 #define ALT_FPGAMGR_MISCI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_MISCI_OFST))
2492 
2500 #define ALT_FPGAMGR_MON_GPIO_INTEN_ADDR ALT_MON_GPIO_INTEN_ADDR(ALT_FPGAMGR_MON_ADDR)
2501 
2502 #define ALT_FPGAMGR_MON_GPIO_INTMSK_ADDR ALT_MON_GPIO_INTMSK_ADDR(ALT_FPGAMGR_MON_ADDR)
2503 
2504 #define ALT_FPGAMGR_MON_GPIO_INTTYPE_LEVEL_ADDR ALT_MON_GPIO_INTTYPE_LEVEL_ADDR(ALT_FPGAMGR_MON_ADDR)
2505 
2506 #define ALT_FPGAMGR_MON_GPIO_INT_POL_ADDR ALT_MON_GPIO_INT_POL_ADDR(ALT_FPGAMGR_MON_ADDR)
2507 
2508 #define ALT_FPGAMGR_MON_GPIO_INTSTAT_ADDR ALT_MON_GPIO_INTSTAT_ADDR(ALT_FPGAMGR_MON_ADDR)
2509 
2510 #define ALT_FPGAMGR_MON_GPIO_RAW_INTSTAT_ADDR ALT_MON_GPIO_RAW_INTSTAT_ADDR(ALT_FPGAMGR_MON_ADDR)
2511 
2512 #define ALT_FPGAMGR_MON_GPIO_PORTA_EOI_ADDR ALT_MON_GPIO_PORTA_EOI_ADDR(ALT_FPGAMGR_MON_ADDR)
2513 
2514 #define ALT_FPGAMGR_MON_GPIO_EXT_PORTA_ADDR ALT_MON_GPIO_EXT_PORTA_ADDR(ALT_FPGAMGR_MON_ADDR)
2515 
2516 #define ALT_FPGAMGR_MON_GPIO_LS_SYNC_ADDR ALT_MON_GPIO_LS_SYNC_ADDR(ALT_FPGAMGR_MON_ADDR)
2517 
2518 #define ALT_FPGAMGR_MON_GPIO_VER_ID_CODE_ADDR ALT_MON_GPIO_VER_ID_CODE_ADDR(ALT_FPGAMGR_MON_ADDR)
2519 
2520 #define ALT_FPGAMGR_MON_GPIO_CFG_REG2_ADDR ALT_MON_GPIO_CFG_REG2_ADDR(ALT_FPGAMGR_MON_ADDR)
2521 
2522 #define ALT_FPGAMGR_MON_GPIO_CFG_REG1_ADDR ALT_MON_GPIO_CFG_REG1_ADDR(ALT_FPGAMGR_MON_ADDR)
2523 
2524 #define ALT_FPGAMGR_MON_OFST 0x800
2525 
2526 #define ALT_FPGAMGR_MON_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGR_ADDR) + ALT_FPGAMGR_MON_OFST))
2527 
2528 #define ALT_FPGAMGR_MON_LB_ADDR ALT_FPGAMGR_MON_ADDR
2529 
2530 #define ALT_FPGAMGR_MON_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGR_MON_ADDR) + 0x80) - 1))
2531 
2534 #define ALT_FPGAMGR_OFST 0xff706000
2535 
2536 #define ALT_FPGAMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGAMGR_OFST))
2537 
2538 #define ALT_FPGAMGR_LB_ADDR ALT_FPGAMGR_ADDR
2539 
2540 #define ALT_FPGAMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGR_ADDR) + 0x1000) - 1))
2541 
2551 #define ALT_ACPIDMAP_VID2RD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID2RD_OFST))
2552 
2553 #define ALT_ACPIDMAP_VID2WR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID2WR_OFST))
2554 
2555 #define ALT_ACPIDMAP_VID3RD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID3RD_OFST))
2556 
2557 #define ALT_ACPIDMAP_VID3WR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID3WR_OFST))
2558 
2559 #define ALT_ACPIDMAP_VID4RD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID4RD_OFST))
2560 
2561 #define ALT_ACPIDMAP_VID4WR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID4WR_OFST))
2562 
2563 #define ALT_ACPIDMAP_VID5RD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID5RD_OFST))
2564 
2565 #define ALT_ACPIDMAP_VID5WR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID5WR_OFST))
2566 
2567 #define ALT_ACPIDMAP_VID6RD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID6RD_OFST))
2568 
2569 #define ALT_ACPIDMAP_VID6WR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID6WR_OFST))
2570 
2571 #define ALT_ACPIDMAP_DYNRD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_DYNRD_OFST))
2572 
2573 #define ALT_ACPIDMAP_DYNWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_DYNWR_OFST))
2574 
2575 #define ALT_ACPIDMAP_VID2RD_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID2RD_S_OFST))
2576 
2577 #define ALT_ACPIDMAP_VID2WR_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID2WR_S_OFST))
2578 
2579 #define ALT_ACPIDMAP_VID3RD_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID3RD_S_OFST))
2580 
2581 #define ALT_ACPIDMAP_VID3WR_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID3WR_S_OFST))
2582 
2583 #define ALT_ACPIDMAP_VID4RD_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID4RD_S_OFST))
2584 
2585 #define ALT_ACPIDMAP_VID4WR_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID4WR_S_OFST))
2586 
2587 #define ALT_ACPIDMAP_VID5RD_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID5RD_S_OFST))
2588 
2589 #define ALT_ACPIDMAP_VID5WR_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID5WR_S_OFST))
2590 
2591 #define ALT_ACPIDMAP_VID6RD_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID6RD_S_OFST))
2592 
2593 #define ALT_ACPIDMAP_VID6WR_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_VID6WR_S_OFST))
2594 
2595 #define ALT_ACPIDMAP_DYNRD_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_DYNRD_S_OFST))
2596 
2597 #define ALT_ACPIDMAP_DYNWR_S_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + ALT_ACPIDMAP_DYNWR_S_OFST))
2598 
2599 #define ALT_ACPIDMAP_OFST 0xff707000
2600 
2601 #define ALT_ACPIDMAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ACPIDMAP_OFST))
2602 
2603 #define ALT_ACPIDMAP_LB_ADDR ALT_ACPIDMAP_ADDR
2604 
2605 #define ALT_ACPIDMAP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ACPIDMAP_ADDR) + 0x1000) - 1))
2606 
2616 #define ALT_GPIO0_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO0_ADDR)
2617 
2618 #define ALT_GPIO0_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO0_ADDR)
2619 
2620 #define ALT_GPIO0_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO0_ADDR)
2621 
2622 #define ALT_GPIO0_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO0_ADDR)
2623 
2624 #define ALT_GPIO0_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO0_ADDR)
2625 
2626 #define ALT_GPIO0_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO0_ADDR)
2627 
2628 #define ALT_GPIO0_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO0_ADDR)
2629 
2630 #define ALT_GPIO0_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO0_ADDR)
2631 
2632 #define ALT_GPIO0_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO0_ADDR)
2633 
2634 #define ALT_GPIO0_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO0_ADDR)
2635 
2636 #define ALT_GPIO0_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO0_ADDR)
2637 
2638 #define ALT_GPIO0_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO0_ADDR)
2639 
2640 #define ALT_GPIO0_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO0_ADDR)
2641 
2642 #define ALT_GPIO0_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO0_ADDR)
2643 
2644 #define ALT_GPIO0_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO0_ADDR)
2645 
2646 #define ALT_GPIO0_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO0_ADDR)
2647 
2648 #define ALT_GPIO0_OFST 0xff708000
2649 
2650 #define ALT_GPIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO0_OFST))
2651 
2652 #define ALT_GPIO0_LB_ADDR ALT_GPIO0_ADDR
2653 
2654 #define ALT_GPIO0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO0_ADDR) + 0x80) - 1))
2655 
2665 #define ALT_GPIO1_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO1_ADDR)
2666 
2667 #define ALT_GPIO1_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO1_ADDR)
2668 
2669 #define ALT_GPIO1_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO1_ADDR)
2670 
2671 #define ALT_GPIO1_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO1_ADDR)
2672 
2673 #define ALT_GPIO1_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO1_ADDR)
2674 
2675 #define ALT_GPIO1_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO1_ADDR)
2676 
2677 #define ALT_GPIO1_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO1_ADDR)
2678 
2679 #define ALT_GPIO1_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO1_ADDR)
2680 
2681 #define ALT_GPIO1_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO1_ADDR)
2682 
2683 #define ALT_GPIO1_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO1_ADDR)
2684 
2685 #define ALT_GPIO1_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO1_ADDR)
2686 
2687 #define ALT_GPIO1_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO1_ADDR)
2688 
2689 #define ALT_GPIO1_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO1_ADDR)
2690 
2691 #define ALT_GPIO1_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO1_ADDR)
2692 
2693 #define ALT_GPIO1_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO1_ADDR)
2694 
2695 #define ALT_GPIO1_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO1_ADDR)
2696 
2697 #define ALT_GPIO1_OFST 0xff709000
2698 
2699 #define ALT_GPIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO1_OFST))
2700 
2701 #define ALT_GPIO1_LB_ADDR ALT_GPIO1_ADDR
2702 
2703 #define ALT_GPIO1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO1_ADDR) + 0x80) - 1))
2704 
2714 #define ALT_GPIO2_SWPORTA_DR_ADDR ALT_GPIO_SWPORTA_DR_ADDR(ALT_GPIO2_ADDR)
2715 
2716 #define ALT_GPIO2_SWPORTA_DDR_ADDR ALT_GPIO_SWPORTA_DDR_ADDR(ALT_GPIO2_ADDR)
2717 
2718 #define ALT_GPIO2_INTEN_ADDR ALT_GPIO_INTEN_ADDR(ALT_GPIO2_ADDR)
2719 
2720 #define ALT_GPIO2_INTMSK_ADDR ALT_GPIO_INTMSK_ADDR(ALT_GPIO2_ADDR)
2721 
2722 #define ALT_GPIO2_INTTYPE_LEVEL_ADDR ALT_GPIO_INTTYPE_LEVEL_ADDR(ALT_GPIO2_ADDR)
2723 
2724 #define ALT_GPIO2_INT_POL_ADDR ALT_GPIO_INT_POL_ADDR(ALT_GPIO2_ADDR)
2725 
2726 #define ALT_GPIO2_INTSTAT_ADDR ALT_GPIO_INTSTAT_ADDR(ALT_GPIO2_ADDR)
2727 
2728 #define ALT_GPIO2_RAW_INTSTAT_ADDR ALT_GPIO_RAW_INTSTAT_ADDR(ALT_GPIO2_ADDR)
2729 
2730 #define ALT_GPIO2_DEBOUNCE_ADDR ALT_GPIO_DEBOUNCE_ADDR(ALT_GPIO2_ADDR)
2731 
2732 #define ALT_GPIO2_PORTA_EOI_ADDR ALT_GPIO_PORTA_EOI_ADDR(ALT_GPIO2_ADDR)
2733 
2734 #define ALT_GPIO2_EXT_PORTA_ADDR ALT_GPIO_EXT_PORTA_ADDR(ALT_GPIO2_ADDR)
2735 
2736 #define ALT_GPIO2_LS_SYNC_ADDR ALT_GPIO_LS_SYNC_ADDR(ALT_GPIO2_ADDR)
2737 
2738 #define ALT_GPIO2_ID_CODE_ADDR ALT_GPIO_ID_CODE_ADDR(ALT_GPIO2_ADDR)
2739 
2740 #define ALT_GPIO2_VER_ID_CODE_ADDR ALT_GPIO_VER_ID_CODE_ADDR(ALT_GPIO2_ADDR)
2741 
2742 #define ALT_GPIO2_CFG_REG2_ADDR ALT_GPIO_CFG_REG2_ADDR(ALT_GPIO2_ADDR)
2743 
2744 #define ALT_GPIO2_CFG_REG1_ADDR ALT_GPIO_CFG_REG1_ADDR(ALT_GPIO2_ADDR)
2745 
2746 #define ALT_GPIO2_OFST 0xff70a000
2747 
2748 #define ALT_GPIO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_GPIO2_OFST))
2749 
2750 #define ALT_GPIO2_LB_ADDR ALT_GPIO2_ADDR
2751 
2752 #define ALT_GPIO2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_GPIO2_ADDR) + 0x80) - 1))
2753 
2763 #define ALT_L3_REMAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_ADDR) + ALT_L3_REMAP_OFST))
2764 
2772 #define ALT_L3_SEC_L4MAIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_L4MAIN_OFST))
2773 
2774 #define ALT_L3_SEC_L4SP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_L4SP_OFST))
2775 
2776 #define ALT_L3_SEC_L4MP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_L4MP_OFST))
2777 
2778 #define ALT_L3_SEC_L4OSC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_L4OSC1_OFST))
2779 
2780 #define ALT_L3_SEC_L4SPIM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_L4SPIM_OFST))
2781 
2782 #define ALT_L3_SEC_STM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_STM_OFST))
2783 
2784 #define ALT_L3_SEC_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_LWH2F_OFST))
2785 
2786 #define ALT_L3_SEC_USB1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_USB1_OFST))
2787 
2788 #define ALT_L3_SEC_NANDDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_NANDDATA_OFST))
2789 
2790 #define ALT_L3_SEC_USB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_USB0_OFST))
2791 
2792 #define ALT_L3_SEC_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_NAND_OFST))
2793 
2794 #define ALT_L3_SEC_QSPIDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_QSPIDATA_OFST))
2795 
2796 #define ALT_L3_SEC_FPGAMGRDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_FPGAMGRDATA_OFST))
2797 
2798 #define ALT_L3_SEC_H2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_H2F_OFST))
2799 
2800 #define ALT_L3_SEC_ACP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_ACP_OFST))
2801 
2802 #define ALT_L3_SEC_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_ROM_OFST))
2803 
2804 #define ALT_L3_SEC_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_OCRAM_OFST))
2805 
2806 #define ALT_L3_SEC_SDRDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + ALT_L3_SEC_SDRDATA_OFST))
2807 
2808 #define ALT_L3_SECGRP_OFST 0x8
2809 
2810 #define ALT_L3_SECGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_ADDR) + ALT_L3_SECGRP_OFST))
2811 
2812 #define ALT_L3_SECGRP_LB_ADDR ALT_L3_SECGRP_ADDR
2813 
2814 #define ALT_L3_SECGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SECGRP_ADDR) + 0x9c) - 1))
2815 
2825 #define ALT_L3_ID_PERIPH_ID_4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_PERIPH_ID_4_OFST))
2826 
2827 #define ALT_L3_ID_PERIPH_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_PERIPH_ID_0_OFST))
2828 
2829 #define ALT_L3_ID_PERIPH_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_PERIPH_ID_1_OFST))
2830 
2831 #define ALT_L3_ID_PERIPH_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_PERIPH_ID_2_OFST))
2832 
2833 #define ALT_L3_ID_PERIPH_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_PERIPH_ID_3_OFST))
2834 
2835 #define ALT_L3_ID_COMP_ID_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_COMP_ID_0_OFST))
2836 
2837 #define ALT_L3_ID_COMP_ID_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_COMP_ID_1_OFST))
2838 
2839 #define ALT_L3_ID_COMP_ID_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_COMP_ID_2_OFST))
2840 
2841 #define ALT_L3_ID_COMP_ID_3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + ALT_L3_ID_COMP_ID_3_OFST))
2842 
2843 #define ALT_L3_IDGRP_OFST 0x1000
2844 
2845 #define ALT_L3_IDGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_ADDR) + ALT_L3_IDGRP_OFST))
2846 
2847 #define ALT_L3_IDGRP_LB_ADDR ALT_L3_IDGRP_ADDR
2848 
2849 #define ALT_L3_IDGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_IDGRP_ADDR) + 0x1000) - 1))
2850 
2867 #define ALT_L3_MST_MST_L4MAIN_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_L4MAIN_ADDR)
2868 
2869 #define ALT_L3_MST_MST_L4MAIN_OFST 0x0
2870 
2871 #define ALT_L3_MST_MST_L4MAIN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_L4MAIN_OFST))
2872 
2873 #define ALT_L3_MST_MST_L4MAIN_LB_ADDR ALT_L3_MST_MST_L4MAIN_ADDR
2874 
2875 #define ALT_L3_MST_MST_L4MAIN_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_L4MAIN_ADDR) + 0xc) - 1))
2876 
2886 #define ALT_L3_MST_MST_L4SP_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_L4SP_ADDR)
2887 
2888 #define ALT_L3_MST_MST_L4SP_OFST 0x1000
2889 
2890 #define ALT_L3_MST_MST_L4SP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_L4SP_OFST))
2891 
2892 #define ALT_L3_MST_MST_L4SP_LB_ADDR ALT_L3_MST_MST_L4SP_ADDR
2893 
2894 #define ALT_L3_MST_MST_L4SP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_L4SP_ADDR) + 0xc) - 1))
2895 
2905 #define ALT_L3_MST_MST_L4MP_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_L4MP_ADDR)
2906 
2907 #define ALT_L3_MST_MST_L4MP_OFST 0x2000
2908 
2909 #define ALT_L3_MST_MST_L4MP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_L4MP_OFST))
2910 
2911 #define ALT_L3_MST_MST_L4MP_LB_ADDR ALT_L3_MST_MST_L4MP_ADDR
2912 
2913 #define ALT_L3_MST_MST_L4MP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_L4MP_ADDR) + 0xc) - 1))
2914 
2924 #define ALT_L3_MST_MST_L4OSC1_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_L4OSC1_ADDR)
2925 
2926 #define ALT_L3_MST_MST_L4OSC1_OFST 0x3000
2927 
2928 #define ALT_L3_MST_MST_L4OSC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_L4OSC1_OFST))
2929 
2930 #define ALT_L3_MST_MST_L4OSC1_LB_ADDR ALT_L3_MST_MST_L4OSC1_ADDR
2931 
2932 #define ALT_L3_MST_MST_L4OSC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_L4OSC1_ADDR) + 0xc) - 1))
2933 
2943 #define ALT_L3_MST_MST_L4SPIM_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_L4SPIM_ADDR)
2944 
2945 #define ALT_L3_MST_MST_L4SPIM_OFST 0x4000
2946 
2947 #define ALT_L3_MST_MST_L4SPIM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_L4SPIM_OFST))
2948 
2949 #define ALT_L3_MST_MST_L4SPIM_LB_ADDR ALT_L3_MST_MST_L4SPIM_ADDR
2950 
2951 #define ALT_L3_MST_MST_L4SPIM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_L4SPIM_ADDR) + 0xc) - 1))
2952 
2962 #define ALT_L3_MST_MST_STM_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_STM_ADDR)
2963 
2964 #define ALT_L3_MST_MST_STM_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_STM_ADDR)
2965 
2966 #define ALT_L3_MST_MST_STM_OFST 0x5000
2967 
2968 #define ALT_L3_MST_MST_STM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_STM_OFST))
2969 
2970 #define ALT_L3_MST_MST_STM_LB_ADDR ALT_L3_MST_MST_STM_ADDR
2971 
2972 #define ALT_L3_MST_MST_STM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_STM_ADDR) + 0x10c) - 1))
2973 
2983 #define ALT_L3_MST_MST_LWH2F_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_LWH2F_ADDR)
2984 
2985 #define ALT_L3_MST_MST_LWH2F_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_LWH2F_ADDR)
2986 
2987 #define ALT_L3_MST_MST_LWH2F_OFST 0x6000
2988 
2989 #define ALT_L3_MST_MST_LWH2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_LWH2F_OFST))
2990 
2991 #define ALT_L3_MST_MST_LWH2F_LB_ADDR ALT_L3_MST_MST_LWH2F_ADDR
2992 
2993 #define ALT_L3_MST_MST_LWH2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_LWH2F_ADDR) + 0x10c) - 1))
2994 
3004 #define ALT_L3_MST_MST_USB1_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_USB1_ADDR)
3005 
3006 #define ALT_L3_MST_MST_USB1_AHB_CNTL_ADDR ALT_L3_AHB_CNTL_ADDR(ALT_L3_MST_MST_USB1_ADDR)
3007 
3008 #define ALT_L3_MST_MST_USB1_OFST 0x8000
3009 
3010 #define ALT_L3_MST_MST_USB1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_USB1_OFST))
3011 
3012 #define ALT_L3_MST_MST_USB1_LB_ADDR ALT_L3_MST_MST_USB1_ADDR
3013 
3014 #define ALT_L3_MST_MST_USB1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_USB1_ADDR) + 0x48) - 1))
3015 
3025 #define ALT_L3_MST_MST_NANDDATA_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_NANDDATA_ADDR)
3026 
3027 #define ALT_L3_MST_MST_NANDDATA_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_NANDDATA_ADDR)
3028 
3029 #define ALT_L3_MST_MST_NANDDATA_OFST 0x9000
3030 
3031 #define ALT_L3_MST_MST_NANDDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_NANDDATA_OFST))
3032 
3033 #define ALT_L3_MST_MST_NANDDATA_LB_ADDR ALT_L3_MST_MST_NANDDATA_ADDR
3034 
3035 #define ALT_L3_MST_MST_NANDDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_NANDDATA_ADDR) + 0x10c) - 1))
3036 
3046 #define ALT_L3_MST_MST_USB0_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_USB0_ADDR)
3047 
3048 #define ALT_L3_MST_MST_USB0_AHB_CNTL_ADDR ALT_L3_AHB_CNTL_ADDR(ALT_L3_MST_MST_USB0_ADDR)
3049 
3050 #define ALT_L3_MST_MST_USB0_OFST 0x1e000
3051 
3052 #define ALT_L3_MST_MST_USB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_USB0_OFST))
3053 
3054 #define ALT_L3_MST_MST_USB0_LB_ADDR ALT_L3_MST_MST_USB0_ADDR
3055 
3056 #define ALT_L3_MST_MST_USB0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_USB0_ADDR) + 0x48) - 1))
3057 
3067 #define ALT_L3_MST_MST_NAND_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_NAND_ADDR)
3068 
3069 #define ALT_L3_MST_MST_NAND_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_NAND_ADDR)
3070 
3071 #define ALT_L3_MST_MST_NAND_OFST 0x1f000
3072 
3073 #define ALT_L3_MST_MST_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_NAND_OFST))
3074 
3075 #define ALT_L3_MST_MST_NAND_LB_ADDR ALT_L3_MST_MST_NAND_ADDR
3076 
3077 #define ALT_L3_MST_MST_NAND_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_NAND_ADDR) + 0x10c) - 1))
3078 
3088 #define ALT_L3_MST_MST_QSPIDATA_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_QSPIDATA_ADDR)
3089 
3090 #define ALT_L3_MST_MST_QSPIDATA_AHB_CNTL_ADDR ALT_L3_AHB_CNTL_ADDR(ALT_L3_MST_MST_QSPIDATA_ADDR)
3091 
3092 #define ALT_L3_MST_MST_QSPIDATA_OFST 0x20000
3093 
3094 #define ALT_L3_MST_MST_QSPIDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_QSPIDATA_OFST))
3095 
3096 #define ALT_L3_MST_MST_QSPIDATA_LB_ADDR ALT_L3_MST_MST_QSPIDATA_ADDR
3097 
3098 #define ALT_L3_MST_MST_QSPIDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_QSPIDATA_ADDR) + 0x48) - 1))
3099 
3109 #define ALT_L3_MST_MST_FPGAMGRDATA_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_FPGAMGRDATA_ADDR)
3110 
3111 #define ALT_L3_MST_MST_FPGAMGRDATA_WR_TIDEMARK_ADDR ALT_L3_WR_TIDEMARK_ADDR(ALT_L3_MST_MST_FPGAMGRDATA_ADDR)
3112 
3113 #define ALT_L3_MST_MST_FPGAMGRDATA_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_FPGAMGRDATA_ADDR)
3114 
3115 #define ALT_L3_MST_MST_FPGAMGRDATA_OFST 0x21000
3116 
3117 #define ALT_L3_MST_MST_FPGAMGRDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_FPGAMGRDATA_OFST))
3118 
3119 #define ALT_L3_MST_MST_FPGAMGRDATA_LB_ADDR ALT_L3_MST_MST_FPGAMGRDATA_ADDR
3120 
3121 #define ALT_L3_MST_MST_FPGAMGRDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_FPGAMGRDATA_ADDR) + 0x10c) - 1))
3122 
3132 #define ALT_L3_MST_MST_H2F_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_H2F_ADDR)
3133 
3134 #define ALT_L3_MST_MST_H2F_WR_TIDEMARK_ADDR ALT_L3_WR_TIDEMARK_ADDR(ALT_L3_MST_MST_H2F_ADDR)
3135 
3136 #define ALT_L3_MST_MST_H2F_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_H2F_ADDR)
3137 
3138 #define ALT_L3_MST_MST_H2F_OFST 0x22000
3139 
3140 #define ALT_L3_MST_MST_H2F_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_H2F_OFST))
3141 
3142 #define ALT_L3_MST_MST_H2F_LB_ADDR ALT_L3_MST_MST_H2F_ADDR
3143 
3144 #define ALT_L3_MST_MST_H2F_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_H2F_ADDR) + 0x10c) - 1))
3145 
3155 #define ALT_L3_MST_MST_ACP_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_ACP_ADDR)
3156 
3157 #define ALT_L3_MST_MST_ACP_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_ACP_ADDR)
3158 
3159 #define ALT_L3_MST_MST_ACP_OFST 0x23000
3160 
3161 #define ALT_L3_MST_MST_ACP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_ACP_OFST))
3162 
3163 #define ALT_L3_MST_MST_ACP_LB_ADDR ALT_L3_MST_MST_ACP_ADDR
3164 
3165 #define ALT_L3_MST_MST_ACP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_ACP_ADDR) + 0x10c) - 1))
3166 
3176 #define ALT_L3_MST_MST_ROM_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_ROM_ADDR)
3177 
3178 #define ALT_L3_MST_MST_ROM_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_ROM_ADDR)
3179 
3180 #define ALT_L3_MST_MST_ROM_OFST 0x24000
3181 
3182 #define ALT_L3_MST_MST_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_ROM_OFST))
3183 
3184 #define ALT_L3_MST_MST_ROM_LB_ADDR ALT_L3_MST_MST_ROM_ADDR
3185 
3186 #define ALT_L3_MST_MST_ROM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_ROM_ADDR) + 0x10c) - 1))
3187 
3197 #define ALT_L3_MST_MST_OCRAM_FN_MOD_BM_ISS_ADDR ALT_L3_FN_MOD_BM_ISS_ADDR(ALT_L3_MST_MST_OCRAM_ADDR)
3198 
3199 #define ALT_L3_MST_MST_OCRAM_WR_TIDEMARK_ADDR ALT_L3_WR_TIDEMARK_ADDR(ALT_L3_MST_MST_OCRAM_ADDR)
3200 
3201 #define ALT_L3_MST_MST_OCRAM_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_MST_MST_OCRAM_ADDR)
3202 
3203 #define ALT_L3_MST_MST_OCRAM_OFST 0x25000
3204 
3205 #define ALT_L3_MST_MST_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + ALT_L3_MST_MST_OCRAM_OFST))
3206 
3207 #define ALT_L3_MST_MST_OCRAM_LB_ADDR ALT_L3_MST_MST_OCRAM_ADDR
3208 
3209 #define ALT_L3_MST_MST_OCRAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MST_MST_OCRAM_ADDR) + 0x10c) - 1))
3210 
3213 #define ALT_L3_MSTGRP_OFST 0x2000
3214 
3215 #define ALT_L3_MSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_ADDR) + ALT_L3_MSTGRP_OFST))
3216 
3217 #define ALT_L3_MSTGRP_LB_ADDR ALT_L3_MSTGRP_ADDR
3218 
3219 #define ALT_L3_MSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_MSTGRP_ADDR) + 0x2510c) - 1))
3220 
3237 #define ALT_L3_SLV_SLV_DAP_FN_MOD2_ADDR ALT_L3_FN_MOD2_ADDR(ALT_L3_SLV_SLV_DAP_ADDR)
3238 
3239 #define ALT_L3_SLV_SLV_DAP_FN_MOD_AHB_ADDR ALT_L3_FN_MOD_AHB_ADDR(ALT_L3_SLV_SLV_DAP_ADDR)
3240 
3241 #define ALT_L3_SLV_SLV_DAP_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_DAP_ADDR)
3242 
3243 #define ALT_L3_SLV_SLV_DAP_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_DAP_ADDR)
3244 
3245 #define ALT_L3_SLV_SLV_DAP_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_DAP_ADDR)
3246 
3247 #define ALT_L3_SLV_SLV_DAP_OFST 0x0
3248 
3249 #define ALT_L3_SLV_SLV_DAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_DAP_OFST))
3250 
3251 #define ALT_L3_SLV_SLV_DAP_LB_ADDR ALT_L3_SLV_SLV_DAP_ADDR
3252 
3253 #define ALT_L3_SLV_SLV_DAP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_DAP_ADDR) + 0x10c) - 1))
3254 
3264 #define ALT_L3_SLV_SLV_MPU_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_MPU_ADDR)
3265 
3266 #define ALT_L3_SLV_SLV_MPU_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_MPU_ADDR)
3267 
3268 #define ALT_L3_SLV_SLV_MPU_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_MPU_ADDR)
3269 
3270 #define ALT_L3_SLV_SLV_MPU_OFST 0x1000
3271 
3272 #define ALT_L3_SLV_SLV_MPU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_MPU_OFST))
3273 
3274 #define ALT_L3_SLV_SLV_MPU_LB_ADDR ALT_L3_SLV_SLV_MPU_ADDR
3275 
3276 #define ALT_L3_SLV_SLV_MPU_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_MPU_ADDR) + 0x10c) - 1))
3277 
3287 #define ALT_L3_SLV_SLV_SDMMC_FN_MOD_AHB_ADDR ALT_L3_FN_MOD_AHB_ADDR(ALT_L3_SLV_SLV_SDMMC_ADDR)
3288 
3289 #define ALT_L3_SLV_SLV_SDMMC_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_SDMMC_ADDR)
3290 
3291 #define ALT_L3_SLV_SLV_SDMMC_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_SDMMC_ADDR)
3292 
3293 #define ALT_L3_SLV_SLV_SDMMC_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_SDMMC_ADDR)
3294 
3295 #define ALT_L3_SLV_SLV_SDMMC_OFST 0x2000
3296 
3297 #define ALT_L3_SLV_SLV_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_SDMMC_OFST))
3298 
3299 #define ALT_L3_SLV_SLV_SDMMC_LB_ADDR ALT_L3_SLV_SLV_SDMMC_ADDR
3300 
3301 #define ALT_L3_SLV_SLV_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_SDMMC_ADDR) + 0x10c) - 1))
3302 
3312 #define ALT_L3_SLV_SLV_DMA_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_DMA_ADDR)
3313 
3314 #define ALT_L3_SLV_SLV_DMA_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_DMA_ADDR)
3315 
3316 #define ALT_L3_SLV_SLV_DMA_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_DMA_ADDR)
3317 
3318 #define ALT_L3_SLV_SLV_DMA_OFST 0x3000
3319 
3320 #define ALT_L3_SLV_SLV_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_DMA_OFST))
3321 
3322 #define ALT_L3_SLV_SLV_DMA_LB_ADDR ALT_L3_SLV_SLV_DMA_ADDR
3323 
3324 #define ALT_L3_SLV_SLV_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_DMA_ADDR) + 0x10c) - 1))
3325 
3335 #define ALT_L3_SLV_SLV_FPGA2WR_TIDEMARK_ADDR ALT_L3_WR_TIDEMARK_ADDR(ALT_L3_SLV_SLV_F2H_ADDR)
3336 
3337 #define ALT_L3_SLV_SLV_FPGA2RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_F2H_ADDR)
3338 
3339 #define ALT_L3_SLV_SLV_FPGA2WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_F2H_ADDR)
3340 
3341 #define ALT_L3_SLV_SLV_FPGA2FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_F2H_ADDR)
3342 
3343 #define ALT_L3_SLV_SLV_F2H_OFST 0x4000
3344 
3345 #define ALT_L3_SLV_SLV_F2H_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_F2H_OFST))
3346 
3347 #define ALT_L3_SLV_SLV_F2H_LB_ADDR ALT_L3_SLV_SLV_F2H_ADDR
3348 
3349 #define ALT_L3_SLV_SLV_F2H_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_F2H_ADDR) + 0x10c) - 1))
3350 
3360 #define ALT_L3_SLV_SLV_ETR_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_ETR_ADDR)
3361 
3362 #define ALT_L3_SLV_SLV_ETR_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_ETR_ADDR)
3363 
3364 #define ALT_L3_SLV_SLV_ETR_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_ETR_ADDR)
3365 
3366 #define ALT_L3_SLV_SLV_ETR_OFST 0x5000
3367 
3368 #define ALT_L3_SLV_SLV_ETR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_ETR_OFST))
3369 
3370 #define ALT_L3_SLV_SLV_ETR_LB_ADDR ALT_L3_SLV_SLV_ETR_ADDR
3371 
3372 #define ALT_L3_SLV_SLV_ETR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_ETR_ADDR) + 0x10c) - 1))
3373 
3383 #define ALT_L3_SLV_SLV_EMAC0_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_EMAC0_ADDR)
3384 
3385 #define ALT_L3_SLV_SLV_EMAC0_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_EMAC0_ADDR)
3386 
3387 #define ALT_L3_SLV_SLV_EMAC0_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_EMAC0_ADDR)
3388 
3389 #define ALT_L3_SLV_SLV_EMAC0_OFST 0x6000
3390 
3391 #define ALT_L3_SLV_SLV_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_EMAC0_OFST))
3392 
3393 #define ALT_L3_SLV_SLV_EMAC0_LB_ADDR ALT_L3_SLV_SLV_EMAC0_ADDR
3394 
3395 #define ALT_L3_SLV_SLV_EMAC0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_EMAC0_ADDR) + 0x10c) - 1))
3396 
3406 #define ALT_L3_SLV_SLV_EMAC1_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_EMAC1_ADDR)
3407 
3408 #define ALT_L3_SLV_SLV_EMAC1_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_EMAC1_ADDR)
3409 
3410 #define ALT_L3_SLV_SLV_EMAC1_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_EMAC1_ADDR)
3411 
3412 #define ALT_L3_SLV_SLV_EMAC1_OFST 0x7000
3413 
3414 #define ALT_L3_SLV_SLV_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_EMAC1_OFST))
3415 
3416 #define ALT_L3_SLV_SLV_EMAC1_LB_ADDR ALT_L3_SLV_SLV_EMAC1_ADDR
3417 
3418 #define ALT_L3_SLV_SLV_EMAC1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_EMAC1_ADDR) + 0x10c) - 1))
3419 
3429 #define ALT_L3_SLV_SLV_USB0_FN_MOD_AHB_ADDR ALT_L3_FN_MOD_AHB_ADDR(ALT_L3_SLV_SLV_USB0_ADDR)
3430 
3431 #define ALT_L3_SLV_SLV_USB0_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_USB0_ADDR)
3432 
3433 #define ALT_L3_SLV_SLV_USB0_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_USB0_ADDR)
3434 
3435 #define ALT_L3_SLV_SLV_USB0_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_USB0_ADDR)
3436 
3437 #define ALT_L3_SLV_SLV_USB0_OFST 0x8000
3438 
3439 #define ALT_L3_SLV_SLV_USB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_USB0_OFST))
3440 
3441 #define ALT_L3_SLV_SLV_USB0_LB_ADDR ALT_L3_SLV_SLV_USB0_ADDR
3442 
3443 #define ALT_L3_SLV_SLV_USB0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_USB0_ADDR) + 0x10c) - 1))
3444 
3454 #define ALT_L3_SLV_SLV_NAND_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_NAND_ADDR)
3455 
3456 #define ALT_L3_SLV_SLV_NAND_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_NAND_ADDR)
3457 
3458 #define ALT_L3_SLV_SLV_NAND_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_NAND_ADDR)
3459 
3460 #define ALT_L3_SLV_SLV_NAND_OFST 0x9000
3461 
3462 #define ALT_L3_SLV_SLV_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_NAND_OFST))
3463 
3464 #define ALT_L3_SLV_SLV_NAND_LB_ADDR ALT_L3_SLV_SLV_NAND_ADDR
3465 
3466 #define ALT_L3_SLV_SLV_NAND_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_NAND_ADDR) + 0x10c) - 1))
3467 
3477 #define ALT_L3_SLV_SLV_USB1_FN_MOD_AHB_ADDR ALT_L3_FN_MOD_AHB_ADDR(ALT_L3_SLV_SLV_USB1_ADDR)
3478 
3479 #define ALT_L3_SLV_SLV_USB1_RD_QOS_ADDR ALT_L3_RD_QOS_ADDR(ALT_L3_SLV_SLV_USB1_ADDR)
3480 
3481 #define ALT_L3_SLV_SLV_USB1_WR_QOS_ADDR ALT_L3_WR_QOS_ADDR(ALT_L3_SLV_SLV_USB1_ADDR)
3482 
3483 #define ALT_L3_SLV_SLV_USB1_FN_MOD_ADDR ALT_L3_FN_MOD_ADDR(ALT_L3_SLV_SLV_USB1_ADDR)
3484 
3485 #define ALT_L3_SLV_SLV_USB1_OFST 0xa000
3486 
3487 #define ALT_L3_SLV_SLV_USB1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + ALT_L3_SLV_SLV_USB1_OFST))
3488 
3489 #define ALT_L3_SLV_SLV_USB1_LB_ADDR ALT_L3_SLV_SLV_USB1_ADDR
3490 
3491 #define ALT_L3_SLV_SLV_USB1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLV_SLV_USB1_ADDR) + 0x10c) - 1))
3492 
3495 #define ALT_L3_SLVGRP_OFST 0x42000
3496 
3497 #define ALT_L3_SLVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_L3_ADDR) + ALT_L3_SLVGRP_OFST))
3498 
3499 #define ALT_L3_SLVGRP_LB_ADDR ALT_L3_SLVGRP_ADDR
3500 
3501 #define ALT_L3_SLVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_SLVGRP_ADDR) + 0xa10c) - 1))
3502 
3505 #define ALT_L3_OFST 0xff800000
3506 
3507 #define ALT_L3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L3_OFST))
3508 
3509 #define ALT_L3_LB_ADDR ALT_L3_ADDR
3510 
3511 #define ALT_L3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L3_ADDR) + 0x80000) - 1))
3512 
3522 #define ALT_NANDDATA_OFST 0xff900000
3523 
3524 #define ALT_NANDDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NANDDATA_OFST))
3525 
3526 #define ALT_NANDDATA_LB_ADDR ALT_NANDDATA_ADDR
3527 
3528 #define ALT_NANDDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NANDDATA_ADDR) + 0x100000) - 1))
3529 
3539 #define ALT_QSPIDATA_OFST 0xffa00000
3540 
3541 #define ALT_QSPIDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_QSPIDATA_OFST))
3542 
3543 #define ALT_QSPIDATA_LB_ADDR ALT_QSPIDATA_ADDR
3544 
3545 #define ALT_QSPIDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_QSPIDATA_ADDR) + 0x100000) - 1))
3546 
3563 #define ALT_USB0_GLOB_GOTGCTL_ADDR ALT_USB_GLOB_GOTGCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
3564 
3565 #define ALT_USB0_GLOB_GOTGINT_ADDR ALT_USB_GLOB_GOTGINT_ADDR(ALT_USB0_GLOBGRP_ADDR)
3566 
3567 #define ALT_USB0_GLOB_GAHBCFG_ADDR ALT_USB_GLOB_GAHBCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
3568 
3569 #define ALT_USB0_GLOB_GUSBCFG_ADDR ALT_USB_GLOB_GUSBCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
3570 
3571 #define ALT_USB0_GLOB_GRSTCTL_ADDR ALT_USB_GLOB_GRSTCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
3572 
3573 #define ALT_USB0_GLOB_GINTSTS_ADDR ALT_USB_GLOB_GINTSTS_ADDR(ALT_USB0_GLOBGRP_ADDR)
3574 
3575 #define ALT_USB0_GLOB_GINTMSK_ADDR ALT_USB_GLOB_GINTMSK_ADDR(ALT_USB0_GLOBGRP_ADDR)
3576 
3577 #define ALT_USB0_GLOB_GRXSTSR_ADDR ALT_USB_GLOB_GRXSTSR_ADDR(ALT_USB0_GLOBGRP_ADDR)
3578 
3579 #define ALT_USB0_GLOB_GRXSTSP_ADDR ALT_USB_GLOB_GRXSTSP_ADDR(ALT_USB0_GLOBGRP_ADDR)
3580 
3581 #define ALT_USB0_GLOB_GRXFSIZ_ADDR ALT_USB_GLOB_GRXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
3582 
3583 #define ALT_USB0_GLOB_GNPTXFSIZ_ADDR ALT_USB_GLOB_GNPTXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
3584 
3585 #define ALT_USB0_GLOB_GNPTXSTS_ADDR ALT_USB_GLOB_GNPTXSTS_ADDR(ALT_USB0_GLOBGRP_ADDR)
3586 
3587 #define ALT_USB0_GLOB_GPVNDCTL_ADDR ALT_USB_GLOB_GPVNDCTL_ADDR(ALT_USB0_GLOBGRP_ADDR)
3588 
3589 #define ALT_USB0_GLOB_GGPIO_ADDR ALT_USB_GLOB_GGPIO_ADDR(ALT_USB0_GLOBGRP_ADDR)
3590 
3591 #define ALT_USB0_GLOB_GUID_ADDR ALT_USB_GLOB_GUID_ADDR(ALT_USB0_GLOBGRP_ADDR)
3592 
3593 #define ALT_USB0_GLOB_GSNPSID_ADDR ALT_USB_GLOB_GSNPSID_ADDR(ALT_USB0_GLOBGRP_ADDR)
3594 
3595 #define ALT_USB0_GLOB_GHWCFG1_ADDR ALT_USB_GLOB_GHWCFG1_ADDR(ALT_USB0_GLOBGRP_ADDR)
3596 
3597 #define ALT_USB0_GLOB_GHWCFG2_ADDR ALT_USB_GLOB_GHWCFG2_ADDR(ALT_USB0_GLOBGRP_ADDR)
3598 
3599 #define ALT_USB0_GLOB_GHWCFG3_ADDR ALT_USB_GLOB_GHWCFG3_ADDR(ALT_USB0_GLOBGRP_ADDR)
3600 
3601 #define ALT_USB0_GLOB_GHWCFG4_ADDR ALT_USB_GLOB_GHWCFG4_ADDR(ALT_USB0_GLOBGRP_ADDR)
3602 
3603 #define ALT_USB0_GLOB_GDFIFOCFG_ADDR ALT_USB_GLOB_GDFIFOCFG_ADDR(ALT_USB0_GLOBGRP_ADDR)
3604 
3605 #define ALT_USB0_GLOB_HPTXFSIZ_ADDR ALT_USB_GLOB_HPTXFSIZ_ADDR(ALT_USB0_GLOBGRP_ADDR)
3606 
3607 #define ALT_USB0_GLOB_DIEPTXF1_ADDR ALT_USB_GLOB_DIEPTXF1_ADDR(ALT_USB0_GLOBGRP_ADDR)
3608 
3609 #define ALT_USB0_GLOB_DIEPTXF2_ADDR ALT_USB_GLOB_DIEPTXF2_ADDR(ALT_USB0_GLOBGRP_ADDR)
3610 
3611 #define ALT_USB0_GLOB_DIEPTXF3_ADDR ALT_USB_GLOB_DIEPTXF3_ADDR(ALT_USB0_GLOBGRP_ADDR)
3612 
3613 #define ALT_USB0_GLOB_DIEPTXF4_ADDR ALT_USB_GLOB_DIEPTXF4_ADDR(ALT_USB0_GLOBGRP_ADDR)
3614 
3615 #define ALT_USB0_GLOB_DIEPTXF5_ADDR ALT_USB_GLOB_DIEPTXF5_ADDR(ALT_USB0_GLOBGRP_ADDR)
3616 
3617 #define ALT_USB0_GLOB_DIEPTXF6_ADDR ALT_USB_GLOB_DIEPTXF6_ADDR(ALT_USB0_GLOBGRP_ADDR)
3618 
3619 #define ALT_USB0_GLOB_DIEPTXF7_ADDR ALT_USB_GLOB_DIEPTXF7_ADDR(ALT_USB0_GLOBGRP_ADDR)
3620 
3621 #define ALT_USB0_GLOB_DIEPTXF8_ADDR ALT_USB_GLOB_DIEPTXF8_ADDR(ALT_USB0_GLOBGRP_ADDR)
3622 
3623 #define ALT_USB0_GLOB_DIEPTXF9_ADDR ALT_USB_GLOB_DIEPTXF9_ADDR(ALT_USB0_GLOBGRP_ADDR)
3624 
3625 #define ALT_USB0_GLOB_DIEPTXF10_ADDR ALT_USB_GLOB_DIEPTXF10_ADDR(ALT_USB0_GLOBGRP_ADDR)
3626 
3627 #define ALT_USB0_GLOB_DIEPTXF11_ADDR ALT_USB_GLOB_DIEPTXF11_ADDR(ALT_USB0_GLOBGRP_ADDR)
3628 
3629 #define ALT_USB0_GLOB_DIEPTXF12_ADDR ALT_USB_GLOB_DIEPTXF12_ADDR(ALT_USB0_GLOBGRP_ADDR)
3630 
3631 #define ALT_USB0_GLOB_DIEPTXF13_ADDR ALT_USB_GLOB_DIEPTXF13_ADDR(ALT_USB0_GLOBGRP_ADDR)
3632 
3633 #define ALT_USB0_GLOB_DIEPTXF14_ADDR ALT_USB_GLOB_DIEPTXF14_ADDR(ALT_USB0_GLOBGRP_ADDR)
3634 
3635 #define ALT_USB0_GLOB_DIEPTXF15_ADDR ALT_USB_GLOB_DIEPTXF15_ADDR(ALT_USB0_GLOBGRP_ADDR)
3636 
3637 #define ALT_USB0_GLOBGRP_OFST 0x0
3638 
3639 #define ALT_USB0_GLOBGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB0_ADDR) + ALT_USB0_GLOBGRP_OFST))
3640 
3641 #define ALT_USB0_GLOBGRP_LB_ADDR ALT_USB0_GLOBGRP_ADDR
3642 
3643 #define ALT_USB0_GLOBGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_GLOBGRP_ADDR) + 0x140) - 1))
3644 
3654 #define ALT_USB0_HOST_HCFG_ADDR ALT_USB_HOST_HCFG_ADDR(ALT_USB0_HOSTGRP_ADDR)
3655 
3656 #define ALT_USB0_HOST_HFIR_ADDR ALT_USB_HOST_HFIR_ADDR(ALT_USB0_HOSTGRP_ADDR)
3657 
3658 #define ALT_USB0_HOST_HFNUM_ADDR ALT_USB_HOST_HFNUM_ADDR(ALT_USB0_HOSTGRP_ADDR)
3659 
3660 #define ALT_USB0_HOST_HPTXSTS_ADDR ALT_USB_HOST_HPTXSTS_ADDR(ALT_USB0_HOSTGRP_ADDR)
3661 
3662 #define ALT_USB0_HOST_HAINT_ADDR ALT_USB_HOST_HAINT_ADDR(ALT_USB0_HOSTGRP_ADDR)
3663 
3664 #define ALT_USB0_HOST_HAINTMSK_ADDR ALT_USB_HOST_HAINTMSK_ADDR(ALT_USB0_HOSTGRP_ADDR)
3665 
3666 #define ALT_USB0_HOST_HFLBADDR_ADDR ALT_USB_HOST_HFLBADDR_ADDR(ALT_USB0_HOSTGRP_ADDR)
3667 
3668 #define ALT_USB0_HOST_HPRT_ADDR ALT_USB_HOST_HPRT_ADDR(ALT_USB0_HOSTGRP_ADDR)
3669 
3670 #define ALT_USB0_HOST_HCCHAR0_ADDR ALT_USB_HOST_HCCHAR0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3671 
3672 #define ALT_USB0_HOST_HCSPLT0_ADDR ALT_USB_HOST_HCSPLT0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3673 
3674 #define ALT_USB0_HOST_HCINT0_ADDR ALT_USB_HOST_HCINT0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3675 
3676 #define ALT_USB0_HOST_HCINTMSK0_ADDR ALT_USB_HOST_HCINTMSK0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3677 
3678 #define ALT_USB0_HOST_HCTSIZ0_ADDR ALT_USB_HOST_HCTSIZ0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3679 
3680 #define ALT_USB0_HOST_HCDMA0_ADDR ALT_USB_HOST_HCDMA0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3681 
3682 #define ALT_USB0_HOST_HCDMAB0_ADDR ALT_USB_HOST_HCDMAB0_ADDR(ALT_USB0_HOSTGRP_ADDR)
3683 
3684 #define ALT_USB0_HOST_HCCHAR1_ADDR ALT_USB_HOST_HCCHAR1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3685 
3686 #define ALT_USB0_HOST_HCSPLT1_ADDR ALT_USB_HOST_HCSPLT1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3687 
3688 #define ALT_USB0_HOST_HCINT1_ADDR ALT_USB_HOST_HCINT1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3689 
3690 #define ALT_USB0_HOST_HCINTMSK1_ADDR ALT_USB_HOST_HCINTMSK1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3691 
3692 #define ALT_USB0_HOST_HCTSIZ1_ADDR ALT_USB_HOST_HCTSIZ1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3693 
3694 #define ALT_USB0_HOST_HCDMA1_ADDR ALT_USB_HOST_HCDMA1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3695 
3696 #define ALT_USB0_HOST_HCDMAB1_ADDR ALT_USB_HOST_HCDMAB1_ADDR(ALT_USB0_HOSTGRP_ADDR)
3697 
3698 #define ALT_USB0_HOST_HCCHAR2_ADDR ALT_USB_HOST_HCCHAR2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3699 
3700 #define ALT_USB0_HOST_HCSPLT2_ADDR ALT_USB_HOST_HCSPLT2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3701 
3702 #define ALT_USB0_HOST_HCINT2_ADDR ALT_USB_HOST_HCINT2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3703 
3704 #define ALT_USB0_HOST_HCINTMSK2_ADDR ALT_USB_HOST_HCINTMSK2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3705 
3706 #define ALT_USB0_HOST_HCTSIZ2_ADDR ALT_USB_HOST_HCTSIZ2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3707 
3708 #define ALT_USB0_HOST_HCDMA2_ADDR ALT_USB_HOST_HCDMA2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3709 
3710 #define ALT_USB0_HOST_HCDMAB2_ADDR ALT_USB_HOST_HCDMAB2_ADDR(ALT_USB0_HOSTGRP_ADDR)
3711 
3712 #define ALT_USB0_HOST_HCCHAR3_ADDR ALT_USB_HOST_HCCHAR3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3713 
3714 #define ALT_USB0_HOST_HCSPLT3_ADDR ALT_USB_HOST_HCSPLT3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3715 
3716 #define ALT_USB0_HOST_HCINT3_ADDR ALT_USB_HOST_HCINT3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3717 
3718 #define ALT_USB0_HOST_HCINTMSK3_ADDR ALT_USB_HOST_HCINTMSK3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3719 
3720 #define ALT_USB0_HOST_HCTSIZ3_ADDR ALT_USB_HOST_HCTSIZ3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3721 
3722 #define ALT_USB0_HOST_HCDMA3_ADDR ALT_USB_HOST_HCDMA3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3723 
3724 #define ALT_USB0_HOST_HCDMAB3_ADDR ALT_USB_HOST_HCDMAB3_ADDR(ALT_USB0_HOSTGRP_ADDR)
3725 
3726 #define ALT_USB0_HOST_HCCHAR4_ADDR ALT_USB_HOST_HCCHAR4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3727 
3728 #define ALT_USB0_HOST_HCSPLT4_ADDR ALT_USB_HOST_HCSPLT4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3729 
3730 #define ALT_USB0_HOST_HCINT4_ADDR ALT_USB_HOST_HCINT4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3731 
3732 #define ALT_USB0_HOST_HCINTMSK4_ADDR ALT_USB_HOST_HCINTMSK4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3733 
3734 #define ALT_USB0_HOST_HCTSIZ4_ADDR ALT_USB_HOST_HCTSIZ4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3735 
3736 #define ALT_USB0_HOST_HCDMA4_ADDR ALT_USB_HOST_HCDMA4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3737 
3738 #define ALT_USB0_HOST_HCDMAB4_ADDR ALT_USB_HOST_HCDMAB4_ADDR(ALT_USB0_HOSTGRP_ADDR)
3739 
3740 #define ALT_USB0_HOST_HCCHAR5_ADDR ALT_USB_HOST_HCCHAR5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3741 
3742 #define ALT_USB0_HOST_HCSPLT5_ADDR ALT_USB_HOST_HCSPLT5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3743 
3744 #define ALT_USB0_HOST_HCINT5_ADDR ALT_USB_HOST_HCINT5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3745 
3746 #define ALT_USB0_HOST_HCINTMSK5_ADDR ALT_USB_HOST_HCINTMSK5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3747 
3748 #define ALT_USB0_HOST_HCTSIZ5_ADDR ALT_USB_HOST_HCTSIZ5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3749 
3750 #define ALT_USB0_HOST_HCDMA5_ADDR ALT_USB_HOST_HCDMA5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3751 
3752 #define ALT_USB0_HOST_HCDMAB5_ADDR ALT_USB_HOST_HCDMAB5_ADDR(ALT_USB0_HOSTGRP_ADDR)
3753 
3754 #define ALT_USB0_HOST_HCCHAR6_ADDR ALT_USB_HOST_HCCHAR6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3755 
3756 #define ALT_USB0_HOST_HCSPLT6_ADDR ALT_USB_HOST_HCSPLT6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3757 
3758 #define ALT_USB0_HOST_HCINT6_ADDR ALT_USB_HOST_HCINT6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3759 
3760 #define ALT_USB0_HOST_HCINTMSK6_ADDR ALT_USB_HOST_HCINTMSK6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3761 
3762 #define ALT_USB0_HOST_HCTSIZ6_ADDR ALT_USB_HOST_HCTSIZ6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3763 
3764 #define ALT_USB0_HOST_HCDMA6_ADDR ALT_USB_HOST_HCDMA6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3765 
3766 #define ALT_USB0_HOST_HCDMAB6_ADDR ALT_USB_HOST_HCDMAB6_ADDR(ALT_USB0_HOSTGRP_ADDR)
3767 
3768 #define ALT_USB0_HOST_HCCHAR7_ADDR ALT_USB_HOST_HCCHAR7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3769 
3770 #define ALT_USB0_HOST_HCSPLT7_ADDR ALT_USB_HOST_HCSPLT7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3771 
3772 #define ALT_USB0_HOST_HCINT7_ADDR ALT_USB_HOST_HCINT7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3773 
3774 #define ALT_USB0_HOST_HCINTMSK7_ADDR ALT_USB_HOST_HCINTMSK7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3775 
3776 #define ALT_USB0_HOST_HCTSIZ7_ADDR ALT_USB_HOST_HCTSIZ7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3777 
3778 #define ALT_USB0_HOST_HCDMA7_ADDR ALT_USB_HOST_HCDMA7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3779 
3780 #define ALT_USB0_HOST_HCDMAB7_ADDR ALT_USB_HOST_HCDMAB7_ADDR(ALT_USB0_HOSTGRP_ADDR)
3781 
3782 #define ALT_USB0_HOST_HCCHAR8_ADDR ALT_USB_HOST_HCCHAR8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3783 
3784 #define ALT_USB0_HOST_HCSPLT8_ADDR ALT_USB_HOST_HCSPLT8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3785 
3786 #define ALT_USB0_HOST_HCINT8_ADDR ALT_USB_HOST_HCINT8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3787 
3788 #define ALT_USB0_HOST_HCINTMSK8_ADDR ALT_USB_HOST_HCINTMSK8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3789 
3790 #define ALT_USB0_HOST_HCTSIZ8_ADDR ALT_USB_HOST_HCTSIZ8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3791 
3792 #define ALT_USB0_HOST_HCDMA8_ADDR ALT_USB_HOST_HCDMA8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3793 
3794 #define ALT_USB0_HOST_HCDMAB8_ADDR ALT_USB_HOST_HCDMAB8_ADDR(ALT_USB0_HOSTGRP_ADDR)
3795 
3796 #define ALT_USB0_HOST_HCCHAR9_ADDR ALT_USB_HOST_HCCHAR9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3797 
3798 #define ALT_USB0_HOST_HCSPLT9_ADDR ALT_USB_HOST_HCSPLT9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3799 
3800 #define ALT_USB0_HOST_HCINT9_ADDR ALT_USB_HOST_HCINT9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3801 
3802 #define ALT_USB0_HOST_HCINTMSK9_ADDR ALT_USB_HOST_HCINTMSK9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3803 
3804 #define ALT_USB0_HOST_HCTSIZ9_ADDR ALT_USB_HOST_HCTSIZ9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3805 
3806 #define ALT_USB0_HOST_HCDMA9_ADDR ALT_USB_HOST_HCDMA9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3807 
3808 #define ALT_USB0_HOST_HCDMAB9_ADDR ALT_USB_HOST_HCDMAB9_ADDR(ALT_USB0_HOSTGRP_ADDR)
3809 
3810 #define ALT_USB0_HOST_HCCHAR10_ADDR ALT_USB_HOST_HCCHAR10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3811 
3812 #define ALT_USB0_HOST_HCSPLT10_ADDR ALT_USB_HOST_HCSPLT10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3813 
3814 #define ALT_USB0_HOST_HCINT10_ADDR ALT_USB_HOST_HCINT10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3815 
3816 #define ALT_USB0_HOST_HCINTMSK10_ADDR ALT_USB_HOST_HCINTMSK10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3817 
3818 #define ALT_USB0_HOST_HCTSIZ10_ADDR ALT_USB_HOST_HCTSIZ10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3819 
3820 #define ALT_USB0_HOST_HCDMA10_ADDR ALT_USB_HOST_HCDMA10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3821 
3822 #define ALT_USB0_HOST_HCDMAB10_ADDR ALT_USB_HOST_HCDMAB10_ADDR(ALT_USB0_HOSTGRP_ADDR)
3823 
3824 #define ALT_USB0_HOST_HCCHAR11_ADDR ALT_USB_HOST_HCCHAR11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3825 
3826 #define ALT_USB0_HOST_HCSPLT11_ADDR ALT_USB_HOST_HCSPLT11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3827 
3828 #define ALT_USB0_HOST_HCINT11_ADDR ALT_USB_HOST_HCINT11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3829 
3830 #define ALT_USB0_HOST_HCINTMSK11_ADDR ALT_USB_HOST_HCINTMSK11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3831 
3832 #define ALT_USB0_HOST_HCTSIZ11_ADDR ALT_USB_HOST_HCTSIZ11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3833 
3834 #define ALT_USB0_HOST_HCDMA11_ADDR ALT_USB_HOST_HCDMA11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3835 
3836 #define ALT_USB0_HOST_HCDMAB11_ADDR ALT_USB_HOST_HCDMAB11_ADDR(ALT_USB0_HOSTGRP_ADDR)
3837 
3838 #define ALT_USB0_HOST_HCCHAR12_ADDR ALT_USB_HOST_HCCHAR12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3839 
3840 #define ALT_USB0_HOST_HCSPLT12_ADDR ALT_USB_HOST_HCSPLT12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3841 
3842 #define ALT_USB0_HOST_HCINT12_ADDR ALT_USB_HOST_HCINT12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3843 
3844 #define ALT_USB0_HOST_HCINTMSK12_ADDR ALT_USB_HOST_HCINTMSK12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3845 
3846 #define ALT_USB0_HOST_HCTSIZ12_ADDR ALT_USB_HOST_HCTSIZ12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3847 
3848 #define ALT_USB0_HOST_HCDMA12_ADDR ALT_USB_HOST_HCDMA12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3849 
3850 #define ALT_USB0_HOST_HCDMAB12_ADDR ALT_USB_HOST_HCDMAB12_ADDR(ALT_USB0_HOSTGRP_ADDR)
3851 
3852 #define ALT_USB0_HOST_HCCHAR13_ADDR ALT_USB_HOST_HCCHAR13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3853 
3854 #define ALT_USB0_HOST_HCSPLT13_ADDR ALT_USB_HOST_HCSPLT13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3855 
3856 #define ALT_USB0_HOST_HCINT13_ADDR ALT_USB_HOST_HCINT13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3857 
3858 #define ALT_USB0_HOST_HCINTMSK13_ADDR ALT_USB_HOST_HCINTMSK13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3859 
3860 #define ALT_USB0_HOST_HCTSIZ13_ADDR ALT_USB_HOST_HCTSIZ13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3861 
3862 #define ALT_USB0_HOST_HCDMA13_ADDR ALT_USB_HOST_HCDMA13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3863 
3864 #define ALT_USB0_HOST_HCDMAB13_ADDR ALT_USB_HOST_HCDMAB13_ADDR(ALT_USB0_HOSTGRP_ADDR)
3865 
3866 #define ALT_USB0_HOST_HCCHAR14_ADDR ALT_USB_HOST_HCCHAR14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3867 
3868 #define ALT_USB0_HOST_HCSPLT14_ADDR ALT_USB_HOST_HCSPLT14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3869 
3870 #define ALT_USB0_HOST_HCINT14_ADDR ALT_USB_HOST_HCINT14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3871 
3872 #define ALT_USB0_HOST_HCINTMSK14_ADDR ALT_USB_HOST_HCINTMSK14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3873 
3874 #define ALT_USB0_HOST_HCTSIZ14_ADDR ALT_USB_HOST_HCTSIZ14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3875 
3876 #define ALT_USB0_HOST_HCDMA14_ADDR ALT_USB_HOST_HCDMA14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3877 
3878 #define ALT_USB0_HOST_HCDMAB14_ADDR ALT_USB_HOST_HCDMAB14_ADDR(ALT_USB0_HOSTGRP_ADDR)
3879 
3880 #define ALT_USB0_HOST_HCCHAR15_ADDR ALT_USB_HOST_HCCHAR15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3881 
3882 #define ALT_USB0_HOST_HCSPLT15_ADDR ALT_USB_HOST_HCSPLT15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3883 
3884 #define ALT_USB0_HOST_HCINT15_ADDR ALT_USB_HOST_HCINT15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3885 
3886 #define ALT_USB0_HOST_HCINTMSK15_ADDR ALT_USB_HOST_HCINTMSK15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3887 
3888 #define ALT_USB0_HOST_HCTSIZ15_ADDR ALT_USB_HOST_HCTSIZ15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3889 
3890 #define ALT_USB0_HOST_HCDMA15_ADDR ALT_USB_HOST_HCDMA15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3891 
3892 #define ALT_USB0_HOST_HCDMAB15_ADDR ALT_USB_HOST_HCDMAB15_ADDR(ALT_USB0_HOSTGRP_ADDR)
3893 
3894 #define ALT_USB0_HOSTGRP_OFST 0x400
3895 
3896 #define ALT_USB0_HOSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB0_ADDR) + ALT_USB0_HOSTGRP_OFST))
3897 
3898 #define ALT_USB0_HOSTGRP_LB_ADDR ALT_USB0_HOSTGRP_ADDR
3899 
3900 #define ALT_USB0_HOSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_HOSTGRP_ADDR) + 0x2fc) - 1))
3901 
3911 #define ALT_USB0_DEV_DCFG_ADDR ALT_USB_DEV_DCFG_ADDR(ALT_USB0_DEVGRP_ADDR)
3912 
3913 #define ALT_USB0_DEV_DCTL_ADDR ALT_USB_DEV_DCTL_ADDR(ALT_USB0_DEVGRP_ADDR)
3914 
3915 #define ALT_USB0_DEV_DSTS_ADDR ALT_USB_DEV_DSTS_ADDR(ALT_USB0_DEVGRP_ADDR)
3916 
3917 #define ALT_USB0_DEV_DIEPMSK_ADDR ALT_USB_DEV_DIEPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
3918 
3919 #define ALT_USB0_DEV_DOEPMSK_ADDR ALT_USB_DEV_DOEPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
3920 
3921 #define ALT_USB0_DEV_DAINT_ADDR ALT_USB_DEV_DAINT_ADDR(ALT_USB0_DEVGRP_ADDR)
3922 
3923 #define ALT_USB0_DEV_DAINTMSK_ADDR ALT_USB_DEV_DAINTMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
3924 
3925 #define ALT_USB0_DEV_DVBUSDIS_ADDR ALT_USB_DEV_DVBUSDIS_ADDR(ALT_USB0_DEVGRP_ADDR)
3926 
3927 #define ALT_USB0_DEV_DVBUSPULSE_ADDR ALT_USB_DEV_DVBUSPULSE_ADDR(ALT_USB0_DEVGRP_ADDR)
3928 
3929 #define ALT_USB0_DEV_DTHRCTL_ADDR ALT_USB_DEV_DTHRCTL_ADDR(ALT_USB0_DEVGRP_ADDR)
3930 
3931 #define ALT_USB0_DEV_DIEPEMPMSK_ADDR ALT_USB_DEV_DIEPEMPMSK_ADDR(ALT_USB0_DEVGRP_ADDR)
3932 
3933 #define ALT_USB0_DEV_DIEPCTL0_ADDR ALT_USB_DEV_DIEPCTL0_ADDR(ALT_USB0_DEVGRP_ADDR)
3934 
3935 #define ALT_USB0_DEV_DIEPINT0_ADDR ALT_USB_DEV_DIEPINT0_ADDR(ALT_USB0_DEVGRP_ADDR)
3936 
3937 #define ALT_USB0_DEV_DIEPTSIZ0_ADDR ALT_USB_DEV_DIEPTSIZ0_ADDR(ALT_USB0_DEVGRP_ADDR)
3938 
3939 #define ALT_USB0_DEV_DIEPDMA0_ADDR ALT_USB_DEV_DIEPDMA0_ADDR(ALT_USB0_DEVGRP_ADDR)
3940 
3941 #define ALT_USB0_DEV_DTXFSTS0_ADDR ALT_USB_DEV_DTXFSTS0_ADDR(ALT_USB0_DEVGRP_ADDR)
3942 
3943 #define ALT_USB0_DEV_DIEPDMAB0_ADDR ALT_USB_DEV_DIEPDMAB0_ADDR(ALT_USB0_DEVGRP_ADDR)
3944 
3945 #define ALT_USB0_DEV_DIEPCTL1_ADDR ALT_USB_DEV_DIEPCTL1_ADDR(ALT_USB0_DEVGRP_ADDR)
3946 
3947 #define ALT_USB0_DEV_DIEPINT1_ADDR ALT_USB_DEV_DIEPINT1_ADDR(ALT_USB0_DEVGRP_ADDR)
3948 
3949 #define ALT_USB0_DEV_DIEPTSIZ1_ADDR ALT_USB_DEV_DIEPTSIZ1_ADDR(ALT_USB0_DEVGRP_ADDR)
3950 
3951 #define ALT_USB0_DEV_DIEPDMA1_ADDR ALT_USB_DEV_DIEPDMA1_ADDR(ALT_USB0_DEVGRP_ADDR)
3952 
3953 #define ALT_USB0_DEV_DTXFSTS1_ADDR ALT_USB_DEV_DTXFSTS1_ADDR(ALT_USB0_DEVGRP_ADDR)
3954 
3955 #define ALT_USB0_DEV_DIEPDMAB1_ADDR ALT_USB_DEV_DIEPDMAB1_ADDR(ALT_USB0_DEVGRP_ADDR)
3956 
3957 #define ALT_USB0_DEV_DIEPCTL2_ADDR ALT_USB_DEV_DIEPCTL2_ADDR(ALT_USB0_DEVGRP_ADDR)
3958 
3959 #define ALT_USB0_DEV_DIEPINT2_ADDR ALT_USB_DEV_DIEPINT2_ADDR(ALT_USB0_DEVGRP_ADDR)
3960 
3961 #define ALT_USB0_DEV_DIEPTSIZ2_ADDR ALT_USB_DEV_DIEPTSIZ2_ADDR(ALT_USB0_DEVGRP_ADDR)
3962 
3963 #define ALT_USB0_DEV_DIEPDMA2_ADDR ALT_USB_DEV_DIEPDMA2_ADDR(ALT_USB0_DEVGRP_ADDR)
3964 
3965 #define ALT_USB0_DEV_DTXFSTS2_ADDR ALT_USB_DEV_DTXFSTS2_ADDR(ALT_USB0_DEVGRP_ADDR)
3966 
3967 #define ALT_USB0_DEV_DIEPDMAB2_ADDR ALT_USB_DEV_DIEPDMAB2_ADDR(ALT_USB0_DEVGRP_ADDR)
3968 
3969 #define ALT_USB0_DEV_DIEPCTL3_ADDR ALT_USB_DEV_DIEPCTL3_ADDR(ALT_USB0_DEVGRP_ADDR)
3970 
3971 #define ALT_USB0_DEV_DIEPINT3_ADDR ALT_USB_DEV_DIEPINT3_ADDR(ALT_USB0_DEVGRP_ADDR)
3972 
3973 #define ALT_USB0_DEV_DIEPTSIZ3_ADDR ALT_USB_DEV_DIEPTSIZ3_ADDR(ALT_USB0_DEVGRP_ADDR)
3974 
3975 #define ALT_USB0_DEV_DIEPDMA3_ADDR ALT_USB_DEV_DIEPDMA3_ADDR(ALT_USB0_DEVGRP_ADDR)
3976 
3977 #define ALT_USB0_DEV_DTXFSTS3_ADDR ALT_USB_DEV_DTXFSTS3_ADDR(ALT_USB0_DEVGRP_ADDR)
3978 
3979 #define ALT_USB0_DEV_DIEPDMAB3_ADDR ALT_USB_DEV_DIEPDMAB3_ADDR(ALT_USB0_DEVGRP_ADDR)
3980 
3981 #define ALT_USB0_DEV_DIEPCTL4_ADDR ALT_USB_DEV_DIEPCTL4_ADDR(ALT_USB0_DEVGRP_ADDR)
3982 
3983 #define ALT_USB0_DEV_DIEPINT4_ADDR ALT_USB_DEV_DIEPINT4_ADDR(ALT_USB0_DEVGRP_ADDR)
3984 
3985 #define ALT_USB0_DEV_DIEPTSIZ4_ADDR ALT_USB_DEV_DIEPTSIZ4_ADDR(ALT_USB0_DEVGRP_ADDR)
3986 
3987 #define ALT_USB0_DEV_DIEPDMA4_ADDR ALT_USB_DEV_DIEPDMA4_ADDR(ALT_USB0_DEVGRP_ADDR)
3988 
3989 #define ALT_USB0_DEV_DTXFSTS4_ADDR ALT_USB_DEV_DTXFSTS4_ADDR(ALT_USB0_DEVGRP_ADDR)
3990 
3991 #define ALT_USB0_DEV_DIEPDMAB4_ADDR ALT_USB_DEV_DIEPDMAB4_ADDR(ALT_USB0_DEVGRP_ADDR)
3992 
3993 #define ALT_USB0_DEV_DIEPCTL5_ADDR ALT_USB_DEV_DIEPCTL5_ADDR(ALT_USB0_DEVGRP_ADDR)
3994 
3995 #define ALT_USB0_DEV_DIEPINT5_ADDR ALT_USB_DEV_DIEPINT5_ADDR(ALT_USB0_DEVGRP_ADDR)
3996 
3997 #define ALT_USB0_DEV_DIEPTSIZ5_ADDR ALT_USB_DEV_DIEPTSIZ5_ADDR(ALT_USB0_DEVGRP_ADDR)
3998 
3999 #define ALT_USB0_DEV_DIEPDMA5_ADDR ALT_USB_DEV_DIEPDMA5_ADDR(ALT_USB0_DEVGRP_ADDR)
4000 
4001 #define ALT_USB0_DEV_DTXFSTS5_ADDR ALT_USB_DEV_DTXFSTS5_ADDR(ALT_USB0_DEVGRP_ADDR)
4002 
4003 #define ALT_USB0_DEV_DIEPDMAB5_ADDR ALT_USB_DEV_DIEPDMAB5_ADDR(ALT_USB0_DEVGRP_ADDR)
4004 
4005 #define ALT_USB0_DEV_DIEPCTL6_ADDR ALT_USB_DEV_DIEPCTL6_ADDR(ALT_USB0_DEVGRP_ADDR)
4006 
4007 #define ALT_USB0_DEV_DIEPINT6_ADDR ALT_USB_DEV_DIEPINT6_ADDR(ALT_USB0_DEVGRP_ADDR)
4008 
4009 #define ALT_USB0_DEV_DIEPTSIZ6_ADDR ALT_USB_DEV_DIEPTSIZ6_ADDR(ALT_USB0_DEVGRP_ADDR)
4010 
4011 #define ALT_USB0_DEV_DIEPDMA6_ADDR ALT_USB_DEV_DIEPDMA6_ADDR(ALT_USB0_DEVGRP_ADDR)
4012 
4013 #define ALT_USB0_DEV_DTXFSTS6_ADDR ALT_USB_DEV_DTXFSTS6_ADDR(ALT_USB0_DEVGRP_ADDR)
4014 
4015 #define ALT_USB0_DEV_DIEPDMAB6_ADDR ALT_USB_DEV_DIEPDMAB6_ADDR(ALT_USB0_DEVGRP_ADDR)
4016 
4017 #define ALT_USB0_DEV_DIEPCTL7_ADDR ALT_USB_DEV_DIEPCTL7_ADDR(ALT_USB0_DEVGRP_ADDR)
4018 
4019 #define ALT_USB0_DEV_DIEPINT7_ADDR ALT_USB_DEV_DIEPINT7_ADDR(ALT_USB0_DEVGRP_ADDR)
4020 
4021 #define ALT_USB0_DEV_DIEPTSIZ7_ADDR ALT_USB_DEV_DIEPTSIZ7_ADDR(ALT_USB0_DEVGRP_ADDR)
4022 
4023 #define ALT_USB0_DEV_DIEPDMA7_ADDR ALT_USB_DEV_DIEPDMA7_ADDR(ALT_USB0_DEVGRP_ADDR)
4024 
4025 #define ALT_USB0_DEV_DTXFSTS7_ADDR ALT_USB_DEV_DTXFSTS7_ADDR(ALT_USB0_DEVGRP_ADDR)
4026 
4027 #define ALT_USB0_DEV_DIEPDMAB7_ADDR ALT_USB_DEV_DIEPDMAB7_ADDR(ALT_USB0_DEVGRP_ADDR)
4028 
4029 #define ALT_USB0_DEV_DIEPCTL8_ADDR ALT_USB_DEV_DIEPCTL8_ADDR(ALT_USB0_DEVGRP_ADDR)
4030 
4031 #define ALT_USB0_DEV_DIEPINT8_ADDR ALT_USB_DEV_DIEPINT8_ADDR(ALT_USB0_DEVGRP_ADDR)
4032 
4033 #define ALT_USB0_DEV_DIEPTSIZ8_ADDR ALT_USB_DEV_DIEPTSIZ8_ADDR(ALT_USB0_DEVGRP_ADDR)
4034 
4035 #define ALT_USB0_DEV_DIEPDMA8_ADDR ALT_USB_DEV_DIEPDMA8_ADDR(ALT_USB0_DEVGRP_ADDR)
4036 
4037 #define ALT_USB0_DEV_DTXFSTS8_ADDR ALT_USB_DEV_DTXFSTS8_ADDR(ALT_USB0_DEVGRP_ADDR)
4038 
4039 #define ALT_USB0_DEV_DIEPDMAB8_ADDR ALT_USB_DEV_DIEPDMAB8_ADDR(ALT_USB0_DEVGRP_ADDR)
4040 
4041 #define ALT_USB0_DEV_DIEPCTL9_ADDR ALT_USB_DEV_DIEPCTL9_ADDR(ALT_USB0_DEVGRP_ADDR)
4042 
4043 #define ALT_USB0_DEV_DIEPINT9_ADDR ALT_USB_DEV_DIEPINT9_ADDR(ALT_USB0_DEVGRP_ADDR)
4044 
4045 #define ALT_USB0_DEV_DIEPTSIZ9_ADDR ALT_USB_DEV_DIEPTSIZ9_ADDR(ALT_USB0_DEVGRP_ADDR)
4046 
4047 #define ALT_USB0_DEV_DIEPDMA9_ADDR ALT_USB_DEV_DIEPDMA9_ADDR(ALT_USB0_DEVGRP_ADDR)
4048 
4049 #define ALT_USB0_DEV_DTXFSTS9_ADDR ALT_USB_DEV_DTXFSTS9_ADDR(ALT_USB0_DEVGRP_ADDR)
4050 
4051 #define ALT_USB0_DEV_DIEPDMAB9_ADDR ALT_USB_DEV_DIEPDMAB9_ADDR(ALT_USB0_DEVGRP_ADDR)
4052 
4053 #define ALT_USB0_DEV_DIEPCTL10_ADDR ALT_USB_DEV_DIEPCTL10_ADDR(ALT_USB0_DEVGRP_ADDR)
4054 
4055 #define ALT_USB0_DEV_DIEPINT10_ADDR ALT_USB_DEV_DIEPINT10_ADDR(ALT_USB0_DEVGRP_ADDR)
4056 
4057 #define ALT_USB0_DEV_DIEPTSIZ10_ADDR ALT_USB_DEV_DIEPTSIZ10_ADDR(ALT_USB0_DEVGRP_ADDR)
4058 
4059 #define ALT_USB0_DEV_DIEPDMA10_ADDR ALT_USB_DEV_DIEPDMA10_ADDR(ALT_USB0_DEVGRP_ADDR)
4060 
4061 #define ALT_USB0_DEV_DTXFSTS10_ADDR ALT_USB_DEV_DTXFSTS10_ADDR(ALT_USB0_DEVGRP_ADDR)
4062 
4063 #define ALT_USB0_DEV_DIEPDMAB10_ADDR ALT_USB_DEV_DIEPDMAB10_ADDR(ALT_USB0_DEVGRP_ADDR)
4064 
4065 #define ALT_USB0_DEV_DIEPCTL11_ADDR ALT_USB_DEV_DIEPCTL11_ADDR(ALT_USB0_DEVGRP_ADDR)
4066 
4067 #define ALT_USB0_DEV_DIEPINT11_ADDR ALT_USB_DEV_DIEPINT11_ADDR(ALT_USB0_DEVGRP_ADDR)
4068 
4069 #define ALT_USB0_DEV_DIEPTSIZ11_ADDR ALT_USB_DEV_DIEPTSIZ11_ADDR(ALT_USB0_DEVGRP_ADDR)
4070 
4071 #define ALT_USB0_DEV_DIEPDMA11_ADDR ALT_USB_DEV_DIEPDMA11_ADDR(ALT_USB0_DEVGRP_ADDR)
4072 
4073 #define ALT_USB0_DEV_DTXFSTS11_ADDR ALT_USB_DEV_DTXFSTS11_ADDR(ALT_USB0_DEVGRP_ADDR)
4074 
4075 #define ALT_USB0_DEV_DIEPDMAB11_ADDR ALT_USB_DEV_DIEPDMAB11_ADDR(ALT_USB0_DEVGRP_ADDR)
4076 
4077 #define ALT_USB0_DEV_DIEPCTL12_ADDR ALT_USB_DEV_DIEPCTL12_ADDR(ALT_USB0_DEVGRP_ADDR)
4078 
4079 #define ALT_USB0_DEV_DIEPINT12_ADDR ALT_USB_DEV_DIEPINT12_ADDR(ALT_USB0_DEVGRP_ADDR)
4080 
4081 #define ALT_USB0_DEV_DIEPTSIZ12_ADDR ALT_USB_DEV_DIEPTSIZ12_ADDR(ALT_USB0_DEVGRP_ADDR)
4082 
4083 #define ALT_USB0_DEV_DIEPDMA12_ADDR ALT_USB_DEV_DIEPDMA12_ADDR(ALT_USB0_DEVGRP_ADDR)
4084 
4085 #define ALT_USB0_DEV_DTXFSTS12_ADDR ALT_USB_DEV_DTXFSTS12_ADDR(ALT_USB0_DEVGRP_ADDR)
4086 
4087 #define ALT_USB0_DEV_DIEPDMAB12_ADDR ALT_USB_DEV_DIEPDMAB12_ADDR(ALT_USB0_DEVGRP_ADDR)
4088 
4089 #define ALT_USB0_DEV_DIEPCTL13_ADDR ALT_USB_DEV_DIEPCTL13_ADDR(ALT_USB0_DEVGRP_ADDR)
4090 
4091 #define ALT_USB0_DEV_DIEPINT13_ADDR ALT_USB_DEV_DIEPINT13_ADDR(ALT_USB0_DEVGRP_ADDR)
4092 
4093 #define ALT_USB0_DEV_DIEPTSIZ13_ADDR ALT_USB_DEV_DIEPTSIZ13_ADDR(ALT_USB0_DEVGRP_ADDR)
4094 
4095 #define ALT_USB0_DEV_DIEPDMA13_ADDR ALT_USB_DEV_DIEPDMA13_ADDR(ALT_USB0_DEVGRP_ADDR)
4096 
4097 #define ALT_USB0_DEV_DTXFSTS13_ADDR ALT_USB_DEV_DTXFSTS13_ADDR(ALT_USB0_DEVGRP_ADDR)
4098 
4099 #define ALT_USB0_DEV_DIEPDMAB13_ADDR ALT_USB_DEV_DIEPDMAB13_ADDR(ALT_USB0_DEVGRP_ADDR)
4100 
4101 #define ALT_USB0_DEV_DIEPCTL14_ADDR ALT_USB_DEV_DIEPCTL14_ADDR(ALT_USB0_DEVGRP_ADDR)
4102 
4103 #define ALT_USB0_DEV_DIEPINT14_ADDR ALT_USB_DEV_DIEPINT14_ADDR(ALT_USB0_DEVGRP_ADDR)
4104 
4105 #define ALT_USB0_DEV_DIEPTSIZ14_ADDR ALT_USB_DEV_DIEPTSIZ14_ADDR(ALT_USB0_DEVGRP_ADDR)
4106 
4107 #define ALT_USB0_DEV_DIEPDMA14_ADDR ALT_USB_DEV_DIEPDMA14_ADDR(ALT_USB0_DEVGRP_ADDR)
4108 
4109 #define ALT_USB0_DEV_DTXFSTS14_ADDR ALT_USB_DEV_DTXFSTS14_ADDR(ALT_USB0_DEVGRP_ADDR)
4110 
4111 #define ALT_USB0_DEV_DIEPDMAB14_ADDR ALT_USB_DEV_DIEPDMAB14_ADDR(ALT_USB0_DEVGRP_ADDR)
4112 
4113 #define ALT_USB0_DEV_DIEPCTL15_ADDR ALT_USB_DEV_DIEPCTL15_ADDR(ALT_USB0_DEVGRP_ADDR)
4114 
4115 #define ALT_USB0_DEV_DIEPINT15_ADDR ALT_USB_DEV_DIEPINT15_ADDR(ALT_USB0_DEVGRP_ADDR)
4116 
4117 #define ALT_USB0_DEV_DIEPTSIZ15_ADDR ALT_USB_DEV_DIEPTSIZ15_ADDR(ALT_USB0_DEVGRP_ADDR)
4118 
4119 #define ALT_USB0_DEV_DIEPDMA15_ADDR ALT_USB_DEV_DIEPDMA15_ADDR(ALT_USB0_DEVGRP_ADDR)
4120 
4121 #define ALT_USB0_DEV_DTXFSTS15_ADDR ALT_USB_DEV_DTXFSTS15_ADDR(ALT_USB0_DEVGRP_ADDR)
4122 
4123 #define ALT_USB0_DEV_DIEPDMAB15_ADDR ALT_USB_DEV_DIEPDMAB15_ADDR(ALT_USB0_DEVGRP_ADDR)
4124 
4125 #define ALT_USB0_DEV_DOEPCTL0_ADDR ALT_USB_DEV_DOEPCTL0_ADDR(ALT_USB0_DEVGRP_ADDR)
4126 
4127 #define ALT_USB0_DEV_DOEPINT0_ADDR ALT_USB_DEV_DOEPINT0_ADDR(ALT_USB0_DEVGRP_ADDR)
4128 
4129 #define ALT_USB0_DEV_DOEPTSIZ0_ADDR ALT_USB_DEV_DOEPTSIZ0_ADDR(ALT_USB0_DEVGRP_ADDR)
4130 
4131 #define ALT_USB0_DEV_DOEPDMA0_ADDR ALT_USB_DEV_DOEPDMA0_ADDR(ALT_USB0_DEVGRP_ADDR)
4132 
4133 #define ALT_USB0_DEV_DOEPDMAB0_ADDR ALT_USB_DEV_DOEPDMAB0_ADDR(ALT_USB0_DEVGRP_ADDR)
4134 
4135 #define ALT_USB0_DEV_DOEPCTL1_ADDR ALT_USB_DEV_DOEPCTL1_ADDR(ALT_USB0_DEVGRP_ADDR)
4136 
4137 #define ALT_USB0_DEV_DOEPINT1_ADDR ALT_USB_DEV_DOEPINT1_ADDR(ALT_USB0_DEVGRP_ADDR)
4138 
4139 #define ALT_USB0_DEV_DOEPTSIZ1_ADDR ALT_USB_DEV_DOEPTSIZ1_ADDR(ALT_USB0_DEVGRP_ADDR)
4140 
4141 #define ALT_USB0_DEV_DOEPDMA1_ADDR ALT_USB_DEV_DOEPDMA1_ADDR(ALT_USB0_DEVGRP_ADDR)
4142 
4143 #define ALT_USB0_DEV_DOEPDMAB1_ADDR ALT_USB_DEV_DOEPDMAB1_ADDR(ALT_USB0_DEVGRP_ADDR)
4144 
4145 #define ALT_USB0_DEV_DOEPCTL2_ADDR ALT_USB_DEV_DOEPCTL2_ADDR(ALT_USB0_DEVGRP_ADDR)
4146 
4147 #define ALT_USB0_DEV_DOEPINT2_ADDR ALT_USB_DEV_DOEPINT2_ADDR(ALT_USB0_DEVGRP_ADDR)
4148 
4149 #define ALT_USB0_DEV_DOEPTSIZ2_ADDR ALT_USB_DEV_DOEPTSIZ2_ADDR(ALT_USB0_DEVGRP_ADDR)
4150 
4151 #define ALT_USB0_DEV_DOEPDMA2_ADDR ALT_USB_DEV_DOEPDMA2_ADDR(ALT_USB0_DEVGRP_ADDR)
4152 
4153 #define ALT_USB0_DEV_DOEPDMAB2_ADDR ALT_USB_DEV_DOEPDMAB2_ADDR(ALT_USB0_DEVGRP_ADDR)
4154 
4155 #define ALT_USB0_DEV_DOEPCTL3_ADDR ALT_USB_DEV_DOEPCTL3_ADDR(ALT_USB0_DEVGRP_ADDR)
4156 
4157 #define ALT_USB0_DEV_DOEPINT3_ADDR ALT_USB_DEV_DOEPINT3_ADDR(ALT_USB0_DEVGRP_ADDR)
4158 
4159 #define ALT_USB0_DEV_DOEPTSIZ3_ADDR ALT_USB_DEV_DOEPTSIZ3_ADDR(ALT_USB0_DEVGRP_ADDR)
4160 
4161 #define ALT_USB0_DEV_DOEPDMA3_ADDR ALT_USB_DEV_DOEPDMA3_ADDR(ALT_USB0_DEVGRP_ADDR)
4162 
4163 #define ALT_USB0_DEV_DOEPDMAB3_ADDR ALT_USB_DEV_DOEPDMAB3_ADDR(ALT_USB0_DEVGRP_ADDR)
4164 
4165 #define ALT_USB0_DEV_DOEPCTL4_ADDR ALT_USB_DEV_DOEPCTL4_ADDR(ALT_USB0_DEVGRP_ADDR)
4166 
4167 #define ALT_USB0_DEV_DOEPINT4_ADDR ALT_USB_DEV_DOEPINT4_ADDR(ALT_USB0_DEVGRP_ADDR)
4168 
4169 #define ALT_USB0_DEV_DOEPTSIZ4_ADDR ALT_USB_DEV_DOEPTSIZ4_ADDR(ALT_USB0_DEVGRP_ADDR)
4170 
4171 #define ALT_USB0_DEV_DOEPDMA4_ADDR ALT_USB_DEV_DOEPDMA4_ADDR(ALT_USB0_DEVGRP_ADDR)
4172 
4173 #define ALT_USB0_DEV_DOEPDMAB4_ADDR ALT_USB_DEV_DOEPDMAB4_ADDR(ALT_USB0_DEVGRP_ADDR)
4174 
4175 #define ALT_USB0_DEV_DOEPCTL5_ADDR ALT_USB_DEV_DOEPCTL5_ADDR(ALT_USB0_DEVGRP_ADDR)
4176 
4177 #define ALT_USB0_DEV_DOEPINT5_ADDR ALT_USB_DEV_DOEPINT5_ADDR(ALT_USB0_DEVGRP_ADDR)
4178 
4179 #define ALT_USB0_DEV_DOEPTSIZ5_ADDR ALT_USB_DEV_DOEPTSIZ5_ADDR(ALT_USB0_DEVGRP_ADDR)
4180 
4181 #define ALT_USB0_DEV_DOEPDMA5_ADDR ALT_USB_DEV_DOEPDMA5_ADDR(ALT_USB0_DEVGRP_ADDR)
4182 
4183 #define ALT_USB0_DEV_DOEPDMAB5_ADDR ALT_USB_DEV_DOEPDMAB5_ADDR(ALT_USB0_DEVGRP_ADDR)
4184 
4185 #define ALT_USB0_DEV_DOEPCTL6_ADDR ALT_USB_DEV_DOEPCTL6_ADDR(ALT_USB0_DEVGRP_ADDR)
4186 
4187 #define ALT_USB0_DEV_DOEPINT6_ADDR ALT_USB_DEV_DOEPINT6_ADDR(ALT_USB0_DEVGRP_ADDR)
4188 
4189 #define ALT_USB0_DEV_DOEPTSIZ6_ADDR ALT_USB_DEV_DOEPTSIZ6_ADDR(ALT_USB0_DEVGRP_ADDR)
4190 
4191 #define ALT_USB0_DEV_DOEPDMA6_ADDR ALT_USB_DEV_DOEPDMA6_ADDR(ALT_USB0_DEVGRP_ADDR)
4192 
4193 #define ALT_USB0_DEV_DOEPDMAB6_ADDR ALT_USB_DEV_DOEPDMAB6_ADDR(ALT_USB0_DEVGRP_ADDR)
4194 
4195 #define ALT_USB0_DEV_DOEPCTL7_ADDR ALT_USB_DEV_DOEPCTL7_ADDR(ALT_USB0_DEVGRP_ADDR)
4196 
4197 #define ALT_USB0_DEV_DOEPINT7_ADDR ALT_USB_DEV_DOEPINT7_ADDR(ALT_USB0_DEVGRP_ADDR)
4198 
4199 #define ALT_USB0_DEV_DOEPTSIZ7_ADDR ALT_USB_DEV_DOEPTSIZ7_ADDR(ALT_USB0_DEVGRP_ADDR)
4200 
4201 #define ALT_USB0_DEV_DOEPDMA7_ADDR ALT_USB_DEV_DOEPDMA7_ADDR(ALT_USB0_DEVGRP_ADDR)
4202 
4203 #define ALT_USB0_DEV_DOEPDMAB7_ADDR ALT_USB_DEV_DOEPDMAB7_ADDR(ALT_USB0_DEVGRP_ADDR)
4204 
4205 #define ALT_USB0_DEV_DOEPCTL8_ADDR ALT_USB_DEV_DOEPCTL8_ADDR(ALT_USB0_DEVGRP_ADDR)
4206 
4207 #define ALT_USB0_DEV_DOEPINT8_ADDR ALT_USB_DEV_DOEPINT8_ADDR(ALT_USB0_DEVGRP_ADDR)
4208 
4209 #define ALT_USB0_DEV_DOEPTSIZ8_ADDR ALT_USB_DEV_DOEPTSIZ8_ADDR(ALT_USB0_DEVGRP_ADDR)
4210 
4211 #define ALT_USB0_DEV_DOEPDMA8_ADDR ALT_USB_DEV_DOEPDMA8_ADDR(ALT_USB0_DEVGRP_ADDR)
4212 
4213 #define ALT_USB0_DEV_DOEPDMAB8_ADDR ALT_USB_DEV_DOEPDMAB8_ADDR(ALT_USB0_DEVGRP_ADDR)
4214 
4215 #define ALT_USB0_DEV_DOEPCTL9_ADDR ALT_USB_DEV_DOEPCTL9_ADDR(ALT_USB0_DEVGRP_ADDR)
4216 
4217 #define ALT_USB0_DEV_DOEPINT9_ADDR ALT_USB_DEV_DOEPINT9_ADDR(ALT_USB0_DEVGRP_ADDR)
4218 
4219 #define ALT_USB0_DEV_DOEPTSIZ9_ADDR ALT_USB_DEV_DOEPTSIZ9_ADDR(ALT_USB0_DEVGRP_ADDR)
4220 
4221 #define ALT_USB0_DEV_DOEPDMA9_ADDR ALT_USB_DEV_DOEPDMA9_ADDR(ALT_USB0_DEVGRP_ADDR)
4222 
4223 #define ALT_USB0_DEV_DOEPDMAB9_ADDR ALT_USB_DEV_DOEPDMAB9_ADDR(ALT_USB0_DEVGRP_ADDR)
4224 
4225 #define ALT_USB0_DEV_DOEPCTL10_ADDR ALT_USB_DEV_DOEPCTL10_ADDR(ALT_USB0_DEVGRP_ADDR)
4226 
4227 #define ALT_USB0_DEV_DOEPINT10_ADDR ALT_USB_DEV_DOEPINT10_ADDR(ALT_USB0_DEVGRP_ADDR)
4228 
4229 #define ALT_USB0_DEV_DOEPTSIZ10_ADDR ALT_USB_DEV_DOEPTSIZ10_ADDR(ALT_USB0_DEVGRP_ADDR)
4230 
4231 #define ALT_USB0_DEV_DOEPDMA10_ADDR ALT_USB_DEV_DOEPDMA10_ADDR(ALT_USB0_DEVGRP_ADDR)
4232 
4233 #define ALT_USB0_DEV_DOEPDMAB10_ADDR ALT_USB_DEV_DOEPDMAB10_ADDR(ALT_USB0_DEVGRP_ADDR)
4234 
4235 #define ALT_USB0_DEV_DOEPCTL11_ADDR ALT_USB_DEV_DOEPCTL11_ADDR(ALT_USB0_DEVGRP_ADDR)
4236 
4237 #define ALT_USB0_DEV_DOEPINT11_ADDR ALT_USB_DEV_DOEPINT11_ADDR(ALT_USB0_DEVGRP_ADDR)
4238 
4239 #define ALT_USB0_DEV_DOEPTSIZ11_ADDR ALT_USB_DEV_DOEPTSIZ11_ADDR(ALT_USB0_DEVGRP_ADDR)
4240 
4241 #define ALT_USB0_DEV_DOEPDMA11_ADDR ALT_USB_DEV_DOEPDMA11_ADDR(ALT_USB0_DEVGRP_ADDR)
4242 
4243 #define ALT_USB0_DEV_DOEPDMAB11_ADDR ALT_USB_DEV_DOEPDMAB11_ADDR(ALT_USB0_DEVGRP_ADDR)
4244 
4245 #define ALT_USB0_DEV_DOEPCTL12_ADDR ALT_USB_DEV_DOEPCTL12_ADDR(ALT_USB0_DEVGRP_ADDR)
4246 
4247 #define ALT_USB0_DEV_DOEPINT12_ADDR ALT_USB_DEV_DOEPINT12_ADDR(ALT_USB0_DEVGRP_ADDR)
4248 
4249 #define ALT_USB0_DEV_DOEPTSIZ12_ADDR ALT_USB_DEV_DOEPTSIZ12_ADDR(ALT_USB0_DEVGRP_ADDR)
4250 
4251 #define ALT_USB0_DEV_DOEPDMA12_ADDR ALT_USB_DEV_DOEPDMA12_ADDR(ALT_USB0_DEVGRP_ADDR)
4252 
4253 #define ALT_USB0_DEV_DOEPDMAB12_ADDR ALT_USB_DEV_DOEPDMAB12_ADDR(ALT_USB0_DEVGRP_ADDR)
4254 
4255 #define ALT_USB0_DEV_DOEPCTL13_ADDR ALT_USB_DEV_DOEPCTL13_ADDR(ALT_USB0_DEVGRP_ADDR)
4256 
4257 #define ALT_USB0_DEV_DOEPINT13_ADDR ALT_USB_DEV_DOEPINT13_ADDR(ALT_USB0_DEVGRP_ADDR)
4258 
4259 #define ALT_USB0_DEV_DOEPTSIZ13_ADDR ALT_USB_DEV_DOEPTSIZ13_ADDR(ALT_USB0_DEVGRP_ADDR)
4260 
4261 #define ALT_USB0_DEV_DOEPDMA13_ADDR ALT_USB_DEV_DOEPDMA13_ADDR(ALT_USB0_DEVGRP_ADDR)
4262 
4263 #define ALT_USB0_DEV_DOEPDMAB13_ADDR ALT_USB_DEV_DOEPDMAB13_ADDR(ALT_USB0_DEVGRP_ADDR)
4264 
4265 #define ALT_USB0_DEV_DOEPCTL14_ADDR ALT_USB_DEV_DOEPCTL14_ADDR(ALT_USB0_DEVGRP_ADDR)
4266 
4267 #define ALT_USB0_DEV_DOEPINT14_ADDR ALT_USB_DEV_DOEPINT14_ADDR(ALT_USB0_DEVGRP_ADDR)
4268 
4269 #define ALT_USB0_DEV_DOEPTSIZ14_ADDR ALT_USB_DEV_DOEPTSIZ14_ADDR(ALT_USB0_DEVGRP_ADDR)
4270 
4271 #define ALT_USB0_DEV_DOEPDMA14_ADDR ALT_USB_DEV_DOEPDMA14_ADDR(ALT_USB0_DEVGRP_ADDR)
4272 
4273 #define ALT_USB0_DEV_DOEPDMAB14_ADDR ALT_USB_DEV_DOEPDMAB14_ADDR(ALT_USB0_DEVGRP_ADDR)
4274 
4275 #define ALT_USB0_DEV_DOEPCTL15_ADDR ALT_USB_DEV_DOEPCTL15_ADDR(ALT_USB0_DEVGRP_ADDR)
4276 
4277 #define ALT_USB0_DEV_DOEPINT15_ADDR ALT_USB_DEV_DOEPINT15_ADDR(ALT_USB0_DEVGRP_ADDR)
4278 
4279 #define ALT_USB0_DEV_DOEPTSIZ15_ADDR ALT_USB_DEV_DOEPTSIZ15_ADDR(ALT_USB0_DEVGRP_ADDR)
4280 
4281 #define ALT_USB0_DEV_DOEPDMA15_ADDR ALT_USB_DEV_DOEPDMA15_ADDR(ALT_USB0_DEVGRP_ADDR)
4282 
4283 #define ALT_USB0_DEV_DOEPDMAB15_ADDR ALT_USB_DEV_DOEPDMAB15_ADDR(ALT_USB0_DEVGRP_ADDR)
4284 
4285 #define ALT_USB0_DEVGRP_OFST 0x800
4286 
4287 #define ALT_USB0_DEVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB0_ADDR) + ALT_USB0_DEVGRP_OFST))
4288 
4289 #define ALT_USB0_DEVGRP_LB_ADDR ALT_USB0_DEVGRP_ADDR
4290 
4291 #define ALT_USB0_DEVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_DEVGRP_ADDR) + 0x500) - 1))
4292 
4302 #define ALT_USB0_PWRCLK_PCGCCTL_ADDR ALT_USB_PWRCLK_PCGCCTL_ADDR(ALT_USB0_PWRCLKGRP_ADDR)
4303 
4304 #define ALT_USB0_PWRCLKGRP_OFST 0xe00
4305 
4306 #define ALT_USB0_PWRCLKGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB0_ADDR) + ALT_USB0_PWRCLKGRP_OFST))
4307 
4308 #define ALT_USB0_PWRCLKGRP_LB_ADDR ALT_USB0_PWRCLKGRP_ADDR
4309 
4310 #define ALT_USB0_PWRCLKGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_PWRCLKGRP_ADDR) + 0x4) - 1))
4311 
4314 #define ALT_USB0_OFST 0xffb00000
4315 
4316 #define ALT_USB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB0_OFST))
4317 
4318 #define ALT_USB0_LB_ADDR ALT_USB0_ADDR
4319 
4320 #define ALT_USB0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB0_ADDR) + 0x40000) - 1))
4321 
4338 #define ALT_USB1_GLOB_GOTGCTL_ADDR ALT_USB_GLOB_GOTGCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
4339 
4340 #define ALT_USB1_GLOB_GOTGINT_ADDR ALT_USB_GLOB_GOTGINT_ADDR(ALT_USB1_GLOBGRP_ADDR)
4341 
4342 #define ALT_USB1_GLOB_GAHBCFG_ADDR ALT_USB_GLOB_GAHBCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
4343 
4344 #define ALT_USB1_GLOB_GUSBCFG_ADDR ALT_USB_GLOB_GUSBCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
4345 
4346 #define ALT_USB1_GLOB_GRSTCTL_ADDR ALT_USB_GLOB_GRSTCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
4347 
4348 #define ALT_USB1_GLOB_GINTSTS_ADDR ALT_USB_GLOB_GINTSTS_ADDR(ALT_USB1_GLOBGRP_ADDR)
4349 
4350 #define ALT_USB1_GLOB_GINTMSK_ADDR ALT_USB_GLOB_GINTMSK_ADDR(ALT_USB1_GLOBGRP_ADDR)
4351 
4352 #define ALT_USB1_GLOB_GRXSTSR_ADDR ALT_USB_GLOB_GRXSTSR_ADDR(ALT_USB1_GLOBGRP_ADDR)
4353 
4354 #define ALT_USB1_GLOB_GRXSTSP_ADDR ALT_USB_GLOB_GRXSTSP_ADDR(ALT_USB1_GLOBGRP_ADDR)
4355 
4356 #define ALT_USB1_GLOB_GRXFSIZ_ADDR ALT_USB_GLOB_GRXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
4357 
4358 #define ALT_USB1_GLOB_GNPTXFSIZ_ADDR ALT_USB_GLOB_GNPTXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
4359 
4360 #define ALT_USB1_GLOB_GNPTXSTS_ADDR ALT_USB_GLOB_GNPTXSTS_ADDR(ALT_USB1_GLOBGRP_ADDR)
4361 
4362 #define ALT_USB1_GLOB_GPVNDCTL_ADDR ALT_USB_GLOB_GPVNDCTL_ADDR(ALT_USB1_GLOBGRP_ADDR)
4363 
4364 #define ALT_USB1_GLOB_GGPIO_ADDR ALT_USB_GLOB_GGPIO_ADDR(ALT_USB1_GLOBGRP_ADDR)
4365 
4366 #define ALT_USB1_GLOB_GUID_ADDR ALT_USB_GLOB_GUID_ADDR(ALT_USB1_GLOBGRP_ADDR)
4367 
4368 #define ALT_USB1_GLOB_GSNPSID_ADDR ALT_USB_GLOB_GSNPSID_ADDR(ALT_USB1_GLOBGRP_ADDR)
4369 
4370 #define ALT_USB1_GLOB_GHWCFG1_ADDR ALT_USB_GLOB_GHWCFG1_ADDR(ALT_USB1_GLOBGRP_ADDR)
4371 
4372 #define ALT_USB1_GLOB_GHWCFG2_ADDR ALT_USB_GLOB_GHWCFG2_ADDR(ALT_USB1_GLOBGRP_ADDR)
4373 
4374 #define ALT_USB1_GLOB_GHWCFG3_ADDR ALT_USB_GLOB_GHWCFG3_ADDR(ALT_USB1_GLOBGRP_ADDR)
4375 
4376 #define ALT_USB1_GLOB_GHWCFG4_ADDR ALT_USB_GLOB_GHWCFG4_ADDR(ALT_USB1_GLOBGRP_ADDR)
4377 
4378 #define ALT_USB1_GLOB_GDFIFOCFG_ADDR ALT_USB_GLOB_GDFIFOCFG_ADDR(ALT_USB1_GLOBGRP_ADDR)
4379 
4380 #define ALT_USB1_GLOB_HPTXFSIZ_ADDR ALT_USB_GLOB_HPTXFSIZ_ADDR(ALT_USB1_GLOBGRP_ADDR)
4381 
4382 #define ALT_USB1_GLOB_DIEPTXF1_ADDR ALT_USB_GLOB_DIEPTXF1_ADDR(ALT_USB1_GLOBGRP_ADDR)
4383 
4384 #define ALT_USB1_GLOB_DIEPTXF2_ADDR ALT_USB_GLOB_DIEPTXF2_ADDR(ALT_USB1_GLOBGRP_ADDR)
4385 
4386 #define ALT_USB1_GLOB_DIEPTXF3_ADDR ALT_USB_GLOB_DIEPTXF3_ADDR(ALT_USB1_GLOBGRP_ADDR)
4387 
4388 #define ALT_USB1_GLOB_DIEPTXF4_ADDR ALT_USB_GLOB_DIEPTXF4_ADDR(ALT_USB1_GLOBGRP_ADDR)
4389 
4390 #define ALT_USB1_GLOB_DIEPTXF5_ADDR ALT_USB_GLOB_DIEPTXF5_ADDR(ALT_USB1_GLOBGRP_ADDR)
4391 
4392 #define ALT_USB1_GLOB_DIEPTXF6_ADDR ALT_USB_GLOB_DIEPTXF6_ADDR(ALT_USB1_GLOBGRP_ADDR)
4393 
4394 #define ALT_USB1_GLOB_DIEPTXF7_ADDR ALT_USB_GLOB_DIEPTXF7_ADDR(ALT_USB1_GLOBGRP_ADDR)
4395 
4396 #define ALT_USB1_GLOB_DIEPTXF8_ADDR ALT_USB_GLOB_DIEPTXF8_ADDR(ALT_USB1_GLOBGRP_ADDR)
4397 
4398 #define ALT_USB1_GLOB_DIEPTXF9_ADDR ALT_USB_GLOB_DIEPTXF9_ADDR(ALT_USB1_GLOBGRP_ADDR)
4399 
4400 #define ALT_USB1_GLOB_DIEPTXF10_ADDR ALT_USB_GLOB_DIEPTXF10_ADDR(ALT_USB1_GLOBGRP_ADDR)
4401 
4402 #define ALT_USB1_GLOB_DIEPTXF11_ADDR ALT_USB_GLOB_DIEPTXF11_ADDR(ALT_USB1_GLOBGRP_ADDR)
4403 
4404 #define ALT_USB1_GLOB_DIEPTXF12_ADDR ALT_USB_GLOB_DIEPTXF12_ADDR(ALT_USB1_GLOBGRP_ADDR)
4405 
4406 #define ALT_USB1_GLOB_DIEPTXF13_ADDR ALT_USB_GLOB_DIEPTXF13_ADDR(ALT_USB1_GLOBGRP_ADDR)
4407 
4408 #define ALT_USB1_GLOB_DIEPTXF14_ADDR ALT_USB_GLOB_DIEPTXF14_ADDR(ALT_USB1_GLOBGRP_ADDR)
4409 
4410 #define ALT_USB1_GLOB_DIEPTXF15_ADDR ALT_USB_GLOB_DIEPTXF15_ADDR(ALT_USB1_GLOBGRP_ADDR)
4411 
4412 #define ALT_USB1_GLOBGRP_OFST 0x0
4413 
4414 #define ALT_USB1_GLOBGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB1_ADDR) + ALT_USB1_GLOBGRP_OFST))
4415 
4416 #define ALT_USB1_GLOBGRP_LB_ADDR ALT_USB1_GLOBGRP_ADDR
4417 
4418 #define ALT_USB1_GLOBGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_GLOBGRP_ADDR) + 0x140) - 1))
4419 
4429 #define ALT_USB1_HOST_HCFG_ADDR ALT_USB_HOST_HCFG_ADDR(ALT_USB1_HOSTGRP_ADDR)
4430 
4431 #define ALT_USB1_HOST_HFIR_ADDR ALT_USB_HOST_HFIR_ADDR(ALT_USB1_HOSTGRP_ADDR)
4432 
4433 #define ALT_USB1_HOST_HFNUM_ADDR ALT_USB_HOST_HFNUM_ADDR(ALT_USB1_HOSTGRP_ADDR)
4434 
4435 #define ALT_USB1_HOST_HPTXSTS_ADDR ALT_USB_HOST_HPTXSTS_ADDR(ALT_USB1_HOSTGRP_ADDR)
4436 
4437 #define ALT_USB1_HOST_HAINT_ADDR ALT_USB_HOST_HAINT_ADDR(ALT_USB1_HOSTGRP_ADDR)
4438 
4439 #define ALT_USB1_HOST_HAINTMSK_ADDR ALT_USB_HOST_HAINTMSK_ADDR(ALT_USB1_HOSTGRP_ADDR)
4440 
4441 #define ALT_USB1_HOST_HFLBADDR_ADDR ALT_USB_HOST_HFLBADDR_ADDR(ALT_USB1_HOSTGRP_ADDR)
4442 
4443 #define ALT_USB1_HOST_HPRT_ADDR ALT_USB_HOST_HPRT_ADDR(ALT_USB1_HOSTGRP_ADDR)
4444 
4445 #define ALT_USB1_HOST_HCCHAR0_ADDR ALT_USB_HOST_HCCHAR0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4446 
4447 #define ALT_USB1_HOST_HCSPLT0_ADDR ALT_USB_HOST_HCSPLT0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4448 
4449 #define ALT_USB1_HOST_HCINT0_ADDR ALT_USB_HOST_HCINT0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4450 
4451 #define ALT_USB1_HOST_HCINTMSK0_ADDR ALT_USB_HOST_HCINTMSK0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4452 
4453 #define ALT_USB1_HOST_HCTSIZ0_ADDR ALT_USB_HOST_HCTSIZ0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4454 
4455 #define ALT_USB1_HOST_HCDMA0_ADDR ALT_USB_HOST_HCDMA0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4456 
4457 #define ALT_USB1_HOST_HCDMAB0_ADDR ALT_USB_HOST_HCDMAB0_ADDR(ALT_USB1_HOSTGRP_ADDR)
4458 
4459 #define ALT_USB1_HOST_HCCHAR1_ADDR ALT_USB_HOST_HCCHAR1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4460 
4461 #define ALT_USB1_HOST_HCSPLT1_ADDR ALT_USB_HOST_HCSPLT1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4462 
4463 #define ALT_USB1_HOST_HCINT1_ADDR ALT_USB_HOST_HCINT1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4464 
4465 #define ALT_USB1_HOST_HCINTMSK1_ADDR ALT_USB_HOST_HCINTMSK1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4466 
4467 #define ALT_USB1_HOST_HCTSIZ1_ADDR ALT_USB_HOST_HCTSIZ1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4468 
4469 #define ALT_USB1_HOST_HCDMA1_ADDR ALT_USB_HOST_HCDMA1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4470 
4471 #define ALT_USB1_HOST_HCDMAB1_ADDR ALT_USB_HOST_HCDMAB1_ADDR(ALT_USB1_HOSTGRP_ADDR)
4472 
4473 #define ALT_USB1_HOST_HCCHAR2_ADDR ALT_USB_HOST_HCCHAR2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4474 
4475 #define ALT_USB1_HOST_HCSPLT2_ADDR ALT_USB_HOST_HCSPLT2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4476 
4477 #define ALT_USB1_HOST_HCINT2_ADDR ALT_USB_HOST_HCINT2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4478 
4479 #define ALT_USB1_HOST_HCINTMSK2_ADDR ALT_USB_HOST_HCINTMSK2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4480 
4481 #define ALT_USB1_HOST_HCTSIZ2_ADDR ALT_USB_HOST_HCTSIZ2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4482 
4483 #define ALT_USB1_HOST_HCDMA2_ADDR ALT_USB_HOST_HCDMA2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4484 
4485 #define ALT_USB1_HOST_HCDMAB2_ADDR ALT_USB_HOST_HCDMAB2_ADDR(ALT_USB1_HOSTGRP_ADDR)
4486 
4487 #define ALT_USB1_HOST_HCCHAR3_ADDR ALT_USB_HOST_HCCHAR3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4488 
4489 #define ALT_USB1_HOST_HCSPLT3_ADDR ALT_USB_HOST_HCSPLT3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4490 
4491 #define ALT_USB1_HOST_HCINT3_ADDR ALT_USB_HOST_HCINT3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4492 
4493 #define ALT_USB1_HOST_HCINTMSK3_ADDR ALT_USB_HOST_HCINTMSK3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4494 
4495 #define ALT_USB1_HOST_HCTSIZ3_ADDR ALT_USB_HOST_HCTSIZ3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4496 
4497 #define ALT_USB1_HOST_HCDMA3_ADDR ALT_USB_HOST_HCDMA3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4498 
4499 #define ALT_USB1_HOST_HCDMAB3_ADDR ALT_USB_HOST_HCDMAB3_ADDR(ALT_USB1_HOSTGRP_ADDR)
4500 
4501 #define ALT_USB1_HOST_HCCHAR4_ADDR ALT_USB_HOST_HCCHAR4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4502 
4503 #define ALT_USB1_HOST_HCSPLT4_ADDR ALT_USB_HOST_HCSPLT4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4504 
4505 #define ALT_USB1_HOST_HCINT4_ADDR ALT_USB_HOST_HCINT4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4506 
4507 #define ALT_USB1_HOST_HCINTMSK4_ADDR ALT_USB_HOST_HCINTMSK4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4508 
4509 #define ALT_USB1_HOST_HCTSIZ4_ADDR ALT_USB_HOST_HCTSIZ4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4510 
4511 #define ALT_USB1_HOST_HCDMA4_ADDR ALT_USB_HOST_HCDMA4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4512 
4513 #define ALT_USB1_HOST_HCDMAB4_ADDR ALT_USB_HOST_HCDMAB4_ADDR(ALT_USB1_HOSTGRP_ADDR)
4514 
4515 #define ALT_USB1_HOST_HCCHAR5_ADDR ALT_USB_HOST_HCCHAR5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4516 
4517 #define ALT_USB1_HOST_HCSPLT5_ADDR ALT_USB_HOST_HCSPLT5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4518 
4519 #define ALT_USB1_HOST_HCINT5_ADDR ALT_USB_HOST_HCINT5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4520 
4521 #define ALT_USB1_HOST_HCINTMSK5_ADDR ALT_USB_HOST_HCINTMSK5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4522 
4523 #define ALT_USB1_HOST_HCTSIZ5_ADDR ALT_USB_HOST_HCTSIZ5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4524 
4525 #define ALT_USB1_HOST_HCDMA5_ADDR ALT_USB_HOST_HCDMA5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4526 
4527 #define ALT_USB1_HOST_HCDMAB5_ADDR ALT_USB_HOST_HCDMAB5_ADDR(ALT_USB1_HOSTGRP_ADDR)
4528 
4529 #define ALT_USB1_HOST_HCCHAR6_ADDR ALT_USB_HOST_HCCHAR6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4530 
4531 #define ALT_USB1_HOST_HCSPLT6_ADDR ALT_USB_HOST_HCSPLT6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4532 
4533 #define ALT_USB1_HOST_HCINT6_ADDR ALT_USB_HOST_HCINT6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4534 
4535 #define ALT_USB1_HOST_HCINTMSK6_ADDR ALT_USB_HOST_HCINTMSK6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4536 
4537 #define ALT_USB1_HOST_HCTSIZ6_ADDR ALT_USB_HOST_HCTSIZ6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4538 
4539 #define ALT_USB1_HOST_HCDMA6_ADDR ALT_USB_HOST_HCDMA6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4540 
4541 #define ALT_USB1_HOST_HCDMAB6_ADDR ALT_USB_HOST_HCDMAB6_ADDR(ALT_USB1_HOSTGRP_ADDR)
4542 
4543 #define ALT_USB1_HOST_HCCHAR7_ADDR ALT_USB_HOST_HCCHAR7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4544 
4545 #define ALT_USB1_HOST_HCSPLT7_ADDR ALT_USB_HOST_HCSPLT7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4546 
4547 #define ALT_USB1_HOST_HCINT7_ADDR ALT_USB_HOST_HCINT7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4548 
4549 #define ALT_USB1_HOST_HCINTMSK7_ADDR ALT_USB_HOST_HCINTMSK7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4550 
4551 #define ALT_USB1_HOST_HCTSIZ7_ADDR ALT_USB_HOST_HCTSIZ7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4552 
4553 #define ALT_USB1_HOST_HCDMA7_ADDR ALT_USB_HOST_HCDMA7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4554 
4555 #define ALT_USB1_HOST_HCDMAB7_ADDR ALT_USB_HOST_HCDMAB7_ADDR(ALT_USB1_HOSTGRP_ADDR)
4556 
4557 #define ALT_USB1_HOST_HCCHAR8_ADDR ALT_USB_HOST_HCCHAR8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4558 
4559 #define ALT_USB1_HOST_HCSPLT8_ADDR ALT_USB_HOST_HCSPLT8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4560 
4561 #define ALT_USB1_HOST_HCINT8_ADDR ALT_USB_HOST_HCINT8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4562 
4563 #define ALT_USB1_HOST_HCINTMSK8_ADDR ALT_USB_HOST_HCINTMSK8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4564 
4565 #define ALT_USB1_HOST_HCTSIZ8_ADDR ALT_USB_HOST_HCTSIZ8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4566 
4567 #define ALT_USB1_HOST_HCDMA8_ADDR ALT_USB_HOST_HCDMA8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4568 
4569 #define ALT_USB1_HOST_HCDMAB8_ADDR ALT_USB_HOST_HCDMAB8_ADDR(ALT_USB1_HOSTGRP_ADDR)
4570 
4571 #define ALT_USB1_HOST_HCCHAR9_ADDR ALT_USB_HOST_HCCHAR9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4572 
4573 #define ALT_USB1_HOST_HCSPLT9_ADDR ALT_USB_HOST_HCSPLT9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4574 
4575 #define ALT_USB1_HOST_HCINT9_ADDR ALT_USB_HOST_HCINT9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4576 
4577 #define ALT_USB1_HOST_HCINTMSK9_ADDR ALT_USB_HOST_HCINTMSK9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4578 
4579 #define ALT_USB1_HOST_HCTSIZ9_ADDR ALT_USB_HOST_HCTSIZ9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4580 
4581 #define ALT_USB1_HOST_HCDMA9_ADDR ALT_USB_HOST_HCDMA9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4582 
4583 #define ALT_USB1_HOST_HCDMAB9_ADDR ALT_USB_HOST_HCDMAB9_ADDR(ALT_USB1_HOSTGRP_ADDR)
4584 
4585 #define ALT_USB1_HOST_HCCHAR10_ADDR ALT_USB_HOST_HCCHAR10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4586 
4587 #define ALT_USB1_HOST_HCSPLT10_ADDR ALT_USB_HOST_HCSPLT10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4588 
4589 #define ALT_USB1_HOST_HCINT10_ADDR ALT_USB_HOST_HCINT10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4590 
4591 #define ALT_USB1_HOST_HCINTMSK10_ADDR ALT_USB_HOST_HCINTMSK10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4592 
4593 #define ALT_USB1_HOST_HCTSIZ10_ADDR ALT_USB_HOST_HCTSIZ10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4594 
4595 #define ALT_USB1_HOST_HCDMA10_ADDR ALT_USB_HOST_HCDMA10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4596 
4597 #define ALT_USB1_HOST_HCDMAB10_ADDR ALT_USB_HOST_HCDMAB10_ADDR(ALT_USB1_HOSTGRP_ADDR)
4598 
4599 #define ALT_USB1_HOST_HCCHAR11_ADDR ALT_USB_HOST_HCCHAR11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4600 
4601 #define ALT_USB1_HOST_HCSPLT11_ADDR ALT_USB_HOST_HCSPLT11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4602 
4603 #define ALT_USB1_HOST_HCINT11_ADDR ALT_USB_HOST_HCINT11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4604 
4605 #define ALT_USB1_HOST_HCINTMSK11_ADDR ALT_USB_HOST_HCINTMSK11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4606 
4607 #define ALT_USB1_HOST_HCTSIZ11_ADDR ALT_USB_HOST_HCTSIZ11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4608 
4609 #define ALT_USB1_HOST_HCDMA11_ADDR ALT_USB_HOST_HCDMA11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4610 
4611 #define ALT_USB1_HOST_HCDMAB11_ADDR ALT_USB_HOST_HCDMAB11_ADDR(ALT_USB1_HOSTGRP_ADDR)
4612 
4613 #define ALT_USB1_HOST_HCCHAR12_ADDR ALT_USB_HOST_HCCHAR12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4614 
4615 #define ALT_USB1_HOST_HCSPLT12_ADDR ALT_USB_HOST_HCSPLT12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4616 
4617 #define ALT_USB1_HOST_HCINT12_ADDR ALT_USB_HOST_HCINT12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4618 
4619 #define ALT_USB1_HOST_HCINTMSK12_ADDR ALT_USB_HOST_HCINTMSK12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4620 
4621 #define ALT_USB1_HOST_HCTSIZ12_ADDR ALT_USB_HOST_HCTSIZ12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4622 
4623 #define ALT_USB1_HOST_HCDMA12_ADDR ALT_USB_HOST_HCDMA12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4624 
4625 #define ALT_USB1_HOST_HCDMAB12_ADDR ALT_USB_HOST_HCDMAB12_ADDR(ALT_USB1_HOSTGRP_ADDR)
4626 
4627 #define ALT_USB1_HOST_HCCHAR13_ADDR ALT_USB_HOST_HCCHAR13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4628 
4629 #define ALT_USB1_HOST_HCSPLT13_ADDR ALT_USB_HOST_HCSPLT13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4630 
4631 #define ALT_USB1_HOST_HCINT13_ADDR ALT_USB_HOST_HCINT13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4632 
4633 #define ALT_USB1_HOST_HCINTMSK13_ADDR ALT_USB_HOST_HCINTMSK13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4634 
4635 #define ALT_USB1_HOST_HCTSIZ13_ADDR ALT_USB_HOST_HCTSIZ13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4636 
4637 #define ALT_USB1_HOST_HCDMA13_ADDR ALT_USB_HOST_HCDMA13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4638 
4639 #define ALT_USB1_HOST_HCDMAB13_ADDR ALT_USB_HOST_HCDMAB13_ADDR(ALT_USB1_HOSTGRP_ADDR)
4640 
4641 #define ALT_USB1_HOST_HCCHAR14_ADDR ALT_USB_HOST_HCCHAR14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4642 
4643 #define ALT_USB1_HOST_HCSPLT14_ADDR ALT_USB_HOST_HCSPLT14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4644 
4645 #define ALT_USB1_HOST_HCINT14_ADDR ALT_USB_HOST_HCINT14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4646 
4647 #define ALT_USB1_HOST_HCINTMSK14_ADDR ALT_USB_HOST_HCINTMSK14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4648 
4649 #define ALT_USB1_HOST_HCTSIZ14_ADDR ALT_USB_HOST_HCTSIZ14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4650 
4651 #define ALT_USB1_HOST_HCDMA14_ADDR ALT_USB_HOST_HCDMA14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4652 
4653 #define ALT_USB1_HOST_HCDMAB14_ADDR ALT_USB_HOST_HCDMAB14_ADDR(ALT_USB1_HOSTGRP_ADDR)
4654 
4655 #define ALT_USB1_HOST_HCCHAR15_ADDR ALT_USB_HOST_HCCHAR15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4656 
4657 #define ALT_USB1_HOST_HCSPLT15_ADDR ALT_USB_HOST_HCSPLT15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4658 
4659 #define ALT_USB1_HOST_HCINT15_ADDR ALT_USB_HOST_HCINT15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4660 
4661 #define ALT_USB1_HOST_HCINTMSK15_ADDR ALT_USB_HOST_HCINTMSK15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4662 
4663 #define ALT_USB1_HOST_HCTSIZ15_ADDR ALT_USB_HOST_HCTSIZ15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4664 
4665 #define ALT_USB1_HOST_HCDMA15_ADDR ALT_USB_HOST_HCDMA15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4666 
4667 #define ALT_USB1_HOST_HCDMAB15_ADDR ALT_USB_HOST_HCDMAB15_ADDR(ALT_USB1_HOSTGRP_ADDR)
4668 
4669 #define ALT_USB1_HOSTGRP_OFST 0x400
4670 
4671 #define ALT_USB1_HOSTGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB1_ADDR) + ALT_USB1_HOSTGRP_OFST))
4672 
4673 #define ALT_USB1_HOSTGRP_LB_ADDR ALT_USB1_HOSTGRP_ADDR
4674 
4675 #define ALT_USB1_HOSTGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_HOSTGRP_ADDR) + 0x2fc) - 1))
4676 
4686 #define ALT_USB1_DEV_DCFG_ADDR ALT_USB_DEV_DCFG_ADDR(ALT_USB1_DEVGRP_ADDR)
4687 
4688 #define ALT_USB1_DEV_DCTL_ADDR ALT_USB_DEV_DCTL_ADDR(ALT_USB1_DEVGRP_ADDR)
4689 
4690 #define ALT_USB1_DEV_DSTS_ADDR ALT_USB_DEV_DSTS_ADDR(ALT_USB1_DEVGRP_ADDR)
4691 
4692 #define ALT_USB1_DEV_DIEPMSK_ADDR ALT_USB_DEV_DIEPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
4693 
4694 #define ALT_USB1_DEV_DOEPMSK_ADDR ALT_USB_DEV_DOEPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
4695 
4696 #define ALT_USB1_DEV_DAINT_ADDR ALT_USB_DEV_DAINT_ADDR(ALT_USB1_DEVGRP_ADDR)
4697 
4698 #define ALT_USB1_DEV_DAINTMSK_ADDR ALT_USB_DEV_DAINTMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
4699 
4700 #define ALT_USB1_DEV_DVBUSDIS_ADDR ALT_USB_DEV_DVBUSDIS_ADDR(ALT_USB1_DEVGRP_ADDR)
4701 
4702 #define ALT_USB1_DEV_DVBUSPULSE_ADDR ALT_USB_DEV_DVBUSPULSE_ADDR(ALT_USB1_DEVGRP_ADDR)
4703 
4704 #define ALT_USB1_DEV_DTHRCTL_ADDR ALT_USB_DEV_DTHRCTL_ADDR(ALT_USB1_DEVGRP_ADDR)
4705 
4706 #define ALT_USB1_DEV_DIEPEMPMSK_ADDR ALT_USB_DEV_DIEPEMPMSK_ADDR(ALT_USB1_DEVGRP_ADDR)
4707 
4708 #define ALT_USB1_DEV_DIEPCTL0_ADDR ALT_USB_DEV_DIEPCTL0_ADDR(ALT_USB1_DEVGRP_ADDR)
4709 
4710 #define ALT_USB1_DEV_DIEPINT0_ADDR ALT_USB_DEV_DIEPINT0_ADDR(ALT_USB1_DEVGRP_ADDR)
4711 
4712 #define ALT_USB1_DEV_DIEPTSIZ0_ADDR ALT_USB_DEV_DIEPTSIZ0_ADDR(ALT_USB1_DEVGRP_ADDR)
4713 
4714 #define ALT_USB1_DEV_DIEPDMA0_ADDR ALT_USB_DEV_DIEPDMA0_ADDR(ALT_USB1_DEVGRP_ADDR)
4715 
4716 #define ALT_USB1_DEV_DTXFSTS0_ADDR ALT_USB_DEV_DTXFSTS0_ADDR(ALT_USB1_DEVGRP_ADDR)
4717 
4718 #define ALT_USB1_DEV_DIEPDMAB0_ADDR ALT_USB_DEV_DIEPDMAB0_ADDR(ALT_USB1_DEVGRP_ADDR)
4719 
4720 #define ALT_USB1_DEV_DIEPCTL1_ADDR ALT_USB_DEV_DIEPCTL1_ADDR(ALT_USB1_DEVGRP_ADDR)
4721 
4722 #define ALT_USB1_DEV_DIEPINT1_ADDR ALT_USB_DEV_DIEPINT1_ADDR(ALT_USB1_DEVGRP_ADDR)
4723 
4724 #define ALT_USB1_DEV_DIEPTSIZ1_ADDR ALT_USB_DEV_DIEPTSIZ1_ADDR(ALT_USB1_DEVGRP_ADDR)
4725 
4726 #define ALT_USB1_DEV_DIEPDMA1_ADDR ALT_USB_DEV_DIEPDMA1_ADDR(ALT_USB1_DEVGRP_ADDR)
4727 
4728 #define ALT_USB1_DEV_DTXFSTS1_ADDR ALT_USB_DEV_DTXFSTS1_ADDR(ALT_USB1_DEVGRP_ADDR)
4729 
4730 #define ALT_USB1_DEV_DIEPDMAB1_ADDR ALT_USB_DEV_DIEPDMAB1_ADDR(ALT_USB1_DEVGRP_ADDR)
4731 
4732 #define ALT_USB1_DEV_DIEPCTL2_ADDR ALT_USB_DEV_DIEPCTL2_ADDR(ALT_USB1_DEVGRP_ADDR)
4733 
4734 #define ALT_USB1_DEV_DIEPINT2_ADDR ALT_USB_DEV_DIEPINT2_ADDR(ALT_USB1_DEVGRP_ADDR)
4735 
4736 #define ALT_USB1_DEV_DIEPTSIZ2_ADDR ALT_USB_DEV_DIEPTSIZ2_ADDR(ALT_USB1_DEVGRP_ADDR)
4737 
4738 #define ALT_USB1_DEV_DIEPDMA2_ADDR ALT_USB_DEV_DIEPDMA2_ADDR(ALT_USB1_DEVGRP_ADDR)
4739 
4740 #define ALT_USB1_DEV_DTXFSTS2_ADDR ALT_USB_DEV_DTXFSTS2_ADDR(ALT_USB1_DEVGRP_ADDR)
4741 
4742 #define ALT_USB1_DEV_DIEPDMAB2_ADDR ALT_USB_DEV_DIEPDMAB2_ADDR(ALT_USB1_DEVGRP_ADDR)
4743 
4744 #define ALT_USB1_DEV_DIEPCTL3_ADDR ALT_USB_DEV_DIEPCTL3_ADDR(ALT_USB1_DEVGRP_ADDR)
4745 
4746 #define ALT_USB1_DEV_DIEPINT3_ADDR ALT_USB_DEV_DIEPINT3_ADDR(ALT_USB1_DEVGRP_ADDR)
4747 
4748 #define ALT_USB1_DEV_DIEPTSIZ3_ADDR ALT_USB_DEV_DIEPTSIZ3_ADDR(ALT_USB1_DEVGRP_ADDR)
4749 
4750 #define ALT_USB1_DEV_DIEPDMA3_ADDR ALT_USB_DEV_DIEPDMA3_ADDR(ALT_USB1_DEVGRP_ADDR)
4751 
4752 #define ALT_USB1_DEV_DTXFSTS3_ADDR ALT_USB_DEV_DTXFSTS3_ADDR(ALT_USB1_DEVGRP_ADDR)
4753 
4754 #define ALT_USB1_DEV_DIEPDMAB3_ADDR ALT_USB_DEV_DIEPDMAB3_ADDR(ALT_USB1_DEVGRP_ADDR)
4755 
4756 #define ALT_USB1_DEV_DIEPCTL4_ADDR ALT_USB_DEV_DIEPCTL4_ADDR(ALT_USB1_DEVGRP_ADDR)
4757 
4758 #define ALT_USB1_DEV_DIEPINT4_ADDR ALT_USB_DEV_DIEPINT4_ADDR(ALT_USB1_DEVGRP_ADDR)
4759 
4760 #define ALT_USB1_DEV_DIEPTSIZ4_ADDR ALT_USB_DEV_DIEPTSIZ4_ADDR(ALT_USB1_DEVGRP_ADDR)
4761 
4762 #define ALT_USB1_DEV_DIEPDMA4_ADDR ALT_USB_DEV_DIEPDMA4_ADDR(ALT_USB1_DEVGRP_ADDR)
4763 
4764 #define ALT_USB1_DEV_DTXFSTS4_ADDR ALT_USB_DEV_DTXFSTS4_ADDR(ALT_USB1_DEVGRP_ADDR)
4765 
4766 #define ALT_USB1_DEV_DIEPDMAB4_ADDR ALT_USB_DEV_DIEPDMAB4_ADDR(ALT_USB1_DEVGRP_ADDR)
4767 
4768 #define ALT_USB1_DEV_DIEPCTL5_ADDR ALT_USB_DEV_DIEPCTL5_ADDR(ALT_USB1_DEVGRP_ADDR)
4769 
4770 #define ALT_USB1_DEV_DIEPINT5_ADDR ALT_USB_DEV_DIEPINT5_ADDR(ALT_USB1_DEVGRP_ADDR)
4771 
4772 #define ALT_USB1_DEV_DIEPTSIZ5_ADDR ALT_USB_DEV_DIEPTSIZ5_ADDR(ALT_USB1_DEVGRP_ADDR)
4773 
4774 #define ALT_USB1_DEV_DIEPDMA5_ADDR ALT_USB_DEV_DIEPDMA5_ADDR(ALT_USB1_DEVGRP_ADDR)
4775 
4776 #define ALT_USB1_DEV_DTXFSTS5_ADDR ALT_USB_DEV_DTXFSTS5_ADDR(ALT_USB1_DEVGRP_ADDR)
4777 
4778 #define ALT_USB1_DEV_DIEPDMAB5_ADDR ALT_USB_DEV_DIEPDMAB5_ADDR(ALT_USB1_DEVGRP_ADDR)
4779 
4780 #define ALT_USB1_DEV_DIEPCTL6_ADDR ALT_USB_DEV_DIEPCTL6_ADDR(ALT_USB1_DEVGRP_ADDR)
4781 
4782 #define ALT_USB1_DEV_DIEPINT6_ADDR ALT_USB_DEV_DIEPINT6_ADDR(ALT_USB1_DEVGRP_ADDR)
4783 
4784 #define ALT_USB1_DEV_DIEPTSIZ6_ADDR ALT_USB_DEV_DIEPTSIZ6_ADDR(ALT_USB1_DEVGRP_ADDR)
4785 
4786 #define ALT_USB1_DEV_DIEPDMA6_ADDR ALT_USB_DEV_DIEPDMA6_ADDR(ALT_USB1_DEVGRP_ADDR)
4787 
4788 #define ALT_USB1_DEV_DTXFSTS6_ADDR ALT_USB_DEV_DTXFSTS6_ADDR(ALT_USB1_DEVGRP_ADDR)
4789 
4790 #define ALT_USB1_DEV_DIEPDMAB6_ADDR ALT_USB_DEV_DIEPDMAB6_ADDR(ALT_USB1_DEVGRP_ADDR)
4791 
4792 #define ALT_USB1_DEV_DIEPCTL7_ADDR ALT_USB_DEV_DIEPCTL7_ADDR(ALT_USB1_DEVGRP_ADDR)
4793 
4794 #define ALT_USB1_DEV_DIEPINT7_ADDR ALT_USB_DEV_DIEPINT7_ADDR(ALT_USB1_DEVGRP_ADDR)
4795 
4796 #define ALT_USB1_DEV_DIEPTSIZ7_ADDR ALT_USB_DEV_DIEPTSIZ7_ADDR(ALT_USB1_DEVGRP_ADDR)
4797 
4798 #define ALT_USB1_DEV_DIEPDMA7_ADDR ALT_USB_DEV_DIEPDMA7_ADDR(ALT_USB1_DEVGRP_ADDR)
4799 
4800 #define ALT_USB1_DEV_DTXFSTS7_ADDR ALT_USB_DEV_DTXFSTS7_ADDR(ALT_USB1_DEVGRP_ADDR)
4801 
4802 #define ALT_USB1_DEV_DIEPDMAB7_ADDR ALT_USB_DEV_DIEPDMAB7_ADDR(ALT_USB1_DEVGRP_ADDR)
4803 
4804 #define ALT_USB1_DEV_DIEPCTL8_ADDR ALT_USB_DEV_DIEPCTL8_ADDR(ALT_USB1_DEVGRP_ADDR)
4805 
4806 #define ALT_USB1_DEV_DIEPINT8_ADDR ALT_USB_DEV_DIEPINT8_ADDR(ALT_USB1_DEVGRP_ADDR)
4807 
4808 #define ALT_USB1_DEV_DIEPTSIZ8_ADDR ALT_USB_DEV_DIEPTSIZ8_ADDR(ALT_USB1_DEVGRP_ADDR)
4809 
4810 #define ALT_USB1_DEV_DIEPDMA8_ADDR ALT_USB_DEV_DIEPDMA8_ADDR(ALT_USB1_DEVGRP_ADDR)
4811 
4812 #define ALT_USB1_DEV_DTXFSTS8_ADDR ALT_USB_DEV_DTXFSTS8_ADDR(ALT_USB1_DEVGRP_ADDR)
4813 
4814 #define ALT_USB1_DEV_DIEPDMAB8_ADDR ALT_USB_DEV_DIEPDMAB8_ADDR(ALT_USB1_DEVGRP_ADDR)
4815 
4816 #define ALT_USB1_DEV_DIEPCTL9_ADDR ALT_USB_DEV_DIEPCTL9_ADDR(ALT_USB1_DEVGRP_ADDR)
4817 
4818 #define ALT_USB1_DEV_DIEPINT9_ADDR ALT_USB_DEV_DIEPINT9_ADDR(ALT_USB1_DEVGRP_ADDR)
4819 
4820 #define ALT_USB1_DEV_DIEPTSIZ9_ADDR ALT_USB_DEV_DIEPTSIZ9_ADDR(ALT_USB1_DEVGRP_ADDR)
4821 
4822 #define ALT_USB1_DEV_DIEPDMA9_ADDR ALT_USB_DEV_DIEPDMA9_ADDR(ALT_USB1_DEVGRP_ADDR)
4823 
4824 #define ALT_USB1_DEV_DTXFSTS9_ADDR ALT_USB_DEV_DTXFSTS9_ADDR(ALT_USB1_DEVGRP_ADDR)
4825 
4826 #define ALT_USB1_DEV_DIEPDMAB9_ADDR ALT_USB_DEV_DIEPDMAB9_ADDR(ALT_USB1_DEVGRP_ADDR)
4827 
4828 #define ALT_USB1_DEV_DIEPCTL10_ADDR ALT_USB_DEV_DIEPCTL10_ADDR(ALT_USB1_DEVGRP_ADDR)
4829 
4830 #define ALT_USB1_DEV_DIEPINT10_ADDR ALT_USB_DEV_DIEPINT10_ADDR(ALT_USB1_DEVGRP_ADDR)
4831 
4832 #define ALT_USB1_DEV_DIEPTSIZ10_ADDR ALT_USB_DEV_DIEPTSIZ10_ADDR(ALT_USB1_DEVGRP_ADDR)
4833 
4834 #define ALT_USB1_DEV_DIEPDMA10_ADDR ALT_USB_DEV_DIEPDMA10_ADDR(ALT_USB1_DEVGRP_ADDR)
4835 
4836 #define ALT_USB1_DEV_DTXFSTS10_ADDR ALT_USB_DEV_DTXFSTS10_ADDR(ALT_USB1_DEVGRP_ADDR)
4837 
4838 #define ALT_USB1_DEV_DIEPDMAB10_ADDR ALT_USB_DEV_DIEPDMAB10_ADDR(ALT_USB1_DEVGRP_ADDR)
4839 
4840 #define ALT_USB1_DEV_DIEPCTL11_ADDR ALT_USB_DEV_DIEPCTL11_ADDR(ALT_USB1_DEVGRP_ADDR)
4841 
4842 #define ALT_USB1_DEV_DIEPINT11_ADDR ALT_USB_DEV_DIEPINT11_ADDR(ALT_USB1_DEVGRP_ADDR)
4843 
4844 #define ALT_USB1_DEV_DIEPTSIZ11_ADDR ALT_USB_DEV_DIEPTSIZ11_ADDR(ALT_USB1_DEVGRP_ADDR)
4845 
4846 #define ALT_USB1_DEV_DIEPDMA11_ADDR ALT_USB_DEV_DIEPDMA11_ADDR(ALT_USB1_DEVGRP_ADDR)
4847 
4848 #define ALT_USB1_DEV_DTXFSTS11_ADDR ALT_USB_DEV_DTXFSTS11_ADDR(ALT_USB1_DEVGRP_ADDR)
4849 
4850 #define ALT_USB1_DEV_DIEPDMAB11_ADDR ALT_USB_DEV_DIEPDMAB11_ADDR(ALT_USB1_DEVGRP_ADDR)
4851 
4852 #define ALT_USB1_DEV_DIEPCTL12_ADDR ALT_USB_DEV_DIEPCTL12_ADDR(ALT_USB1_DEVGRP_ADDR)
4853 
4854 #define ALT_USB1_DEV_DIEPINT12_ADDR ALT_USB_DEV_DIEPINT12_ADDR(ALT_USB1_DEVGRP_ADDR)
4855 
4856 #define ALT_USB1_DEV_DIEPTSIZ12_ADDR ALT_USB_DEV_DIEPTSIZ12_ADDR(ALT_USB1_DEVGRP_ADDR)
4857 
4858 #define ALT_USB1_DEV_DIEPDMA12_ADDR ALT_USB_DEV_DIEPDMA12_ADDR(ALT_USB1_DEVGRP_ADDR)
4859 
4860 #define ALT_USB1_DEV_DTXFSTS12_ADDR ALT_USB_DEV_DTXFSTS12_ADDR(ALT_USB1_DEVGRP_ADDR)
4861 
4862 #define ALT_USB1_DEV_DIEPDMAB12_ADDR ALT_USB_DEV_DIEPDMAB12_ADDR(ALT_USB1_DEVGRP_ADDR)
4863 
4864 #define ALT_USB1_DEV_DIEPCTL13_ADDR ALT_USB_DEV_DIEPCTL13_ADDR(ALT_USB1_DEVGRP_ADDR)
4865 
4866 #define ALT_USB1_DEV_DIEPINT13_ADDR ALT_USB_DEV_DIEPINT13_ADDR(ALT_USB1_DEVGRP_ADDR)
4867 
4868 #define ALT_USB1_DEV_DIEPTSIZ13_ADDR ALT_USB_DEV_DIEPTSIZ13_ADDR(ALT_USB1_DEVGRP_ADDR)
4869 
4870 #define ALT_USB1_DEV_DIEPDMA13_ADDR ALT_USB_DEV_DIEPDMA13_ADDR(ALT_USB1_DEVGRP_ADDR)
4871 
4872 #define ALT_USB1_DEV_DTXFSTS13_ADDR ALT_USB_DEV_DTXFSTS13_ADDR(ALT_USB1_DEVGRP_ADDR)
4873 
4874 #define ALT_USB1_DEV_DIEPDMAB13_ADDR ALT_USB_DEV_DIEPDMAB13_ADDR(ALT_USB1_DEVGRP_ADDR)
4875 
4876 #define ALT_USB1_DEV_DIEPCTL14_ADDR ALT_USB_DEV_DIEPCTL14_ADDR(ALT_USB1_DEVGRP_ADDR)
4877 
4878 #define ALT_USB1_DEV_DIEPINT14_ADDR ALT_USB_DEV_DIEPINT14_ADDR(ALT_USB1_DEVGRP_ADDR)
4879 
4880 #define ALT_USB1_DEV_DIEPTSIZ14_ADDR ALT_USB_DEV_DIEPTSIZ14_ADDR(ALT_USB1_DEVGRP_ADDR)
4881 
4882 #define ALT_USB1_DEV_DIEPDMA14_ADDR ALT_USB_DEV_DIEPDMA14_ADDR(ALT_USB1_DEVGRP_ADDR)
4883 
4884 #define ALT_USB1_DEV_DTXFSTS14_ADDR ALT_USB_DEV_DTXFSTS14_ADDR(ALT_USB1_DEVGRP_ADDR)
4885 
4886 #define ALT_USB1_DEV_DIEPDMAB14_ADDR ALT_USB_DEV_DIEPDMAB14_ADDR(ALT_USB1_DEVGRP_ADDR)
4887 
4888 #define ALT_USB1_DEV_DIEPCTL15_ADDR ALT_USB_DEV_DIEPCTL15_ADDR(ALT_USB1_DEVGRP_ADDR)
4889 
4890 #define ALT_USB1_DEV_DIEPINT15_ADDR ALT_USB_DEV_DIEPINT15_ADDR(ALT_USB1_DEVGRP_ADDR)
4891 
4892 #define ALT_USB1_DEV_DIEPTSIZ15_ADDR ALT_USB_DEV_DIEPTSIZ15_ADDR(ALT_USB1_DEVGRP_ADDR)
4893 
4894 #define ALT_USB1_DEV_DIEPDMA15_ADDR ALT_USB_DEV_DIEPDMA15_ADDR(ALT_USB1_DEVGRP_ADDR)
4895 
4896 #define ALT_USB1_DEV_DTXFSTS15_ADDR ALT_USB_DEV_DTXFSTS15_ADDR(ALT_USB1_DEVGRP_ADDR)
4897 
4898 #define ALT_USB1_DEV_DIEPDMAB15_ADDR ALT_USB_DEV_DIEPDMAB15_ADDR(ALT_USB1_DEVGRP_ADDR)
4899 
4900 #define ALT_USB1_DEV_DOEPCTL0_ADDR ALT_USB_DEV_DOEPCTL0_ADDR(ALT_USB1_DEVGRP_ADDR)
4901 
4902 #define ALT_USB1_DEV_DOEPINT0_ADDR ALT_USB_DEV_DOEPINT0_ADDR(ALT_USB1_DEVGRP_ADDR)
4903 
4904 #define ALT_USB1_DEV_DOEPTSIZ0_ADDR ALT_USB_DEV_DOEPTSIZ0_ADDR(ALT_USB1_DEVGRP_ADDR)
4905 
4906 #define ALT_USB1_DEV_DOEPDMA0_ADDR ALT_USB_DEV_DOEPDMA0_ADDR(ALT_USB1_DEVGRP_ADDR)
4907 
4908 #define ALT_USB1_DEV_DOEPDMAB0_ADDR ALT_USB_DEV_DOEPDMAB0_ADDR(ALT_USB1_DEVGRP_ADDR)
4909 
4910 #define ALT_USB1_DEV_DOEPCTL1_ADDR ALT_USB_DEV_DOEPCTL1_ADDR(ALT_USB1_DEVGRP_ADDR)
4911 
4912 #define ALT_USB1_DEV_DOEPINT1_ADDR ALT_USB_DEV_DOEPINT1_ADDR(ALT_USB1_DEVGRP_ADDR)
4913 
4914 #define ALT_USB1_DEV_DOEPTSIZ1_ADDR ALT_USB_DEV_DOEPTSIZ1_ADDR(ALT_USB1_DEVGRP_ADDR)
4915 
4916 #define ALT_USB1_DEV_DOEPDMA1_ADDR ALT_USB_DEV_DOEPDMA1_ADDR(ALT_USB1_DEVGRP_ADDR)
4917 
4918 #define ALT_USB1_DEV_DOEPDMAB1_ADDR ALT_USB_DEV_DOEPDMAB1_ADDR(ALT_USB1_DEVGRP_ADDR)
4919 
4920 #define ALT_USB1_DEV_DOEPCTL2_ADDR ALT_USB_DEV_DOEPCTL2_ADDR(ALT_USB1_DEVGRP_ADDR)
4921 
4922 #define ALT_USB1_DEV_DOEPINT2_ADDR ALT_USB_DEV_DOEPINT2_ADDR(ALT_USB1_DEVGRP_ADDR)
4923 
4924 #define ALT_USB1_DEV_DOEPTSIZ2_ADDR ALT_USB_DEV_DOEPTSIZ2_ADDR(ALT_USB1_DEVGRP_ADDR)
4925 
4926 #define ALT_USB1_DEV_DOEPDMA2_ADDR ALT_USB_DEV_DOEPDMA2_ADDR(ALT_USB1_DEVGRP_ADDR)
4927 
4928 #define ALT_USB1_DEV_DOEPDMAB2_ADDR ALT_USB_DEV_DOEPDMAB2_ADDR(ALT_USB1_DEVGRP_ADDR)
4929 
4930 #define ALT_USB1_DEV_DOEPCTL3_ADDR ALT_USB_DEV_DOEPCTL3_ADDR(ALT_USB1_DEVGRP_ADDR)
4931 
4932 #define ALT_USB1_DEV_DOEPINT3_ADDR ALT_USB_DEV_DOEPINT3_ADDR(ALT_USB1_DEVGRP_ADDR)
4933 
4934 #define ALT_USB1_DEV_DOEPTSIZ3_ADDR ALT_USB_DEV_DOEPTSIZ3_ADDR(ALT_USB1_DEVGRP_ADDR)
4935 
4936 #define ALT_USB1_DEV_DOEPDMA3_ADDR ALT_USB_DEV_DOEPDMA3_ADDR(ALT_USB1_DEVGRP_ADDR)
4937 
4938 #define ALT_USB1_DEV_DOEPDMAB3_ADDR ALT_USB_DEV_DOEPDMAB3_ADDR(ALT_USB1_DEVGRP_ADDR)
4939 
4940 #define ALT_USB1_DEV_DOEPCTL4_ADDR ALT_USB_DEV_DOEPCTL4_ADDR(ALT_USB1_DEVGRP_ADDR)
4941 
4942 #define ALT_USB1_DEV_DOEPINT4_ADDR ALT_USB_DEV_DOEPINT4_ADDR(ALT_USB1_DEVGRP_ADDR)
4943 
4944 #define ALT_USB1_DEV_DOEPTSIZ4_ADDR ALT_USB_DEV_DOEPTSIZ4_ADDR(ALT_USB1_DEVGRP_ADDR)
4945 
4946 #define ALT_USB1_DEV_DOEPDMA4_ADDR ALT_USB_DEV_DOEPDMA4_ADDR(ALT_USB1_DEVGRP_ADDR)
4947 
4948 #define ALT_USB1_DEV_DOEPDMAB4_ADDR ALT_USB_DEV_DOEPDMAB4_ADDR(ALT_USB1_DEVGRP_ADDR)
4949 
4950 #define ALT_USB1_DEV_DOEPCTL5_ADDR ALT_USB_DEV_DOEPCTL5_ADDR(ALT_USB1_DEVGRP_ADDR)
4951 
4952 #define ALT_USB1_DEV_DOEPINT5_ADDR ALT_USB_DEV_DOEPINT5_ADDR(ALT_USB1_DEVGRP_ADDR)
4953 
4954 #define ALT_USB1_DEV_DOEPTSIZ5_ADDR ALT_USB_DEV_DOEPTSIZ5_ADDR(ALT_USB1_DEVGRP_ADDR)
4955 
4956 #define ALT_USB1_DEV_DOEPDMA5_ADDR ALT_USB_DEV_DOEPDMA5_ADDR(ALT_USB1_DEVGRP_ADDR)
4957 
4958 #define ALT_USB1_DEV_DOEPDMAB5_ADDR ALT_USB_DEV_DOEPDMAB5_ADDR(ALT_USB1_DEVGRP_ADDR)
4959 
4960 #define ALT_USB1_DEV_DOEPCTL6_ADDR ALT_USB_DEV_DOEPCTL6_ADDR(ALT_USB1_DEVGRP_ADDR)
4961 
4962 #define ALT_USB1_DEV_DOEPINT6_ADDR ALT_USB_DEV_DOEPINT6_ADDR(ALT_USB1_DEVGRP_ADDR)
4963 
4964 #define ALT_USB1_DEV_DOEPTSIZ6_ADDR ALT_USB_DEV_DOEPTSIZ6_ADDR(ALT_USB1_DEVGRP_ADDR)
4965 
4966 #define ALT_USB1_DEV_DOEPDMA6_ADDR ALT_USB_DEV_DOEPDMA6_ADDR(ALT_USB1_DEVGRP_ADDR)
4967 
4968 #define ALT_USB1_DEV_DOEPDMAB6_ADDR ALT_USB_DEV_DOEPDMAB6_ADDR(ALT_USB1_DEVGRP_ADDR)
4969 
4970 #define ALT_USB1_DEV_DOEPCTL7_ADDR ALT_USB_DEV_DOEPCTL7_ADDR(ALT_USB1_DEVGRP_ADDR)
4971 
4972 #define ALT_USB1_DEV_DOEPINT7_ADDR ALT_USB_DEV_DOEPINT7_ADDR(ALT_USB1_DEVGRP_ADDR)
4973 
4974 #define ALT_USB1_DEV_DOEPTSIZ7_ADDR ALT_USB_DEV_DOEPTSIZ7_ADDR(ALT_USB1_DEVGRP_ADDR)
4975 
4976 #define ALT_USB1_DEV_DOEPDMA7_ADDR ALT_USB_DEV_DOEPDMA7_ADDR(ALT_USB1_DEVGRP_ADDR)
4977 
4978 #define ALT_USB1_DEV_DOEPDMAB7_ADDR ALT_USB_DEV_DOEPDMAB7_ADDR(ALT_USB1_DEVGRP_ADDR)
4979 
4980 #define ALT_USB1_DEV_DOEPCTL8_ADDR ALT_USB_DEV_DOEPCTL8_ADDR(ALT_USB1_DEVGRP_ADDR)
4981 
4982 #define ALT_USB1_DEV_DOEPINT8_ADDR ALT_USB_DEV_DOEPINT8_ADDR(ALT_USB1_DEVGRP_ADDR)
4983 
4984 #define ALT_USB1_DEV_DOEPTSIZ8_ADDR ALT_USB_DEV_DOEPTSIZ8_ADDR(ALT_USB1_DEVGRP_ADDR)
4985 
4986 #define ALT_USB1_DEV_DOEPDMA8_ADDR ALT_USB_DEV_DOEPDMA8_ADDR(ALT_USB1_DEVGRP_ADDR)
4987 
4988 #define ALT_USB1_DEV_DOEPDMAB8_ADDR ALT_USB_DEV_DOEPDMAB8_ADDR(ALT_USB1_DEVGRP_ADDR)
4989 
4990 #define ALT_USB1_DEV_DOEPCTL9_ADDR ALT_USB_DEV_DOEPCTL9_ADDR(ALT_USB1_DEVGRP_ADDR)
4991 
4992 #define ALT_USB1_DEV_DOEPINT9_ADDR ALT_USB_DEV_DOEPINT9_ADDR(ALT_USB1_DEVGRP_ADDR)
4993 
4994 #define ALT_USB1_DEV_DOEPTSIZ9_ADDR ALT_USB_DEV_DOEPTSIZ9_ADDR(ALT_USB1_DEVGRP_ADDR)
4995 
4996 #define ALT_USB1_DEV_DOEPDMA9_ADDR ALT_USB_DEV_DOEPDMA9_ADDR(ALT_USB1_DEVGRP_ADDR)
4997 
4998 #define ALT_USB1_DEV_DOEPDMAB9_ADDR ALT_USB_DEV_DOEPDMAB9_ADDR(ALT_USB1_DEVGRP_ADDR)
4999 
5000 #define ALT_USB1_DEV_DOEPCTL10_ADDR ALT_USB_DEV_DOEPCTL10_ADDR(ALT_USB1_DEVGRP_ADDR)
5001 
5002 #define ALT_USB1_DEV_DOEPINT10_ADDR ALT_USB_DEV_DOEPINT10_ADDR(ALT_USB1_DEVGRP_ADDR)
5003 
5004 #define ALT_USB1_DEV_DOEPTSIZ10_ADDR ALT_USB_DEV_DOEPTSIZ10_ADDR(ALT_USB1_DEVGRP_ADDR)
5005 
5006 #define ALT_USB1_DEV_DOEPDMA10_ADDR ALT_USB_DEV_DOEPDMA10_ADDR(ALT_USB1_DEVGRP_ADDR)
5007 
5008 #define ALT_USB1_DEV_DOEPDMAB10_ADDR ALT_USB_DEV_DOEPDMAB10_ADDR(ALT_USB1_DEVGRP_ADDR)
5009 
5010 #define ALT_USB1_DEV_DOEPCTL11_ADDR ALT_USB_DEV_DOEPCTL11_ADDR(ALT_USB1_DEVGRP_ADDR)
5011 
5012 #define ALT_USB1_DEV_DOEPINT11_ADDR ALT_USB_DEV_DOEPINT11_ADDR(ALT_USB1_DEVGRP_ADDR)
5013 
5014 #define ALT_USB1_DEV_DOEPTSIZ11_ADDR ALT_USB_DEV_DOEPTSIZ11_ADDR(ALT_USB1_DEVGRP_ADDR)
5015 
5016 #define ALT_USB1_DEV_DOEPDMA11_ADDR ALT_USB_DEV_DOEPDMA11_ADDR(ALT_USB1_DEVGRP_ADDR)
5017 
5018 #define ALT_USB1_DEV_DOEPDMAB11_ADDR ALT_USB_DEV_DOEPDMAB11_ADDR(ALT_USB1_DEVGRP_ADDR)
5019 
5020 #define ALT_USB1_DEV_DOEPCTL12_ADDR ALT_USB_DEV_DOEPCTL12_ADDR(ALT_USB1_DEVGRP_ADDR)
5021 
5022 #define ALT_USB1_DEV_DOEPINT12_ADDR ALT_USB_DEV_DOEPINT12_ADDR(ALT_USB1_DEVGRP_ADDR)
5023 
5024 #define ALT_USB1_DEV_DOEPTSIZ12_ADDR ALT_USB_DEV_DOEPTSIZ12_ADDR(ALT_USB1_DEVGRP_ADDR)
5025 
5026 #define ALT_USB1_DEV_DOEPDMA12_ADDR ALT_USB_DEV_DOEPDMA12_ADDR(ALT_USB1_DEVGRP_ADDR)
5027 
5028 #define ALT_USB1_DEV_DOEPDMAB12_ADDR ALT_USB_DEV_DOEPDMAB12_ADDR(ALT_USB1_DEVGRP_ADDR)
5029 
5030 #define ALT_USB1_DEV_DOEPCTL13_ADDR ALT_USB_DEV_DOEPCTL13_ADDR(ALT_USB1_DEVGRP_ADDR)
5031 
5032 #define ALT_USB1_DEV_DOEPINT13_ADDR ALT_USB_DEV_DOEPINT13_ADDR(ALT_USB1_DEVGRP_ADDR)
5033 
5034 #define ALT_USB1_DEV_DOEPTSIZ13_ADDR ALT_USB_DEV_DOEPTSIZ13_ADDR(ALT_USB1_DEVGRP_ADDR)
5035 
5036 #define ALT_USB1_DEV_DOEPDMA13_ADDR ALT_USB_DEV_DOEPDMA13_ADDR(ALT_USB1_DEVGRP_ADDR)
5037 
5038 #define ALT_USB1_DEV_DOEPDMAB13_ADDR ALT_USB_DEV_DOEPDMAB13_ADDR(ALT_USB1_DEVGRP_ADDR)
5039 
5040 #define ALT_USB1_DEV_DOEPCTL14_ADDR ALT_USB_DEV_DOEPCTL14_ADDR(ALT_USB1_DEVGRP_ADDR)
5041 
5042 #define ALT_USB1_DEV_DOEPINT14_ADDR ALT_USB_DEV_DOEPINT14_ADDR(ALT_USB1_DEVGRP_ADDR)
5043 
5044 #define ALT_USB1_DEV_DOEPTSIZ14_ADDR ALT_USB_DEV_DOEPTSIZ14_ADDR(ALT_USB1_DEVGRP_ADDR)
5045 
5046 #define ALT_USB1_DEV_DOEPDMA14_ADDR ALT_USB_DEV_DOEPDMA14_ADDR(ALT_USB1_DEVGRP_ADDR)
5047 
5048 #define ALT_USB1_DEV_DOEPDMAB14_ADDR ALT_USB_DEV_DOEPDMAB14_ADDR(ALT_USB1_DEVGRP_ADDR)
5049 
5050 #define ALT_USB1_DEV_DOEPCTL15_ADDR ALT_USB_DEV_DOEPCTL15_ADDR(ALT_USB1_DEVGRP_ADDR)
5051 
5052 #define ALT_USB1_DEV_DOEPINT15_ADDR ALT_USB_DEV_DOEPINT15_ADDR(ALT_USB1_DEVGRP_ADDR)
5053 
5054 #define ALT_USB1_DEV_DOEPTSIZ15_ADDR ALT_USB_DEV_DOEPTSIZ15_ADDR(ALT_USB1_DEVGRP_ADDR)
5055 
5056 #define ALT_USB1_DEV_DOEPDMA15_ADDR ALT_USB_DEV_DOEPDMA15_ADDR(ALT_USB1_DEVGRP_ADDR)
5057 
5058 #define ALT_USB1_DEV_DOEPDMAB15_ADDR ALT_USB_DEV_DOEPDMAB15_ADDR(ALT_USB1_DEVGRP_ADDR)
5059 
5060 #define ALT_USB1_DEVGRP_OFST 0x800
5061 
5062 #define ALT_USB1_DEVGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB1_ADDR) + ALT_USB1_DEVGRP_OFST))
5063 
5064 #define ALT_USB1_DEVGRP_LB_ADDR ALT_USB1_DEVGRP_ADDR
5065 
5066 #define ALT_USB1_DEVGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_DEVGRP_ADDR) + 0x500) - 1))
5067 
5077 #define ALT_USB1_PWRCLK_PCGCCTL_ADDR ALT_USB_PWRCLK_PCGCCTL_ADDR(ALT_USB1_PWRCLKGRP_ADDR)
5078 
5079 #define ALT_USB1_PWRCLKGRP_OFST 0xe00
5080 
5081 #define ALT_USB1_PWRCLKGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_USB1_ADDR) + ALT_USB1_PWRCLKGRP_OFST))
5082 
5083 #define ALT_USB1_PWRCLKGRP_LB_ADDR ALT_USB1_PWRCLKGRP_ADDR
5084 
5085 #define ALT_USB1_PWRCLKGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_PWRCLKGRP_ADDR) + 0x4) - 1))
5086 
5089 #define ALT_USB1_OFST 0xffb40000
5090 
5091 #define ALT_USB1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_USB1_OFST))
5092 
5093 #define ALT_USB1_LB_ADDR ALT_USB1_ADDR
5094 
5095 #define ALT_USB1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_USB1_ADDR) + 0x40000) - 1))
5096 
5113 #define ALT_NAND_CFG_DEVICE_RST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_RST_OFST))
5114 
5115 #define ALT_NAND_CFG_TFR_SPARE_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TFR_SPARE_REG_OFST))
5116 
5117 #define ALT_NAND_CFG_LD_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_LD_WAIT_CNT_OFST))
5118 
5119 #define ALT_NAND_CFG_PROGRAM_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PROGRAM_WAIT_CNT_OFST))
5120 
5121 #define ALT_NAND_CFG_ERASE_WAIT_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ERASE_WAIT_CNT_OFST))
5122 
5123 #define ALT_NAND_CFG_INT_MON_CYCCNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_INT_MON_CYCCNT_OFST))
5124 
5125 #define ALT_NAND_CFG_RB_PIN_END_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RB_PIN_END_OFST))
5126 
5127 #define ALT_NAND_CFG_MULTIPLANE_OP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_OP_OFST))
5128 
5129 #define ALT_NAND_CFG_MULTIPLANE_RD_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_RD_EN_OFST))
5130 
5131 #define ALT_NAND_CFG_COPYBACK_DIS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_COPYBACK_DIS_OFST))
5132 
5133 #define ALT_NAND_CFG_CACHE_WR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CACHE_WR_EN_OFST))
5134 
5135 #define ALT_NAND_CFG_CACHE_RD_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CACHE_RD_EN_OFST))
5136 
5137 #define ALT_NAND_CFG_PREFETCH_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PREFETCH_MOD_OFST))
5138 
5139 #define ALT_NAND_CFG_CHIP_EN_DONT_CARE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CHIP_EN_DONT_CARE_OFST))
5140 
5141 #define ALT_NAND_CFG_ECC_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ECC_EN_OFST))
5142 
5143 #define ALT_NAND_CFG_GLOB_INT_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_GLOB_INT_EN_OFST))
5144 
5145 #define ALT_NAND_CFG_TWHR2_AND_WE_2_RE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TWHR2_AND_WE_2_RE_OFST))
5146 
5147 #define ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TCWAW_AND_ADDR_2_DATA_OFST))
5148 
5149 #define ALT_NAND_CFG_RE_2_WE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RE_2_WE_OFST))
5150 
5151 #define ALT_NAND_CFG_ACC_CLKS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ACC_CLKS_OFST))
5152 
5153 #define ALT_NAND_CFG_NUMBER_OF_PLANES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_NUMBER_OF_PLANES_OFST))
5154 
5155 #define ALT_NAND_CFG_PAGES_PER_BLOCK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_PAGES_PER_BLOCK_OFST))
5156 
5157 #define ALT_NAND_CFG_DEVICE_WIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_WIDTH_OFST))
5158 
5159 #define ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_MAIN_AREA_SIZE_OFST))
5160 
5161 #define ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICE_SPARE_AREA_SIZE_OFST))
5162 
5163 #define ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_TWO_ROW_ADDR_CYCLES_OFST))
5164 
5165 #define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_OFST))
5166 
5167 #define ALT_NAND_CFG_ECC_CORRECTION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_ECC_CORRECTION_OFST))
5168 
5169 #define ALT_NAND_CFG_RD_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RD_MOD_OFST))
5170 
5171 #define ALT_NAND_CFG_WR_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WR_MOD_OFST))
5172 
5173 #define ALT_NAND_CFG_COPYBACK_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_COPYBACK_MOD_OFST))
5174 
5175 #define ALT_NAND_CFG_RDWR_EN_LO_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RDWR_EN_LO_CNT_OFST))
5176 
5177 #define ALT_NAND_CFG_RDWR_EN_HI_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RDWR_EN_HI_CNT_OFST))
5178 
5179 #define ALT_NAND_CFG_MAX_RD_DELAY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_MAX_RD_DELAY_OFST))
5180 
5181 #define ALT_NAND_CFG_CS_SETUP_CNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_CS_SETUP_CNT_OFST))
5182 
5183 #define ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_SPARE_AREA_SKIP_BYTES_OFST))
5184 
5185 #define ALT_NAND_CFG_SPARE_AREA_MARKER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_SPARE_AREA_MARKER_OFST))
5186 
5187 #define ALT_NAND_CFG_DEVICES_CONNECTED_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DEVICES_CONNECTED_OFST))
5188 
5189 #define ALT_NAND_CFG_DIE_MSK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_DIE_MSK_OFST))
5190 
5191 #define ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_FIRST_BLOCK_OF_NEXT_PLANE_OFST))
5192 
5193 #define ALT_NAND_CFG_WR_PROTECT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WR_PROTECT_OFST))
5194 
5195 #define ALT_NAND_CFG_RE_2_RE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_RE_2_RE_OFST))
5196 
5197 #define ALT_NAND_CFG_POR_RST_COUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_POR_RST_COUNT_OFST))
5198 
5199 #define ALT_NAND_CFG_WD_RST_COUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_CFG_ADDR) + ALT_NAND_CFG_WD_RST_COUNT_OFST))
5200 
5201 #define ALT_NAND_CFG_OFST 0x0
5202 
5203 #define ALT_NAND_CFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ADDR) + ALT_NAND_CFG_OFST))
5204 
5205 #define ALT_NAND_CFG_LB_ADDR ALT_NAND_CFG_ADDR
5206 
5207 #define ALT_NAND_CFG_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_CFG_ADDR) + 0x2b4) - 1))
5208 
5218 #define ALT_NAND_PARAM_MANUFACTURER_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_MANUFACTURER_ID_OFST))
5219 
5220 #define ALT_NAND_PARAM_DEVICE_ID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_ID_OFST))
5221 
5222 #define ALT_NAND_PARAM_DEVICE_PARAM_0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_0_OFST))
5223 
5224 #define ALT_NAND_PARAM_DEVICE_PARAM_1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_1_OFST))
5225 
5226 #define ALT_NAND_PARAM_DEVICE_PARAM_2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_DEVICE_PARAM_2_OFST))
5227 
5228 #define ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_LOGICAL_PAGE_DATA_SIZE_OFST))
5229 
5230 #define ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_LOGICAL_PAGE_SPARE_SIZE_OFST))
5231 
5232 #define ALT_NAND_PARAM_REVISION_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_REVISION_OFST))
5233 
5234 #define ALT_NAND_PARAM_ONFI_DEV_FEATURES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_FEATURES_OFST))
5235 
5236 #define ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_OPTIONAL_CMDS_OFST))
5237 
5238 #define ALT_NAND_PARAM_ONFI_TIMING_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_TIMING_MOD_OFST))
5239 
5240 #define ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_PGM_CACHE_TIMING_MOD_OFST))
5241 
5242 #define ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_NO_OF_LUNS_OFST))
5243 
5244 #define ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_L_OFST))
5245 
5246 #define ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_ONFI_DEV_BLKS_PER_LUN_U_OFST))
5247 
5248 #define ALT_NAND_PARAM_FEATURES_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + ALT_NAND_PARAM_FEATURES_OFST))
5249 
5250 #define ALT_NAND_PARAM_OFST 0x300
5251 
5252 #define ALT_NAND_PARAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ADDR) + ALT_NAND_PARAM_OFST))
5253 
5254 #define ALT_NAND_PARAM_LB_ADDR ALT_NAND_PARAM_ADDR
5255 
5256 #define ALT_NAND_PARAM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_PARAM_ADDR) + 0xf4) - 1))
5257 
5267 #define ALT_NAND_STAT_TFR_MOD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_TFR_MOD_OFST))
5268 
5269 #define ALT_NAND_STAT_INTR_STAT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT0_OFST))
5270 
5271 #define ALT_NAND_STAT_INTR_EN0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN0_OFST))
5272 
5273 #define ALT_NAND_STAT_PAGE_CNT0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT0_OFST))
5274 
5275 #define ALT_NAND_STAT_ERR_PAGE_ADDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR0_OFST))
5276 
5277 #define ALT_NAND_STAT_ERR_BLOCK_ADDR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR0_OFST))
5278 
5279 #define ALT_NAND_STAT_INTR_STAT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT1_OFST))
5280 
5281 #define ALT_NAND_STAT_INTR_EN1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN1_OFST))
5282 
5283 #define ALT_NAND_STAT_PAGE_CNT1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT1_OFST))
5284 
5285 #define ALT_NAND_STAT_ERR_PAGE_ADDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR1_OFST))
5286 
5287 #define ALT_NAND_STAT_ERR_BLOCK_ADDR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR1_OFST))
5288 
5289 #define ALT_NAND_STAT_INTR_STAT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT2_OFST))
5290 
5291 #define ALT_NAND_STAT_INTR_EN2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN2_OFST))
5292 
5293 #define ALT_NAND_STAT_PAGE_CNT2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT2_OFST))
5294 
5295 #define ALT_NAND_STAT_ERR_PAGE_ADDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR2_OFST))
5296 
5297 #define ALT_NAND_STAT_ERR_BLOCK_ADDR2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR2_OFST))
5298 
5299 #define ALT_NAND_STAT_INTR_STAT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_STAT3_OFST))
5300 
5301 #define ALT_NAND_STAT_INTR_EN3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_INTR_EN3_OFST))
5302 
5303 #define ALT_NAND_STAT_PAGE_CNT3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_PAGE_CNT3_OFST))
5304 
5305 #define ALT_NAND_STAT_ERR_PAGE_ADDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_PAGE_ADDR3_OFST))
5306 
5307 #define ALT_NAND_STAT_ERR_BLOCK_ADDR3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_STAT_ADDR) + ALT_NAND_STAT_ERR_BLOCK_ADDR3_OFST))
5308 
5309 #define ALT_NAND_STAT_OFST 0x400
5310 
5311 #define ALT_NAND_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ADDR) + ALT_NAND_STAT_OFST))
5312 
5313 #define ALT_NAND_STAT_LB_ADDR ALT_NAND_STAT_ADDR
5314 
5315 #define ALT_NAND_STAT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_STAT_ADDR) + 0x144) - 1))
5316 
5326 #define ALT_NAND_ECC_ECCCORINFO_B01_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ECC_ADDR) + ALT_NAND_ECC_ECCCORINFO_B01_OFST))
5327 
5328 #define ALT_NAND_ECC_ECCCORINFO_B23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ECC_ADDR) + ALT_NAND_ECC_ECCCORINFO_B23_OFST))
5329 
5330 #define ALT_NAND_ECC_OFST 0x650
5331 
5332 #define ALT_NAND_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ADDR) + ALT_NAND_ECC_OFST))
5333 
5334 #define ALT_NAND_ECC_LB_ADDR ALT_NAND_ECC_ADDR
5335 
5336 #define ALT_NAND_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_ECC_ADDR) + 0x14) - 1))
5337 
5347 #define ALT_NAND_DMA_DMA_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_EN_OFST))
5348 
5349 #define ALT_NAND_DMA_DMA_INTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_INTR_OFST))
5350 
5351 #define ALT_NAND_DMA_DMA_INTR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_DMA_INTR_EN_OFST))
5352 
5353 #define ALT_NAND_DMA_TGT_ERR_ADDR_LO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_TGT_ERR_ADDR_LO_OFST))
5354 
5355 #define ALT_NAND_DMA_TGT_ERR_ADDR_HI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_TGT_ERR_ADDR_HI_OFST))
5356 
5357 #define ALT_NAND_DMA_FLSH_BURST_LEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_FLSH_BURST_LEN_OFST))
5358 
5359 #define ALT_NAND_DMA_INTRLV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_INTRLV_OFST))
5360 
5361 #define ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_NO_OF_BLOCKS_PER_LUN_OFST))
5362 
5363 #define ALT_NAND_DMA_LUN_STAT_CMD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_DMA_ADDR) + ALT_NAND_DMA_LUN_STAT_CMD_OFST))
5364 
5365 #define ALT_NAND_DMA_OFST 0x700
5366 
5367 #define ALT_NAND_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_NAND_ADDR) + ALT_NAND_DMA_OFST))
5368 
5369 #define ALT_NAND_DMA_LB_ADDR ALT_NAND_DMA_ADDR
5370 
5371 #define ALT_NAND_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_DMA_ADDR) + 0xa4) - 1))
5372 
5375 #define ALT_NAND_OFST 0xffb80000
5376 
5377 #define ALT_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_NAND_OFST))
5378 
5379 #define ALT_NAND_LB_ADDR ALT_NAND_ADDR
5380 
5381 #define ALT_NAND_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_NAND_ADDR) + 0x800) - 1))
5382 
5392 #define ALT_FPGAMGRDATA_DATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_FPGAMGRDATA_ADDR) + ALT_FPGAMGRDATA_DATA_OFST))
5393 
5394 #define ALT_FPGAMGRDATA_OFST 0xffb90000
5395 
5396 #define ALT_FPGAMGRDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_FPGAMGRDATA_OFST))
5397 
5398 #define ALT_FPGAMGRDATA_LB_ADDR ALT_FPGAMGRDATA_ADDR
5399 
5400 #define ALT_FPGAMGRDATA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_FPGAMGRDATA_ADDR) + 0x4) - 1))
5401 
5418 #define ALT_CAN0_PROTO_CCTL_ADDR ALT_CAN_PROTO_CCTL_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5419 
5420 #define ALT_CAN0_PROTO_CSTS_ADDR ALT_CAN_PROTO_CSTS_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5421 
5422 #define ALT_CAN0_PROTO_CERC_ADDR ALT_CAN_PROTO_CERC_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5423 
5424 #define ALT_CAN0_PROTO_CBT_ADDR ALT_CAN_PROTO_CBT_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5425 
5426 #define ALT_CAN0_PROTO_CIR_ADDR ALT_CAN_PROTO_CIR_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5427 
5428 #define ALT_CAN0_PROTO_CTR_ADDR ALT_CAN_PROTO_CTR_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5429 
5430 #define ALT_CAN0_PROTO_CFR_ADDR ALT_CAN_PROTO_CFR_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5431 
5432 #define ALT_CAN0_PROTO_CRR_ADDR ALT_CAN_PROTO_CRR_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5433 
5434 #define ALT_CAN0_PROTO_HWS_ADDR ALT_CAN_PROTO_HWS_ADDR(ALT_CAN0_PROTOGRP_ADDR)
5435 
5436 #define ALT_CAN0_PROTOGRP_OFST 0x0
5437 
5438 #define ALT_CAN0_PROTOGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CAN0_ADDR) + ALT_CAN0_PROTOGRP_OFST))
5439 
5440 #define ALT_CAN0_PROTOGRP_LB_ADDR ALT_CAN0_PROTOGRP_ADDR
5441 
5442 #define ALT_CAN0_PROTOGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN0_PROTOGRP_ADDR) + 0x28) - 1))
5443 
5453 #define ALT_CAN0_MSGHAND_MOTRX_ADDR ALT_CAN_MSGHAND_MOTRX_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5454 
5455 #define ALT_CAN0_MSGHAND_MOTRA_ADDR ALT_CAN_MSGHAND_MOTRA_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5456 
5457 #define ALT_CAN0_MSGHAND_MOTRB_ADDR ALT_CAN_MSGHAND_MOTRB_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5458 
5459 #define ALT_CAN0_MSGHAND_MOTRC_ADDR ALT_CAN_MSGHAND_MOTRC_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5460 
5461 #define ALT_CAN0_MSGHAND_MOTRD_ADDR ALT_CAN_MSGHAND_MOTRD_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5462 
5463 #define ALT_CAN0_MSGHAND_MONDX_ADDR ALT_CAN_MSGHAND_MONDX_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5464 
5465 #define ALT_CAN0_MSGHAND_MONDA_ADDR ALT_CAN_MSGHAND_MONDA_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5466 
5467 #define ALT_CAN0_MSGHAND_MONDB_ADDR ALT_CAN_MSGHAND_MONDB_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5468 
5469 #define ALT_CAN0_MSGHAND_MONDC_ADDR ALT_CAN_MSGHAND_MONDC_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5470 
5471 #define ALT_CAN0_MSGHAND_MONDD_ADDR ALT_CAN_MSGHAND_MONDD_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5472 
5473 #define ALT_CAN0_MSGHAND_MOIPX_ADDR ALT_CAN_MSGHAND_MOIPX_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5474 
5475 #define ALT_CAN0_MSGHAND_MOIPA_ADDR ALT_CAN_MSGHAND_MOIPA_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5476 
5477 #define ALT_CAN0_MSGHAND_MOIPB_ADDR ALT_CAN_MSGHAND_MOIPB_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5478 
5479 #define ALT_CAN0_MSGHAND_MOIPC_ADDR ALT_CAN_MSGHAND_MOIPC_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5480 
5481 #define ALT_CAN0_MSGHAND_MOIPD_ADDR ALT_CAN_MSGHAND_MOIPD_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5482 
5483 #define ALT_CAN0_MSGHAND_MOVALX_ADDR ALT_CAN_MSGHAND_MOVALX_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5484 
5485 #define ALT_CAN0_MSGHAND_MOVALA_ADDR ALT_CAN_MSGHAND_MOVALA_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5486 
5487 #define ALT_CAN0_MSGHAND_MOVALB_ADDR ALT_CAN_MSGHAND_MOVALB_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5488 
5489 #define ALT_CAN0_MSGHAND_MOVALC_ADDR ALT_CAN_MSGHAND_MOVALC_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5490 
5491 #define ALT_CAN0_MSGHAND_MOVALD_ADDR ALT_CAN_MSGHAND_MOVALD_ADDR(ALT_CAN0_MSGHANDGRP_ADDR)
5492 
5493 #define ALT_CAN0_MSGHANDGRP_OFST 0x84
5494 
5495 #define ALT_CAN0_MSGHANDGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CAN0_ADDR) + ALT_CAN0_MSGHANDGRP_OFST))
5496 
5497 #define ALT_CAN0_MSGHANDGRP_LB_ADDR ALT_CAN0_MSGHANDGRP_ADDR
5498 
5499 #define ALT_CAN0_MSGHANDGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN0_MSGHANDGRP_ADDR) + 0x50) - 1))
5500 
5510 #define ALT_CAN0_MSGIF_IF1CMR_ADDR ALT_CAN_MSGIF_IF1CMR_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5511 
5512 #define ALT_CAN0_MSGIF_IF1MSK_ADDR ALT_CAN_MSGIF_IF1MSK_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5513 
5514 #define ALT_CAN0_MSGIF_IF1ARB_ADDR ALT_CAN_MSGIF_IF1ARB_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5515 
5516 #define ALT_CAN0_MSGIF_IF1MCTR_ADDR ALT_CAN_MSGIF_IF1MCTR_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5517 
5518 #define ALT_CAN0_MSGIF_IF1DA_ADDR ALT_CAN_MSGIF_IF1DA_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5519 
5520 #define ALT_CAN0_MSGIF_IF1DB_ADDR ALT_CAN_MSGIF_IF1DB_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5521 
5522 #define ALT_CAN0_MSGIF_IF2CMR_ADDR ALT_CAN_MSGIF_IF2CMR_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5523 
5524 #define ALT_CAN0_MSGIF_IF2MSK_ADDR ALT_CAN_MSGIF_IF2MSK_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5525 
5526 #define ALT_CAN0_MSGIF_IF2ARB_ADDR ALT_CAN_MSGIF_IF2ARB_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5527 
5528 #define ALT_CAN0_MSGIF_IF2MCTR_ADDR ALT_CAN_MSGIF_IF2MCTR_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5529 
5530 #define ALT_CAN0_MSGIF_IF2DA_ADDR ALT_CAN_MSGIF_IF2DA_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5531 
5532 #define ALT_CAN0_MSGIF_IF2DB_ADDR ALT_CAN_MSGIF_IF2DB_ADDR(ALT_CAN0_MSGIFGRP_ADDR)
5533 
5534 #define ALT_CAN0_MSGIFGRP_OFST 0x100
5535 
5536 #define ALT_CAN0_MSGIFGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CAN0_ADDR) + ALT_CAN0_MSGIFGRP_OFST))
5537 
5538 #define ALT_CAN0_MSGIFGRP_LB_ADDR ALT_CAN0_MSGIFGRP_ADDR
5539 
5540 #define ALT_CAN0_MSGIFGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN0_MSGIFGRP_ADDR) + 0x38) - 1))
5541 
5544 #define ALT_CAN0_OFST 0xffc00000
5545 
5546 #define ALT_CAN0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CAN0_OFST))
5547 
5548 #define ALT_CAN0_LB_ADDR ALT_CAN0_ADDR
5549 
5550 #define ALT_CAN0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN0_ADDR) + 0x200) - 1))
5551 
5568 #define ALT_CAN1_PROTO_CCTL_ADDR ALT_CAN_PROTO_CCTL_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5569 
5570 #define ALT_CAN1_PROTO_CSTS_ADDR ALT_CAN_PROTO_CSTS_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5571 
5572 #define ALT_CAN1_PROTO_CERC_ADDR ALT_CAN_PROTO_CERC_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5573 
5574 #define ALT_CAN1_PROTO_CBT_ADDR ALT_CAN_PROTO_CBT_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5575 
5576 #define ALT_CAN1_PROTO_CIR_ADDR ALT_CAN_PROTO_CIR_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5577 
5578 #define ALT_CAN1_PROTO_CTR_ADDR ALT_CAN_PROTO_CTR_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5579 
5580 #define ALT_CAN1_PROTO_CFR_ADDR ALT_CAN_PROTO_CFR_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5581 
5582 #define ALT_CAN1_PROTO_CRR_ADDR ALT_CAN_PROTO_CRR_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5583 
5584 #define ALT_CAN1_PROTO_HWS_ADDR ALT_CAN_PROTO_HWS_ADDR(ALT_CAN1_PROTOGRP_ADDR)
5585 
5586 #define ALT_CAN1_PROTOGRP_OFST 0x0
5587 
5588 #define ALT_CAN1_PROTOGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CAN1_ADDR) + ALT_CAN1_PROTOGRP_OFST))
5589 
5590 #define ALT_CAN1_PROTOGRP_LB_ADDR ALT_CAN1_PROTOGRP_ADDR
5591 
5592 #define ALT_CAN1_PROTOGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN1_PROTOGRP_ADDR) + 0x28) - 1))
5593 
5603 #define ALT_CAN1_MSGHAND_MOTRX_ADDR ALT_CAN_MSGHAND_MOTRX_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5604 
5605 #define ALT_CAN1_MSGHAND_MOTRA_ADDR ALT_CAN_MSGHAND_MOTRA_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5606 
5607 #define ALT_CAN1_MSGHAND_MOTRB_ADDR ALT_CAN_MSGHAND_MOTRB_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5608 
5609 #define ALT_CAN1_MSGHAND_MOTRC_ADDR ALT_CAN_MSGHAND_MOTRC_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5610 
5611 #define ALT_CAN1_MSGHAND_MOTRD_ADDR ALT_CAN_MSGHAND_MOTRD_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5612 
5613 #define ALT_CAN1_MSGHAND_MONDX_ADDR ALT_CAN_MSGHAND_MONDX_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5614 
5615 #define ALT_CAN1_MSGHAND_MONDA_ADDR ALT_CAN_MSGHAND_MONDA_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5616 
5617 #define ALT_CAN1_MSGHAND_MONDB_ADDR ALT_CAN_MSGHAND_MONDB_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5618 
5619 #define ALT_CAN1_MSGHAND_MONDC_ADDR ALT_CAN_MSGHAND_MONDC_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5620 
5621 #define ALT_CAN1_MSGHAND_MONDD_ADDR ALT_CAN_MSGHAND_MONDD_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5622 
5623 #define ALT_CAN1_MSGHAND_MOIPX_ADDR ALT_CAN_MSGHAND_MOIPX_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5624 
5625 #define ALT_CAN1_MSGHAND_MOIPA_ADDR ALT_CAN_MSGHAND_MOIPA_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5626 
5627 #define ALT_CAN1_MSGHAND_MOIPB_ADDR ALT_CAN_MSGHAND_MOIPB_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5628 
5629 #define ALT_CAN1_MSGHAND_MOIPC_ADDR ALT_CAN_MSGHAND_MOIPC_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5630 
5631 #define ALT_CAN1_MSGHAND_MOIPD_ADDR ALT_CAN_MSGHAND_MOIPD_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5632 
5633 #define ALT_CAN1_MSGHAND_MOVALX_ADDR ALT_CAN_MSGHAND_MOVALX_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5634 
5635 #define ALT_CAN1_MSGHAND_MOVALA_ADDR ALT_CAN_MSGHAND_MOVALA_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5636 
5637 #define ALT_CAN1_MSGHAND_MOVALB_ADDR ALT_CAN_MSGHAND_MOVALB_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5638 
5639 #define ALT_CAN1_MSGHAND_MOVALC_ADDR ALT_CAN_MSGHAND_MOVALC_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5640 
5641 #define ALT_CAN1_MSGHAND_MOVALD_ADDR ALT_CAN_MSGHAND_MOVALD_ADDR(ALT_CAN1_MSGHANDGRP_ADDR)
5642 
5643 #define ALT_CAN1_MSGHANDGRP_OFST 0x84
5644 
5645 #define ALT_CAN1_MSGHANDGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CAN1_ADDR) + ALT_CAN1_MSGHANDGRP_OFST))
5646 
5647 #define ALT_CAN1_MSGHANDGRP_LB_ADDR ALT_CAN1_MSGHANDGRP_ADDR
5648 
5649 #define ALT_CAN1_MSGHANDGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN1_MSGHANDGRP_ADDR) + 0x50) - 1))
5650 
5660 #define ALT_CAN1_MSGIF_IF1CMR_ADDR ALT_CAN_MSGIF_IF1CMR_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5661 
5662 #define ALT_CAN1_MSGIF_IF1MSK_ADDR ALT_CAN_MSGIF_IF1MSK_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5663 
5664 #define ALT_CAN1_MSGIF_IF1ARB_ADDR ALT_CAN_MSGIF_IF1ARB_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5665 
5666 #define ALT_CAN1_MSGIF_IF1MCTR_ADDR ALT_CAN_MSGIF_IF1MCTR_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5667 
5668 #define ALT_CAN1_MSGIF_IF1DA_ADDR ALT_CAN_MSGIF_IF1DA_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5669 
5670 #define ALT_CAN1_MSGIF_IF1DB_ADDR ALT_CAN_MSGIF_IF1DB_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5671 
5672 #define ALT_CAN1_MSGIF_IF2CMR_ADDR ALT_CAN_MSGIF_IF2CMR_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5673 
5674 #define ALT_CAN1_MSGIF_IF2MSK_ADDR ALT_CAN_MSGIF_IF2MSK_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5675 
5676 #define ALT_CAN1_MSGIF_IF2ARB_ADDR ALT_CAN_MSGIF_IF2ARB_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5677 
5678 #define ALT_CAN1_MSGIF_IF2MCTR_ADDR ALT_CAN_MSGIF_IF2MCTR_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5679 
5680 #define ALT_CAN1_MSGIF_IF2DA_ADDR ALT_CAN_MSGIF_IF2DA_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5681 
5682 #define ALT_CAN1_MSGIF_IF2DB_ADDR ALT_CAN_MSGIF_IF2DB_ADDR(ALT_CAN1_MSGIFGRP_ADDR)
5683 
5684 #define ALT_CAN1_MSGIFGRP_OFST 0x100
5685 
5686 #define ALT_CAN1_MSGIFGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CAN1_ADDR) + ALT_CAN1_MSGIFGRP_OFST))
5687 
5688 #define ALT_CAN1_MSGIFGRP_LB_ADDR ALT_CAN1_MSGIFGRP_ADDR
5689 
5690 #define ALT_CAN1_MSGIFGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN1_MSGIFGRP_ADDR) + 0x38) - 1))
5691 
5694 #define ALT_CAN1_OFST 0xffc01000
5695 
5696 #define ALT_CAN1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CAN1_OFST))
5697 
5698 #define ALT_CAN1_LB_ADDR ALT_CAN1_ADDR
5699 
5700 #define ALT_CAN1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CAN1_ADDR) + 0x200) - 1))
5701 
5711 #define ALT_UART0_RBR_THR_DLL_ADDR ALT_UART_RBR_THR_DLL_ADDR(ALT_UART0_ADDR)
5712 
5713 #define ALT_UART0_IER_DLH_ADDR ALT_UART_IER_DLH_ADDR(ALT_UART0_ADDR)
5714 
5715 #define ALT_UART0_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART0_ADDR)
5716 
5717 #define ALT_UART0_FCR_ADDR ALT_UART_FCR_ADDR(ALT_UART0_ADDR)
5718 
5719 #define ALT_UART0_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART0_ADDR)
5720 
5721 #define ALT_UART0_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART0_ADDR)
5722 
5723 #define ALT_UART0_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART0_ADDR)
5724 
5725 #define ALT_UART0_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART0_ADDR)
5726 
5727 #define ALT_UART0_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART0_ADDR)
5728 
5729 #define ALT_UART0_SRBR_ADDR ALT_UART_SRBR_ADDR(ALT_UART0_ADDR)
5730 
5731 #define ALT_UART0_STHR_ADDR ALT_UART_STHR_ADDR(ALT_UART0_ADDR)
5732 
5733 #define ALT_UART0_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART0_ADDR)
5734 
5735 #define ALT_UART0_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART0_ADDR)
5736 
5737 #define ALT_UART0_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART0_ADDR)
5738 
5739 #define ALT_UART0_USR_ADDR ALT_UART_USR_ADDR(ALT_UART0_ADDR)
5740 
5741 #define ALT_UART0_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART0_ADDR)
5742 
5743 #define ALT_UART0_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART0_ADDR)
5744 
5745 #define ALT_UART0_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART0_ADDR)
5746 
5747 #define ALT_UART0_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART0_ADDR)
5748 
5749 #define ALT_UART0_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART0_ADDR)
5750 
5751 #define ALT_UART0_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART0_ADDR)
5752 
5753 #define ALT_UART0_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART0_ADDR)
5754 
5755 #define ALT_UART0_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART0_ADDR)
5756 
5757 #define ALT_UART0_STET_ADDR ALT_UART_STET_ADDR(ALT_UART0_ADDR)
5758 
5759 #define ALT_UART0_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART0_ADDR)
5760 
5761 #define ALT_UART0_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART0_ADDR)
5762 
5763 #define ALT_UART0_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART0_ADDR)
5764 
5765 #define ALT_UART0_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART0_ADDR)
5766 
5767 #define ALT_UART0_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART0_ADDR)
5768 
5769 #define ALT_UART0_OFST 0xffc02000
5770 
5771 #define ALT_UART0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART0_OFST))
5772 
5773 #define ALT_UART0_LB_ADDR ALT_UART0_ADDR
5774 
5775 #define ALT_UART0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART0_ADDR) + 0x100) - 1))
5776 
5786 #define ALT_UART1_RBR_THR_DLL_ADDR ALT_UART_RBR_THR_DLL_ADDR(ALT_UART1_ADDR)
5787 
5788 #define ALT_UART1_IER_DLH_ADDR ALT_UART_IER_DLH_ADDR(ALT_UART1_ADDR)
5789 
5790 #define ALT_UART1_IIR_ADDR ALT_UART_IIR_ADDR(ALT_UART1_ADDR)
5791 
5792 #define ALT_UART1_FCR_ADDR ALT_UART_FCR_ADDR(ALT_UART1_ADDR)
5793 
5794 #define ALT_UART1_LCR_ADDR ALT_UART_LCR_ADDR(ALT_UART1_ADDR)
5795 
5796 #define ALT_UART1_MCR_ADDR ALT_UART_MCR_ADDR(ALT_UART1_ADDR)
5797 
5798 #define ALT_UART1_LSR_ADDR ALT_UART_LSR_ADDR(ALT_UART1_ADDR)
5799 
5800 #define ALT_UART1_MSR_ADDR ALT_UART_MSR_ADDR(ALT_UART1_ADDR)
5801 
5802 #define ALT_UART1_SCR_ADDR ALT_UART_SCR_ADDR(ALT_UART1_ADDR)
5803 
5804 #define ALT_UART1_SRBR_ADDR ALT_UART_SRBR_ADDR(ALT_UART1_ADDR)
5805 
5806 #define ALT_UART1_STHR_ADDR ALT_UART_STHR_ADDR(ALT_UART1_ADDR)
5807 
5808 #define ALT_UART1_FAR_ADDR ALT_UART_FAR_ADDR(ALT_UART1_ADDR)
5809 
5810 #define ALT_UART1_TFR_ADDR ALT_UART_TFR_ADDR(ALT_UART1_ADDR)
5811 
5812 #define ALT_UART1_RFW_ADDR ALT_UART_RFW_ADDR(ALT_UART1_ADDR)
5813 
5814 #define ALT_UART1_USR_ADDR ALT_UART_USR_ADDR(ALT_UART1_ADDR)
5815 
5816 #define ALT_UART1_TFL_ADDR ALT_UART_TFL_ADDR(ALT_UART1_ADDR)
5817 
5818 #define ALT_UART1_RFL_ADDR ALT_UART_RFL_ADDR(ALT_UART1_ADDR)
5819 
5820 #define ALT_UART1_SRR_ADDR ALT_UART_SRR_ADDR(ALT_UART1_ADDR)
5821 
5822 #define ALT_UART1_SRTS_ADDR ALT_UART_SRTS_ADDR(ALT_UART1_ADDR)
5823 
5824 #define ALT_UART1_SBCR_ADDR ALT_UART_SBCR_ADDR(ALT_UART1_ADDR)
5825 
5826 #define ALT_UART1_SDMAM_ADDR ALT_UART_SDMAM_ADDR(ALT_UART1_ADDR)
5827 
5828 #define ALT_UART1_SFE_ADDR ALT_UART_SFE_ADDR(ALT_UART1_ADDR)
5829 
5830 #define ALT_UART1_SRT_ADDR ALT_UART_SRT_ADDR(ALT_UART1_ADDR)
5831 
5832 #define ALT_UART1_STET_ADDR ALT_UART_STET_ADDR(ALT_UART1_ADDR)
5833 
5834 #define ALT_UART1_HTX_ADDR ALT_UART_HTX_ADDR(ALT_UART1_ADDR)
5835 
5836 #define ALT_UART1_DMASA_ADDR ALT_UART_DMASA_ADDR(ALT_UART1_ADDR)
5837 
5838 #define ALT_UART1_CPR_ADDR ALT_UART_CPR_ADDR(ALT_UART1_ADDR)
5839 
5840 #define ALT_UART1_UCV_ADDR ALT_UART_UCV_ADDR(ALT_UART1_ADDR)
5841 
5842 #define ALT_UART1_CTR_ADDR ALT_UART_CTR_ADDR(ALT_UART1_ADDR)
5843 
5844 #define ALT_UART1_OFST 0xffc03000
5845 
5846 #define ALT_UART1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_UART1_OFST))
5847 
5848 #define ALT_UART1_LB_ADDR ALT_UART1_ADDR
5849 
5850 #define ALT_UART1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_UART1_ADDR) + 0x100) - 1))
5851 
5861 #define ALT_I2C0_IC_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C0_ADDR)
5862 
5863 #define ALT_I2C0_IC_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C0_ADDR)
5864 
5865 #define ALT_I2C0_IC_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C0_ADDR)
5866 
5867 #define ALT_I2C0_IC_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C0_ADDR)
5868 
5869 #define ALT_I2C0_IC_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
5870 
5871 #define ALT_I2C0_IC_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
5872 
5873 #define ALT_I2C0_IC_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C0_ADDR)
5874 
5875 #define ALT_I2C0_IC_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C0_ADDR)
5876 
5877 #define ALT_I2C0_IC_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C0_ADDR)
5878 
5879 #define ALT_I2C0_IC_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C0_ADDR)
5880 
5881 #define ALT_I2C0_IC_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C0_ADDR)
5882 
5883 #define ALT_I2C0_IC_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C0_ADDR)
5884 
5885 #define ALT_I2C0_IC_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C0_ADDR)
5886 
5887 #define ALT_I2C0_IC_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C0_ADDR)
5888 
5889 #define ALT_I2C0_IC_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C0_ADDR)
5890 
5891 #define ALT_I2C0_IC_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C0_ADDR)
5892 
5893 #define ALT_I2C0_IC_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C0_ADDR)
5894 
5895 #define ALT_I2C0_IC_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C0_ADDR)
5896 
5897 #define ALT_I2C0_IC_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C0_ADDR)
5898 
5899 #define ALT_I2C0_IC_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C0_ADDR)
5900 
5901 #define ALT_I2C0_IC_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C0_ADDR)
5902 
5903 #define ALT_I2C0_IC_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C0_ADDR)
5904 
5905 #define ALT_I2C0_IC_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C0_ADDR)
5906 
5907 #define ALT_I2C0_IC_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C0_ADDR)
5908 
5909 #define ALT_I2C0_IC_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C0_ADDR)
5910 
5911 #define ALT_I2C0_IC_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C0_ADDR)
5912 
5913 #define ALT_I2C0_IC_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C0_ADDR)
5914 
5915 #define ALT_I2C0_IC_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C0_ADDR)
5916 
5917 #define ALT_I2C0_IC_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C0_ADDR)
5918 
5919 #define ALT_I2C0_IC_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C0_ADDR)
5920 
5921 #define ALT_I2C0_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C0_ADDR)
5922 
5923 #define ALT_I2C0_IC_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C0_ADDR)
5924 
5925 #define ALT_I2C0_IC_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C0_ADDR)
5926 
5927 #define ALT_I2C0_IC_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C0_ADDR)
5928 
5929 #define ALT_I2C0_IC_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C0_ADDR)
5930 
5931 #define ALT_I2C0_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C0_ADDR)
5932 
5933 #define ALT_I2C0_IC_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C0_ADDR)
5934 
5935 #define ALT_I2C0_IC_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C0_ADDR)
5936 
5937 #define ALT_I2C0_IC_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C0_ADDR)
5938 
5939 #define ALT_I2C0_IC_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C0_ADDR)
5940 
5941 #define ALT_I2C0_IC_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C0_ADDR)
5942 
5943 #define ALT_I2C0_OFST 0xffc04000
5944 
5945 #define ALT_I2C0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C0_OFST))
5946 
5947 #define ALT_I2C0_LB_ADDR ALT_I2C0_ADDR
5948 
5949 #define ALT_I2C0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C0_ADDR) + 0x100) - 1))
5950 
5960 #define ALT_I2C1_IC_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C1_ADDR)
5961 
5962 #define ALT_I2C1_IC_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C1_ADDR)
5963 
5964 #define ALT_I2C1_IC_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C1_ADDR)
5965 
5966 #define ALT_I2C1_IC_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C1_ADDR)
5967 
5968 #define ALT_I2C1_IC_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
5969 
5970 #define ALT_I2C1_IC_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
5971 
5972 #define ALT_I2C1_IC_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C1_ADDR)
5973 
5974 #define ALT_I2C1_IC_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C1_ADDR)
5975 
5976 #define ALT_I2C1_IC_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C1_ADDR)
5977 
5978 #define ALT_I2C1_IC_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C1_ADDR)
5979 
5980 #define ALT_I2C1_IC_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C1_ADDR)
5981 
5982 #define ALT_I2C1_IC_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C1_ADDR)
5983 
5984 #define ALT_I2C1_IC_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C1_ADDR)
5985 
5986 #define ALT_I2C1_IC_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C1_ADDR)
5987 
5988 #define ALT_I2C1_IC_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C1_ADDR)
5989 
5990 #define ALT_I2C1_IC_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C1_ADDR)
5991 
5992 #define ALT_I2C1_IC_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C1_ADDR)
5993 
5994 #define ALT_I2C1_IC_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C1_ADDR)
5995 
5996 #define ALT_I2C1_IC_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C1_ADDR)
5997 
5998 #define ALT_I2C1_IC_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C1_ADDR)
5999 
6000 #define ALT_I2C1_IC_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C1_ADDR)
6001 
6002 #define ALT_I2C1_IC_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C1_ADDR)
6003 
6004 #define ALT_I2C1_IC_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C1_ADDR)
6005 
6006 #define ALT_I2C1_IC_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C1_ADDR)
6007 
6008 #define ALT_I2C1_IC_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C1_ADDR)
6009 
6010 #define ALT_I2C1_IC_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C1_ADDR)
6011 
6012 #define ALT_I2C1_IC_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C1_ADDR)
6013 
6014 #define ALT_I2C1_IC_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C1_ADDR)
6015 
6016 #define ALT_I2C1_IC_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C1_ADDR)
6017 
6018 #define ALT_I2C1_IC_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C1_ADDR)
6019 
6020 #define ALT_I2C1_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C1_ADDR)
6021 
6022 #define ALT_I2C1_IC_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C1_ADDR)
6023 
6024 #define ALT_I2C1_IC_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C1_ADDR)
6025 
6026 #define ALT_I2C1_IC_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C1_ADDR)
6027 
6028 #define ALT_I2C1_IC_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C1_ADDR)
6029 
6030 #define ALT_I2C1_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C1_ADDR)
6031 
6032 #define ALT_I2C1_IC_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C1_ADDR)
6033 
6034 #define ALT_I2C1_IC_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C1_ADDR)
6035 
6036 #define ALT_I2C1_IC_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C1_ADDR)
6037 
6038 #define ALT_I2C1_IC_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C1_ADDR)
6039 
6040 #define ALT_I2C1_IC_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C1_ADDR)
6041 
6042 #define ALT_I2C1_OFST 0xffc05000
6043 
6044 #define ALT_I2C1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C1_OFST))
6045 
6046 #define ALT_I2C1_LB_ADDR ALT_I2C1_ADDR
6047 
6048 #define ALT_I2C1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C1_ADDR) + 0x100) - 1))
6049 
6059 #define ALT_I2C2_IC_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C2_ADDR)
6060 
6061 #define ALT_I2C2_IC_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C2_ADDR)
6062 
6063 #define ALT_I2C2_IC_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C2_ADDR)
6064 
6065 #define ALT_I2C2_IC_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C2_ADDR)
6066 
6067 #define ALT_I2C2_IC_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C2_ADDR)
6068 
6069 #define ALT_I2C2_IC_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C2_ADDR)
6070 
6071 #define ALT_I2C2_IC_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C2_ADDR)
6072 
6073 #define ALT_I2C2_IC_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C2_ADDR)
6074 
6075 #define ALT_I2C2_IC_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C2_ADDR)
6076 
6077 #define ALT_I2C2_IC_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C2_ADDR)
6078 
6079 #define ALT_I2C2_IC_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C2_ADDR)
6080 
6081 #define ALT_I2C2_IC_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C2_ADDR)
6082 
6083 #define ALT_I2C2_IC_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C2_ADDR)
6084 
6085 #define ALT_I2C2_IC_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C2_ADDR)
6086 
6087 #define ALT_I2C2_IC_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C2_ADDR)
6088 
6089 #define ALT_I2C2_IC_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C2_ADDR)
6090 
6091 #define ALT_I2C2_IC_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C2_ADDR)
6092 
6093 #define ALT_I2C2_IC_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C2_ADDR)
6094 
6095 #define ALT_I2C2_IC_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C2_ADDR)
6096 
6097 #define ALT_I2C2_IC_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C2_ADDR)
6098 
6099 #define ALT_I2C2_IC_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C2_ADDR)
6100 
6101 #define ALT_I2C2_IC_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C2_ADDR)
6102 
6103 #define ALT_I2C2_IC_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C2_ADDR)
6104 
6105 #define ALT_I2C2_IC_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C2_ADDR)
6106 
6107 #define ALT_I2C2_IC_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C2_ADDR)
6108 
6109 #define ALT_I2C2_IC_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C2_ADDR)
6110 
6111 #define ALT_I2C2_IC_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C2_ADDR)
6112 
6113 #define ALT_I2C2_IC_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C2_ADDR)
6114 
6115 #define ALT_I2C2_IC_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C2_ADDR)
6116 
6117 #define ALT_I2C2_IC_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C2_ADDR)
6118 
6119 #define ALT_I2C2_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C2_ADDR)
6120 
6121 #define ALT_I2C2_IC_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C2_ADDR)
6122 
6123 #define ALT_I2C2_IC_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C2_ADDR)
6124 
6125 #define ALT_I2C2_IC_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C2_ADDR)
6126 
6127 #define ALT_I2C2_IC_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C2_ADDR)
6128 
6129 #define ALT_I2C2_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C2_ADDR)
6130 
6131 #define ALT_I2C2_IC_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C2_ADDR)
6132 
6133 #define ALT_I2C2_IC_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C2_ADDR)
6134 
6135 #define ALT_I2C2_IC_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C2_ADDR)
6136 
6137 #define ALT_I2C2_IC_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C2_ADDR)
6138 
6139 #define ALT_I2C2_IC_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C2_ADDR)
6140 
6141 #define ALT_I2C2_OFST 0xffc06000
6142 
6143 #define ALT_I2C2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C2_OFST))
6144 
6145 #define ALT_I2C2_LB_ADDR ALT_I2C2_ADDR
6146 
6147 #define ALT_I2C2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C2_ADDR) + 0x100) - 1))
6148 
6158 #define ALT_I2C3_IC_CON_ADDR ALT_I2C_CON_ADDR(ALT_I2C3_ADDR)
6159 
6160 #define ALT_I2C3_IC_TAR_ADDR ALT_I2C_TAR_ADDR(ALT_I2C3_ADDR)
6161 
6162 #define ALT_I2C3_IC_SAR_ADDR ALT_I2C_SAR_ADDR(ALT_I2C3_ADDR)
6163 
6164 #define ALT_I2C3_IC_DATA_CMD_ADDR ALT_I2C_DATA_CMD_ADDR(ALT_I2C3_ADDR)
6165 
6166 #define ALT_I2C3_IC_SS_SCL_HCNT_ADDR ALT_I2C_SS_SCL_HCNT_ADDR(ALT_I2C3_ADDR)
6167 
6168 #define ALT_I2C3_IC_SS_SCL_LCNT_ADDR ALT_I2C_SS_SCL_LCNT_ADDR(ALT_I2C3_ADDR)
6169 
6170 #define ALT_I2C3_IC_FS_SCL_HCNT_ADDR ALT_I2C_FS_SCL_HCNT_ADDR(ALT_I2C3_ADDR)
6171 
6172 #define ALT_I2C3_IC_FS_SCL_LCNT_ADDR ALT_I2C_FS_SCL_LCNT_ADDR(ALT_I2C3_ADDR)
6173 
6174 #define ALT_I2C3_IC_INTR_STAT_ADDR ALT_I2C_INTR_STAT_ADDR(ALT_I2C3_ADDR)
6175 
6176 #define ALT_I2C3_IC_INTR_MSK_ADDR ALT_I2C_INTR_MSK_ADDR(ALT_I2C3_ADDR)
6177 
6178 #define ALT_I2C3_IC_RAW_INTR_STAT_ADDR ALT_I2C_RAW_INTR_STAT_ADDR(ALT_I2C3_ADDR)
6179 
6180 #define ALT_I2C3_IC_RX_TL_ADDR ALT_I2C_RX_TL_ADDR(ALT_I2C3_ADDR)
6181 
6182 #define ALT_I2C3_IC_TX_TL_ADDR ALT_I2C_TX_TL_ADDR(ALT_I2C3_ADDR)
6183 
6184 #define ALT_I2C3_IC_CLR_INTR_ADDR ALT_I2C_CLR_INTR_ADDR(ALT_I2C3_ADDR)
6185 
6186 #define ALT_I2C3_IC_CLR_RX_UNDER_ADDR ALT_I2C_CLR_RX_UNDER_ADDR(ALT_I2C3_ADDR)
6187 
6188 #define ALT_I2C3_IC_CLR_RX_OVER_ADDR ALT_I2C_CLR_RX_OVER_ADDR(ALT_I2C3_ADDR)
6189 
6190 #define ALT_I2C3_IC_CLR_TX_OVER_ADDR ALT_I2C_CLR_TX_OVER_ADDR(ALT_I2C3_ADDR)
6191 
6192 #define ALT_I2C3_IC_CLR_RD_REQ_ADDR ALT_I2C_CLR_RD_REQ_ADDR(ALT_I2C3_ADDR)
6193 
6194 #define ALT_I2C3_IC_CLR_TX_ABRT_ADDR ALT_I2C_CLR_TX_ABRT_ADDR(ALT_I2C3_ADDR)
6195 
6196 #define ALT_I2C3_IC_CLR_RX_DONE_ADDR ALT_I2C_CLR_RX_DONE_ADDR(ALT_I2C3_ADDR)
6197 
6198 #define ALT_I2C3_IC_CLR_ACTIVITY_ADDR ALT_I2C_CLR_ACTIVITY_ADDR(ALT_I2C3_ADDR)
6199 
6200 #define ALT_I2C3_IC_CLR_STOP_DET_ADDR ALT_I2C_CLR_STOP_DET_ADDR(ALT_I2C3_ADDR)
6201 
6202 #define ALT_I2C3_IC_CLR_START_DET_ADDR ALT_I2C_CLR_START_DET_ADDR(ALT_I2C3_ADDR)
6203 
6204 #define ALT_I2C3_IC_CLR_GEN_CALL_ADDR ALT_I2C_CLR_GEN_CALL_ADDR(ALT_I2C3_ADDR)
6205 
6206 #define ALT_I2C3_IC_EN_ADDR ALT_I2C_EN_ADDR(ALT_I2C3_ADDR)
6207 
6208 #define ALT_I2C3_IC_STAT_ADDR ALT_I2C_STAT_ADDR(ALT_I2C3_ADDR)
6209 
6210 #define ALT_I2C3_IC_TXFLR_ADDR ALT_I2C_TXFLR_ADDR(ALT_I2C3_ADDR)
6211 
6212 #define ALT_I2C3_IC_RXFLR_ADDR ALT_I2C_RXFLR_ADDR(ALT_I2C3_ADDR)
6213 
6214 #define ALT_I2C3_IC_SDA_HOLD_ADDR ALT_I2C_SDA_HOLD_ADDR(ALT_I2C3_ADDR)
6215 
6216 #define ALT_I2C3_IC_TX_ABRT_SRC_ADDR ALT_I2C_TX_ABRT_SRC_ADDR(ALT_I2C3_ADDR)
6217 
6218 #define ALT_I2C3_IC_SLV_DATA_NACK_ONLY_ADDR ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(ALT_I2C3_ADDR)
6219 
6220 #define ALT_I2C3_IC_DMA_CR_ADDR ALT_I2C_DMA_CR_ADDR(ALT_I2C3_ADDR)
6221 
6222 #define ALT_I2C3_IC_DMA_TDLR_ADDR ALT_I2C_DMA_TDLR_ADDR(ALT_I2C3_ADDR)
6223 
6224 #define ALT_I2C3_IC_DMA_RDLR_ADDR ALT_I2C_DMA_RDLR_ADDR(ALT_I2C3_ADDR)
6225 
6226 #define ALT_I2C3_IC_SDA_SETUP_ADDR ALT_I2C_SDA_SETUP_ADDR(ALT_I2C3_ADDR)
6227 
6228 #define ALT_I2C3_IC_ACK_GENERAL_CALL_ADDR ALT_I2C_ACK_GENERAL_CALL_ADDR(ALT_I2C3_ADDR)
6229 
6230 #define ALT_I2C3_IC_EN_STAT_ADDR ALT_I2C_EN_STAT_ADDR(ALT_I2C3_ADDR)
6231 
6232 #define ALT_I2C3_IC_FS_SPKLEN_ADDR ALT_I2C_FS_SPKLEN_ADDR(ALT_I2C3_ADDR)
6233 
6234 #define ALT_I2C3_IC_COMP_PARAM_1_ADDR ALT_I2C_COMP_PARAM_1_ADDR(ALT_I2C3_ADDR)
6235 
6236 #define ALT_I2C3_IC_COMP_VER_ADDR ALT_I2C_COMP_VER_ADDR(ALT_I2C3_ADDR)
6237 
6238 #define ALT_I2C3_IC_COMP_TYPE_ADDR ALT_I2C_COMP_TYPE_ADDR(ALT_I2C3_ADDR)
6239 
6240 #define ALT_I2C3_OFST 0xffc07000
6241 
6242 #define ALT_I2C3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_I2C3_OFST))
6243 
6244 #define ALT_I2C3_LB_ADDR ALT_I2C3_ADDR
6245 
6246 #define ALT_I2C3_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_I2C3_ADDR) + 0x100) - 1))
6247 
6257 #define ALT_SPTMR0_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_SPTMR0_ADDR)
6258 
6259 #define ALT_SPTMR0_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_SPTMR0_ADDR)
6260 
6261 #define ALT_SPTMR0_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_SPTMR0_ADDR)
6262 
6263 #define ALT_SPTMR0_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_SPTMR0_ADDR)
6264 
6265 #define ALT_SPTMR0_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_SPTMR0_ADDR)
6266 
6267 #define ALT_SPTMR0_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_SPTMR0_ADDR)
6268 
6269 #define ALT_SPTMR0_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_SPTMR0_ADDR)
6270 
6271 #define ALT_SPTMR0_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_SPTMR0_ADDR)
6272 
6273 #define ALT_SPTMR0_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_SPTMR0_ADDR)
6274 
6275 #define ALT_SPTMR0_OFST 0xffc08000
6276 
6277 #define ALT_SPTMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPTMR0_OFST))
6278 
6279 #define ALT_SPTMR0_LB_ADDR ALT_SPTMR0_ADDR
6280 
6281 #define ALT_SPTMR0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPTMR0_ADDR) + 0x100) - 1))
6282 
6292 #define ALT_SPTMR1_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_SPTMR1_ADDR)
6293 
6294 #define ALT_SPTMR1_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_SPTMR1_ADDR)
6295 
6296 #define ALT_SPTMR1_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_SPTMR1_ADDR)
6297 
6298 #define ALT_SPTMR1_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_SPTMR1_ADDR)
6299 
6300 #define ALT_SPTMR1_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_SPTMR1_ADDR)
6301 
6302 #define ALT_SPTMR1_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_SPTMR1_ADDR)
6303 
6304 #define ALT_SPTMR1_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_SPTMR1_ADDR)
6305 
6306 #define ALT_SPTMR1_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_SPTMR1_ADDR)
6307 
6308 #define ALT_SPTMR1_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_SPTMR1_ADDR)
6309 
6310 #define ALT_SPTMR1_OFST 0xffc09000
6311 
6312 #define ALT_SPTMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPTMR1_OFST))
6313 
6314 #define ALT_SPTMR1_LB_ADDR ALT_SPTMR1_ADDR
6315 
6316 #define ALT_SPTMR1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPTMR1_ADDR) + 0x100) - 1))
6317 
6334 #define ALT_SDR_CTL_CTLCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_CTLCFG_OFST))
6335 
6336 #define ALT_SDR_CTL_DRAMTIMING1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMTIMING1_OFST))
6337 
6338 #define ALT_SDR_CTL_DRAMTIMING2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMTIMING2_OFST))
6339 
6340 #define ALT_SDR_CTL_DRAMTIMING3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMTIMING3_OFST))
6341 
6342 #define ALT_SDR_CTL_DRAMTIMING4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMTIMING4_OFST))
6343 
6344 #define ALT_SDR_CTL_LOWPWRTIMING_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_LOWPWRTIMING_OFST))
6345 
6346 #define ALT_SDR_CTL_DRAMODT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMODT_OFST))
6347 
6348 #define ALT_SDR_CTL_DRAMADDRW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMADDRW_OFST))
6349 
6350 #define ALT_SDR_CTL_DRAMIFWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMIFWIDTH_OFST))
6351 
6352 #define ALT_SDR_CTL_DRAMDEVWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMDEVWIDTH_OFST))
6353 
6354 #define ALT_SDR_CTL_DRAMSTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMSTS_OFST))
6355 
6356 #define ALT_SDR_CTL_DRAMINTR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DRAMINTR_OFST))
6357 
6358 #define ALT_SDR_CTL_SBECOUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_SBECOUNT_OFST))
6359 
6360 #define ALT_SDR_CTL_DBECOUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DBECOUNT_OFST))
6361 
6362 #define ALT_SDR_CTL_ERRADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_ERRADDR_OFST))
6363 
6364 #define ALT_SDR_CTL_DROPCOUNT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DROPCOUNT_OFST))
6365 
6366 #define ALT_SDR_CTL_DROPADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_DROPADDR_OFST))
6367 
6368 #define ALT_SDR_CTL_LOWPWREQ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_LOWPWREQ_OFST))
6369 
6370 #define ALT_SDR_CTL_LOWPWRACK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_LOWPWRACK_OFST))
6371 
6372 #define ALT_SDR_CTL_STATICCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_STATICCFG_OFST))
6373 
6374 #define ALT_SDR_CTL_CTLWIDTH_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_CTLWIDTH_OFST))
6375 
6376 #define ALT_SDR_CTL_PORTCFG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_PORTCFG_OFST))
6377 
6378 #define ALT_SDR_CTL_FPGAPORTRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_FPGAPORTRST_OFST))
6379 
6380 #define ALT_SDR_CTL_PROTPORTDEFAULT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_PROTPORTDEFAULT_OFST))
6381 
6382 #define ALT_SDR_CTL_PROTRULEADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_PROTRULEADDR_OFST))
6383 
6384 #define ALT_SDR_CTL_PROTRULEID_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_PROTRULEID_OFST))
6385 
6386 #define ALT_SDR_CTL_PROTRULEDATA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_PROTRULEDATA_OFST))
6387 
6388 #define ALT_SDR_CTL_PROTRULERDWR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_PROTRULERDWR_OFST))
6389 
6390 #define ALT_SDR_CTL_QOSLOWPRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_QOSLOWPRI_OFST))
6391 
6392 #define ALT_SDR_CTL_QOSHIGHPRI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_QOSHIGHPRI_OFST))
6393 
6394 #define ALT_SDR_CTL_QOSPRIORITYEN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_QOSPRIORITYEN_OFST))
6395 
6396 #define ALT_SDR_CTL_MPPRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_MPPRIORITY_OFST))
6397 
6398 #define ALT_SDR_CTL_REMAPPRIORITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_REMAPPRIORITY_OFST))
6399 
6407 #define ALT_SDR_CTL_CTL_MPWEIGHT_MPWEIGHT_0_4_ADDR ALT_SDR_CTL_MPWT_MPWEIGHT_0_4_ADDR(ALT_SDR_CTL_CTL_MPWEIGHT_ADDR)
6408 
6409 #define ALT_SDR_CTL_CTL_MPWEIGHT_MPWEIGHT_1_4_ADDR ALT_SDR_CTL_MPWT_MPWEIGHT_1_4_ADDR(ALT_SDR_CTL_CTL_MPWEIGHT_ADDR)
6410 
6411 #define ALT_SDR_CTL_CTL_MPWEIGHT_MPWEIGHT_2_4_ADDR ALT_SDR_CTL_MPWT_MPWEIGHT_2_4_ADDR(ALT_SDR_CTL_CTL_MPWEIGHT_ADDR)
6412 
6413 #define ALT_SDR_CTL_CTL_MPWEIGHT_MPWEIGHT_3_4_ADDR ALT_SDR_CTL_MPWT_MPWEIGHT_3_4_ADDR(ALT_SDR_CTL_CTL_MPWEIGHT_ADDR)
6414 
6415 #define ALT_SDR_CTL_CTL_MPWEIGHT_OFST 0xb0
6416 
6417 #define ALT_SDR_CTL_CTL_MPWEIGHT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_CTL_ADDR) + ALT_SDR_CTL_CTL_MPWEIGHT_OFST))
6418 
6419 #define ALT_SDR_CTL_CTL_MPWEIGHT_LB_ADDR ALT_SDR_CTL_CTL_MPWEIGHT_ADDR
6420 
6421 #define ALT_SDR_CTL_CTL_MPWEIGHT_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDR_CTL_CTL_MPWEIGHT_ADDR) + 0x10) - 1))
6422 
6425 #define ALT_SDR_CTL_OFST 0x5000
6426 
6427 #define ALT_SDR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SDR_ADDR) + ALT_SDR_CTL_OFST))
6428 
6429 #define ALT_SDR_CTL_LB_ADDR ALT_SDR_CTL_ADDR
6430 
6431 #define ALT_SDR_CTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDR_CTL_ADDR) + 0x1000) - 1))
6432 
6435 #define ALT_SDR_OFST 0xffc20000
6436 
6437 #define ALT_SDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SDR_OFST))
6438 
6439 #define ALT_SDR_LB_ADDR ALT_SDR_ADDR
6440 
6441 #define ALT_SDR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SDR_ADDR) + 0x20000) - 1))
6442 
6452 #define ALT_OSC1TMR0_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_OSC1TMR0_ADDR)
6453 
6454 #define ALT_OSC1TMR0_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_OSC1TMR0_ADDR)
6455 
6456 #define ALT_OSC1TMR0_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_OSC1TMR0_ADDR)
6457 
6458 #define ALT_OSC1TMR0_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_OSC1TMR0_ADDR)
6459 
6460 #define ALT_OSC1TMR0_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_OSC1TMR0_ADDR)
6461 
6462 #define ALT_OSC1TMR0_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_OSC1TMR0_ADDR)
6463 
6464 #define ALT_OSC1TMR0_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_OSC1TMR0_ADDR)
6465 
6466 #define ALT_OSC1TMR0_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_OSC1TMR0_ADDR)
6467 
6468 #define ALT_OSC1TMR0_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_OSC1TMR0_ADDR)
6469 
6470 #define ALT_OSC1TMR0_OFST 0xffd00000
6471 
6472 #define ALT_OSC1TMR0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_OSC1TMR0_OFST))
6473 
6474 #define ALT_OSC1TMR0_LB_ADDR ALT_OSC1TMR0_ADDR
6475 
6476 #define ALT_OSC1TMR0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_OSC1TMR0_ADDR) + 0x100) - 1))
6477 
6487 #define ALT_OSC1TMR1_TMR1LDCOUNT_ADDR ALT_TMR_TMR1LDCOUNT_ADDR(ALT_OSC1TMR1_ADDR)
6488 
6489 #define ALT_OSC1TMR1_TMR1CURVAL_ADDR ALT_TMR_TMR1CURVAL_ADDR(ALT_OSC1TMR1_ADDR)
6490 
6491 #define ALT_OSC1TMR1_TMR1CTLREG_ADDR ALT_TMR_TMR1CTLREG_ADDR(ALT_OSC1TMR1_ADDR)
6492 
6493 #define ALT_OSC1TMR1_TMR1EOI_ADDR ALT_TMR_TMR1EOI_ADDR(ALT_OSC1TMR1_ADDR)
6494 
6495 #define ALT_OSC1TMR1_TMR1INTSTAT_ADDR ALT_TMR_TMR1INTSTAT_ADDR(ALT_OSC1TMR1_ADDR)
6496 
6497 #define ALT_OSC1TMR1_TMRSINTSTAT_ADDR ALT_TMR_TMRSINTSTAT_ADDR(ALT_OSC1TMR1_ADDR)
6498 
6499 #define ALT_OSC1TMR1_TMRSEOI_ADDR ALT_TMR_TMRSEOI_ADDR(ALT_OSC1TMR1_ADDR)
6500 
6501 #define ALT_OSC1TMR1_TMRSRAWINTSTAT_ADDR ALT_TMR_TMRSRAWINTSTAT_ADDR(ALT_OSC1TMR1_ADDR)
6502 
6503 #define ALT_OSC1TMR1_TMRSCOMPVER_ADDR ALT_TMR_TMRSCOMPVER_ADDR(ALT_OSC1TMR1_ADDR)
6504 
6505 #define ALT_OSC1TMR1_OFST 0xffd01000
6506 
6507 #define ALT_OSC1TMR1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_OSC1TMR1_OFST))
6508 
6509 #define ALT_OSC1TMR1_LB_ADDR ALT_OSC1TMR1_ADDR
6510 
6511 #define ALT_OSC1TMR1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_OSC1TMR1_ADDR) + 0x100) - 1))
6512 
6522 #define ALT_L4WD0_WDT_CR_ADDR ALT_L4WD_CR_ADDR(ALT_L4WD0_ADDR)
6523 
6524 #define ALT_L4WD0_WDT_TORR_ADDR ALT_L4WD_TORR_ADDR(ALT_L4WD0_ADDR)
6525 
6526 #define ALT_L4WD0_WDT_CCVR_ADDR ALT_L4WD_CCVR_ADDR(ALT_L4WD0_ADDR)
6527 
6528 #define ALT_L4WD0_WDT_CRR_ADDR ALT_L4WD_CRR_ADDR(ALT_L4WD0_ADDR)
6529 
6530 #define ALT_L4WD0_WDT_STAT_ADDR ALT_L4WD_STAT_ADDR(ALT_L4WD0_ADDR)
6531 
6532 #define ALT_L4WD0_WDT_EOI_ADDR ALT_L4WD_EOI_ADDR(ALT_L4WD0_ADDR)
6533 
6534 #define ALT_L4WD0_CP_WDT_USER_TOP_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(ALT_L4WD0_ADDR)
6535 
6536 #define ALT_L4WD0_CP_WDT_USER_TOP_INIT_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(ALT_L4WD0_ADDR)
6537 
6538 #define ALT_L4WD0_CD_WDT_TOP_RST_ADDR ALT_L4WD_CD_WDT_TOP_RST_ADDR(ALT_L4WD0_ADDR)
6539 
6540 #define ALT_L4WD0_CP_WDT_CNT_RST_ADDR ALT_L4WD_CP_WDT_CNT_RST_ADDR(ALT_L4WD0_ADDR)
6541 
6542 #define ALT_L4WD0_WDT_COMP_PARAM_1_ADDR ALT_L4WD_COMP_PARAM_1_ADDR(ALT_L4WD0_ADDR)
6543 
6544 #define ALT_L4WD0_WDT_COMP_VER_ADDR ALT_L4WD_COMP_VER_ADDR(ALT_L4WD0_ADDR)
6545 
6546 #define ALT_L4WD0_WDT_COMP_TYPE_ADDR ALT_L4WD_COMP_TYPE_ADDR(ALT_L4WD0_ADDR)
6547 
6548 #define ALT_L4WD0_OFST 0xffd02000
6549 
6550 #define ALT_L4WD0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L4WD0_OFST))
6551 
6552 #define ALT_L4WD0_LB_ADDR ALT_L4WD0_ADDR
6553 
6554 #define ALT_L4WD0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L4WD0_ADDR) + 0x100) - 1))
6555 
6565 #define ALT_L4WD1_WDT_CR_ADDR ALT_L4WD_CR_ADDR(ALT_L4WD1_ADDR)
6566 
6567 #define ALT_L4WD1_WDT_TORR_ADDR ALT_L4WD_TORR_ADDR(ALT_L4WD1_ADDR)
6568 
6569 #define ALT_L4WD1_WDT_CCVR_ADDR ALT_L4WD_CCVR_ADDR(ALT_L4WD1_ADDR)
6570 
6571 #define ALT_L4WD1_WDT_CRR_ADDR ALT_L4WD_CRR_ADDR(ALT_L4WD1_ADDR)
6572 
6573 #define ALT_L4WD1_WDT_STAT_ADDR ALT_L4WD_STAT_ADDR(ALT_L4WD1_ADDR)
6574 
6575 #define ALT_L4WD1_WDT_EOI_ADDR ALT_L4WD_EOI_ADDR(ALT_L4WD1_ADDR)
6576 
6577 #define ALT_L4WD1_CP_WDT_USER_TOP_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_MAX_ADDR(ALT_L4WD1_ADDR)
6578 
6579 #define ALT_L4WD1_CP_WDT_USER_TOP_INIT_MAX_ADDR ALT_L4WD_CP_WDT_USER_TOP_INIT_MAX_ADDR(ALT_L4WD1_ADDR)
6580 
6581 #define ALT_L4WD1_CD_WDT_TOP_RST_ADDR ALT_L4WD_CD_WDT_TOP_RST_ADDR(ALT_L4WD1_ADDR)
6582 
6583 #define ALT_L4WD1_CP_WDT_CNT_RST_ADDR ALT_L4WD_CP_WDT_CNT_RST_ADDR(ALT_L4WD1_ADDR)
6584 
6585 #define ALT_L4WD1_WDT_COMP_PARAM_1_ADDR ALT_L4WD_COMP_PARAM_1_ADDR(ALT_L4WD1_ADDR)
6586 
6587 #define ALT_L4WD1_WDT_COMP_VER_ADDR ALT_L4WD_COMP_VER_ADDR(ALT_L4WD1_ADDR)
6588 
6589 #define ALT_L4WD1_WDT_COMP_TYPE_ADDR ALT_L4WD_COMP_TYPE_ADDR(ALT_L4WD1_ADDR)
6590 
6591 #define ALT_L4WD1_OFST 0xffd03000
6592 
6593 #define ALT_L4WD1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_L4WD1_OFST))
6594 
6595 #define ALT_L4WD1_LB_ADDR ALT_L4WD1_ADDR
6596 
6597 #define ALT_L4WD1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_L4WD1_ADDR) + 0x100) - 1))
6598 
6608 #define ALT_CLKMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_CTL_OFST))
6609 
6610 #define ALT_CLKMGR_BYPASS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_BYPASS_OFST))
6611 
6612 #define ALT_CLKMGR_INTER_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTER_OFST))
6613 
6614 #define ALT_CLKMGR_INTREN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_INTREN_OFST))
6615 
6616 #define ALT_CLKMGR_DBCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_DBCTL_OFST))
6617 
6618 #define ALT_CLKMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_STAT_OFST))
6619 
6627 #define ALT_CLKMGR_MAINPLL_VCO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_VCO_OFST))
6628 
6629 #define ALT_CLKMGR_MAINPLL_MISC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MISC_OFST))
6630 
6631 #define ALT_CLKMGR_MAINPLL_MPUCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MPUCLK_OFST))
6632 
6633 #define ALT_CLKMGR_MAINPLL_MAINCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MAINCLK_OFST))
6634 
6635 #define ALT_CLKMGR_MAINPLL_DBGATCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_DBGATCLK_OFST))
6636 
6637 #define ALT_CLKMGR_MAINPLL_MAINQSPICLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MAINQSPICLK_OFST))
6638 
6639 #define ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_OFST))
6640 
6641 #define ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_OFST))
6642 
6643 #define ALT_CLKMGR_MAINPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_EN_OFST))
6644 
6645 #define ALT_CLKMGR_MAINPLL_MAINDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_MAINDIV_OFST))
6646 
6647 #define ALT_CLKMGR_MAINPLL_DBGDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_DBGDIV_OFST))
6648 
6649 #define ALT_CLKMGR_MAINPLL_TRACEDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_TRACEDIV_OFST))
6650 
6651 #define ALT_CLKMGR_MAINPLL_L4SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_L4SRC_OFST))
6652 
6653 #define ALT_CLKMGR_MAINPLL_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + ALT_CLKMGR_MAINPLL_STAT_OFST))
6654 
6655 #define ALT_CLKMGR_MAINPLL_OFST 0x40
6656 
6657 #define ALT_CLKMGR_MAINPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_MAINPLL_OFST))
6658 
6659 #define ALT_CLKMGR_MAINPLL_LB_ADDR ALT_CLKMGR_MAINPLL_ADDR
6660 
6661 #define ALT_CLKMGR_MAINPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_MAINPLL_ADDR) + 0x40) - 1))
6662 
6672 #define ALT_CLKMGR_PERPLL_VCO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_VCO_OFST))
6673 
6674 #define ALT_CLKMGR_PERPLL_MISC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_MISC_OFST))
6675 
6676 #define ALT_CLKMGR_PERPLL_EMAC0CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EMAC0CLK_OFST))
6677 
6678 #define ALT_CLKMGR_PERPLL_EMAC1CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EMAC1CLK_OFST))
6679 
6680 #define ALT_CLKMGR_PERPLL_PERQSPICLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_PERQSPICLK_OFST))
6681 
6682 #define ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_OFST))
6683 
6684 #define ALT_CLKMGR_PERPLL_PERBASECLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_PERBASECLK_OFST))
6685 
6686 #define ALT_CLKMGR_PERPLL_S2FUSER1CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_S2FUSER1CLK_OFST))
6687 
6688 #define ALT_CLKMGR_PERPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_EN_OFST))
6689 
6690 #define ALT_CLKMGR_PERPLL_DIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_DIV_OFST))
6691 
6692 #define ALT_CLKMGR_PERPLL_GPIODIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_GPIODIV_OFST))
6693 
6694 #define ALT_CLKMGR_PERPLL_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_SRC_OFST))
6695 
6696 #define ALT_CLKMGR_PERPLL_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + ALT_CLKMGR_PERPLL_STAT_OFST))
6697 
6698 #define ALT_CLKMGR_PERPLL_OFST 0x80
6699 
6700 #define ALT_CLKMGR_PERPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_PERPLL_OFST))
6701 
6702 #define ALT_CLKMGR_PERPLL_LB_ADDR ALT_CLKMGR_PERPLL_ADDR
6703 
6704 #define ALT_CLKMGR_PERPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_PERPLL_ADDR) + 0x40) - 1))
6705 
6715 #define ALT_CLKMGR_SDRPLL_VCO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_VCO_OFST))
6716 
6717 #define ALT_CLKMGR_SDRPLL_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_CTL_OFST))
6718 
6719 #define ALT_CLKMGR_SDRPLL_DDRDQSCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_DDRDQSCLK_OFST))
6720 
6721 #define ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_OFST))
6722 
6723 #define ALT_CLKMGR_SDRPLL_DDRDQCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_DDRDQCLK_OFST))
6724 
6725 #define ALT_CLKMGR_SDRPLL_S2FUSER2CLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_S2FUSER2CLK_OFST))
6726 
6727 #define ALT_CLKMGR_SDRPLL_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_EN_OFST))
6728 
6729 #define ALT_CLKMGR_SDRPLL_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + ALT_CLKMGR_SDRPLL_STAT_OFST))
6730 
6731 #define ALT_CLKMGR_SDRPLL_OFST 0xc0
6732 
6733 #define ALT_CLKMGR_SDRPLL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_SDRPLL_OFST))
6734 
6735 #define ALT_CLKMGR_SDRPLL_LB_ADDR ALT_CLKMGR_SDRPLL_ADDR
6736 
6737 #define ALT_CLKMGR_SDRPLL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_SDRPLL_ADDR) + 0x20) - 1))
6738 
6748 #define ALT_CLKMGR_MISC_MPUCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MISCGRP_ADDR) + ALT_CLKMGR_MISC_MPUCLK_OFST))
6749 
6750 #define ALT_CLKMGR_MISC_MAINCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MISCGRP_ADDR) + ALT_CLKMGR_MISC_MAINCLK_OFST))
6751 
6752 #define ALT_CLKMGR_MISC_DBGATCLK_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_MISCGRP_ADDR) + ALT_CLKMGR_MISC_DBGATCLK_OFST))
6753 
6754 #define ALT_CLKMGR_MISCGRP_OFST 0xe0
6755 
6756 #define ALT_CLKMGR_MISCGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_MISCGRP_OFST))
6757 
6758 #define ALT_CLKMGR_MISCGRP_LB_ADDR ALT_CLKMGR_MISCGRP_ADDR
6759 
6760 #define ALT_CLKMGR_MISCGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_MISCGRP_ADDR) + 0x20) - 1))
6761 
6764 #define ALT_CLKMGR_OFST 0xffd04000
6765 
6766 #define ALT_CLKMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_CLKMGR_OFST))
6767 
6768 #define ALT_CLKMGR_LB_ADDR ALT_CLKMGR_ADDR
6769 
6770 #define ALT_CLKMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_CLKMGR_ADDR) + 0x200) - 1))
6771 
6781 #define ALT_RSTMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_STAT_OFST))
6782 
6783 #define ALT_RSTMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_CTL_OFST))
6784 
6785 #define ALT_RSTMGR_COUNTS_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_COUNTS_OFST))
6786 
6787 #define ALT_RSTMGR_MPUMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MPUMODRST_OFST))
6788 
6789 #define ALT_RSTMGR_PERMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PERMODRST_OFST))
6790 
6791 #define ALT_RSTMGR_PER2MODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_PER2MODRST_OFST))
6792 
6793 #define ALT_RSTMGR_BRGMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_BRGMODRST_OFST))
6794 
6795 #define ALT_RSTMGR_MISCMODRST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_RSTMGR_ADDR) + ALT_RSTMGR_MISCMODRST_OFST))
6796 
6797 #define ALT_RSTMGR_OFST 0xffd05000
6798 
6799 #define ALT_RSTMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_RSTMGR_OFST))
6800 
6801 #define ALT_RSTMGR_LB_ADDR ALT_RSTMGR_ADDR
6802 
6803 #define ALT_RSTMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_RSTMGR_ADDR) + 0x100) - 1))
6804 
6814 #define ALT_SYSMGR_SILICONID1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SILICONID1_OFST))
6815 
6816 #define ALT_SYSMGR_SILICONID2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SILICONID2_OFST))
6817 
6818 #define ALT_SYSMGR_WDDBG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_WDDBG_OFST))
6819 
6820 #define ALT_SYSMGR_BOOT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_BOOT_OFST))
6821 
6822 #define ALT_SYSMGR_HPSINFO_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_HPSINFO_OFST))
6823 
6824 #define ALT_SYSMGR_PARITYINJ_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_PARITYINJ_OFST))
6825 
6833 #define ALT_SYSMGR_FPGAINTF_GBL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FPGAINTF_ADDR) + ALT_SYSMGR_FPGAINTF_GBL_OFST))
6834 
6835 #define ALT_SYSMGR_FPGAINTF_INDIV_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FPGAINTF_ADDR) + ALT_SYSMGR_FPGAINTF_INDIV_OFST))
6836 
6837 #define ALT_SYSMGR_FPGAINTF_MODULE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FPGAINTF_ADDR) + ALT_SYSMGR_FPGAINTF_MODULE_OFST))
6838 
6839 #define ALT_SYSMGR_FPGAINTF_OFST 0x20
6840 
6841 #define ALT_SYSMGR_FPGAINTF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FPGAINTF_OFST))
6842 
6843 #define ALT_SYSMGR_FPGAINTF_LB_ADDR ALT_SYSMGR_FPGAINTF_ADDR
6844 
6845 #define ALT_SYSMGR_FPGAINTF_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_FPGAINTF_ADDR) + 0x10) - 1))
6846 
6856 #define ALT_SYSMGR_SCANMGR_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_SCANMGR_ADDR) + ALT_SYSMGR_SCANMGR_CTL_OFST))
6857 
6858 #define ALT_SYSMGR_SCANMGR_OFST 0x30
6859 
6860 #define ALT_SYSMGR_SCANMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SCANMGR_OFST))
6861 
6862 #define ALT_SYSMGR_SCANMGR_LB_ADDR ALT_SYSMGR_SCANMGR_ADDR
6863 
6864 #define ALT_SYSMGR_SCANMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_SCANMGR_ADDR) + 0x4) - 1))
6865 
6875 #define ALT_SYSMGR_FRZCTL_VIOCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FRZCTL_ADDR) + ALT_SYSMGR_FRZCTL_VIOCTL_OFST))
6876 
6877 #define ALT_SYSMGR_FRZCTL_HIOCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FRZCTL_ADDR) + ALT_SYSMGR_FRZCTL_HIOCTL_OFST))
6878 
6879 #define ALT_SYSMGR_FRZCTL_SRC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FRZCTL_ADDR) + ALT_SYSMGR_FRZCTL_SRC_OFST))
6880 
6881 #define ALT_SYSMGR_FRZCTL_HWCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_FRZCTL_ADDR) + ALT_SYSMGR_FRZCTL_HWCTL_OFST))
6882 
6883 #define ALT_SYSMGR_FRZCTL_OFST 0x40
6884 
6885 #define ALT_SYSMGR_FRZCTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_FRZCTL_OFST))
6886 
6887 #define ALT_SYSMGR_FRZCTL_LB_ADDR ALT_SYSMGR_FRZCTL_ADDR
6888 
6889 #define ALT_SYSMGR_FRZCTL_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_FRZCTL_ADDR) + 0x20) - 1))
6890 
6900 #define ALT_SYSMGR_EMAC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_EMAC_ADDR) + ALT_SYSMGR_EMAC_CTL_OFST))
6901 
6902 #define ALT_SYSMGR_EMAC_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_EMAC_ADDR) + ALT_SYSMGR_EMAC_L3MST_OFST))
6903 
6904 #define ALT_SYSMGR_EMAC_OFST 0x60
6905 
6906 #define ALT_SYSMGR_EMAC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_EMAC_OFST))
6907 
6908 #define ALT_SYSMGR_EMAC_LB_ADDR ALT_SYSMGR_EMAC_ADDR
6909 
6910 #define ALT_SYSMGR_EMAC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_EMAC_ADDR) + 0x10) - 1))
6911 
6921 #define ALT_SYSMGR_DMA_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_DMA_ADDR) + ALT_SYSMGR_DMA_CTL_OFST))
6922 
6923 #define ALT_SYSMGR_DMA_PERSECURITY_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_DMA_ADDR) + ALT_SYSMGR_DMA_PERSECURITY_OFST))
6924 
6925 #define ALT_SYSMGR_DMA_OFST 0x70
6926 
6927 #define ALT_SYSMGR_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_DMA_OFST))
6928 
6929 #define ALT_SYSMGR_DMA_LB_ADDR ALT_SYSMGR_DMA_ADDR
6930 
6931 #define ALT_SYSMGR_DMA_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_DMA_ADDR) + 0x8) - 1))
6932 
6942 #define ALT_SYSMGR_ISW_HANDOFF_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ISW_ADDR) + ALT_SYSMGR_ISW_HANDOFF_OFST))
6943 
6944 #define ALT_SYSMGR_ISW_OFST 0x80
6945 
6946 #define ALT_SYSMGR_ISW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ISW_OFST))
6947 
6948 #define ALT_SYSMGR_ISW_LB_ADDR ALT_SYSMGR_ISW_ADDR
6949 
6950 #define ALT_SYSMGR_ISW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ISW_ADDR) + 0x20) - 1))
6951 
6961 #define ALT_SYSMGR_ROMCODE_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + ALT_SYSMGR_ROMCODE_CTL_OFST))
6962 
6963 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST))
6964 
6965 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + ALT_SYSMGR_ROMCODE_INITSWSTATE_OFST))
6966 
6967 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + ALT_SYSMGR_ROMCODE_INITSWLASTLD_OFST))
6968 
6969 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_OFST))
6970 
6978 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAM_EN_ADDR ALT_SYSMGR_ROMCODE_WARMRAM_EN_ADDR(ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR)
6979 
6980 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAM_DATASTART_ADDR ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_ADDR(ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR)
6981 
6982 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAM_LEN_ADDR ALT_SYSMGR_ROMCODE_WARMRAM_LEN_ADDR(ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR)
6983 
6984 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAM_EXECUTION_ADDR ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_ADDR(ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR)
6985 
6986 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAM_CRC_ADDR ALT_SYSMGR_ROMCODE_WARMRAM_CRC_ADDR(ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR)
6987 
6988 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_OFST 0x20
6989 
6990 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_OFST))
6991 
6992 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_LB_ADDR ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR
6993 
6994 #define ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ROMCODE_WARMRAMGRP_ADDR) + 0x20) - 1))
6995 
6998 #define ALT_SYSMGR_ROMCODE_OFST 0xc0
6999 
7000 #define ALT_SYSMGR_ROMCODE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ROMCODE_OFST))
7001 
7002 #define ALT_SYSMGR_ROMCODE_LB_ADDR ALT_SYSMGR_ROMCODE_ADDR
7003 
7004 #define ALT_SYSMGR_ROMCODE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ROMCODE_ADDR) + 0x40) - 1))
7005 
7015 #define ALT_SYSMGR_ROMHW_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ROMHW_ADDR) + ALT_SYSMGR_ROMHW_CTL_OFST))
7016 
7017 #define ALT_SYSMGR_ROMHW_OFST 0x100
7018 
7019 #define ALT_SYSMGR_ROMHW_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ROMHW_OFST))
7020 
7021 #define ALT_SYSMGR_ROMHW_LB_ADDR ALT_SYSMGR_ROMHW_ADDR
7022 
7023 #define ALT_SYSMGR_ROMHW_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ROMHW_ADDR) + 0x4) - 1))
7024 
7034 #define ALT_SYSMGR_SDMMC_CTL_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_SDMMC_ADDR) + ALT_SYSMGR_SDMMC_CTL_OFST))
7035 
7036 #define ALT_SYSMGR_SDMMC_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_SDMMC_ADDR) + ALT_SYSMGR_SDMMC_L3MST_OFST))
7037 
7038 #define ALT_SYSMGR_SDMMC_OFST 0x108
7039 
7040 #define ALT_SYSMGR_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_SDMMC_OFST))
7041 
7042 #define ALT_SYSMGR_SDMMC_LB_ADDR ALT_SYSMGR_SDMMC_ADDR
7043 
7044 #define ALT_SYSMGR_SDMMC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_SDMMC_ADDR) + 0x8) - 1))
7045 
7055 #define ALT_SYSMGR_NAND_BOOTSTRAP_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_NAND_ADDR) + ALT_SYSMGR_NAND_BOOTSTRAP_OFST))
7056 
7057 #define ALT_SYSMGR_NAND_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_NAND_ADDR) + ALT_SYSMGR_NAND_L3MST_OFST))
7058 
7059 #define ALT_SYSMGR_NAND_OFST 0x110
7060 
7061 #define ALT_SYSMGR_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_NAND_OFST))
7062 
7063 #define ALT_SYSMGR_NAND_LB_ADDR ALT_SYSMGR_NAND_ADDR
7064 
7065 #define ALT_SYSMGR_NAND_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_NAND_ADDR) + 0x8) - 1))
7066 
7076 #define ALT_SYSMGR_USB_L3MST_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_USB_ADDR) + ALT_SYSMGR_USB_L3MST_OFST))
7077 
7078 #define ALT_SYSMGR_USB_OFST 0x118
7079 
7080 #define ALT_SYSMGR_USB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_USB_OFST))
7081 
7082 #define ALT_SYSMGR_USB_LB_ADDR ALT_SYSMGR_USB_ADDR
7083 
7084 #define ALT_SYSMGR_USB_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_USB_ADDR) + 0x4) - 1))
7085 
7095 #define ALT_SYSMGR_ECC_L2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_L2_OFST))
7096 
7097 #define ALT_SYSMGR_ECC_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_OCRAM_OFST))
7098 
7099 #define ALT_SYSMGR_ECC_USB0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_USB0_OFST))
7100 
7101 #define ALT_SYSMGR_ECC_USB1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_USB1_OFST))
7102 
7103 #define ALT_SYSMGR_ECC_EMAC0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_EMAC0_OFST))
7104 
7105 #define ALT_SYSMGR_ECC_EMAC1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_EMAC1_OFST))
7106 
7107 #define ALT_SYSMGR_ECC_DMA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_DMA_OFST))
7108 
7109 #define ALT_SYSMGR_ECC_CAN0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_CAN0_OFST))
7110 
7111 #define ALT_SYSMGR_ECC_CAN1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_CAN1_OFST))
7112 
7113 #define ALT_SYSMGR_ECC_NAND_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_NAND_OFST))
7114 
7115 #define ALT_SYSMGR_ECC_QSPI_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_QSPI_OFST))
7116 
7117 #define ALT_SYSMGR_ECC_SDMMC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + ALT_SYSMGR_ECC_SDMMC_OFST))
7118 
7119 #define ALT_SYSMGR_ECC_OFST 0x140
7120 
7121 #define ALT_SYSMGR_ECC_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_ECC_OFST))
7122 
7123 #define ALT_SYSMGR_ECC_LB_ADDR ALT_SYSMGR_ECC_ADDR
7124 
7125 #define ALT_SYSMGR_ECC_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ECC_ADDR) + 0x40) - 1))
7126 
7136 #define ALT_SYSMGR_PINMUX_EMACIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO0_OFST))
7137 
7138 #define ALT_SYSMGR_PINMUX_EMACIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO1_OFST))
7139 
7140 #define ALT_SYSMGR_PINMUX_EMACIO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO2_OFST))
7141 
7142 #define ALT_SYSMGR_PINMUX_EMACIO3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO3_OFST))
7143 
7144 #define ALT_SYSMGR_PINMUX_EMACIO4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO4_OFST))
7145 
7146 #define ALT_SYSMGR_PINMUX_EMACIO5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO5_OFST))
7147 
7148 #define ALT_SYSMGR_PINMUX_EMACIO6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO6_OFST))
7149 
7150 #define ALT_SYSMGR_PINMUX_EMACIO7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO7_OFST))
7151 
7152 #define ALT_SYSMGR_PINMUX_EMACIO8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO8_OFST))
7153 
7154 #define ALT_SYSMGR_PINMUX_EMACIO9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO9_OFST))
7155 
7156 #define ALT_SYSMGR_PINMUX_EMACIO10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO10_OFST))
7157 
7158 #define ALT_SYSMGR_PINMUX_EMACIO11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO11_OFST))
7159 
7160 #define ALT_SYSMGR_PINMUX_EMACIO12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO12_OFST))
7161 
7162 #define ALT_SYSMGR_PINMUX_EMACIO13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO13_OFST))
7163 
7164 #define ALT_SYSMGR_PINMUX_EMACIO14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO14_OFST))
7165 
7166 #define ALT_SYSMGR_PINMUX_EMACIO15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO15_OFST))
7167 
7168 #define ALT_SYSMGR_PINMUX_EMACIO16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO16_OFST))
7169 
7170 #define ALT_SYSMGR_PINMUX_EMACIO17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO17_OFST))
7171 
7172 #define ALT_SYSMGR_PINMUX_EMACIO18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO18_OFST))
7173 
7174 #define ALT_SYSMGR_PINMUX_EMACIO19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_EMACIO19_OFST))
7175 
7176 #define ALT_SYSMGR_PINMUX_FLSHIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO0_OFST))
7177 
7178 #define ALT_SYSMGR_PINMUX_FLSHIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO1_OFST))
7179 
7180 #define ALT_SYSMGR_PINMUX_FLSHIO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO2_OFST))
7181 
7182 #define ALT_SYSMGR_PINMUX_FLSHIO3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO3_OFST))
7183 
7184 #define ALT_SYSMGR_PINMUX_FLSHIO4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO4_OFST))
7185 
7186 #define ALT_SYSMGR_PINMUX_FLSHIO5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO5_OFST))
7187 
7188 #define ALT_SYSMGR_PINMUX_FLSHIO6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO6_OFST))
7189 
7190 #define ALT_SYSMGR_PINMUX_FLSHIO7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO7_OFST))
7191 
7192 #define ALT_SYSMGR_PINMUX_FLSHIO8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO8_OFST))
7193 
7194 #define ALT_SYSMGR_PINMUX_FLSHIO9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO9_OFST))
7195 
7196 #define ALT_SYSMGR_PINMUX_FLSHIO10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO10_OFST))
7197 
7198 #define ALT_SYSMGR_PINMUX_FLSHIO11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_FLSHIO11_OFST))
7199 
7200 #define ALT_SYSMGR_PINMUX_GENERALIO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO0_OFST))
7201 
7202 #define ALT_SYSMGR_PINMUX_GENERALIO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO1_OFST))
7203 
7204 #define ALT_SYSMGR_PINMUX_GENERALIO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO2_OFST))
7205 
7206 #define ALT_SYSMGR_PINMUX_GENERALIO3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO3_OFST))
7207 
7208 #define ALT_SYSMGR_PINMUX_GENERALIO4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO4_OFST))
7209 
7210 #define ALT_SYSMGR_PINMUX_GENERALIO5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO5_OFST))
7211 
7212 #define ALT_SYSMGR_PINMUX_GENERALIO6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO6_OFST))
7213 
7214 #define ALT_SYSMGR_PINMUX_GENERALIO7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO7_OFST))
7215 
7216 #define ALT_SYSMGR_PINMUX_GENERALIO8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO8_OFST))
7217 
7218 #define ALT_SYSMGR_PINMUX_GENERALIO9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO9_OFST))
7219 
7220 #define ALT_SYSMGR_PINMUX_GENERALIO10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO10_OFST))
7221 
7222 #define ALT_SYSMGR_PINMUX_GENERALIO11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO11_OFST))
7223 
7224 #define ALT_SYSMGR_PINMUX_GENERALIO12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO12_OFST))
7225 
7226 #define ALT_SYSMGR_PINMUX_GENERALIO13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO13_OFST))
7227 
7228 #define ALT_SYSMGR_PINMUX_GENERALIO14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO14_OFST))
7229 
7230 #define ALT_SYSMGR_PINMUX_GENERALIO15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO15_OFST))
7231 
7232 #define ALT_SYSMGR_PINMUX_GENERALIO16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO16_OFST))
7233 
7234 #define ALT_SYSMGR_PINMUX_GENERALIO17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO17_OFST))
7235 
7236 #define ALT_SYSMGR_PINMUX_GENERALIO18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO18_OFST))
7237 
7238 #define ALT_SYSMGR_PINMUX_GENERALIO19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO19_OFST))
7239 
7240 #define ALT_SYSMGR_PINMUX_GENERALIO20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO20_OFST))
7241 
7242 #define ALT_SYSMGR_PINMUX_GENERALIO21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO21_OFST))
7243 
7244 #define ALT_SYSMGR_PINMUX_GENERALIO22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO22_OFST))
7245 
7246 #define ALT_SYSMGR_PINMUX_GENERALIO23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO23_OFST))
7247 
7248 #define ALT_SYSMGR_PINMUX_GENERALIO24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO24_OFST))
7249 
7250 #define ALT_SYSMGR_PINMUX_GENERALIO25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO25_OFST))
7251 
7252 #define ALT_SYSMGR_PINMUX_GENERALIO26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO26_OFST))
7253 
7254 #define ALT_SYSMGR_PINMUX_GENERALIO27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO27_OFST))
7255 
7256 #define ALT_SYSMGR_PINMUX_GENERALIO28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO28_OFST))
7257 
7258 #define ALT_SYSMGR_PINMUX_GENERALIO29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO29_OFST))
7259 
7260 #define ALT_SYSMGR_PINMUX_GENERALIO30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO30_OFST))
7261 
7262 #define ALT_SYSMGR_PINMUX_GENERALIO31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GENERALIO31_OFST))
7263 
7264 #define ALT_SYSMGR_PINMUX_MIXED1IO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO0_OFST))
7265 
7266 #define ALT_SYSMGR_PINMUX_MIXED1IO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO1_OFST))
7267 
7268 #define ALT_SYSMGR_PINMUX_MIXED1IO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO2_OFST))
7269 
7270 #define ALT_SYSMGR_PINMUX_MIXED1IO3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO3_OFST))
7271 
7272 #define ALT_SYSMGR_PINMUX_MIXED1IO4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO4_OFST))
7273 
7274 #define ALT_SYSMGR_PINMUX_MIXED1IO5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO5_OFST))
7275 
7276 #define ALT_SYSMGR_PINMUX_MIXED1IO6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO6_OFST))
7277 
7278 #define ALT_SYSMGR_PINMUX_MIXED1IO7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO7_OFST))
7279 
7280 #define ALT_SYSMGR_PINMUX_MIXED1IO8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO8_OFST))
7281 
7282 #define ALT_SYSMGR_PINMUX_MIXED1IO9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO9_OFST))
7283 
7284 #define ALT_SYSMGR_PINMUX_MIXED1IO10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO10_OFST))
7285 
7286 #define ALT_SYSMGR_PINMUX_MIXED1IO11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO11_OFST))
7287 
7288 #define ALT_SYSMGR_PINMUX_MIXED1IO12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO12_OFST))
7289 
7290 #define ALT_SYSMGR_PINMUX_MIXED1IO13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO13_OFST))
7291 
7292 #define ALT_SYSMGR_PINMUX_MIXED1IO14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO14_OFST))
7293 
7294 #define ALT_SYSMGR_PINMUX_MIXED1IO15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO15_OFST))
7295 
7296 #define ALT_SYSMGR_PINMUX_MIXED1IO16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO16_OFST))
7297 
7298 #define ALT_SYSMGR_PINMUX_MIXED1IO17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO17_OFST))
7299 
7300 #define ALT_SYSMGR_PINMUX_MIXED1IO18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO18_OFST))
7301 
7302 #define ALT_SYSMGR_PINMUX_MIXED1IO19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO19_OFST))
7303 
7304 #define ALT_SYSMGR_PINMUX_MIXED1IO20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO20_OFST))
7305 
7306 #define ALT_SYSMGR_PINMUX_MIXED1IO21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED1IO21_OFST))
7307 
7308 #define ALT_SYSMGR_PINMUX_MIXED2IO0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO0_OFST))
7309 
7310 #define ALT_SYSMGR_PINMUX_MIXED2IO1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO1_OFST))
7311 
7312 #define ALT_SYSMGR_PINMUX_MIXED2IO2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO2_OFST))
7313 
7314 #define ALT_SYSMGR_PINMUX_MIXED2IO3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO3_OFST))
7315 
7316 #define ALT_SYSMGR_PINMUX_MIXED2IO4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO4_OFST))
7317 
7318 #define ALT_SYSMGR_PINMUX_MIXED2IO5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO5_OFST))
7319 
7320 #define ALT_SYSMGR_PINMUX_MIXED2IO6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO6_OFST))
7321 
7322 #define ALT_SYSMGR_PINMUX_MIXED2IO7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_MIXED2IO7_OFST))
7323 
7324 #define ALT_SYSMGR_PINMUX_GPLINMUX48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX48_OFST))
7325 
7326 #define ALT_SYSMGR_PINMUX_GPLINMUX49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX49_OFST))
7327 
7328 #define ALT_SYSMGR_PINMUX_GPLINMUX50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX50_OFST))
7329 
7330 #define ALT_SYSMGR_PINMUX_GPLINMUX51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX51_OFST))
7331 
7332 #define ALT_SYSMGR_PINMUX_GPLINMUX52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX52_OFST))
7333 
7334 #define ALT_SYSMGR_PINMUX_GPLINMUX53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX53_OFST))
7335 
7336 #define ALT_SYSMGR_PINMUX_GPLINMUX54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX54_OFST))
7337 
7338 #define ALT_SYSMGR_PINMUX_GPLINMUX55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX55_OFST))
7339 
7340 #define ALT_SYSMGR_PINMUX_GPLINMUX56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX56_OFST))
7341 
7342 #define ALT_SYSMGR_PINMUX_GPLINMUX57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX57_OFST))
7343 
7344 #define ALT_SYSMGR_PINMUX_GPLINMUX58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX58_OFST))
7345 
7346 #define ALT_SYSMGR_PINMUX_GPLINMUX59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX59_OFST))
7347 
7348 #define ALT_SYSMGR_PINMUX_GPLINMUX60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX60_OFST))
7349 
7350 #define ALT_SYSMGR_PINMUX_GPLINMUX61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX61_OFST))
7351 
7352 #define ALT_SYSMGR_PINMUX_GPLINMUX62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX62_OFST))
7353 
7354 #define ALT_SYSMGR_PINMUX_GPLINMUX63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX63_OFST))
7355 
7356 #define ALT_SYSMGR_PINMUX_GPLINMUX64_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX64_OFST))
7357 
7358 #define ALT_SYSMGR_PINMUX_GPLINMUX65_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX65_OFST))
7359 
7360 #define ALT_SYSMGR_PINMUX_GPLINMUX66_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX66_OFST))
7361 
7362 #define ALT_SYSMGR_PINMUX_GPLINMUX67_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX67_OFST))
7363 
7364 #define ALT_SYSMGR_PINMUX_GPLINMUX68_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX68_OFST))
7365 
7366 #define ALT_SYSMGR_PINMUX_GPLINMUX69_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX69_OFST))
7367 
7368 #define ALT_SYSMGR_PINMUX_GPLINMUX70_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLINMUX70_OFST))
7369 
7370 #define ALT_SYSMGR_PINMUX_GPLMUX0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX0_OFST))
7371 
7372 #define ALT_SYSMGR_PINMUX_GPLMUX1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX1_OFST))
7373 
7374 #define ALT_SYSMGR_PINMUX_GPLMUX2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX2_OFST))
7375 
7376 #define ALT_SYSMGR_PINMUX_GPLMUX3_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX3_OFST))
7377 
7378 #define ALT_SYSMGR_PINMUX_GPLMUX4_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX4_OFST))
7379 
7380 #define ALT_SYSMGR_PINMUX_GPLMUX5_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX5_OFST))
7381 
7382 #define ALT_SYSMGR_PINMUX_GPLMUX6_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX6_OFST))
7383 
7384 #define ALT_SYSMGR_PINMUX_GPLMUX7_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX7_OFST))
7385 
7386 #define ALT_SYSMGR_PINMUX_GPLMUX8_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX8_OFST))
7387 
7388 #define ALT_SYSMGR_PINMUX_GPLMUX9_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX9_OFST))
7389 
7390 #define ALT_SYSMGR_PINMUX_GPLMUX10_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX10_OFST))
7391 
7392 #define ALT_SYSMGR_PINMUX_GPLMUX11_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX11_OFST))
7393 
7394 #define ALT_SYSMGR_PINMUX_GPLMUX12_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX12_OFST))
7395 
7396 #define ALT_SYSMGR_PINMUX_GPLMUX13_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX13_OFST))
7397 
7398 #define ALT_SYSMGR_PINMUX_GPLMUX14_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX14_OFST))
7399 
7400 #define ALT_SYSMGR_PINMUX_GPLMUX15_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX15_OFST))
7401 
7402 #define ALT_SYSMGR_PINMUX_GPLMUX16_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX16_OFST))
7403 
7404 #define ALT_SYSMGR_PINMUX_GPLMUX17_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX17_OFST))
7405 
7406 #define ALT_SYSMGR_PINMUX_GPLMUX18_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX18_OFST))
7407 
7408 #define ALT_SYSMGR_PINMUX_GPLMUX19_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX19_OFST))
7409 
7410 #define ALT_SYSMGR_PINMUX_GPLMUX20_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX20_OFST))
7411 
7412 #define ALT_SYSMGR_PINMUX_GPLMUX21_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX21_OFST))
7413 
7414 #define ALT_SYSMGR_PINMUX_GPLMUX22_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX22_OFST))
7415 
7416 #define ALT_SYSMGR_PINMUX_GPLMUX23_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX23_OFST))
7417 
7418 #define ALT_SYSMGR_PINMUX_GPLMUX24_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX24_OFST))
7419 
7420 #define ALT_SYSMGR_PINMUX_GPLMUX25_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX25_OFST))
7421 
7422 #define ALT_SYSMGR_PINMUX_GPLMUX26_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX26_OFST))
7423 
7424 #define ALT_SYSMGR_PINMUX_GPLMUX27_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX27_OFST))
7425 
7426 #define ALT_SYSMGR_PINMUX_GPLMUX28_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX28_OFST))
7427 
7428 #define ALT_SYSMGR_PINMUX_GPLMUX29_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX29_OFST))
7429 
7430 #define ALT_SYSMGR_PINMUX_GPLMUX30_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX30_OFST))
7431 
7432 #define ALT_SYSMGR_PINMUX_GPLMUX31_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX31_OFST))
7433 
7434 #define ALT_SYSMGR_PINMUX_GPLMUX32_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX32_OFST))
7435 
7436 #define ALT_SYSMGR_PINMUX_GPLMUX33_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX33_OFST))
7437 
7438 #define ALT_SYSMGR_PINMUX_GPLMUX34_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX34_OFST))
7439 
7440 #define ALT_SYSMGR_PINMUX_GPLMUX35_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX35_OFST))
7441 
7442 #define ALT_SYSMGR_PINMUX_GPLMUX36_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX36_OFST))
7443 
7444 #define ALT_SYSMGR_PINMUX_GPLMUX37_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX37_OFST))
7445 
7446 #define ALT_SYSMGR_PINMUX_GPLMUX38_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX38_OFST))
7447 
7448 #define ALT_SYSMGR_PINMUX_GPLMUX39_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX39_OFST))
7449 
7450 #define ALT_SYSMGR_PINMUX_GPLMUX40_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX40_OFST))
7451 
7452 #define ALT_SYSMGR_PINMUX_GPLMUX41_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX41_OFST))
7453 
7454 #define ALT_SYSMGR_PINMUX_GPLMUX42_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX42_OFST))
7455 
7456 #define ALT_SYSMGR_PINMUX_GPLMUX43_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX43_OFST))
7457 
7458 #define ALT_SYSMGR_PINMUX_GPLMUX44_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX44_OFST))
7459 
7460 #define ALT_SYSMGR_PINMUX_GPLMUX45_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX45_OFST))
7461 
7462 #define ALT_SYSMGR_PINMUX_GPLMUX46_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX46_OFST))
7463 
7464 #define ALT_SYSMGR_PINMUX_GPLMUX47_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX47_OFST))
7465 
7466 #define ALT_SYSMGR_PINMUX_GPLMUX48_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX48_OFST))
7467 
7468 #define ALT_SYSMGR_PINMUX_GPLMUX49_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX49_OFST))
7469 
7470 #define ALT_SYSMGR_PINMUX_GPLMUX50_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX50_OFST))
7471 
7472 #define ALT_SYSMGR_PINMUX_GPLMUX51_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX51_OFST))
7473 
7474 #define ALT_SYSMGR_PINMUX_GPLMUX52_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX52_OFST))
7475 
7476 #define ALT_SYSMGR_PINMUX_GPLMUX53_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX53_OFST))
7477 
7478 #define ALT_SYSMGR_PINMUX_GPLMUX54_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX54_OFST))
7479 
7480 #define ALT_SYSMGR_PINMUX_GPLMUX55_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX55_OFST))
7481 
7482 #define ALT_SYSMGR_PINMUX_GPLMUX56_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX56_OFST))
7483 
7484 #define ALT_SYSMGR_PINMUX_GPLMUX57_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX57_OFST))
7485 
7486 #define ALT_SYSMGR_PINMUX_GPLMUX58_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX58_OFST))
7487 
7488 #define ALT_SYSMGR_PINMUX_GPLMUX59_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX59_OFST))
7489 
7490 #define ALT_SYSMGR_PINMUX_GPLMUX60_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX60_OFST))
7491 
7492 #define ALT_SYSMGR_PINMUX_GPLMUX61_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX61_OFST))
7493 
7494 #define ALT_SYSMGR_PINMUX_GPLMUX62_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX62_OFST))
7495 
7496 #define ALT_SYSMGR_PINMUX_GPLMUX63_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX63_OFST))
7497 
7498 #define ALT_SYSMGR_PINMUX_GPLMUX64_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX64_OFST))
7499 
7500 #define ALT_SYSMGR_PINMUX_GPLMUX65_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX65_OFST))
7501 
7502 #define ALT_SYSMGR_PINMUX_GPLMUX66_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX66_OFST))
7503 
7504 #define ALT_SYSMGR_PINMUX_GPLMUX67_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX67_OFST))
7505 
7506 #define ALT_SYSMGR_PINMUX_GPLMUX68_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX68_OFST))
7507 
7508 #define ALT_SYSMGR_PINMUX_GPLMUX69_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX69_OFST))
7509 
7510 #define ALT_SYSMGR_PINMUX_GPLMUX70_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_GPLMUX70_OFST))
7511 
7512 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_NANDUSEFPGA_OFST))
7513 
7514 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_RGMII1USEFPGA_OFST))
7515 
7516 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_I2C0USEFPGA_OFST))
7517 
7518 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_RGMII0USEFPGA_OFST))
7519 
7520 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_I2C3USEFPGA_OFST))
7521 
7522 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_I2C2USEFPGA_OFST))
7523 
7524 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_I2C1USEFPGA_OFST))
7525 
7526 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_SPIM1USEFPGA_OFST))
7527 
7528 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + ALT_SYSMGR_PINMUX_SPIM0USEFPGA_OFST))
7529 
7530 #define ALT_SYSMGR_PINMUX_OFST 0x400
7531 
7532 #define ALT_SYSMGR_PINMUX_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SYSMGR_ADDR) + ALT_SYSMGR_PINMUX_OFST))
7533 
7534 #define ALT_SYSMGR_PINMUX_LB_ADDR ALT_SYSMGR_PINMUX_ADDR
7535 
7536 #define ALT_SYSMGR_PINMUX_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_PINMUX_ADDR) + 0x400) - 1))
7537 
7540 #define ALT_SYSMGR_OFST 0xffd08000
7541 
7542 #define ALT_SYSMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SYSMGR_OFST))
7543 
7544 #define ALT_SYSMGR_LB_ADDR ALT_SYSMGR_ADDR
7545 
7546 #define ALT_SYSMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SYSMGR_ADDR) + 0x4000) - 1))
7547 
7557 #define ALT_DMANONSECURE_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_DMANONSECURE_ADDR) + ALT_DMANONSECURE_REG_OFST))
7558 
7559 #define ALT_DMANONSECURE_OFST 0xffe00000
7560 
7561 #define ALT_DMANONSECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMANONSECURE_OFST))
7562 
7563 #define ALT_DMANONSECURE_LB_ADDR ALT_DMANONSECURE_ADDR
7564 
7565 #define ALT_DMANONSECURE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMANONSECURE_ADDR) + 0x4) - 1))
7566 
7576 #define ALT_DMASECURE_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_DMASECURE_ADDR) + ALT_DMASECURE_REG_OFST))
7577 
7578 #define ALT_DMASECURE_OFST 0xffe01000
7579 
7580 #define ALT_DMASECURE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_DMASECURE_OFST))
7581 
7582 #define ALT_DMASECURE_LB_ADDR ALT_DMASECURE_ADDR
7583 
7584 #define ALT_DMASECURE_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_DMASECURE_ADDR) + 0x4) - 1))
7585 
7595 #define ALT_SPIS0_CTLR0_ADDR ALT_SPIS_CTLR0_ADDR(ALT_SPIS0_ADDR)
7596 
7597 #define ALT_SPIS0_SPIENR_ADDR ALT_SPIS_SPIENR_ADDR(ALT_SPIS0_ADDR)
7598 
7599 #define ALT_SPIS0_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS0_ADDR)
7600 
7601 #define ALT_SPIS0_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS0_ADDR)
7602 
7603 #define ALT_SPIS0_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS0_ADDR)
7604 
7605 #define ALT_SPIS0_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS0_ADDR)
7606 
7607 #define ALT_SPIS0_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS0_ADDR)
7608 
7609 #define ALT_SPIS0_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS0_ADDR)
7610 
7611 #define ALT_SPIS0_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS0_ADDR)
7612 
7613 #define ALT_SPIS0_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS0_ADDR)
7614 
7615 #define ALT_SPIS0_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS0_ADDR)
7616 
7617 #define ALT_SPIS0_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS0_ADDR)
7618 
7619 #define ALT_SPIS0_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS0_ADDR)
7620 
7621 #define ALT_SPIS0_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS0_ADDR)
7622 
7623 #define ALT_SPIS0_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS0_ADDR)
7624 
7625 #define ALT_SPIS0_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS0_ADDR)
7626 
7627 #define ALT_SPIS0_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS0_ADDR)
7628 
7629 #define ALT_SPIS0_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS0_ADDR)
7630 
7631 #define ALT_SPIS0_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS0_ADDR)
7632 
7633 #define ALT_SPIS0_SPI_VER_ID_ADDR ALT_SPIS_SPI_VER_ID_ADDR(ALT_SPIS0_ADDR)
7634 
7635 #define ALT_SPIS0_DR_ADDR ALT_SPIS_DR_ADDR(ALT_SPIS0_ADDR)
7636 
7637 #define ALT_SPIS0_OFST 0xffe02000
7638 
7639 #define ALT_SPIS0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS0_OFST))
7640 
7641 #define ALT_SPIS0_LB_ADDR ALT_SPIS0_ADDR
7642 
7643 #define ALT_SPIS0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS0_ADDR) + 0x80) - 1))
7644 
7654 #define ALT_SPIS1_CTLR0_ADDR ALT_SPIS_CTLR0_ADDR(ALT_SPIS1_ADDR)
7655 
7656 #define ALT_SPIS1_SPIENR_ADDR ALT_SPIS_SPIENR_ADDR(ALT_SPIS1_ADDR)
7657 
7658 #define ALT_SPIS1_MWCR_ADDR ALT_SPIS_MWCR_ADDR(ALT_SPIS1_ADDR)
7659 
7660 #define ALT_SPIS1_TXFTLR_ADDR ALT_SPIS_TXFTLR_ADDR(ALT_SPIS1_ADDR)
7661 
7662 #define ALT_SPIS1_RXFTLR_ADDR ALT_SPIS_RXFTLR_ADDR(ALT_SPIS1_ADDR)
7663 
7664 #define ALT_SPIS1_TXFLR_ADDR ALT_SPIS_TXFLR_ADDR(ALT_SPIS1_ADDR)
7665 
7666 #define ALT_SPIS1_RXFLR_ADDR ALT_SPIS_RXFLR_ADDR(ALT_SPIS1_ADDR)
7667 
7668 #define ALT_SPIS1_SR_ADDR ALT_SPIS_SR_ADDR(ALT_SPIS1_ADDR)
7669 
7670 #define ALT_SPIS1_IMR_ADDR ALT_SPIS_IMR_ADDR(ALT_SPIS1_ADDR)
7671 
7672 #define ALT_SPIS1_ISR_ADDR ALT_SPIS_ISR_ADDR(ALT_SPIS1_ADDR)
7673 
7674 #define ALT_SPIS1_RISR_ADDR ALT_SPIS_RISR_ADDR(ALT_SPIS1_ADDR)
7675 
7676 #define ALT_SPIS1_TXOICR_ADDR ALT_SPIS_TXOICR_ADDR(ALT_SPIS1_ADDR)
7677 
7678 #define ALT_SPIS1_RXOICR_ADDR ALT_SPIS_RXOICR_ADDR(ALT_SPIS1_ADDR)
7679 
7680 #define ALT_SPIS1_RXUICR_ADDR ALT_SPIS_RXUICR_ADDR(ALT_SPIS1_ADDR)
7681 
7682 #define ALT_SPIS1_ICR_ADDR ALT_SPIS_ICR_ADDR(ALT_SPIS1_ADDR)
7683 
7684 #define ALT_SPIS1_DMACR_ADDR ALT_SPIS_DMACR_ADDR(ALT_SPIS1_ADDR)
7685 
7686 #define ALT_SPIS1_DMATDLR_ADDR ALT_SPIS_DMATDLR_ADDR(ALT_SPIS1_ADDR)
7687 
7688 #define ALT_SPIS1_DMARDLR_ADDR ALT_SPIS_DMARDLR_ADDR(ALT_SPIS1_ADDR)
7689 
7690 #define ALT_SPIS1_IDR_ADDR ALT_SPIS_IDR_ADDR(ALT_SPIS1_ADDR)
7691 
7692 #define ALT_SPIS1_SPI_VER_ID_ADDR ALT_SPIS_SPI_VER_ID_ADDR(ALT_SPIS1_ADDR)
7693 
7694 #define ALT_SPIS1_DR_ADDR ALT_SPIS_DR_ADDR(ALT_SPIS1_ADDR)
7695 
7696 #define ALT_SPIS1_OFST 0xffe03000
7697 
7698 #define ALT_SPIS1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIS1_OFST))
7699 
7700 #define ALT_SPIS1_LB_ADDR ALT_SPIS1_ADDR
7701 
7702 #define ALT_SPIS1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIS1_ADDR) + 0x80) - 1))
7703 
7713 #define ALT_SPIM0_CTLR0_ADDR ALT_SPIM_CTLR0_ADDR(ALT_SPIM0_ADDR)
7714 
7715 #define ALT_SPIM0_CTLR1_ADDR ALT_SPIM_CTLR1_ADDR(ALT_SPIM0_ADDR)
7716 
7717 #define ALT_SPIM0_SPIENR_ADDR ALT_SPIM_SPIENR_ADDR(ALT_SPIM0_ADDR)
7718 
7719 #define ALT_SPIM0_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM0_ADDR)
7720 
7721 #define ALT_SPIM0_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM0_ADDR)
7722 
7723 #define ALT_SPIM0_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM0_ADDR)
7724 
7725 #define ALT_SPIM0_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM0_ADDR)
7726 
7727 #define ALT_SPIM0_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM0_ADDR)
7728 
7729 #define ALT_SPIM0_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM0_ADDR)
7730 
7731 #define ALT_SPIM0_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM0_ADDR)
7732 
7733 #define ALT_SPIM0_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM0_ADDR)
7734 
7735 #define ALT_SPIM0_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM0_ADDR)
7736 
7737 #define ALT_SPIM0_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM0_ADDR)
7738 
7739 #define ALT_SPIM0_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM0_ADDR)
7740 
7741 #define ALT_SPIM0_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM0_ADDR)
7742 
7743 #define ALT_SPIM0_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM0_ADDR)
7744 
7745 #define ALT_SPIM0_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM0_ADDR)
7746 
7747 #define ALT_SPIM0_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM0_ADDR)
7748 
7749 #define ALT_SPIM0_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM0_ADDR)
7750 
7751 #define ALT_SPIM0_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM0_ADDR)
7752 
7753 #define ALT_SPIM0_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM0_ADDR)
7754 
7755 #define ALT_SPIM0_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM0_ADDR)
7756 
7757 #define ALT_SPIM0_SPI_VER_ID_ADDR ALT_SPIM_SPI_VER_ID_ADDR(ALT_SPIM0_ADDR)
7758 
7759 #define ALT_SPIM0_DR_ADDR ALT_SPIM_DR_ADDR(ALT_SPIM0_ADDR)
7760 
7761 #define ALT_SPIM0_RX_SMPL_DLY_ADDR ALT_SPIM_RX_SMPL_DLY_ADDR(ALT_SPIM0_ADDR)
7762 
7763 #define ALT_SPIM0_OFST 0xfff00000
7764 
7765 #define ALT_SPIM0_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM0_OFST))
7766 
7767 #define ALT_SPIM0_LB_ADDR ALT_SPIM0_ADDR
7768 
7769 #define ALT_SPIM0_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM0_ADDR) + 0x100) - 1))
7770 
7780 #define ALT_SPIM1_CTLR0_ADDR ALT_SPIM_CTLR0_ADDR(ALT_SPIM1_ADDR)
7781 
7782 #define ALT_SPIM1_CTLR1_ADDR ALT_SPIM_CTLR1_ADDR(ALT_SPIM1_ADDR)
7783 
7784 #define ALT_SPIM1_SPIENR_ADDR ALT_SPIM_SPIENR_ADDR(ALT_SPIM1_ADDR)
7785 
7786 #define ALT_SPIM1_MWCR_ADDR ALT_SPIM_MWCR_ADDR(ALT_SPIM1_ADDR)
7787 
7788 #define ALT_SPIM1_SER_ADDR ALT_SPIM_SER_ADDR(ALT_SPIM1_ADDR)
7789 
7790 #define ALT_SPIM1_BAUDR_ADDR ALT_SPIM_BAUDR_ADDR(ALT_SPIM1_ADDR)
7791 
7792 #define ALT_SPIM1_TXFTLR_ADDR ALT_SPIM_TXFTLR_ADDR(ALT_SPIM1_ADDR)
7793 
7794 #define ALT_SPIM1_RXFTLR_ADDR ALT_SPIM_RXFTLR_ADDR(ALT_SPIM1_ADDR)
7795 
7796 #define ALT_SPIM1_TXFLR_ADDR ALT_SPIM_TXFLR_ADDR(ALT_SPIM1_ADDR)
7797 
7798 #define ALT_SPIM1_RXFLR_ADDR ALT_SPIM_RXFLR_ADDR(ALT_SPIM1_ADDR)
7799 
7800 #define ALT_SPIM1_SR_ADDR ALT_SPIM_SR_ADDR(ALT_SPIM1_ADDR)
7801 
7802 #define ALT_SPIM1_IMR_ADDR ALT_SPIM_IMR_ADDR(ALT_SPIM1_ADDR)
7803 
7804 #define ALT_SPIM1_ISR_ADDR ALT_SPIM_ISR_ADDR(ALT_SPIM1_ADDR)
7805 
7806 #define ALT_SPIM1_RISR_ADDR ALT_SPIM_RISR_ADDR(ALT_SPIM1_ADDR)
7807 
7808 #define ALT_SPIM1_TXOICR_ADDR ALT_SPIM_TXOICR_ADDR(ALT_SPIM1_ADDR)
7809 
7810 #define ALT_SPIM1_RXOICR_ADDR ALT_SPIM_RXOICR_ADDR(ALT_SPIM1_ADDR)
7811 
7812 #define ALT_SPIM1_RXUICR_ADDR ALT_SPIM_RXUICR_ADDR(ALT_SPIM1_ADDR)
7813 
7814 #define ALT_SPIM1_ICR_ADDR ALT_SPIM_ICR_ADDR(ALT_SPIM1_ADDR)
7815 
7816 #define ALT_SPIM1_DMACR_ADDR ALT_SPIM_DMACR_ADDR(ALT_SPIM1_ADDR)
7817 
7818 #define ALT_SPIM1_DMATDLR_ADDR ALT_SPIM_DMATDLR_ADDR(ALT_SPIM1_ADDR)
7819 
7820 #define ALT_SPIM1_DMARDLR_ADDR ALT_SPIM_DMARDLR_ADDR(ALT_SPIM1_ADDR)
7821 
7822 #define ALT_SPIM1_IDR_ADDR ALT_SPIM_IDR_ADDR(ALT_SPIM1_ADDR)
7823 
7824 #define ALT_SPIM1_SPI_VER_ID_ADDR ALT_SPIM_SPI_VER_ID_ADDR(ALT_SPIM1_ADDR)
7825 
7826 #define ALT_SPIM1_DR_ADDR ALT_SPIM_DR_ADDR(ALT_SPIM1_ADDR)
7827 
7828 #define ALT_SPIM1_RX_SMPL_DLY_ADDR ALT_SPIM_RX_SMPL_DLY_ADDR(ALT_SPIM1_ADDR)
7829 
7830 #define ALT_SPIM1_OFST 0xfff01000
7831 
7832 #define ALT_SPIM1_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SPIM1_OFST))
7833 
7834 #define ALT_SPIM1_LB_ADDR ALT_SPIM1_ADDR
7835 
7836 #define ALT_SPIM1_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SPIM1_ADDR) + 0x100) - 1))
7837 
7847 #define ALT_SCANMGR_STAT_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SCANMGR_ADDR) + ALT_SCANMGR_STAT_OFST))
7848 
7849 #define ALT_SCANMGR_EN_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SCANMGR_ADDR) + ALT_SCANMGR_EN_OFST))
7850 
7851 #define ALT_SCANMGR_FIFOSINGLEBYTE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SCANMGR_ADDR) + ALT_SCANMGR_FIFOSINGLEBYTE_OFST))
7852 
7853 #define ALT_SCANMGR_FIFODOUBLEBYTE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SCANMGR_ADDR) + ALT_SCANMGR_FIFODOUBLEBYTE_OFST))
7854 
7855 #define ALT_SCANMGR_FIFOTRIPLEBYTE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SCANMGR_ADDR) + ALT_SCANMGR_FIFOTRIPLEBYTE_OFST))
7856 
7857 #define ALT_SCANMGR_FIFOQUADBYTE_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_SCANMGR_ADDR) + ALT_SCANMGR_FIFOQUADBYTE_OFST))
7858 
7859 #define ALT_SCANMGR_OFST 0xfff02000
7860 
7861 #define ALT_SCANMGR_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_SCANMGR_OFST))
7862 
7863 #define ALT_SCANMGR_LB_ADDR ALT_SCANMGR_ADDR
7864 
7865 #define ALT_SCANMGR_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_SCANMGR_ADDR) + 0x20) - 1))
7866 
7876 #define ALT_ROM_OFST 0xfffd0000
7877 
7878 #define ALT_ROM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_ROM_OFST))
7879 
7880 #define ALT_ROM_LB_ADDR ALT_ROM_ADDR
7881 
7882 #define ALT_ROM_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_ROM_ADDR) + 0x10000) - 1))
7883 
7893 #define ALT_MPUSCU_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPUSCU_ADDR) + ALT_MPUSCU_REG_OFST))
7894 
7895 #define ALT_MPUSCU_OFST 0xfffec000
7896 
7897 #define ALT_MPUSCU_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPUSCU_OFST))
7898 
7899 #define ALT_MPUSCU_LB_ADDR ALT_MPUSCU_ADDR
7900 
7901 #define ALT_MPUSCU_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPUSCU_ADDR) + 0x4) - 1))
7902 
7912 #define ALT_MPUL2_REG_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_MPUL2_ADDR) + ALT_MPUL2_REG_OFST))
7913 
7914 #define ALT_MPUL2_OFST 0xfffef000
7915 
7916 #define ALT_MPUL2_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_MPUL2_OFST))
7917 
7918 #define ALT_MPUL2_LB_ADDR ALT_MPUL2_ADDR
7919 
7920 #define ALT_MPUL2_UB_ADDR ALT_CAST(void *, ((ALT_CAST(char *, ALT_MPUL2_ADDR) + 0x4) - 1))
7921 
7931 #define ALT_OCRAM_OFST 0xffff0000
7932 
7933 #define ALT_OCRAM_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_HPS_ADDR) + ALT_OCRAM_OFST))
7934 
7935 #define ALT_OCRAM_LB_ADDR ALT_OCRAM_ADDR
7936 
7937 #define ALT_OCRAM_UB_ADDR ALT_CAST(void *, (ALT_CAST(char *, ALT_OCRAM_ADDR) + 0xffff))
7938 
8042 #ifdef __ASSEMBLY__
8043 #define ALT_CAST(type, ptr) ptr
8044 #else /* __ASSEMBLY__ */
8045 #define ALT_CAST(type, ptr) ((type) (ptr))
8046 #endif /* __ASSEMBLY__ */
8047 #ifdef __cplusplus
8048 }
8049 #endif /* __cplusplus */
8050 #endif /* __ALTERA_HPS_H__ */
8051