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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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MPU L2 cache controller Module Address Space
Address space allocated to the MPU L2 cache controller. For detailed information about the use of this address space, [url=http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246e/index.html]click here[/url] to access the ARM documentation for the L2C-301.
Members | |
Register : Empty - reg | |
Data Structures | |
struct | ALT_MPUL2_s |
struct | ALT_MPUL2_raw_s |
Typedefs | |
typedef struct ALT_MPUL2_s | ALT_MPUL2_t |
typedef struct ALT_MPUL2_raw_s | ALT_MPUL2_raw_t |
struct ALT_MPUL2_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register group ALT_MPUL2.
Data Fields | ||
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volatile ALT_MPUL2_REG_t | reg | ALT_MPUL2_REG |
struct ALT_MPUL2_raw_s |
The struct declaration for the raw register contents of register group ALT_MPUL2.
Data Fields | ||
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volatile uint32_t | reg | ALT_MPUL2_REG |
typedef struct ALT_MPUL2_s ALT_MPUL2_t |
The typedef declaration for register group ALT_MPUL2.
typedef struct ALT_MPUL2_raw_s ALT_MPUL2_raw_t |
The typedef declaration for the raw register contents of register group ALT_MPUL2.