Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : Peripheral 2 Module Reset Register - per2modrst

Description

The PER2MODRST register is used by software to trigger module resets (individual module reset signals). Software explicitly asserts and de-asserts module reset signals by writing bits in the appropriate *MODRST register. It is up to software to ensure module reset signals are asserted for the appropriate length of time and are de-asserted in the correct order. It is also up to software to not assert a module reset signal that would prevent software from de-asserting the module reset signal. For example, software should not assert the module reset to the CPU executing the software.

Software writes a bit to 1 to assert the module reset signal and to 0 to de- assert the module reset signal.

All fields are reset by a cold reset.All fields are also reset by a warm reset if not masked by the corresponding PERWARMMASK field.

The reset value of all fields is 1. This holds the corresponding module in reset until software is ready to release the module from reset by writing 0 to its field.

Register Layout

Bits Access Reset Description
[0] RW 0x1 FPGA DMA0
[1] RW 0x1 FPGA DMA1
[2] RW 0x1 FPGA DMA2
[3] RW 0x1 FPGA DMA3
[4] RW 0x1 FPGA DMA4
[5] RW 0x1 FPGA DMA5
[6] RW 0x1 FPGA DMA6
[7] RW 0x1 FPGA DMA7
[31:8] ??? 0x0 UNDEFINED

Field : FPGA DMA0 - dmaif0

Resets DMA channel 0 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF0_LSB   0
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_MSB   0
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_SET_MSK   0x00000001
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_CLR_MSK   0xfffffffe
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF0_SET(value)   (((value) << 0) & 0x00000001)
 

Field : FPGA DMA1 - dmaif1

Resets DMA channel 1 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF1_LSB   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_MSB   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_SET_MSK   0x00000002
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_CLR_MSK   0xfffffffd
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF1_SET(value)   (((value) << 1) & 0x00000002)
 

Field : FPGA DMA2 - dmaif2

Resets DMA channel 2 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF2_LSB   2
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_MSB   2
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_SET_MSK   0x00000004
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_CLR_MSK   0xfffffffb
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF2_SET(value)   (((value) << 2) & 0x00000004)
 

Field : FPGA DMA3 - dmaif3

Resets DMA channel 3 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF3_LSB   3
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_MSB   3
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_SET_MSK   0x00000008
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_CLR_MSK   0xfffffff7
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF3_SET(value)   (((value) << 3) & 0x00000008)
 

Field : FPGA DMA4 - dmaif4

Resets DMA channel 4 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF4_LSB   4
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_MSB   4
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_SET_MSK   0x00000010
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_CLR_MSK   0xffffffef
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF4_SET(value)   (((value) << 4) & 0x00000010)
 

Field : FPGA DMA5 - dmaif5

Resets DMA channel 5 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF5_LSB   5
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_MSB   5
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_SET_MSK   0x00000020
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_CLR_MSK   0xffffffdf
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF5_SET(value)   (((value) << 5) & 0x00000020)
 

Field : FPGA DMA6 - dmaif6

Resets DMA channel 6 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF6_LSB   6
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_MSB   6
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_SET_MSK   0x00000040
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_CLR_MSK   0xffffffbf
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF6_SET(value)   (((value) << 6) & 0x00000040)
 

Field : FPGA DMA7 - dmaif7

Resets DMA channel 7 interface adapter between FPGA Fabric and HPS DMA Controller

Field Access Macros:

#define ALT_RSTMGR_PER2MODRST_DMAIF7_LSB   7
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_MSB   7
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_WIDTH   1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_SET_MSK   0x00000080
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_CLR_MSK   0xffffff7f
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_RESET   0x1
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_RSTMGR_PER2MODRST_DMAIF7_SET(value)   (((value) << 7) & 0x00000080)
 

Data Structures

struct  ALT_RSTMGR_PER2MODRST_s
 

Macros

#define ALT_RSTMGR_PER2MODRST_OFST   0x18
 

Typedefs

typedef struct
ALT_RSTMGR_PER2MODRST_s 
ALT_RSTMGR_PER2MODRST_t
 

Data Structure Documentation

struct ALT_RSTMGR_PER2MODRST_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_RSTMGR_PER2MODRST.

Data Fields
uint32_t dmaif0: 1 FPGA DMA0
uint32_t dmaif1: 1 FPGA DMA1
uint32_t dmaif2: 1 FPGA DMA2
uint32_t dmaif3: 1 FPGA DMA3
uint32_t dmaif4: 1 FPGA DMA4
uint32_t dmaif5: 1 FPGA DMA5
uint32_t dmaif6: 1 FPGA DMA6
uint32_t dmaif7: 1 FPGA DMA7
uint32_t __pad0__: 24 UNDEFINED

Macro Definitions

#define ALT_RSTMGR_PER2MODRST_DMAIF0_LSB   0

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF0 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_MSB   0

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF0 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF0 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_SET_MSK   0x00000001

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF0 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_CLR_MSK   0xfffffffe

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF0 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF0 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF0 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF0_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF0 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_LSB   1

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF1 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_MSB   1

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF1 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF1 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_SET_MSK   0x00000002

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF1 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_CLR_MSK   0xfffffffd

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF1 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF1 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF1 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF1_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF1 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_LSB   2

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF2 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_MSB   2

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF2 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF2 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_SET_MSK   0x00000004

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF2 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_CLR_MSK   0xfffffffb

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF2 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF2 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF2 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF2_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF2 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_LSB   3

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF3 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_MSB   3

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF3 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF3 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_SET_MSK   0x00000008

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF3 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_CLR_MSK   0xfffffff7

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF3 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF3 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF3 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF3_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF3 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_LSB   4

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF4 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_MSB   4

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF4 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF4 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_SET_MSK   0x00000010

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF4 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_CLR_MSK   0xffffffef

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF4 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF4 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF4 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF4_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF4 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_LSB   5

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF5 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_MSB   5

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF5 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF5 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_SET_MSK   0x00000020

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF5 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_CLR_MSK   0xffffffdf

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF5 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF5 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF5 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF5_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF5 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_LSB   6

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF6 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_MSB   6

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF6 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF6 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_SET_MSK   0x00000040

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF6 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_CLR_MSK   0xffffffbf

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF6 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF6 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF6 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF6_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF6 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_LSB   7

The Least Significant Bit (LSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF7 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_MSB   7

The Most Significant Bit (MSB) position of the ALT_RSTMGR_PER2MODRST_DMAIF7 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_WIDTH   1

The width in bits of the ALT_RSTMGR_PER2MODRST_DMAIF7 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_SET_MSK   0x00000080

The mask used to set the ALT_RSTMGR_PER2MODRST_DMAIF7 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_CLR_MSK   0xffffff7f

The mask used to clear the ALT_RSTMGR_PER2MODRST_DMAIF7 register field value.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_RESET   0x1

The reset value of the ALT_RSTMGR_PER2MODRST_DMAIF7 register field.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_RSTMGR_PER2MODRST_DMAIF7 field value from a register.

#define ALT_RSTMGR_PER2MODRST_DMAIF7_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_RSTMGR_PER2MODRST_DMAIF7 register field value suitable for setting the register.

#define ALT_RSTMGR_PER2MODRST_OFST   0x18

The byte offset of the ALT_RSTMGR_PER2MODRST register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_RSTMGR_PER2MODRST.