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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Provides status of Hardware Managed Clock transition State Machine.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | R | 0x0 | HW Managed Clocks BUSY |
[31:1] | ??? | 0x0 | UNDEFINED |
Field : HW Managed Clocks BUSY - busy | ||||||||||
This read only bit indicates that the Hardware Managed clock's state machine is active. If the state machine is active, then the clocks are in transition. Software should poll this bit after changing the source of internal clocks when writing to the BYPASS, CTRL or DBCTRL registers. Immediately following writes to any of these registers, SW should wait until this bit is IDLE before proceeding with any other register writes in the Clock Manager. The reset value of this bit is applied on a cold reset; warm reset has no affect on this bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_CLKMGR_STAT_BUSY_E_IDLE 0x0 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_E_BUSY 0x1 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_LSB 0 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_MSB 0 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_WIDTH 1 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_SET_MSK 0x00000001 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_RESET 0x0 | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_CLKMGR_STAT_BUSY_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Data Structures | |
struct | ALT_CLKMGR_STAT_s |
Macros | |
#define | ALT_CLKMGR_STAT_OFST 0x14 |
Typedefs | |
typedef struct ALT_CLKMGR_STAT_s | ALT_CLKMGR_STAT_t |
struct ALT_CLKMGR_STAT_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_CLKMGR_STAT.
Data Fields | ||
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const uint32_t | busy: 1 | HW Managed Clocks BUSY |
uint32_t | __pad0__: 31 | UNDEFINED |
#define ALT_CLKMGR_STAT_BUSY_E_IDLE 0x0 |
Enumerated value for register field ALT_CLKMGR_STAT_BUSY
Clocks stable
#define ALT_CLKMGR_STAT_BUSY_E_BUSY 0x1 |
Enumerated value for register field ALT_CLKMGR_STAT_BUSY
Clocks in transition
#define ALT_CLKMGR_STAT_BUSY_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_STAT_BUSY_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_STAT_BUSY_WIDTH 1 |
The width in bits of the ALT_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_STAT_BUSY_SET_MSK 0x00000001 |
The mask used to set the ALT_CLKMGR_STAT_BUSY register field value.
#define ALT_CLKMGR_STAT_BUSY_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_CLKMGR_STAT_BUSY register field value.
#define ALT_CLKMGR_STAT_BUSY_RESET 0x0 |
The reset value of the ALT_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_STAT_BUSY_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_CLKMGR_STAT_BUSY field value from a register.
#define ALT_CLKMGR_STAT_BUSY_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_CLKMGR_STAT_BUSY register field value suitable for setting the register.
#define ALT_CLKMGR_STAT_OFST 0x14 |
The byte offset of the ALT_CLKMGR_STAT register from the beginning of the component.
typedef struct ALT_CLKMGR_STAT_s ALT_CLKMGR_STAT_t |
The typedef declaration for register ALT_CLKMGR_STAT.