Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : dctl

Description

Device Control Register

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_USB_DEV_DCTL_RMTWKUPSIG
[1] RW 0x1 ALT_USB_DEV_DCTL_SFTDISCON
[2] R 0x0 ALT_USB_DEV_DCTL_GNPINNAKSTS
[3] R 0x0 ALT_USB_DEV_DCTL_GOUTNAKSTS
[6:4] RW 0x0 ALT_USB_DEV_DCTL_TSTCTL
[7] W 0x0 ALT_USB_DEV_DCTL_SGNPINNAK
[8] W 0x0 ALT_USB_DEV_DCTL_CGNPINNAK
[9] W 0x0 ALT_USB_DEV_DCTL_SGOUTNAK
[10] W 0x0 ALT_USB_DEV_DCTL_CGOUTNAK
[11] RW 0x0 ALT_USB_DEV_DCTL_PWRONPRGDONE
[12] ??? 0x0 UNDEFINED
[14:13] RW 0x0 ALT_USB_DEV_DCTL_GMC
[15] RW 0x0 ALT_USB_DEV_DCTL_IGNRFRMNUM
[16] RW 0x0 ALT_USB_DEV_DCTL_NAKONBBLE
[17] RW 0x0 ALT_USB_DEV_DCTL_ENCONTONBNA
[31:18] ??? 0x0 UNDEFINED

Field : rmtwkupsig

Remote Wakeup Signaling (RmtWkUpSig)

When the application sets this bit, the core initiates remote

signaling to wake up the USB host. The application must Set this

bit to instruct the core to exit the Suspend state. As specified in

the USB 2.0 specification, the application must clear this bit

1-15 ms after setting it.

Remote Wakeup Signaling (RmtWkUpSig) When LPM is enabled,

In L1 state the behavior of this bit is as follows:

When the application sets this bit, the core initiates L1 remote signaling to

wake up the USB host. The application must set this bit to instruct the core

to exit the Sleep state. As specified in the LPM specification,

the hardware will automatically clear this bit after a time of 50 micro sec (TL1DevDrvResume)

after set by application. Application should not set this bit when GLPMCFG bRemoteWake

from the previous LPM transaction was zero.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_RMTWKUPSIG_E_NOEXIT 0x0 No exit suspend state
ALT_USB_DEV_DCTL_RMTWKUPSIG_E_EXIT 0x1 Exit Suspend State

Field Access Macros:

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_E_NOEXIT   0x0
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_E_EXIT   0x1
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_LSB   0
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_MSB   0
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_WIDTH   1
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_SET_MSK   0x00000001
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_CLR_MSK   0xfffffffe
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_RESET   0x0
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_USB_DEV_DCTL_RMTWKUPSIG_SET(value)   (((value) << 0) & 0x00000001)
 

Field : sftdiscon

Soft Disconnect (SftDiscon)

The application uses this bit to signal the DWC_otg core to do a

soft disconnect. As long as this bit is Set, the host does not see

that the device is connected, and the device does not receive

signals on the USB. The core stays in the disconnected state

until the application clears this bit.

The minimum duration For which the core must keep this bit Set

is specified in Table 5-46.

1'b0: Normal operation. When this bit is cleared after a soft

disconnect, the core drives the phy_opmode_o signal on the

UTMI+ to 2'b00, which generates a device connect event to

the USB host. When the device is reconnected, the USB host

restarts device enumeration.

1'b1: The core drives the phy_opmode_o signal on the

UTMI+ to 2'b01, which generates a device disconnect event

to the USB host.

Note: This bit can be also used for ULPI/FS Serial interfaces.

Note: This bit is not impacted by a soft reset.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_SFTDISCON_E_NODISCONNECT 0x0 Normal operation
ALT_USB_DEV_DCTL_SFTDISCON_E_DISCONNECT 0x1 The core drives the phy_opmode_o signal on the
: ULPI

Field Access Macros:

#define ALT_USB_DEV_DCTL_SFTDISCON_E_NODISCONNECT   0x0
 
#define ALT_USB_DEV_DCTL_SFTDISCON_E_DISCONNECT   0x1
 
#define ALT_USB_DEV_DCTL_SFTDISCON_LSB   1
 
#define ALT_USB_DEV_DCTL_SFTDISCON_MSB   1
 
#define ALT_USB_DEV_DCTL_SFTDISCON_WIDTH   1
 
#define ALT_USB_DEV_DCTL_SFTDISCON_SET_MSK   0x00000002
 
#define ALT_USB_DEV_DCTL_SFTDISCON_CLR_MSK   0xfffffffd
 
#define ALT_USB_DEV_DCTL_SFTDISCON_RESET   0x1
 
#define ALT_USB_DEV_DCTL_SFTDISCON_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_USB_DEV_DCTL_SFTDISCON_SET(value)   (((value) << 1) & 0x00000002)
 

Field : gnpinnaksts

Global Non-periodic IN NAK Status (GNPINNakSts)

1'b0: A handshake is sent out based on the data availability

in the transmit FIFO.

1'b1: A NAK handshake is sent out on all non-periodic IN

endpoints, irrespective of the data availability in the transmit

FIFO.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_GNPINNAKSTS_E_INACT 0x0 A handshake is sent out based on the data
: availability in the transmit FIFO
ALT_USB_DEV_DCTL_GNPINNAKSTS_E_ACT 0x1 A NAK handshake is sent out on all non-periodic
: IN endpoints, irrespective of the data
: availability in the transmit FIFO.

Field Access Macros:

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_E_INACT   0x0
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_E_ACT   0x1
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_LSB   2
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_MSB   2
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_WIDTH   1
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_SET_MSK   0x00000004
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_CLR_MSK   0xfffffffb
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_RESET   0x0
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_USB_DEV_DCTL_GNPINNAKSTS_SET(value)   (((value) << 2) & 0x00000004)
 

Field : goutnaksts

Global OUT NAK Status (GOUTNakSts)

1'b0: A handshake is sent based on the FIFO Status and the

NAK and STALL bit settings.

1'b1: No data is written to the RxFIFO, irrespective of space

availability. Sends a NAK handshake on all packets, except

on SETUP transactions. All isochronous OUT packets are

dropped.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_GOUTNAKSTS_E_INACT 0x0 A handshake is sent based on the FIFO Status and
: the NAK and STALL bit settings.
ALT_USB_DEV_DCTL_GOUTNAKSTS_E_ACT 0x1 No data is written to the RxFIFO, irrespective
: of space availability. Sends a NAK handshake on
: all packets, except on SETUP transactions. All
: isochronous OUT packets are dropped.

Field Access Macros:

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_E_INACT   0x0
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_E_ACT   0x1
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_LSB   3
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_MSB   3
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_WIDTH   1
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_SET_MSK   0x00000008
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_CLR_MSK   0xfffffff7
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_RESET   0x0
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_USB_DEV_DCTL_GOUTNAKSTS_SET(value)   (((value) << 3) & 0x00000008)
 

Field : tstctl

Test Control (TstCtl)

3'b000: Test mode disabled

3'b001: Test_J mode

3'b010: Test_K mode

3'b011: Test_SE0_NAK mode

3'b100: Test_Packet mode

3'b101: Test_Force_Enable

Others: Reserved

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_TSTCTL_E_DISD 0x0 Test mode disabled
ALT_USB_DEV_DCTL_TSTCTL_E_TESTJ 0x1 Test_J mode
ALT_USB_DEV_DCTL_TSTCTL_E_TESTK 0x2 Test_K mode
ALT_USB_DEV_DCTL_TSTCTL_E_TESTSN 0x3 Test_SE0_NAK mode
ALT_USB_DEV_DCTL_TSTCTL_E_TESTPM 0x4 Test_Packet mode
ALT_USB_DEV_DCTL_TSTCTL_E_TESTFE 0x5 Test_force_Enable

Field Access Macros:

#define ALT_USB_DEV_DCTL_TSTCTL_E_DISD   0x0
 
#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTJ   0x1
 
#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTK   0x2
 
#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTSN   0x3
 
#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTPM   0x4
 
#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTFE   0x5
 
#define ALT_USB_DEV_DCTL_TSTCTL_LSB   4
 
#define ALT_USB_DEV_DCTL_TSTCTL_MSB   6
 
#define ALT_USB_DEV_DCTL_TSTCTL_WIDTH   3
 
#define ALT_USB_DEV_DCTL_TSTCTL_SET_MSK   0x00000070
 
#define ALT_USB_DEV_DCTL_TSTCTL_CLR_MSK   0xffffff8f
 
#define ALT_USB_DEV_DCTL_TSTCTL_RESET   0x0
 
#define ALT_USB_DEV_DCTL_TSTCTL_GET(value)   (((value) & 0x00000070) >> 4)
 
#define ALT_USB_DEV_DCTL_TSTCTL_SET(value)   (((value) << 4) & 0x00000070)
 

Field : sgnpinnak

Set Global Non-periodic IN NAK (SGNPInNak)

A write to this field sets the Global Non-periodic IN NAK.The

application uses this bit to send a NAK handshake on all nonperiodic

IN endpoints. The core can also Set this bit when a

timeout condition is detected on a non-periodic endpoint in

shared FIFO operation.

The application must Set this bit only after making sure that the

Global IN NAK Effective bit in the Core Interrupt Register

(GINTSTS.GINNakEff) is cleared

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_SGNPINNAK_E_DISD 0x0 Disable Global Non-periodic IN NAK
ALT_USB_DEV_DCTL_SGNPINNAK_E_END 0x1 Global Non-periodic IN NAK

Field Access Macros:

#define ALT_USB_DEV_DCTL_SGNPINNAK_E_DISD   0x0
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_E_END   0x1
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_LSB   7
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_MSB   7
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_WIDTH   1
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_SET_MSK   0x00000080
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_CLR_MSK   0xffffff7f
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_RESET   0x0
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_USB_DEV_DCTL_SGNPINNAK_SET(value)   (((value) << 7) & 0x00000080)
 

Field : cgnpinnak

Clear Global Non-periodic IN NAK (CGNPInNak)

A write to this field clears the Global Non-periodic IN NAK.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_CGNPINNAK_E_DIS 0x0 Disable Global Non-periodic IN NAK
ALT_USB_DEV_DCTL_CGNPINNAK_E_EN 0x1 Clear Global Non-periodic IN NAK

Field Access Macros:

#define ALT_USB_DEV_DCTL_CGNPINNAK_E_DIS   0x0
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_E_EN   0x1
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_LSB   8
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_MSB   8
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_WIDTH   1
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_SET_MSK   0x00000100
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_CLR_MSK   0xfffffeff
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_RESET   0x0
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_USB_DEV_DCTL_CGNPINNAK_SET(value)   (((value) << 8) & 0x00000100)
 

Field : sgoutnak

Set Global OUT NAK (SGOUTNak)

A write to this field sets the Global OUT NAK.

The application uses this bit to send a NAK handshake on all

OUT endpoints.

The application must Set the this bit only after making sure that

the Global OUT NAK Effective bit in the Core Interrupt Register

(GINTSTS.GOUTNakEff) is cleared.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_SGOUTNAK_E_DISD 0x0 Disable Global OUT NAK
ALT_USB_DEV_DCTL_SGOUTNAK_E_END 0x1 Global OUT NAK

Field Access Macros:

#define ALT_USB_DEV_DCTL_SGOUTNAK_E_DISD   0x0
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_E_END   0x1
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_LSB   9
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_MSB   9
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_WIDTH   1
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_SET_MSK   0x00000200
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_CLR_MSK   0xfffffdff
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_RESET   0x0
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_GET(value)   (((value) & 0x00000200) >> 9)
 
#define ALT_USB_DEV_DCTL_SGOUTNAK_SET(value)   (((value) << 9) & 0x00000200)
 

Field : cgoutnak

Clear Global OUT NAK (CGOUTNak)

A write to this field clears the Global OUT NAK.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_CGOUTNAK_E_DISD 0x0 Disable Clear Global OUT NAK
ALT_USB_DEV_DCTL_CGOUTNAK_E_END 0x1 Clear Global OUT NAK

Field Access Macros:

#define ALT_USB_DEV_DCTL_CGOUTNAK_E_DISD   0x0
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_E_END   0x1
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_LSB   10
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_MSB   10
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_WIDTH   1
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_SET_MSK   0x00000400
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_CLR_MSK   0xfffffbff
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_RESET   0x0
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_GET(value)   (((value) & 0x00000400) >> 10)
 
#define ALT_USB_DEV_DCTL_CGOUTNAK_SET(value)   (((value) << 10) & 0x00000400)
 

Field : pwronprgdone

Power-On Programming Done (PWROnPrgDone)

The application uses this bit to indicate that register

programming is completed after a wake-up from Power Down

mode.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_PWRONPRGDONE_E_NOTDONE 0x0 Power-On Programming not done
ALT_USB_DEV_DCTL_PWRONPRGDONE_E_DONE 0x1 Power-On Programming Done

Field Access Macros:

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_E_NOTDONE   0x0
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_E_DONE   0x1
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_LSB   11
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_MSB   11
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_WIDTH   1
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_SET_MSK   0x00000800
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_CLR_MSK   0xfffff7ff
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_RESET   0x0
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_GET(value)   (((value) & 0x00000800) >> 11)
 
#define ALT_USB_DEV_DCTL_PWRONPRGDONE_SET(value)   (((value) << 11) & 0x00000800)
 

Field : gmc

Global Multi Count (GMC)

GMC must be programmed only once after initialization.

Applicable only For Scatter/Gather DMA mode. This indicates the

number of packets to be serviced For that end point before

moving to the next end point. It is only For non-periodic end

points.

2'b00: Invalid.

2'b01: 1 packet.

2'b10: 2 packets.

2'b11: 3 packets.

When Scatter/Gather DMA mode is disabled, this field is

reserved. and reads 2'b00.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_GMC_E_NOTVALID 0x0 Invalid
ALT_USB_DEV_DCTL_GMC_E_ONEPKT 0x1 1 packet
ALT_USB_DEV_DCTL_GMC_E_TWOPKT 0x2 2 packets
ALT_USB_DEV_DCTL_GMC_E_THREEPKT 0x3 3 packets

Field Access Macros:

#define ALT_USB_DEV_DCTL_GMC_E_NOTVALID   0x0
 
#define ALT_USB_DEV_DCTL_GMC_E_ONEPKT   0x1
 
#define ALT_USB_DEV_DCTL_GMC_E_TWOPKT   0x2
 
#define ALT_USB_DEV_DCTL_GMC_E_THREEPKT   0x3
 
#define ALT_USB_DEV_DCTL_GMC_LSB   13
 
#define ALT_USB_DEV_DCTL_GMC_MSB   14
 
#define ALT_USB_DEV_DCTL_GMC_WIDTH   2
 
#define ALT_USB_DEV_DCTL_GMC_SET_MSK   0x00006000
 
#define ALT_USB_DEV_DCTL_GMC_CLR_MSK   0xffff9fff
 
#define ALT_USB_DEV_DCTL_GMC_RESET   0x0
 
#define ALT_USB_DEV_DCTL_GMC_GET(value)   (((value) & 0x00006000) >> 13)
 
#define ALT_USB_DEV_DCTL_GMC_SET(value)   (((value) << 13) & 0x00006000)
 

Field : ignrfrmnum

Ignore Frame number For Isochronous End points (IgnrFrmNum)

Do NOT program IgnrFrmNum bit to 1'b1 when the core is

operating in threshold mode.

Note: When Scatter/Gather DMA mode is enabled this feature is not applicable to High Speed, High bandwidth transfers. When this bit is enabled, there must be only one packet per descriptor.

0: The core transmits the packets only in the frame number in which they are intended to be transmitted.

1: The core ignores the frame number, sending packets immediately as the packets are ready.

In Scatter/Gather DMA mode, if this bit is enabled, the packets are not flushed when a ISOC IN token is received for an elapsed frame.

When Scatter/Gather DMA mode is disabled, this field is used by the application to enable periodic transfer interrupt. The application can program periodic endpoint transfers for multiple (micro)frames.

0: periodic transfer interrupt feature is disabled, application needs to program transfers for periodic endpoints every (micro)frame

1: periodic transfer interrupt feature is enabled, application can program transfers for multiple (micro)frames for periodic endpoints.

In non Scatter/Gather DMA mode the application will receive transfer complete interrupt after transfers for multiple (micro)frames are completed.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_IGNRFRMNUM_E_DISD 0x0 The core transmits the packets only in the frame
: number in which they are intended to be
: transmitted
ALT_USB_DEV_DCTL_IGNRFRMNUM_E_END 0x1 The core ignores the frame number, sending
: packets immediately as the packets are ready

Field Access Macros:

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_E_DISD   0x0
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_E_END   0x1
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_LSB   15
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_MSB   15
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_WIDTH   1
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_SET_MSK   0x00008000
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_CLR_MSK   0xffff7fff
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_RESET   0x0
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_GET(value)   (((value) & 0x00008000) >> 15)
 
#define ALT_USB_DEV_DCTL_IGNRFRMNUM_SET(value)   (((value) << 15) & 0x00008000)
 

Field : nakonbble

NAK on Babble Error (NakOnBble)

Set NAK automatically on babble (NakOnBble). The core sets NAK automatically for the

endpoint on which babble is received.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DCTL_NAKONBBLE_E_DISD 0x0 Disable NAK on Babble Error
ALT_USB_DEV_DCTL_NAKONBBLE_E_END 0x1 NAK on Babble Error

Field Access Macros:

#define ALT_USB_DEV_DCTL_NAKONBBLE_E_DISD   0x0
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_E_END   0x1
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_LSB   16
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_MSB   16
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_WIDTH   1
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_SET_MSK   0x00010000
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_CLR_MSK   0xfffeffff
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_RESET   0x0
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_USB_DEV_DCTL_NAKONBBLE_SET(value)   (((value) << 16) & 0x00010000)
 

Field : encontonbna

Enable Continue on BNA (EnContOnBNA)

This bit enables the DWC_otg core to continue on BNA for Bulk OUT endpoints.

With this feature enabled, when a Bulk OUT endpoint receives a BNA interrupt

the core starts processing the descriptor that caused the BNA interrupt after

the endpoint re-enables the endpoint.  

1'b0: After receiving BNA interrupt,the core disables the endpoint. When the

endpoint is re-enabled by the application,the core starts processing from

the DOEPDMA descriptor.  

1'b1: After receiving BNA interrupt, the core disables the endpoint. When the

endpoint is re-enabled by the application, the core starts processing from

the descriptor that received the BNA interrupt. This bit is valid only when

OTG_EN_DESC_DMA == 1'b1. It is a one-time programmable after reset bit like

any other DCTL register bits.

Field Access Macros:

#define ALT_USB_DEV_DCTL_ENCONTONBNA_LSB   17
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_MSB   17
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_WIDTH   1
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_SET_MSK   0x00020000
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_CLR_MSK   0xfffdffff
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_RESET   0x0
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_GET(value)   (((value) & 0x00020000) >> 17)
 
#define ALT_USB_DEV_DCTL_ENCONTONBNA_SET(value)   (((value) << 17) & 0x00020000)
 

Data Structures

struct  ALT_USB_DEV_DCTL_s
 

Macros

#define ALT_USB_DEV_DCTL_RESET   0x00000002
 
#define ALT_USB_DEV_DCTL_OFST   0x4
 
#define ALT_USB_DEV_DCTL_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DCTL_OFST))
 

Typedefs

typedef struct ALT_USB_DEV_DCTL_s ALT_USB_DEV_DCTL_t
 

Data Structure Documentation

struct ALT_USB_DEV_DCTL_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_USB_DEV_DCTL.

Data Fields
uint32_t rmtwkupsig: 1 ALT_USB_DEV_DCTL_RMTWKUPSIG
uint32_t sftdiscon: 1 ALT_USB_DEV_DCTL_SFTDISCON
const uint32_t gnpinnaksts: 1 ALT_USB_DEV_DCTL_GNPINNAKSTS
const uint32_t goutnaksts: 1 ALT_USB_DEV_DCTL_GOUTNAKSTS
uint32_t tstctl: 3 ALT_USB_DEV_DCTL_TSTCTL
uint32_t sgnpinnak: 1 ALT_USB_DEV_DCTL_SGNPINNAK
uint32_t cgnpinnak: 1 ALT_USB_DEV_DCTL_CGNPINNAK
uint32_t sgoutnak: 1 ALT_USB_DEV_DCTL_SGOUTNAK
uint32_t cgoutnak: 1 ALT_USB_DEV_DCTL_CGOUTNAK
uint32_t pwronprgdone: 1 ALT_USB_DEV_DCTL_PWRONPRGDONE
uint32_t __pad0__: 1 UNDEFINED
uint32_t gmc: 2 ALT_USB_DEV_DCTL_GMC
uint32_t ignrfrmnum: 1 ALT_USB_DEV_DCTL_IGNRFRMNUM
uint32_t nakonbble: 1 ALT_USB_DEV_DCTL_NAKONBBLE
uint32_t encontonbna: 1 ALT_USB_DEV_DCTL_ENCONTONBNA
uint32_t __pad1__: 14 UNDEFINED

Macro Definitions

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_E_NOEXIT   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_RMTWKUPSIG

No exit suspend state

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_E_EXIT   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_RMTWKUPSIG

Exit Suspend State

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_LSB   0

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_MSB   0

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_SET_MSK   0x00000001

The mask used to set the ALT_USB_DEV_DCTL_RMTWKUPSIG register field value.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_CLR_MSK   0xfffffffe

The mask used to clear the ALT_USB_DEV_DCTL_RMTWKUPSIG register field value.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_RMTWKUPSIG register field.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_USB_DEV_DCTL_RMTWKUPSIG field value from a register.

#define ALT_USB_DEV_DCTL_RMTWKUPSIG_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_USB_DEV_DCTL_RMTWKUPSIG register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_SFTDISCON_E_NODISCONNECT   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_SFTDISCON

Normal operation

#define ALT_USB_DEV_DCTL_SFTDISCON_E_DISCONNECT   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_SFTDISCON

The core drives the phy_opmode_o signal on the ULPI

#define ALT_USB_DEV_DCTL_SFTDISCON_LSB   1

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_SFTDISCON register field.

#define ALT_USB_DEV_DCTL_SFTDISCON_MSB   1

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_SFTDISCON register field.

#define ALT_USB_DEV_DCTL_SFTDISCON_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_SFTDISCON register field.

#define ALT_USB_DEV_DCTL_SFTDISCON_SET_MSK   0x00000002

The mask used to set the ALT_USB_DEV_DCTL_SFTDISCON register field value.

#define ALT_USB_DEV_DCTL_SFTDISCON_CLR_MSK   0xfffffffd

The mask used to clear the ALT_USB_DEV_DCTL_SFTDISCON register field value.

#define ALT_USB_DEV_DCTL_SFTDISCON_RESET   0x1

The reset value of the ALT_USB_DEV_DCTL_SFTDISCON register field.

#define ALT_USB_DEV_DCTL_SFTDISCON_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_USB_DEV_DCTL_SFTDISCON field value from a register.

#define ALT_USB_DEV_DCTL_SFTDISCON_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_USB_DEV_DCTL_SFTDISCON register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_GNPINNAKSTS

A handshake is sent out based on the data availability in the transmit FIFO

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_GNPINNAKSTS

A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_LSB   2

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_MSB   2

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_SET_MSK   0x00000004

The mask used to set the ALT_USB_DEV_DCTL_GNPINNAKSTS register field value.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_CLR_MSK   0xfffffffb

The mask used to clear the ALT_USB_DEV_DCTL_GNPINNAKSTS register field value.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_GNPINNAKSTS register field.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_USB_DEV_DCTL_GNPINNAKSTS field value from a register.

#define ALT_USB_DEV_DCTL_GNPINNAKSTS_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_USB_DEV_DCTL_GNPINNAKSTS register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_GOUTNAKSTS

A handshake is sent based on the FIFO Status and the NAK and STALL bit settings.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_GOUTNAKSTS

No data is written to the RxFIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_LSB   3

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_MSB   3

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_SET_MSK   0x00000008

The mask used to set the ALT_USB_DEV_DCTL_GOUTNAKSTS register field value.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_CLR_MSK   0xfffffff7

The mask used to clear the ALT_USB_DEV_DCTL_GOUTNAKSTS register field value.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_GOUTNAKSTS register field.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_USB_DEV_DCTL_GOUTNAKSTS field value from a register.

#define ALT_USB_DEV_DCTL_GOUTNAKSTS_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_USB_DEV_DCTL_GOUTNAKSTS register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_TSTCTL_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL

Test mode disabled

#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTJ   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL

Test_J mode

#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTK   0x2

Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL

Test_K mode

#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTSN   0x3

Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL

Test_SE0_NAK mode

#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTPM   0x4

Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL

Test_Packet mode

#define ALT_USB_DEV_DCTL_TSTCTL_E_TESTFE   0x5

Enumerated value for register field ALT_USB_DEV_DCTL_TSTCTL

Test_force_Enable

#define ALT_USB_DEV_DCTL_TSTCTL_LSB   4

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_TSTCTL register field.

#define ALT_USB_DEV_DCTL_TSTCTL_MSB   6

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_TSTCTL register field.

#define ALT_USB_DEV_DCTL_TSTCTL_WIDTH   3

The width in bits of the ALT_USB_DEV_DCTL_TSTCTL register field.

#define ALT_USB_DEV_DCTL_TSTCTL_SET_MSK   0x00000070

The mask used to set the ALT_USB_DEV_DCTL_TSTCTL register field value.

#define ALT_USB_DEV_DCTL_TSTCTL_CLR_MSK   0xffffff8f

The mask used to clear the ALT_USB_DEV_DCTL_TSTCTL register field value.

#define ALT_USB_DEV_DCTL_TSTCTL_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_TSTCTL register field.

#define ALT_USB_DEV_DCTL_TSTCTL_GET (   value)    (((value) & 0x00000070) >> 4)

Extracts the ALT_USB_DEV_DCTL_TSTCTL field value from a register.

#define ALT_USB_DEV_DCTL_TSTCTL_SET (   value)    (((value) << 4) & 0x00000070)

Produces a ALT_USB_DEV_DCTL_TSTCTL register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_SGNPINNAK_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_SGNPINNAK

Disable Global Non-periodic IN NAK

#define ALT_USB_DEV_DCTL_SGNPINNAK_E_END   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_SGNPINNAK

Global Non-periodic IN NAK

#define ALT_USB_DEV_DCTL_SGNPINNAK_LSB   7

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_SGNPINNAK register field.

#define ALT_USB_DEV_DCTL_SGNPINNAK_MSB   7

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_SGNPINNAK register field.

#define ALT_USB_DEV_DCTL_SGNPINNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_SGNPINNAK register field.

#define ALT_USB_DEV_DCTL_SGNPINNAK_SET_MSK   0x00000080

The mask used to set the ALT_USB_DEV_DCTL_SGNPINNAK register field value.

#define ALT_USB_DEV_DCTL_SGNPINNAK_CLR_MSK   0xffffff7f

The mask used to clear the ALT_USB_DEV_DCTL_SGNPINNAK register field value.

#define ALT_USB_DEV_DCTL_SGNPINNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_SGNPINNAK register field.

#define ALT_USB_DEV_DCTL_SGNPINNAK_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_USB_DEV_DCTL_SGNPINNAK field value from a register.

#define ALT_USB_DEV_DCTL_SGNPINNAK_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_USB_DEV_DCTL_SGNPINNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_CGNPINNAK_E_DIS   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_CGNPINNAK

Disable Global Non-periodic IN NAK

#define ALT_USB_DEV_DCTL_CGNPINNAK_E_EN   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_CGNPINNAK

Clear Global Non-periodic IN NAK

#define ALT_USB_DEV_DCTL_CGNPINNAK_LSB   8

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_CGNPINNAK register field.

#define ALT_USB_DEV_DCTL_CGNPINNAK_MSB   8

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_CGNPINNAK register field.

#define ALT_USB_DEV_DCTL_CGNPINNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_CGNPINNAK register field.

#define ALT_USB_DEV_DCTL_CGNPINNAK_SET_MSK   0x00000100

The mask used to set the ALT_USB_DEV_DCTL_CGNPINNAK register field value.

#define ALT_USB_DEV_DCTL_CGNPINNAK_CLR_MSK   0xfffffeff

The mask used to clear the ALT_USB_DEV_DCTL_CGNPINNAK register field value.

#define ALT_USB_DEV_DCTL_CGNPINNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_CGNPINNAK register field.

#define ALT_USB_DEV_DCTL_CGNPINNAK_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_USB_DEV_DCTL_CGNPINNAK field value from a register.

#define ALT_USB_DEV_DCTL_CGNPINNAK_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_USB_DEV_DCTL_CGNPINNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_SGOUTNAK_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_SGOUTNAK

Disable Global OUT NAK

#define ALT_USB_DEV_DCTL_SGOUTNAK_E_END   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_SGOUTNAK

Global OUT NAK

#define ALT_USB_DEV_DCTL_SGOUTNAK_LSB   9

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_SGOUTNAK register field.

#define ALT_USB_DEV_DCTL_SGOUTNAK_MSB   9

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_SGOUTNAK register field.

#define ALT_USB_DEV_DCTL_SGOUTNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_SGOUTNAK register field.

#define ALT_USB_DEV_DCTL_SGOUTNAK_SET_MSK   0x00000200

The mask used to set the ALT_USB_DEV_DCTL_SGOUTNAK register field value.

#define ALT_USB_DEV_DCTL_SGOUTNAK_CLR_MSK   0xfffffdff

The mask used to clear the ALT_USB_DEV_DCTL_SGOUTNAK register field value.

#define ALT_USB_DEV_DCTL_SGOUTNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_SGOUTNAK register field.

#define ALT_USB_DEV_DCTL_SGOUTNAK_GET (   value)    (((value) & 0x00000200) >> 9)

Extracts the ALT_USB_DEV_DCTL_SGOUTNAK field value from a register.

#define ALT_USB_DEV_DCTL_SGOUTNAK_SET (   value)    (((value) << 9) & 0x00000200)

Produces a ALT_USB_DEV_DCTL_SGOUTNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_CGOUTNAK_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_CGOUTNAK

Disable Clear Global OUT NAK

#define ALT_USB_DEV_DCTL_CGOUTNAK_E_END   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_CGOUTNAK

Clear Global OUT NAK

#define ALT_USB_DEV_DCTL_CGOUTNAK_LSB   10

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_CGOUTNAK register field.

#define ALT_USB_DEV_DCTL_CGOUTNAK_MSB   10

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_CGOUTNAK register field.

#define ALT_USB_DEV_DCTL_CGOUTNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_CGOUTNAK register field.

#define ALT_USB_DEV_DCTL_CGOUTNAK_SET_MSK   0x00000400

The mask used to set the ALT_USB_DEV_DCTL_CGOUTNAK register field value.

#define ALT_USB_DEV_DCTL_CGOUTNAK_CLR_MSK   0xfffffbff

The mask used to clear the ALT_USB_DEV_DCTL_CGOUTNAK register field value.

#define ALT_USB_DEV_DCTL_CGOUTNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_CGOUTNAK register field.

#define ALT_USB_DEV_DCTL_CGOUTNAK_GET (   value)    (((value) & 0x00000400) >> 10)

Extracts the ALT_USB_DEV_DCTL_CGOUTNAK field value from a register.

#define ALT_USB_DEV_DCTL_CGOUTNAK_SET (   value)    (((value) << 10) & 0x00000400)

Produces a ALT_USB_DEV_DCTL_CGOUTNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_E_NOTDONE   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_PWRONPRGDONE

Power-On Programming not done

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_E_DONE   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_PWRONPRGDONE

Power-On Programming Done

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_LSB   11

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_MSB   11

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_SET_MSK   0x00000800

The mask used to set the ALT_USB_DEV_DCTL_PWRONPRGDONE register field value.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_CLR_MSK   0xfffff7ff

The mask used to clear the ALT_USB_DEV_DCTL_PWRONPRGDONE register field value.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_PWRONPRGDONE register field.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_GET (   value)    (((value) & 0x00000800) >> 11)

Extracts the ALT_USB_DEV_DCTL_PWRONPRGDONE field value from a register.

#define ALT_USB_DEV_DCTL_PWRONPRGDONE_SET (   value)    (((value) << 11) & 0x00000800)

Produces a ALT_USB_DEV_DCTL_PWRONPRGDONE register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_GMC_E_NOTVALID   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_GMC

Invalid

#define ALT_USB_DEV_DCTL_GMC_E_ONEPKT   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_GMC

1 packet

#define ALT_USB_DEV_DCTL_GMC_E_TWOPKT   0x2

Enumerated value for register field ALT_USB_DEV_DCTL_GMC

2 packets

#define ALT_USB_DEV_DCTL_GMC_E_THREEPKT   0x3

Enumerated value for register field ALT_USB_DEV_DCTL_GMC

3 packets

#define ALT_USB_DEV_DCTL_GMC_LSB   13

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_GMC register field.

#define ALT_USB_DEV_DCTL_GMC_MSB   14

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_GMC register field.

#define ALT_USB_DEV_DCTL_GMC_WIDTH   2

The width in bits of the ALT_USB_DEV_DCTL_GMC register field.

#define ALT_USB_DEV_DCTL_GMC_SET_MSK   0x00006000

The mask used to set the ALT_USB_DEV_DCTL_GMC register field value.

#define ALT_USB_DEV_DCTL_GMC_CLR_MSK   0xffff9fff

The mask used to clear the ALT_USB_DEV_DCTL_GMC register field value.

#define ALT_USB_DEV_DCTL_GMC_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_GMC register field.

#define ALT_USB_DEV_DCTL_GMC_GET (   value)    (((value) & 0x00006000) >> 13)

Extracts the ALT_USB_DEV_DCTL_GMC field value from a register.

#define ALT_USB_DEV_DCTL_GMC_SET (   value)    (((value) << 13) & 0x00006000)

Produces a ALT_USB_DEV_DCTL_GMC register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_IGNRFRMNUM

The core transmits the packets only in the frame number in which they are intended to be transmitted

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_E_END   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_IGNRFRMNUM

The core ignores the frame number, sending packets immediately as the packets are ready

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_LSB   15

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_MSB   15

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_SET_MSK   0x00008000

The mask used to set the ALT_USB_DEV_DCTL_IGNRFRMNUM register field value.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_CLR_MSK   0xffff7fff

The mask used to clear the ALT_USB_DEV_DCTL_IGNRFRMNUM register field value.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_IGNRFRMNUM register field.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_GET (   value)    (((value) & 0x00008000) >> 15)

Extracts the ALT_USB_DEV_DCTL_IGNRFRMNUM field value from a register.

#define ALT_USB_DEV_DCTL_IGNRFRMNUM_SET (   value)    (((value) << 15) & 0x00008000)

Produces a ALT_USB_DEV_DCTL_IGNRFRMNUM register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_NAKONBBLE_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DCTL_NAKONBBLE

Disable NAK on Babble Error

#define ALT_USB_DEV_DCTL_NAKONBBLE_E_END   0x1

Enumerated value for register field ALT_USB_DEV_DCTL_NAKONBBLE

NAK on Babble Error

#define ALT_USB_DEV_DCTL_NAKONBBLE_LSB   16

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_NAKONBBLE register field.

#define ALT_USB_DEV_DCTL_NAKONBBLE_MSB   16

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_NAKONBBLE register field.

#define ALT_USB_DEV_DCTL_NAKONBBLE_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_NAKONBBLE register field.

#define ALT_USB_DEV_DCTL_NAKONBBLE_SET_MSK   0x00010000

The mask used to set the ALT_USB_DEV_DCTL_NAKONBBLE register field value.

#define ALT_USB_DEV_DCTL_NAKONBBLE_CLR_MSK   0xfffeffff

The mask used to clear the ALT_USB_DEV_DCTL_NAKONBBLE register field value.

#define ALT_USB_DEV_DCTL_NAKONBBLE_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_NAKONBBLE register field.

#define ALT_USB_DEV_DCTL_NAKONBBLE_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_USB_DEV_DCTL_NAKONBBLE field value from a register.

#define ALT_USB_DEV_DCTL_NAKONBBLE_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_USB_DEV_DCTL_NAKONBBLE register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_LSB   17

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DCTL_ENCONTONBNA register field.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_MSB   17

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DCTL_ENCONTONBNA register field.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_WIDTH   1

The width in bits of the ALT_USB_DEV_DCTL_ENCONTONBNA register field.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_SET_MSK   0x00020000

The mask used to set the ALT_USB_DEV_DCTL_ENCONTONBNA register field value.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_CLR_MSK   0xfffdffff

The mask used to clear the ALT_USB_DEV_DCTL_ENCONTONBNA register field value.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_RESET   0x0

The reset value of the ALT_USB_DEV_DCTL_ENCONTONBNA register field.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_GET (   value)    (((value) & 0x00020000) >> 17)

Extracts the ALT_USB_DEV_DCTL_ENCONTONBNA field value from a register.

#define ALT_USB_DEV_DCTL_ENCONTONBNA_SET (   value)    (((value) << 17) & 0x00020000)

Produces a ALT_USB_DEV_DCTL_ENCONTONBNA register field value suitable for setting the register.

#define ALT_USB_DEV_DCTL_RESET   0x00000002

The reset value of the ALT_USB_DEV_DCTL register.

#define ALT_USB_DEV_DCTL_OFST   0x4

The byte offset of the ALT_USB_DEV_DCTL register from the beginning of the component.

#define ALT_USB_DEV_DCTL_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DCTL_OFST))

The address of the ALT_USB_DEV_DCTL register.

Typedef Documentation

The typedef declaration for register ALT_USB_DEV_DCTL.