![]() |
Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
|
Channel_number: 3.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[10:0] | RW | 0x0 | Maximum Packet Size |
[14:11] | RW | 0x0 | Endpoint Number |
[15] | RW | 0x0 | Endpoint Direction |
[16] | ??? | 0x0 | UNDEFINED |
[17] | RW | 0x0 | Low-Speed Device |
[19:18] | RW | 0x0 | Endpoint Type |
[21:20] | RW | 0x0 | Multi Count Error Count |
[28:22] | RW | 0x0 | Device Address |
[29] | ??? | 0x0 | UNDEFINED |
[30] | R | 0x0 | Channel Disable |
[31] | R | 0x0 | Channel Enable |
Field : Maximum Packet Size - mps | |
Indicates the maximum packet size of the associated endpoint. Field Access Macros: | |
#define | ALT_USB_HOST_HCCHAR3_MPS_LSB 0 |
#define | ALT_USB_HOST_HCCHAR3_MPS_MSB 10 |
#define | ALT_USB_HOST_HCCHAR3_MPS_WIDTH 11 |
#define | ALT_USB_HOST_HCCHAR3_MPS_SET_MSK 0x000007ff |
#define | ALT_USB_HOST_HCCHAR3_MPS_CLR_MSK 0xfffff800 |
#define | ALT_USB_HOST_HCCHAR3_MPS_RESET 0x0 |
#define | ALT_USB_HOST_HCCHAR3_MPS_GET(value) (((value) & 0x000007ff) >> 0) |
#define | ALT_USB_HOST_HCCHAR3_MPS_SET(value) (((value) << 0) & 0x000007ff) |
Field : Endpoint Direction - epdir | ||||||||||
Indicates whether the transaction is IN or OUT. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_E_OUTDIR 0x0 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_E_INDIR 0x1 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_LSB 15 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_MSB 15 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_WIDTH 1 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_SET_MSK 0x00008000 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_CLR_MSK 0xffff7fff | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_RESET 0x0 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_GET(value) (((value) & 0x00008000) >> 15) | |||||||||
#define | ALT_USB_HOST_HCCHAR3_EPDIR_SET(value) (((value) << 15) & 0x00008000) | |||||||||
Field : Low-Speed Device - lspddev | ||||||||||
This field is Set by the application to indicate that this channel is communicating to a low-speed device. The application must program this bit when a low speed device is connected to the host through an FS HUB. The HS OTG Host core uses this field to drive the XCVR_SELECT signal to 0x3 while communicating to the LS Device through the FS hub. In a peer to peer setup, the HS OTG Host core ignores this bit even if it is set by the application software. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_E_NONLOWSPEED 0x0 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_E_LOWSPEED 0x1 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_LSB 17 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_MSB 17 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_WIDTH 1 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_SET_MSK 0x00020000 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_CLR_MSK 0xfffdffff | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_RESET 0x0 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_GET(value) (((value) & 0x00020000) >> 17) | |||||||||
#define | ALT_USB_HOST_HCCHAR3_LSPDDEV_SET(value) (((value) << 17) & 0x00020000) | |||||||||
Field : Endpoint Type - eptype | ||||||||||||||||
Indicates the transfer type selected. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_E_CTL 0x0 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_E_ISOC 0x1 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_E_BULK 0x2 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_E_INTERR 0x3 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_LSB 18 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_MSB 19 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_WIDTH 2 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_SET_MSK 0x000c0000 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_CLR_MSK 0xfff3ffff | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_RESET 0x0 | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_GET(value) (((value) & 0x000c0000) >> 18) | |||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EPTYPE_SET(value) (((value) << 18) & 0x000c0000) | |||||||||||||||
Field : Multi Count Error Count - ec | ||||||||||||||||||||||
When the Split Enable bit of the Host Channel-n Split Control register (HCSPLTn.SpltEna) is reset (0), this field indicates to the host the number of transactions that must be executed per microframe for this periodic endpoint. for non periodic transfers, this field is used only in DMA mode, and specifies the number packets to be fetched for this channel before the internal DMA engine changes arbitration. When HCSPLTn.SpltEna is Set (1), this field indicates the number of immediate retries to be performed for a periodic split transactions on transaction errors. This field must be Set to at least 1. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_E_RSVD 0x0 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_E_TRANSONE 0x1 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_E_TRANSTWO 0x2 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_E_TRANSTHREE 0x3 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_LSB 20 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_MSB 21 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_WIDTH 2 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_SET_MSK 0x00300000 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_CLR_MSK 0xffcfffff | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_RESET 0x0 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_GET(value) (((value) & 0x00300000) >> 20) | |||||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_EC_SET(value) (((value) << 20) & 0x00300000) | |||||||||||||||||||||
Field : Device Address - devaddr | |
This field selects the specific device serving as the data source or sink. Field Access Macros: | |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_LSB 22 |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_MSB 28 |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_WIDTH 7 |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_SET_MSK 0x1fc00000 |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_CLR_MSK 0xe03fffff |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_RESET 0x0 |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_GET(value) (((value) & 0x1fc00000) >> 22) |
#define | ALT_USB_HOST_HCCHAR3_DEVADDR_SET(value) (((value) << 22) & 0x1fc00000) |
Field : Channel Disable - chdis | ||||||||||
The application sets this bit to stop transmitting/receiving data on a channel, even before the transfer for that channel is complete. The application must wait for the Channel Disabled interrupt before treating the channel as disabled. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_E_INACT 0x0 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_E_ACT 0x1 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_LSB 30 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_MSB 30 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_WIDTH 1 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_SET_MSK 0x40000000 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_CLR_MSK 0xbfffffff | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_RESET 0x0 | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_GET(value) (((value) & 0x40000000) >> 30) | |||||||||
#define | ALT_USB_HOST_HCCHAR3_CHDIS_SET(value) (((value) << 30) & 0x40000000) | |||||||||
Field : Channel Enable - chena | |||||||||||||||||||
When Scatter/Gather mode is disabled. This field is set by the application and cleared by the OTG host. Field Enumeration Values:
Field Access Macros: | |||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_E_NOTRDY 0x0 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_E_RDY 0x1 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_LSB 31 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_MSB 31 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_WIDTH 1 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_SET_MSK 0x80000000 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_CLR_MSK 0x7fffffff | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_RESET 0x0 | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_GET(value) (((value) & 0x80000000) >> 31) | ||||||||||||||||||
#define | ALT_USB_HOST_HCCHAR3_CHENA_SET(value) (((value) << 31) & 0x80000000) | ||||||||||||||||||
Data Structures | |
struct | ALT_USB_HOST_HCCHAR3_s |
Macros | |
#define | ALT_USB_HOST_HCCHAR3_OFST 0x160 |
#define | ALT_USB_HOST_HCCHAR3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR3_OFST)) |
Typedefs | |
typedef struct ALT_USB_HOST_HCCHAR3_s | ALT_USB_HOST_HCCHAR3_t |
struct ALT_USB_HOST_HCCHAR3_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_USB_HOST_HCCHAR3.
Data Fields | ||
---|---|---|
uint32_t | mps: 11 | Maximum Packet Size |
uint32_t | epnum: 4 | Endpoint Number |
uint32_t | epdir: 1 | Endpoint Direction |
uint32_t | __pad0__: 1 | UNDEFINED |
uint32_t | lspddev: 1 | Low-Speed Device |
uint32_t | eptype: 2 | Endpoint Type |
uint32_t | ec: 2 | Multi Count Error Count |
uint32_t | devaddr: 7 | Device Address |
uint32_t | __pad1__: 1 | UNDEFINED |
const uint32_t | chdis: 1 | Channel Disable |
const uint32_t | chena: 1 | Channel Enable |
#define ALT_USB_HOST_HCCHAR3_MPS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_MPS register field.
#define ALT_USB_HOST_HCCHAR3_MPS_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_MPS register field.
#define ALT_USB_HOST_HCCHAR3_MPS_WIDTH 11 |
The width in bits of the ALT_USB_HOST_HCCHAR3_MPS register field.
#define ALT_USB_HOST_HCCHAR3_MPS_SET_MSK 0x000007ff |
The mask used to set the ALT_USB_HOST_HCCHAR3_MPS register field value.
#define ALT_USB_HOST_HCCHAR3_MPS_CLR_MSK 0xfffff800 |
The mask used to clear the ALT_USB_HOST_HCCHAR3_MPS register field value.
#define ALT_USB_HOST_HCCHAR3_MPS_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_MPS register field.
#define ALT_USB_HOST_HCCHAR3_MPS_GET | ( | value | ) | (((value) & 0x000007ff) >> 0) |
Extracts the ALT_USB_HOST_HCCHAR3_MPS field value from a register.
#define ALT_USB_HOST_HCCHAR3_MPS_SET | ( | value | ) | (((value) << 0) & 0x000007ff) |
Produces a ALT_USB_HOST_HCCHAR3_MPS register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT0 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 0
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT1 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 1
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT2 0x2 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 2
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT3 0x3 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 3
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT4 0x4 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 4
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT5 0x5 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 5
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT6 0x6 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 6
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT7 0x7 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 7
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT8 0x8 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 8
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT9 0x9 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 9
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT10 0xa |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 10
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT11 0xb |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 11
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT12 0xc |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 12
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT13 0xd |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 13
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT14 0xe |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 14
#define ALT_USB_HOST_HCCHAR3_EPNUM_E_ENDPT15 0xf |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPNUM
End point 15
#define ALT_USB_HOST_HCCHAR3_EPNUM_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EPNUM register field.
#define ALT_USB_HOST_HCCHAR3_EPNUM_MSB 14 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EPNUM register field.
#define ALT_USB_HOST_HCCHAR3_EPNUM_WIDTH 4 |
The width in bits of the ALT_USB_HOST_HCCHAR3_EPNUM register field.
#define ALT_USB_HOST_HCCHAR3_EPNUM_SET_MSK 0x00007800 |
The mask used to set the ALT_USB_HOST_HCCHAR3_EPNUM register field value.
#define ALT_USB_HOST_HCCHAR3_EPNUM_CLR_MSK 0xffff87ff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_EPNUM register field value.
#define ALT_USB_HOST_HCCHAR3_EPNUM_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_EPNUM register field.
#define ALT_USB_HOST_HCCHAR3_EPNUM_GET | ( | value | ) | (((value) & 0x00007800) >> 11) |
Extracts the ALT_USB_HOST_HCCHAR3_EPNUM field value from a register.
#define ALT_USB_HOST_HCCHAR3_EPNUM_SET | ( | value | ) | (((value) << 11) & 0x00007800) |
Produces a ALT_USB_HOST_HCCHAR3_EPNUM register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_EPDIR_E_OUTDIR 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPDIR
OUT
#define ALT_USB_HOST_HCCHAR3_EPDIR_E_INDIR 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPDIR
IN
#define ALT_USB_HOST_HCCHAR3_EPDIR_LSB 15 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EPDIR register field.
#define ALT_USB_HOST_HCCHAR3_EPDIR_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EPDIR register field.
#define ALT_USB_HOST_HCCHAR3_EPDIR_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCCHAR3_EPDIR register field.
#define ALT_USB_HOST_HCCHAR3_EPDIR_SET_MSK 0x00008000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_EPDIR register field value.
#define ALT_USB_HOST_HCCHAR3_EPDIR_CLR_MSK 0xffff7fff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_EPDIR register field value.
#define ALT_USB_HOST_HCCHAR3_EPDIR_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_EPDIR register field.
#define ALT_USB_HOST_HCCHAR3_EPDIR_GET | ( | value | ) | (((value) & 0x00008000) >> 15) |
Extracts the ALT_USB_HOST_HCCHAR3_EPDIR field value from a register.
#define ALT_USB_HOST_HCCHAR3_EPDIR_SET | ( | value | ) | (((value) << 15) & 0x00008000) |
Produces a ALT_USB_HOST_HCCHAR3_EPDIR register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_E_NONLOWSPEED 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_LSPDDEV
Communicating with non lowspeed
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_E_LOWSPEED 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_LSPDDEV
Communicating with lowspeed
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_LSB 17 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_SET_MSK 0x00020000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_LSPDDEV register field value.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_CLR_MSK 0xfffdffff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_LSPDDEV register field value.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_LSPDDEV register field.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_GET | ( | value | ) | (((value) & 0x00020000) >> 17) |
Extracts the ALT_USB_HOST_HCCHAR3_LSPDDEV field value from a register.
#define ALT_USB_HOST_HCCHAR3_LSPDDEV_SET | ( | value | ) | (((value) << 17) & 0x00020000) |
Produces a ALT_USB_HOST_HCCHAR3_LSPDDEV register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_E_CTL 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
Control
#define ALT_USB_HOST_HCCHAR3_EPTYPE_E_ISOC 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
Isochronous
#define ALT_USB_HOST_HCCHAR3_EPTYPE_E_BULK 0x2 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
Bulk
#define ALT_USB_HOST_HCCHAR3_EPTYPE_E_INTERR 0x3 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EPTYPE
Interrupt
#define ALT_USB_HOST_HCCHAR3_EPTYPE_LSB 18 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EPTYPE register field.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_MSB 19 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EPTYPE register field.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_WIDTH 2 |
The width in bits of the ALT_USB_HOST_HCCHAR3_EPTYPE register field.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_SET_MSK 0x000c0000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_EPTYPE register field value.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_CLR_MSK 0xfff3ffff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_EPTYPE register field value.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_EPTYPE register field.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_GET | ( | value | ) | (((value) & 0x000c0000) >> 18) |
Extracts the ALT_USB_HOST_HCCHAR3_EPTYPE field value from a register.
#define ALT_USB_HOST_HCCHAR3_EPTYPE_SET | ( | value | ) | (((value) << 18) & 0x000c0000) |
Produces a ALT_USB_HOST_HCCHAR3_EPTYPE register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_EC_E_RSVD 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
Reserved This field yields undefined results
#define ALT_USB_HOST_HCCHAR3_EC_E_TRANSONE 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
1 transaction
#define ALT_USB_HOST_HCCHAR3_EC_E_TRANSTWO 0x2 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
2 transactions to be issued for this endpoint per microframe
#define ALT_USB_HOST_HCCHAR3_EC_E_TRANSTHREE 0x3 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_EC
3 transactions to be issued for this endpoint per microframe
#define ALT_USB_HOST_HCCHAR3_EC_LSB 20 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_EC register field.
#define ALT_USB_HOST_HCCHAR3_EC_MSB 21 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_EC register field.
#define ALT_USB_HOST_HCCHAR3_EC_WIDTH 2 |
The width in bits of the ALT_USB_HOST_HCCHAR3_EC register field.
#define ALT_USB_HOST_HCCHAR3_EC_SET_MSK 0x00300000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_EC register field value.
#define ALT_USB_HOST_HCCHAR3_EC_CLR_MSK 0xffcfffff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_EC register field value.
#define ALT_USB_HOST_HCCHAR3_EC_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_EC register field.
#define ALT_USB_HOST_HCCHAR3_EC_GET | ( | value | ) | (((value) & 0x00300000) >> 20) |
Extracts the ALT_USB_HOST_HCCHAR3_EC field value from a register.
#define ALT_USB_HOST_HCCHAR3_EC_SET | ( | value | ) | (((value) << 20) & 0x00300000) |
Produces a ALT_USB_HOST_HCCHAR3_EC register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_LSB 22 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_DEVADDR register field.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_MSB 28 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_DEVADDR register field.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_WIDTH 7 |
The width in bits of the ALT_USB_HOST_HCCHAR3_DEVADDR register field.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_SET_MSK 0x1fc00000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_DEVADDR register field value.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_CLR_MSK 0xe03fffff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_DEVADDR register field value.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_DEVADDR register field.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_GET | ( | value | ) | (((value) & 0x1fc00000) >> 22) |
Extracts the ALT_USB_HOST_HCCHAR3_DEVADDR field value from a register.
#define ALT_USB_HOST_HCCHAR3_DEVADDR_SET | ( | value | ) | (((value) << 22) & 0x1fc00000) |
Produces a ALT_USB_HOST_HCCHAR3_DEVADDR register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_CHDIS_E_INACT 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHDIS
No activity
#define ALT_USB_HOST_HCCHAR3_CHDIS_E_ACT 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHDIS
Stop transmitting/receiving data
#define ALT_USB_HOST_HCCHAR3_CHDIS_LSB 30 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_CHDIS register field.
#define ALT_USB_HOST_HCCHAR3_CHDIS_MSB 30 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_CHDIS register field.
#define ALT_USB_HOST_HCCHAR3_CHDIS_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCCHAR3_CHDIS register field.
#define ALT_USB_HOST_HCCHAR3_CHDIS_SET_MSK 0x40000000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_CHDIS register field value.
#define ALT_USB_HOST_HCCHAR3_CHDIS_CLR_MSK 0xbfffffff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_CHDIS register field value.
#define ALT_USB_HOST_HCCHAR3_CHDIS_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_CHDIS register field.
#define ALT_USB_HOST_HCCHAR3_CHDIS_GET | ( | value | ) | (((value) & 0x40000000) >> 30) |
Extracts the ALT_USB_HOST_HCCHAR3_CHDIS field value from a register.
#define ALT_USB_HOST_HCCHAR3_CHDIS_SET | ( | value | ) | (((value) << 30) & 0x40000000) |
Produces a ALT_USB_HOST_HCCHAR3_CHDIS register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_CHENA_E_NOTRDY 0x0 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHENA
Indicates that the descriptor structure is not yet ready
#define ALT_USB_HOST_HCCHAR3_CHENA_E_RDY 0x1 |
Enumerated value for register field ALT_USB_HOST_HCCHAR3_CHENA
Indicates that the descriptor structure and data buffer with data is setup and this channel can access the descriptor
#define ALT_USB_HOST_HCCHAR3_CHENA_LSB 31 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCCHAR3_CHENA register field.
#define ALT_USB_HOST_HCCHAR3_CHENA_MSB 31 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCCHAR3_CHENA register field.
#define ALT_USB_HOST_HCCHAR3_CHENA_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCCHAR3_CHENA register field.
#define ALT_USB_HOST_HCCHAR3_CHENA_SET_MSK 0x80000000 |
The mask used to set the ALT_USB_HOST_HCCHAR3_CHENA register field value.
#define ALT_USB_HOST_HCCHAR3_CHENA_CLR_MSK 0x7fffffff |
The mask used to clear the ALT_USB_HOST_HCCHAR3_CHENA register field value.
#define ALT_USB_HOST_HCCHAR3_CHENA_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCCHAR3_CHENA register field.
#define ALT_USB_HOST_HCCHAR3_CHENA_GET | ( | value | ) | (((value) & 0x80000000) >> 31) |
Extracts the ALT_USB_HOST_HCCHAR3_CHENA field value from a register.
#define ALT_USB_HOST_HCCHAR3_CHENA_SET | ( | value | ) | (((value) << 31) & 0x80000000) |
Produces a ALT_USB_HOST_HCCHAR3_CHENA register field value suitable for setting the register.
#define ALT_USB_HOST_HCCHAR3_OFST 0x160 |
The byte offset of the ALT_USB_HOST_HCCHAR3 register from the beginning of the component.
#define ALT_USB_HOST_HCCHAR3_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCCHAR3_OFST)) |
The address of the ALT_USB_HOST_HCCHAR3 register.
typedef struct ALT_USB_HOST_HCCHAR3_s ALT_USB_HOST_HCCHAR3_t |
The typedef declaration for register ALT_USB_HOST_HCCHAR3.