Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : INTMODE

Description

Interrupt mode

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_ECC_HMC_OCP_INTMOD_INTMOD
[7:1] ??? 0x0 UNDEFINED
[8] RW 0x0 ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN
[15:9] ??? 0x0 UNDEFINED
[16] RW 0x0 ALT_ECC_HMC_OCP_INTMOD_INTONCMP
[23:17] ??? 0x0 UNDEFINED
[24] RW 0x0 ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN
[31:25] ??? 0x0 UNDEFINED

Field : INTMODE

Interrupt mode for single-bit error.This is disabled when SERRINTEN is disabled.

1'b0: interrupt disbaled

1'b1: generate interrupt on every SERR

Field Access Macros:

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_LSB   0
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_MSB   0
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_WIDTH   1
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_SET_MSK   0x00000001
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_CLR_MSK   0xfffffffe
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_RESET   0x0
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_SET(value)   (((value) << 0) & 0x00000001)
 

Field : EXT_ADDRPARITY_EN

Enable address parity for DDR4 memories.

This bit is used to enable the interrupt that generate externally when address parity is detected. when enabled, this will be generating derr_req signal

1'b0: disable address parity on DERR interrupt

1'b1: enable address parity on DERR interrupt

Field Access Macros:

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_LSB   8
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_MSB   8
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_WIDTH   1
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_SET_MSK   0x00000100
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_CLR_MSK   0xfffffeff
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_RESET   0x0
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_SET(value)   (((value) << 8) & 0x00000100)
 

Field : INTONCMP

Enable interrupt on compare match.

This bit is used to enable interrupt when the internal counter and SERRCNTA value matches. serr_req signal will be asserted on a match.

1'b0: SERR interrupt on compare match is disabled

1'b1: SERR interrupt on compare match is enabled

Field Access Macros:

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_LSB   16
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_MSB   16
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_WIDTH   1
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_SET_MSK   0x00010000
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_CLR_MSK   0xfffeffff
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_RESET   0x0
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_SET(value)   (((value) << 16) & 0x00010000)
 

Field : AFICAL_EN

Enable interrupt of AFI Cal success.

This bit is used to enable interrupt of AFI Cal success. hmi_intr signal will be asserted on a match.

1'b0: HMI interrupts on compare match is disabled.

1'b1: HMI interrupts on compare matched is enabled.

Field Access Macros:

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_LSB   24
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_MSB   24
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_WIDTH   1
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_SET_MSK   0x01000000
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_CLR_MSK   0xfeffffff
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_RESET   0x0
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_SET(value)   (((value) << 24) & 0x01000000)
 

Data Structures

struct  ALT_ECC_HMC_OCP_INTMOD_s
 

Macros

#define ALT_ECC_HMC_OCP_INTMOD_RESET   0x00000000
 
#define ALT_ECC_HMC_OCP_INTMOD_OFST   0x11c
 

Typedefs

typedef struct
ALT_ECC_HMC_OCP_INTMOD_s 
ALT_ECC_HMC_OCP_INTMOD_t
 

Data Structure Documentation

struct ALT_ECC_HMC_OCP_INTMOD_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_ECC_HMC_OCP_INTMOD.

Data Fields
uint32_t INTMODE: 1 ALT_ECC_HMC_OCP_INTMOD_INTMOD
uint32_t __pad0__: 7 UNDEFINED
uint32_t EXT_ADDRPARITY_EN: 1 ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN
uint32_t __pad1__: 7 UNDEFINED
uint32_t INTONCMP: 1 ALT_ECC_HMC_OCP_INTMOD_INTONCMP
uint32_t __pad2__: 7 UNDEFINED
uint32_t AFICAL_EN: 1 ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN
uint32_t __pad3__: 7 UNDEFINED

Macro Definitions

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_LSB   0

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_INTMOD_INTMOD register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_MSB   0

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_INTMOD_INTMOD register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_INTMOD_INTMOD register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_SET_MSK   0x00000001

The mask used to set the ALT_ECC_HMC_OCP_INTMOD_INTMOD register field value.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_CLR_MSK   0xfffffffe

The mask used to clear the ALT_ECC_HMC_OCP_INTMOD_INTMOD register field value.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_INTMOD_INTMOD register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_ECC_HMC_OCP_INTMOD_INTMOD field value from a register.

#define ALT_ECC_HMC_OCP_INTMOD_INTMOD_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_ECC_HMC_OCP_INTMOD_INTMOD register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_LSB   8

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_MSB   8

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_SET_MSK   0x00000100

The mask used to set the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field value.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_CLR_MSK   0xfffffeff

The mask used to clear the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field value.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN field value from a register.

#define ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_ECC_HMC_OCP_INTMOD_EXT_ADDRPARITY_EN register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_LSB   16

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_MSB   16

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_SET_MSK   0x00010000

The mask used to set the ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field value.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_CLR_MSK   0xfffeffff

The mask used to clear the ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field value.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_ECC_HMC_OCP_INTMOD_INTONCMP field value from a register.

#define ALT_ECC_HMC_OCP_INTMOD_INTONCMP_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_ECC_HMC_OCP_INTMOD_INTONCMP register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_LSB   24

The Least Significant Bit (LSB) position of the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_MSB   24

The Most Significant Bit (MSB) position of the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_WIDTH   1

The width in bits of the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_SET_MSK   0x01000000

The mask used to set the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field value.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_CLR_MSK   0xfeffffff

The mask used to clear the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field value.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_RESET   0x0

The reset value of the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN field value from a register.

#define ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_ECC_HMC_OCP_INTMOD_AFICAL_EN register field value suitable for setting the register.

#define ALT_ECC_HMC_OCP_INTMOD_RESET   0x00000000

The reset value of the ALT_ECC_HMC_OCP_INTMOD register.

#define ALT_ECC_HMC_OCP_INTMOD_OFST   0x11c

The byte offset of the ALT_ECC_HMC_OCP_INTMOD register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_ECC_HMC_OCP_INTMOD.