Altera HWLIB  16.0
The Altera HW Manager API Reference Manual
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alt_can_private.h
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32 
33 /*
34  * $Id: //depot/embedded/rel/15.0/ip/hps/altera_hps/hwlib/include/alt_can_private.h#1 $
35  */
36 
37 /* Altera - ALT_CAN */
38 
39 #ifndef __ALTERA_ALT_CAN_PRIVATE_H__
40 #define __ALTERA_ALT_CAN_PRIVATE_H__
41 
42 #ifdef __cplusplus
43 extern "C"
44 {
45 #endif /* __cplusplus */
46 
47 /*
48  * Register : IF Command Register - IFCMR
49  *
50  * The control bits of the IF/2 Command Register specify the transfer direction
51  * and select which portions of the Message Object should be transferred. A message
52  * transfer is started as soon as the CPU has written the message number to the low
53  * byte of the Command Request Register and IFxCMR.AutoInc is zero. With this write
54  * operation, the IFxCMR.Busy bit is automatically set to 1 to notify the CPU that
55  * a transfer is in progress. After a wait time of 2 to 8 HOST_CLK periods, the
56  * transfer between theInterface Register and the Message RAM has been completed
57  * and the IFxCMR.Busy bit is cleared to 0. The upper limit of the wait time occurs
58  * when the message transfer coincides with a CAN message transmission, acceptance
59  * filtering, or message storage. If the CPU writes to both Command Registers
60  * consecutively (requests a second transfer while another transfer is already in
61  * progress), the second transfer starts when the first one is completed. Note:
62  * While Busy bit of IF/2 Command Register is one, IF/2 Register Set is write
63  * protected.
64  *
65  * Register Layout
66  *
67  * Bits | Access | Reset | Description
68  * :--------|:-------|:------|:-------------------------------------------------------------------
69  * [7:0] | RW | 0x1 | Message Number
70  * [12:8] | ??? | 0x0 | *UNDEFINED*
71  * [13] | RW | 0x0 | Automatic Increment of Message Object Number
72  * [14] | RW | 0x0 | Activation of DMA feature for subsequent internal IFx Register Set
73  * [15] | R | 0x0 | Busy Flag
74  * [16] | RW | 0x0 | Access Data Bytes 4-7
75  * [17] | RW | 0x0 | Access Data Bytes 0-3
76  * [18] | RW | 0x0 | Access Transmission Request Bit and NewDat Bit
77  * [19] | RW | 0x0 | Clear Interrupt Pending Bit
78  * [20] | RW | 0x0 | Access Control Bits
79  * [21] | RW | 0x0 | Access Arbitration Bits
80  * [22] | RW | 0x0 | Access Mask Bits
81  * [23] | RW | 0x0 | Write / Read Transfer
82  * [28:24] | ??? | 0x0 | *UNDEFINED*
83  * [29] | RW | 0x0 | Clear the AutoInc bit without starting a transfer
84  * [31:30] | ??? | 0x0 | *UNDEFINED*
85  *
86  */
87 /*
88  * Field : Message Number - MONum
89  *
90  * 0x01-0x80 Valid Message Number, the Message Object in the Message RAM is
91  * selected for data transfer (up to 128 MsgObj).
92  *
93  * 0x00 Not a valid Message Number, interpreted as 0x80.
94  *
95  * 0x81-0xFF Not a valid Message Number, interpreted as 0x01-0x7F.
96  *
97  * Note: When an invalid Message Number is written to IFxCMR.MONum which is higher
98  * than the last Message Object number, a modulo addressing will occur.When e.g.
99  * accessing Message Object 33 in a CAN module with 32 Message Objects only, the
100  * Message Object 1 will be accessed instead.
101  *
102  * Field Access Macros:
103  *
104  */
105 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
106 #define ALT_CAN_MSGIF_IFCMR_MONUM_LSB 0
107 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
108 #define ALT_CAN_MSGIF_IFCMR_MONUM_MSB 7
109 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
110 #define ALT_CAN_MSGIF_IFCMR_MONUM_WIDTH 8
111 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_MONUM register field value. */
112 #define ALT_CAN_MSGIF_IFCMR_MONUM_SET_MSK 0x000000ff
113 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_MONUM register field value. */
114 #define ALT_CAN_MSGIF_IFCMR_MONUM_CLR_MSK 0xffffff00
115 /* The reset value of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
116 #define ALT_CAN_MSGIF_IFCMR_MONUM_RESET 0x1
117 /* Extracts the ALT_CAN_MSGIF_IFCMR_MONUM field value from a register. */
118 #define ALT_CAN_MSGIF_IFCMR_MONUM_GET(value) (((value) & 0x000000ff) >> 0)
119 /* Produces a ALT_CAN_MSGIF_IFCMR_MONUM register field value suitable for setting the register. */
120 #define ALT_CAN_MSGIF_IFCMR_MONUM_SET(value) (((value) << 0) & 0x000000ff)
121 
122 /*
123  * Field : Automatic Increment of Message Object Number - AutoInc
124  *
125  * Automatic Increment of Message Object Number
126  *
127  * The behavior of the Message Object Number increment depends on the Transfer
128  * Direction, IFxCMR.WR1RD0.
129  *
130  * * Read: The first transfer will be initiated (Busy Bit will set) at write of
131  * IFxCMR.MONum. The Message Object Number will be incremented and the next
132  * Message Object will be transferred from Message Object RAM to Interface
133  * Registers after a read access of Data-Byte 7.
134  *
135  * * Write: The first as well as each other transfer will be started after write
136  * access to Data- Byte7. The Message Object Number will be incremented after
137  * successful transfer from the Interface Registers to the Message Object RAM.
138  *
139  * Always after successful transfer the Busy Bit will be reset. In combination with
140  * DMAactive the port CAN_IFxDMA is set, too.
141  *
142  * Note: If the direction is configured as Read a write access to Data-Byte 7 will
143  * not start any transfer, as well as if the direction is configured as Write a
144  * read access to Data-Byte 7 will not start any transfer. At transfer direction
145  * Read each read of Data-Byte 7 will start a transfer until IFxCMR.AutoInc is
146  * reset. To aware of resetting a NewDat bit of the following message object, the
147  * application has to reset IFxCMR.AutoInc before reading the Data-Byte 7 of the
148  * last message object which will be read.
149  *
150  * Field Enumeration Values:
151  *
152  * Enum | Value | Description
153  * :------------------------------------|:------|:-------------------------------------------------
154  * ALT_CAN_MSGIF_IFCMR_AUTOINC_E_DISD | 0x0 | AutoIncrement of Message Object Number disabled.
155  * ALT_CAN_MSGIF_IFCMR_AUTOINC_E_END | 0x1 | AutoIncrement of Message Object Number enabled.
156  *
157  * Field Access Macros:
158  *
159  */
160 /*
161  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_AUTOINC
162  *
163  * AutoIncrement of Message Object Number disabled.
164  */
165 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_E_DISD 0x0
166 /*
167  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_AUTOINC
168  *
169  * AutoIncrement of Message Object Number enabled.
170  */
171 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_E_END 0x1
172 
173 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
174 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_LSB 13
175 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
176 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_MSB 13
177 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
178 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_WIDTH 1
179 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_AUTOINC register field value. */
180 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_SET_MSK 0x00002000
181 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_AUTOINC register field value. */
182 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_CLR_MSK 0xffffdfff
183 /* The reset value of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
184 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_RESET 0x0
185 /* Extracts the ALT_CAN_MSGIF_IFCMR_AUTOINC field value from a register. */
186 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_GET(value) (((value) & 0x00002000) >> 13)
187 /* Produces a ALT_CAN_MSGIF_IFCMR_AUTOINC register field value suitable for setting the register. */
188 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_SET(value) (((value) << 13) & 0x00002000)
189 
190 /*
191  * Field : Activation of DMA feature for subsequent internal IFx Register Set - DMAactive
192  *
193  * Activation of DMA feature for subsequent internal IFx Register Set
194  *
195  * Field Enumeration Values:
196  *
197  * Enum | Value | Description
198  * :----------------------------------------|:------|:-------------------------------------------------
199  * ALT_CAN_MSGIF_IFCMR_DMAACT_E_PASSIVE | 0x0 | DMA line leaves passive, independent of IFx
200  * : | | activities.
201  * ALT_CAN_MSGIF_IFCMR_DMAACT_E_INITIATED | 0x1 | By writing to the Command Request Register, an
202  * : | | internal transfer of Message Object Data between
203  * : | | RAM and IFx will be initiated. When this
204  * : | | transfer is complete and DMAactive bit was set,
205  * : | | the CAN_IFxDMA line gets active. The DMAactive
206  * : | | bit and port CAN_IFxDMA are staying active until
207  * : | | first read or write access to one of the IFx
208  * : | | registers. If AutoInc is set DMAactive will be
209  * : | | left active, otherwise the bit is reset. Note:
210  * : | | Due to auto reset feature of DMAactive bit if
211  * : | | AutoInc is inactive, this bit has to be set for
212  * : | | each subsequent DMA cycle separately. DMA line
213  * : | | has to be enabled in CAN Control Register.
214  *
215  * Field Access Macros:
216  *
217  */
218 /*
219  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_DMAACT
220  *
221  * DMA line leaves passive, independent of IFx activities.
222  */
223 #define ALT_CAN_MSGIF_IFCMR_DMAACT_E_PASSIVE 0x0
224 /*
225  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_DMAACT
226  *
227  * By writing to the Command Request Register, an internal transfer of Message
228  * Object Data between RAM and IFx will be initiated. When this transfer is
229  * complete and DMAactive bit was set, the CAN_IFxDMA line gets active. The
230  * DMAactive bit and port CAN_IFxDMA are staying active until first read or write
231  * access to one of the IFx registers. If AutoInc is set DMAactive will be left
232  * active, otherwise the bit is reset.
233  *
234  * Note: Due to auto reset feature of DMAactive bit if AutoInc is inactive, this
235  * bit has to be set for each subsequent DMA cycle separately. DMA line has to be
236  * enabled in CAN Control Register.
237  */
238 #define ALT_CAN_MSGIF_IFCMR_DMAACT_E_INITIATED 0x1
239 
240 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
241 #define ALT_CAN_MSGIF_IFCMR_DMAACT_LSB 14
242 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
243 #define ALT_CAN_MSGIF_IFCMR_DMAACT_MSB 14
244 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
245 #define ALT_CAN_MSGIF_IFCMR_DMAACT_WIDTH 1
246 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_DMAACT register field value. */
247 #define ALT_CAN_MSGIF_IFCMR_DMAACT_SET_MSK 0x00004000
248 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_DMAACT register field value. */
249 #define ALT_CAN_MSGIF_IFCMR_DMAACT_CLR_MSK 0xffffbfff
250 /* The reset value of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
251 #define ALT_CAN_MSGIF_IFCMR_DMAACT_RESET 0x0
252 /* Extracts the ALT_CAN_MSGIF_IFCMR_DMAACT field value from a register. */
253 #define ALT_CAN_MSGIF_IFCMR_DMAACT_GET(value) (((value) & 0x00004000) >> 14)
254 /* Produces a ALT_CAN_MSGIF_IFCMR_DMAACT register field value suitable for setting the register. */
255 #define ALT_CAN_MSGIF_IFCMR_DMAACT_SET(value) (((value) << 14) & 0x00004000)
256 
257 /*
258  * Field : Busy Flag - Busy
259  *
260  * Busy Flag
261  *
262  * Field Enumeration Values:
263  *
264  * Enum | Value | Description
265  * :------------------------------------|:------|:-------------------------------------------------
266  * ALT_CAN_MSGIF_IFCMR_BUSY_E_DONE | 0x0 | Set to zero when read/write action has finished.
267  * ALT_CAN_MSGIF_IFCMR_BUSY_E_WRITING | 0x1 | Set to one when writing to the IFxCMR.MONum.
268  * : | | While bit is one, IFx Register Set is write
269  * : | | protected.
270  *
271  * Field Access Macros:
272  *
273  */
274 /*
275  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_BUSY
276  *
277  * Set to zero when read/write action has finished.
278  */
279 #define ALT_CAN_MSGIF_IFCMR_BUSY_E_DONE 0x0
280 /*
281  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_BUSY
282  *
283  * Set to one when writing to the IFxCMR.MONum. While bit is one, IFx Register Set
284  * is write protected.
285  */
286 #define ALT_CAN_MSGIF_IFCMR_BUSY_E_WRITING 0x1
287 
288 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
289 #define ALT_CAN_MSGIF_IFCMR_BUSY_LSB 15
290 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
291 #define ALT_CAN_MSGIF_IFCMR_BUSY_MSB 15
292 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
293 #define ALT_CAN_MSGIF_IFCMR_BUSY_WIDTH 1
294 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_BUSY register field value. */
295 #define ALT_CAN_MSGIF_IFCMR_BUSY_SET_MSK 0x00008000
296 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_BUSY register field value. */
297 #define ALT_CAN_MSGIF_IFCMR_BUSY_CLR_MSK 0xffff7fff
298 /* The reset value of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
299 #define ALT_CAN_MSGIF_IFCMR_BUSY_RESET 0x0
300 /* Extracts the ALT_CAN_MSGIF_IFCMR_BUSY field value from a register. */
301 #define ALT_CAN_MSGIF_IFCMR_BUSY_GET(value) (((value) & 0x00008000) >> 15)
302 /* Produces a ALT_CAN_MSGIF_IFCMR_BUSY register field value suitable for setting the register. */
303 #define ALT_CAN_MSGIF_IFCMR_BUSY_SET(value) (((value) << 15) & 0x00008000)
304 
305 /*
306  * Field : Access Data Bytes 4-7 - DataB
307  *
308  * Write Direction:
309  *
310  * 0= Data Bytes 4-7 unchanged.
311  *
312  * 1= transfer Data Bytes 4-7 to Message Object.
313  *
314  * Read Direction:
315  *
316  * 0= Data Bytes 4-7 unchanged.
317  *
318  * 1= transfer Data Bytes 4-7 to IFxDB.
319  *
320  * Note: The speed of the message transfer does not depend on how many bytes are
321  * transferred.
322  *
323  * Field Access Macros:
324  *
325  */
326 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
327 #define ALT_CAN_MSGIF_IFCMR_DATAB_LSB 16
328 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
329 #define ALT_CAN_MSGIF_IFCMR_DATAB_MSB 16
330 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
331 #define ALT_CAN_MSGIF_IFCMR_DATAB_WIDTH 1
332 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_DATAB register field value. */
333 #define ALT_CAN_MSGIF_IFCMR_DATAB_SET_MSK 0x00010000
334 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_DATAB register field value. */
335 #define ALT_CAN_MSGIF_IFCMR_DATAB_CLR_MSK 0xfffeffff
336 /* The reset value of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
337 #define ALT_CAN_MSGIF_IFCMR_DATAB_RESET 0x0
338 /* Extracts the ALT_CAN_MSGIF_IFCMR_DATAB field value from a register. */
339 #define ALT_CAN_MSGIF_IFCMR_DATAB_GET(value) (((value) & 0x00010000) >> 16)
340 /* Produces a ALT_CAN_MSGIF_IFCMR_DATAB register field value suitable for setting the register. */
341 #define ALT_CAN_MSGIF_IFCMR_DATAB_SET(value) (((value) << 16) & 0x00010000)
342 
343 /*
344  * Field : Access Data Bytes 0-3 - DataA
345  *
346  * Write Direction:
347  *
348  * 0= Data Bytes 0-3 unchanged.
349  *
350  * 1= transfer Data Bytes 0-3 to Message Object.
351  *
352  * Read Direction:
353  *
354  * 0= Data Bytes 0-3 unchanged.
355  *
356  * 1= transfer Data Bytes 0-3 to IFxDA.
357  *
358  * Field Access Macros:
359  *
360  */
361 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
362 #define ALT_CAN_MSGIF_IFCMR_DATAA_LSB 17
363 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
364 #define ALT_CAN_MSGIF_IFCMR_DATAA_MSB 17
365 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
366 #define ALT_CAN_MSGIF_IFCMR_DATAA_WIDTH 1
367 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_DATAA register field value. */
368 #define ALT_CAN_MSGIF_IFCMR_DATAA_SET_MSK 0x00020000
369 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_DATAA register field value. */
370 #define ALT_CAN_MSGIF_IFCMR_DATAA_CLR_MSK 0xfffdffff
371 /* The reset value of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
372 #define ALT_CAN_MSGIF_IFCMR_DATAA_RESET 0x0
373 /* Extracts the ALT_CAN_MSGIF_IFCMR_DATAA field value from a register. */
374 #define ALT_CAN_MSGIF_IFCMR_DATAA_GET(value) (((value) & 0x00020000) >> 17)
375 /* Produces a ALT_CAN_MSGIF_IFCMR_DATAA register field value suitable for setting the register. */
376 #define ALT_CAN_MSGIF_IFCMR_DATAA_SET(value) (((value) << 17) & 0x00020000)
377 
378 /*
379  * Field : Access Transmission Request Bit and NewDat Bit - TxRqstNewDat
380  *
381  * Write Direction:
382  *
383  * 0= TxRqst and NewDat bit will be handled according IFxMCTR.NewDat bit and
384  * IFxMCTR.TxRqst bit.
385  *
386  * 1= set TxRqst and NewDat in Message Object to one
387  *
388  * Note: If a CAN transmission is requested by setting IFxCMR.TxRqst/NewDat, the
389  * TxRqst and NewDat bits in the Message Object will be set to one independently of
390  * the values in IFxMCTR.
391  *
392  * Read Direction:
393  *
394  * 0= NewDat bit remains unchanged.
395  *
396  * 1= clear NewDat bit in the Message Object.
397  *
398  * Note: A read access to a Message Object can be combined with the reset of the
399  * control bits IntPnd and NewDat. The values of these bits transferred to the
400  * IFxMCTR always reflect the status before resetting them.
401  *
402  * Field Access Macros:
403  *
404  */
405 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
406 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_LSB 18
407 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
408 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_MSB 18
409 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
410 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_WIDTH 1
411 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field value. */
412 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_SET_MSK 0x00040000
413 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field value. */
414 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_CLR_MSK 0xfffbffff
415 /* The reset value of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
416 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_RESET 0x0
417 /* Extracts the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT field value from a register. */
418 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_GET(value) (((value) & 0x00040000) >> 18)
419 /* Produces a ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field value suitable for setting the register. */
420 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_SET(value) (((value) << 18) & 0x00040000)
421 
422 /*
423  * Field : Clear Interrupt Pending Bit - ClrIntPnd
424  *
425  * Write Direction:
426  *
427  * Has no influence to Message Object at write transfer.
428  *
429  * Note: When writing to a Message Object, this bit is ignored and copying of
430  * IntPnd flag from IFx Control Register to Message RAM could only be controlled by
431  * IFxMTR.IntPnd bit.
432  *
433  * Read Direction:
434  *
435  * 0= IntPnd bit remains unchanged.
436  *
437  * 1= clear IntPnd bit in the Message Object.
438  *
439  * Field Access Macros:
440  *
441  */
442 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
443 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_LSB 19
444 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
445 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_MSB 19
446 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
447 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_WIDTH 1
448 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field value. */
449 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_SET_MSK 0x00080000
450 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field value. */
451 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_CLR_MSK 0xfff7ffff
452 /* The reset value of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
453 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_RESET 0x0
454 /* Extracts the ALT_CAN_MSGIF_IFCMR_CLRINTPND field value from a register. */
455 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_GET(value) (((value) & 0x00080000) >> 19)
456 /* Produces a ALT_CAN_MSGIF_IFCMR_CLRINTPND register field value suitable for setting the register. */
457 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_SET(value) (((value) << 19) & 0x00080000)
458 
459 /*
460  * Field : Access Control Bits - Control
461  *
462  * Write Direction:
463  *
464  * 0= Control Bits unchanged.
465  *
466  * 1= transfer Control Bits to Message Object.
467  *
468  * Note: If IFxCMR.TxRqst/NewDat bit is set, bits IFxMCTR.TxRqst and IFxMCTR.NewDat
469  * will be ignored.
470  *
471  * Read Direction:
472  *
473  * 0= Control Bits unchanged.
474  *
475  * 1= transfer Control Bits to IFxMCTR Register.
476  *
477  * Field Access Macros:
478  *
479  */
480 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
481 #define ALT_CAN_MSGIF_IFCMR_CTL_LSB 20
482 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
483 #define ALT_CAN_MSGIF_IFCMR_CTL_MSB 20
484 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
485 #define ALT_CAN_MSGIF_IFCMR_CTL_WIDTH 1
486 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_CTL register field value. */
487 #define ALT_CAN_MSGIF_IFCMR_CTL_SET_MSK 0x00100000
488 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_CTL register field value. */
489 #define ALT_CAN_MSGIF_IFCMR_CTL_CLR_MSK 0xffefffff
490 /* The reset value of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
491 #define ALT_CAN_MSGIF_IFCMR_CTL_RESET 0x0
492 /* Extracts the ALT_CAN_MSGIF_IFCMR_CTL field value from a register. */
493 #define ALT_CAN_MSGIF_IFCMR_CTL_GET(value) (((value) & 0x00100000) >> 20)
494 /* Produces a ALT_CAN_MSGIF_IFCMR_CTL register field value suitable for setting the register. */
495 #define ALT_CAN_MSGIF_IFCMR_CTL_SET(value) (((value) << 20) & 0x00100000)
496 
497 /*
498  * Field : Access Arbitration Bits - Arb
499  *
500  * Write Direction:
501  *
502  * 0= Arbitration bits unchanged.
503  *
504  * 1= transfer Identifier + Dir + Xtd + MsgVal to Message Object.
505  *
506  * Read Direction:
507  *
508  * 0= Arbitration bits unchanged.
509  *
510  * 1= transfer Identifier + Dir + Xtd + MsgVal to IFxARB Register.
511  *
512  * Field Access Macros:
513  *
514  */
515 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
516 #define ALT_CAN_MSGIF_IFCMR_ARB_LSB 21
517 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
518 #define ALT_CAN_MSGIF_IFCMR_ARB_MSB 21
519 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
520 #define ALT_CAN_MSGIF_IFCMR_ARB_WIDTH 1
521 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_ARB register field value. */
522 #define ALT_CAN_MSGIF_IFCMR_ARB_SET_MSK 0x00200000
523 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_ARB register field value. */
524 #define ALT_CAN_MSGIF_IFCMR_ARB_CLR_MSK 0xffdfffff
525 /* The reset value of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
526 #define ALT_CAN_MSGIF_IFCMR_ARB_RESET 0x0
527 /* Extracts the ALT_CAN_MSGIF_IFCMR_ARB field value from a register. */
528 #define ALT_CAN_MSGIF_IFCMR_ARB_GET(value) (((value) & 0x00200000) >> 21)
529 /* Produces a ALT_CAN_MSGIF_IFCMR_ARB register field value suitable for setting the register. */
530 #define ALT_CAN_MSGIF_IFCMR_ARB_SET(value) (((value) << 21) & 0x00200000)
531 
532 /*
533  * Field : Access Mask Bits - Mask
534  *
535  * Write Direction:
536  *
537  * 0= Mask bits unchanged.
538  *
539  * 1= transfer Identifier Mask + MDir + MXtd to Message Object.
540  *
541  * Read Direction:
542  *
543  * 0= Mask bits unchanged.
544  *
545  * 1= transfer Identifier Mask + MDir + MXtd to IFxMSK Register.
546  *
547  * Field Access Macros:
548  *
549  */
550 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
551 #define ALT_CAN_MSGIF_IFCMR_MSK_LSB 22
552 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
553 #define ALT_CAN_MSGIF_IFCMR_MSK_MSB 22
554 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
555 #define ALT_CAN_MSGIF_IFCMR_MSK_WIDTH 1
556 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_MSK register field value. */
557 #define ALT_CAN_MSGIF_IFCMR_MSK_SET_MSK 0x00400000
558 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_MSK register field value. */
559 #define ALT_CAN_MSGIF_IFCMR_MSK_CLR_MSK 0xffbfffff
560 /* The reset value of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
561 #define ALT_CAN_MSGIF_IFCMR_MSK_RESET 0x0
562 /* Extracts the ALT_CAN_MSGIF_IFCMR_MSK field value from a register. */
563 #define ALT_CAN_MSGIF_IFCMR_MSK_GET(value) (((value) & 0x00400000) >> 22)
564 /* Produces a ALT_CAN_MSGIF_IFCMR_MSK register field value suitable for setting the register. */
565 #define ALT_CAN_MSGIF_IFCMR_MSK_SET(value) (((value) << 22) & 0x00400000)
566 
567 /*
568  * Field : Write / Read Transfer - WR1RD0
569  *
570  * Write / Read Transfer
571  *
572  * Field Enumeration Values:
573  *
574  * Enum | Value | Description
575  * :---------------------------------|:------|:-------------------------------------------------
576  * ALT_CAN_MSGIF_IFCMR_WR1RD0_E_RD | 0x0 | Transfer data from the Message Object addressed
577  * : | | by IFxCMR.MONum into the selected IFx Message
578  * : | | Buffer Registers.
579  * ALT_CAN_MSGIF_IFCMR_WR1RD0_E_WR | 0x1 | Transfer data from the selected IFx Message
580  * : | | Buffer Registers to the Message Object addressed
581  * : | | by IFxCMR.MONum.
582  *
583  * Field Access Macros:
584  *
585  */
586 /*
587  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_WR1RD0
588  *
589  * Transfer data from the Message Object addressed by IFxCMR.MONum into the
590  * selected IFx Message Buffer Registers.
591  */
592 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_E_RD 0x0
593 /*
594  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_WR1RD0
595  *
596  * Transfer data from the selected IFx Message Buffer Registers to the Message
597  * Object addressed by IFxCMR.MONum.
598  */
599 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_E_WR 0x1
600 
601 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
602 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_LSB 23
603 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
604 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_MSB 23
605 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
606 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_WIDTH 1
607 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field value. */
608 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_SET_MSK 0x00800000
609 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field value. */
610 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_CLR_MSK 0xff7fffff
611 /* The reset value of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
612 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_RESET 0x0
613 /* Extracts the ALT_CAN_MSGIF_IFCMR_WR1RD0 field value from a register. */
614 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_GET(value) (((value) & 0x00800000) >> 23)
615 /* Produces a ALT_CAN_MSGIF_IFCMR_WR1RD0 register field value suitable for setting the register. */
616 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_SET(value) (((value) << 23) & 0x00800000)
617 
618 /*
619  * Field : Clear the AutoInc bit without starting a transfer - ClrAutoInc
620  *
621  * Clear the AutoInc bit without starting a transfer
622  *
623  * Field Enumeration Values:
624  *
625  * Enum | Value | Description
626  * :----------------------------------------|:------|:------------------------------------------
627  * ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_NOCLR | 0x0 | Has no effect to the other Bits of this
628  * : | | Register.
629  * ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_CLR | 0x1 | Clear the AutoInc bit without starting a
630  * : | | transfer, all other bits will be ignored.
631  *
632  * Field Access Macros:
633  *
634  */
635 /*
636  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_CLRAUTOINC
637  *
638  * Has no effect to the other Bits of this Register.
639  */
640 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_NOCLR 0x0
641 /*
642  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_CLRAUTOINC
643  *
644  * Clear the AutoInc bit without starting a transfer, all other bits will be
645  * ignored.
646  */
647 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_CLR 0x1
648 
649 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
650 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_LSB 29
651 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
652 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_MSB 29
653 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
654 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_WIDTH 1
655 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field value. */
656 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_SET_MSK 0x20000000
657 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field value. */
658 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_CLR_MSK 0xdfffffff
659 /* The reset value of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
660 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_RESET 0x0
661 /* Extracts the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC field value from a register. */
662 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_GET(value) (((value) & 0x20000000) >> 29)
663 /* Produces a ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field value suitable for setting the register. */
664 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_SET(value) (((value) << 29) & 0x20000000)
665 
666 #ifndef __ASSEMBLY__
667 /*
668  * WARNING: The C register and register group struct declarations are provided for
669  * convenience and illustrative purposes. They should, however, be used with
670  * caution as the C language standard provides no guarantees about the alignment or
671  * atomicity of device memory accesses. The recommended practice for writing
672  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
673  * alt_write_word() functions.
674  *
675  * The struct declaration for register ALT_CAN_MSGIF_IFCMR.
676  */
677 struct ALT_CAN_MSGIF_IFCMR_s
678 {
679  uint32_t MONum : 8; /* Message Number */
680  uint32_t : 5; /* *UNDEFINED* */
681  uint32_t AutoInc : 1; /* Automatic Increment of Message Object Number */
682  uint32_t DMAactive : 1; /* Activation of DMA feature for subsequent internal IFx Register Set */
683  const uint32_t Busy : 1; /* Busy Flag */
684  uint32_t DataB : 1; /* Access Data Bytes 4-7 */
685  uint32_t DataA : 1; /* Access Data Bytes 0-3 */
686  uint32_t TxRqstNewDat : 1; /* Access Transmission Request Bit and NewDat Bit */
687  uint32_t ClrIntPnd : 1; /* Clear Interrupt Pending Bit */
688  uint32_t Control : 1; /* Access Control Bits */
689  uint32_t Arb : 1; /* Access Arbitration Bits */
690  uint32_t Mask : 1; /* Access Mask Bits */
691  uint32_t WR1RD0 : 1; /* Write / Read Transfer */
692  uint32_t : 5; /* *UNDEFINED* */
693  uint32_t ClrAutoInc : 1; /* Clear the AutoInc bit without starting a transfer */
694  uint32_t : 2; /* *UNDEFINED* */
695 };
696 
697 /* The typedef declaration for register ALT_CAN_MSGIF_IFCMR. */
698 typedef volatile struct ALT_CAN_MSGIF_IFCMR_s ALT_CAN_MSGIF_IFCMR_t;
699 #endif /* __ASSEMBLY__ */
700 
701 /* The byte offset of the ALT_CAN_MSGIF_IFCMR register from the beginning of the component. */
702 #define ALT_CAN_MSGIF_IFCMR_OFST 0x0
703 /* The address of the ALT_CAN_MSGIF_IFCMR register. */
704 #define ALT_CAN_MSGIF_IFCMR_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFCMR_OFST))
705 
706 /*
707  * Register : IF Mask Register - IFMSK
708  *
709  * The Message Object Mask Bits together with the arbitration bits are used for
710  * acceptance filtering of incoming messages.
711  *
712  * Note: While IFxCMR.Busy bit is one, the IF/2 Register Set is write protected.
713  *
714  * Register Layout
715  *
716  * Bits | Access | Reset | Description
717  * :-------|:-------|:-----------|:-------------------------
718  * [28:0] | RW | 0x1fffffff | Identifier Mask
719  * [29] | ??? | 0x1 | *UNDEFINED*
720  * [30] | RW | 0x1 | Mask Message Direction
721  * [31] | RW | 0x1 | Mask Extended Identifier
722  *
723  */
724 /*
725  * Field : Identifier Mask - Msk
726  *
727  * 0 = The corresponding bit in the identifier of the message object cannot inhibit
728  * the match in the acceptance filtering.
729  *
730  * 1 = The corresponding identifier bit is used for acceptance filtering.
731  *
732  * Field Access Macros:
733  *
734  */
735 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
736 #define ALT_CAN_MSGIF_IFMSK_MSK_LSB 0
737 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
738 #define ALT_CAN_MSGIF_IFMSK_MSK_MSB 28
739 /* The width in bits of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
740 #define ALT_CAN_MSGIF_IFMSK_MSK_WIDTH 29
741 /* The mask used to set the ALT_CAN_MSGIF_IFMSK_MSK register field value. */
742 #define ALT_CAN_MSGIF_IFMSK_MSK_SET_MSK 0x1fffffff
743 /* The mask used to clear the ALT_CAN_MSGIF_IFMSK_MSK register field value. */
744 #define ALT_CAN_MSGIF_IFMSK_MSK_CLR_MSK 0xe0000000
745 /* The reset value of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
746 #define ALT_CAN_MSGIF_IFMSK_MSK_RESET 0x1fffffff
747 /* Extracts the ALT_CAN_MSGIF_IFMSK_MSK field value from a register. */
748 #define ALT_CAN_MSGIF_IFMSK_MSK_GET(value) (((value) & 0x1fffffff) >> 0)
749 /* Produces a ALT_CAN_MSGIF_IFMSK_MSK register field value suitable for setting the register. */
750 #define ALT_CAN_MSGIF_IFMSK_MSK_SET(value) (((value) << 0) & 0x1fffffff)
751 
752 /*
753  * Field : Mask Message Direction - MDir
754  *
755  * Field Enumeration Values:
756  *
757  * Enum | Value | Description
758  * :-------------------------------------------|:------|:-------------------------------------------------
759  * ALT_CAN_MSGIF_IFMSK_MDIR_E_NOACCEPTEFFECT | 0x0 | The message direction bit (Dir) has no effect on
760  * : | | the acceptance filtering. Handle with care
761  * : | | setting IFxMSK.MDir to zero.
762  * ALT_CAN_MSGIF_IFMSK_MDIR_E_ACCEPTEFFECT | 0x1 | The message direction bit (Dir) is used for
763  * : | | acceptance filtering.
764  *
765  * Field Access Macros:
766  *
767  */
768 /*
769  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MDIR
770  *
771  * The message direction bit (Dir) has no effect on the acceptance filtering.
772  * Handle with care setting IFxMSK.MDir to zero.
773  */
774 #define ALT_CAN_MSGIF_IFMSK_MDIR_E_NOACCEPTEFFECT 0x0
775 /*
776  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MDIR
777  *
778  * The message direction bit (Dir) is used for acceptance filtering.
779  */
780 #define ALT_CAN_MSGIF_IFMSK_MDIR_E_ACCEPTEFFECT 0x1
781 
782 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
783 #define ALT_CAN_MSGIF_IFMSK_MDIR_LSB 30
784 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
785 #define ALT_CAN_MSGIF_IFMSK_MDIR_MSB 30
786 /* The width in bits of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
787 #define ALT_CAN_MSGIF_IFMSK_MDIR_WIDTH 1
788 /* The mask used to set the ALT_CAN_MSGIF_IFMSK_MDIR register field value. */
789 #define ALT_CAN_MSGIF_IFMSK_MDIR_SET_MSK 0x40000000
790 /* The mask used to clear the ALT_CAN_MSGIF_IFMSK_MDIR register field value. */
791 #define ALT_CAN_MSGIF_IFMSK_MDIR_CLR_MSK 0xbfffffff
792 /* The reset value of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
793 #define ALT_CAN_MSGIF_IFMSK_MDIR_RESET 0x1
794 /* Extracts the ALT_CAN_MSGIF_IFMSK_MDIR field value from a register. */
795 #define ALT_CAN_MSGIF_IFMSK_MDIR_GET(value) (((value) & 0x40000000) >> 30)
796 /* Produces a ALT_CAN_MSGIF_IFMSK_MDIR register field value suitable for setting the register. */
797 #define ALT_CAN_MSGIF_IFMSK_MDIR_SET(value) (((value) << 30) & 0x40000000)
798 
799 /*
800  * Field : Mask Extended Identifier - MXtd
801  *
802  * When 11-bit (standard) Identifiers are used for a Message Object, the
803  * identifiers of received Data Frames are written into bits ID28 to ID18. For
804  * acceptance filtering, only these bits together with mask bits Msk28 to Msk18 are
805  * considered.
806  *
807  * Field Enumeration Values:
808  *
809  * Enum | Value | Description
810  * :-------------------------------------------|:------|:------------------------------------------------
811  * ALT_CAN_MSGIF_IFMSK_MXTD_E_NOACCEPTEFFECT | 0x0 | The extended identifier bit (IDE) has no effect
812  * : | | on the acceptance filtering.
813  * ALT_CAN_MSGIF_IFMSK_MXTD_E_ACCEPTEFFECT | 0x1 | The extended identifier bit (IDE) is used for
814  * : | | acceptance filtering.
815  *
816  * Field Access Macros:
817  *
818  */
819 /*
820  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MXTD
821  *
822  * The extended identifier bit (IDE) has no effect on the acceptance filtering.
823  */
824 #define ALT_CAN_MSGIF_IFMSK_MXTD_E_NOACCEPTEFFECT 0x0
825 /*
826  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MXTD
827  *
828  * The extended identifier bit (IDE) is used for acceptance filtering.
829  */
830 #define ALT_CAN_MSGIF_IFMSK_MXTD_E_ACCEPTEFFECT 0x1
831 
832 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
833 #define ALT_CAN_MSGIF_IFMSK_MXTD_LSB 31
834 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
835 #define ALT_CAN_MSGIF_IFMSK_MXTD_MSB 31
836 /* The width in bits of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
837 #define ALT_CAN_MSGIF_IFMSK_MXTD_WIDTH 1
838 /* The mask used to set the ALT_CAN_MSGIF_IFMSK_MXTD register field value. */
839 #define ALT_CAN_MSGIF_IFMSK_MXTD_SET_MSK 0x80000000
840 /* The mask used to clear the ALT_CAN_MSGIF_IFMSK_MXTD register field value. */
841 #define ALT_CAN_MSGIF_IFMSK_MXTD_CLR_MSK 0x7fffffff
842 /* The reset value of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
843 #define ALT_CAN_MSGIF_IFMSK_MXTD_RESET 0x1
844 /* Extracts the ALT_CAN_MSGIF_IFMSK_MXTD field value from a register. */
845 #define ALT_CAN_MSGIF_IFMSK_MXTD_GET(value) (((value) & 0x80000000) >> 31)
846 /* Produces a ALT_CAN_MSGIF_IFMSK_MXTD register field value suitable for setting the register. */
847 #define ALT_CAN_MSGIF_IFMSK_MXTD_SET(value) (((value) << 31) & 0x80000000)
848 
849 #ifndef __ASSEMBLY__
850 /*
851  * WARNING: The C register and register group struct declarations are provided for
852  * convenience and illustrative purposes. They should, however, be used with
853  * caution as the C language standard provides no guarantees about the alignment or
854  * atomicity of device memory accesses. The recommended practice for writing
855  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
856  * alt_write_word() functions.
857  *
858  * The struct declaration for register ALT_CAN_MSGIF_IFMSK.
859  */
860 struct ALT_CAN_MSGIF_IFMSK_s
861 {
862  uint32_t Msk : 29; /* Identifier Mask */
863  uint32_t : 1; /* *UNDEFINED* */
864  uint32_t MDir : 1; /* Mask Message Direction */
865  uint32_t MXtd : 1; /* Mask Extended Identifier */
866 };
867 
868 /* The typedef declaration for register ALT_CAN_MSGIF_IFMSK. */
869 typedef volatile struct ALT_CAN_MSGIF_IFMSK_s ALT_CAN_MSGIF_IFMSK_t;
870 #endif /* __ASSEMBLY__ */
871 
872 /* The byte offset of the ALT_CAN_MSGIF_IFMSK register from the beginning of the component. */
873 #define ALT_CAN_MSGIF_IFMSK_OFST 0x4
874 /* The address of the ALT_CAN_MSGIF_IFMSK register. */
875 #define ALT_CAN_MSGIF_IFMSK_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFMSK_OFST))
876 
877 /*
878  * Register : IF Arbitration Register - IFARB
879  *
880  * The Arbitration Registers ID28-0, Xtd, and Dir are used to define the identifier
881  * and type of outgoing messages and are used (together with the mask registers
882  * Msk28-0, MXtd, and MDir) for acceptance filtering of incoming messages. A
883  * received message is stored into the valid Message Object with matching
884  * identifier and Direction=receive (Data Frame) or Direction=transmit (Remote
885  * Frame). Extended frames can be stored only in Message Objects with Xtd = one,
886  * standard frames in Message Objects with Xtd = zero. If a received message (Data
887  * Frame or Remote Frame) matches with more than one valid Message Object, it is
888  * stored into that with the lowest message number.
889  *
890  * Register Layout
891  *
892  * Bits | Access | Reset | Description
893  * :-------|:-------|:------|:--------------------
894  * [28:0] | RW | 0x0 | Identifier Mask
895  * [29] | RW | 0x0 | Message Direction
896  * [30] | RW | 0x0 | Extended Identifier
897  * [31] | RW | 0x0 | Message Valid
898  *
899  */
900 /*
901  * Field : Identifier Mask - ID
902  *
903  * ID28 - ID0 29-bit Identifier (Extended Frame).
904  *
905  * ID28 - ID18 11-bit Identifier (Standard Frame).
906  *
907  * Field Access Macros:
908  *
909  */
910 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_ID register field. */
911 #define ALT_CAN_MSGIF_IFARB_ID_LSB 0
912 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_ID register field. */
913 #define ALT_CAN_MSGIF_IFARB_ID_MSB 28
914 /* The width in bits of the ALT_CAN_MSGIF_IFARB_ID register field. */
915 #define ALT_CAN_MSGIF_IFARB_ID_WIDTH 29
916 /* The mask used to set the ALT_CAN_MSGIF_IFARB_ID register field value. */
917 #define ALT_CAN_MSGIF_IFARB_ID_SET_MSK 0x1fffffff
918 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_ID register field value. */
919 #define ALT_CAN_MSGIF_IFARB_ID_CLR_MSK 0xe0000000
920 /* The reset value of the ALT_CAN_MSGIF_IFARB_ID register field. */
921 #define ALT_CAN_MSGIF_IFARB_ID_RESET 0x0
922 /* Extracts the ALT_CAN_MSGIF_IFARB_ID field value from a register. */
923 #define ALT_CAN_MSGIF_IFARB_ID_GET(value) (((value) & 0x1fffffff) >> 0)
924 /* Produces a ALT_CAN_MSGIF_IFARB_ID register field value suitable for setting the register. */
925 #define ALT_CAN_MSGIF_IFARB_ID_SET(value) (((value) << 0) & 0x1fffffff)
926 
927 /*
928  * Field : Message Direction - Dir
929  *
930  * Message Direction
931  *
932  * Field Enumeration Values:
933  *
934  * Enum | Value | Description
935  * :------------------------------|:------|:-------------------------------------------------
936  * ALT_CAN_MSGIF_IFARB_DIR_E_RX | 0x0 | On TxRqst, a Remote Frame with the identifier of
937  * : | | this Message Object is transmitted. On reception
938  * : | | of a Data Frame with matching identifier, that
939  * : | | message is stored in this Message Object.
940  * ALT_CAN_MSGIF_IFARB_DIR_E_TX | 0x1 | On TxRqst, the respective Message Object is
941  * : | | transmitted as a Data Frame. On reception of a
942  * : | | Remote Frame with matching identifier, the
943  * : | | TxRqst bit of this Message Object is set (if
944  * : | | RmtEn = one).
945  *
946  * Field Access Macros:
947  *
948  */
949 /*
950  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_DIR
951  *
952  * On TxRqst, a Remote Frame with the identifier of this Message Object is
953  * transmitted. On reception of a Data Frame with matching identifier, that message
954  * is stored in this Message Object.
955  */
956 #define ALT_CAN_MSGIF_IFARB_DIR_E_RX 0x0
957 /*
958  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_DIR
959  *
960  * On TxRqst, the respective Message Object is transmitted as a Data Frame. On
961  * reception of a Remote Frame with matching identifier, the TxRqst bit of this
962  * Message Object is set (if RmtEn = one).
963  */
964 #define ALT_CAN_MSGIF_IFARB_DIR_E_TX 0x1
965 
966 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_DIR register field. */
967 #define ALT_CAN_MSGIF_IFARB_DIR_LSB 29
968 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_DIR register field. */
969 #define ALT_CAN_MSGIF_IFARB_DIR_MSB 29
970 /* The width in bits of the ALT_CAN_MSGIF_IFARB_DIR register field. */
971 #define ALT_CAN_MSGIF_IFARB_DIR_WIDTH 1
972 /* The mask used to set the ALT_CAN_MSGIF_IFARB_DIR register field value. */
973 #define ALT_CAN_MSGIF_IFARB_DIR_SET_MSK 0x20000000
974 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_DIR register field value. */
975 #define ALT_CAN_MSGIF_IFARB_DIR_CLR_MSK 0xdfffffff
976 /* The reset value of the ALT_CAN_MSGIF_IFARB_DIR register field. */
977 #define ALT_CAN_MSGIF_IFARB_DIR_RESET 0x0
978 /* Extracts the ALT_CAN_MSGIF_IFARB_DIR field value from a register. */
979 #define ALT_CAN_MSGIF_IFARB_DIR_GET(value) (((value) & 0x20000000) >> 29)
980 /* Produces a ALT_CAN_MSGIF_IFARB_DIR register field value suitable for setting the register. */
981 #define ALT_CAN_MSGIF_IFARB_DIR_SET(value) (((value) << 29) & 0x20000000)
982 
983 /*
984  * Field : Extended Identifier - Xtd
985  *
986  * Extended Identifier
987  *
988  * Field Enumeration Values:
989  *
990  * Enum | Value | Description
991  * :------------------------------------|:------|:----------------------------------------------
992  * ALT_CAN_MSGIF_IFARB_XTD_E_STANDARD | 0x0 | The 11-bit (standard) Identifier will be used
993  * : | | for this Message Object.
994  * ALT_CAN_MSGIF_IFARB_XTD_E_EXTENDED | 0x1 | The 29-bit (extended) Identifier will be used
995  * : | | for this Message Object.
996  *
997  * Field Access Macros:
998  *
999  */
1000 /*
1001  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_XTD
1002  *
1003  * The 11-bit (standard) Identifier will be used for this Message Object.
1004  */
1005 #define ALT_CAN_MSGIF_IFARB_XTD_E_STANDARD 0x0
1006 /*
1007  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_XTD
1008  *
1009  * The 29-bit (extended) Identifier will be used for this Message Object.
1010  */
1011 #define ALT_CAN_MSGIF_IFARB_XTD_E_EXTENDED 0x1
1012 
1013 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1014 #define ALT_CAN_MSGIF_IFARB_XTD_LSB 30
1015 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1016 #define ALT_CAN_MSGIF_IFARB_XTD_MSB 30
1017 /* The width in bits of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1018 #define ALT_CAN_MSGIF_IFARB_XTD_WIDTH 1
1019 /* The mask used to set the ALT_CAN_MSGIF_IFARB_XTD register field value. */
1020 #define ALT_CAN_MSGIF_IFARB_XTD_SET_MSK 0x40000000
1021 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_XTD register field value. */
1022 #define ALT_CAN_MSGIF_IFARB_XTD_CLR_MSK 0xbfffffff
1023 /* The reset value of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1024 #define ALT_CAN_MSGIF_IFARB_XTD_RESET 0x0
1025 /* Extracts the ALT_CAN_MSGIF_IFARB_XTD field value from a register. */
1026 #define ALT_CAN_MSGIF_IFARB_XTD_GET(value) (((value) & 0x40000000) >> 30)
1027 /* Produces a ALT_CAN_MSGIF_IFARB_XTD register field value suitable for setting the register. */
1028 #define ALT_CAN_MSGIF_IFARB_XTD_SET(value) (((value) << 30) & 0x40000000)
1029 
1030 /*
1031  * Field : Message Valid - MsgVal
1032  *
1033  * The CPU must reset the MsgVal bit of all unused Messages Objects during the
1034  * initialization before it resets bit Init in the CAN Control Register. MsgVal
1035  * must also be reset if the Messages Object is no longer used in operation. For
1036  * reconfiguration of Message Objects during normal operation.
1037  *
1038  * Field Enumeration Values:
1039  *
1040  * Enum | Value | Description
1041  * :-----------------------------------------|:------|:-----------------------------------------------
1042  * ALT_CAN_MSGIF_IFARB_MSGVAL_E_IGNORED | 0x0 | The Message Object is ignored by the Message
1043  * : | | Handler.
1044  * ALT_CAN_MSGIF_IFARB_MSGVAL_E_CONSIDERED | 0x1 | The Message Object is configured and should be
1045  * : | | considered by the Message Handler.
1046  *
1047  * Field Access Macros:
1048  *
1049  */
1050 /*
1051  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_MSGVAL
1052  *
1053  * The Message Object is ignored by the Message Handler.
1054  */
1055 #define ALT_CAN_MSGIF_IFARB_MSGVAL_E_IGNORED 0x0
1056 /*
1057  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_MSGVAL
1058  *
1059  * The Message Object is configured and should be considered by the Message
1060  * Handler.
1061  */
1062 #define ALT_CAN_MSGIF_IFARB_MSGVAL_E_CONSIDERED 0x1
1063 
1064 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1065 #define ALT_CAN_MSGIF_IFARB_MSGVAL_LSB 31
1066 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1067 #define ALT_CAN_MSGIF_IFARB_MSGVAL_MSB 31
1068 /* The width in bits of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1069 #define ALT_CAN_MSGIF_IFARB_MSGVAL_WIDTH 1
1070 /* The mask used to set the ALT_CAN_MSGIF_IFARB_MSGVAL register field value. */
1071 #define ALT_CAN_MSGIF_IFARB_MSGVAL_SET_MSK 0x80000000
1072 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_MSGVAL register field value. */
1073 #define ALT_CAN_MSGIF_IFARB_MSGVAL_CLR_MSK 0x7fffffff
1074 /* The reset value of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1075 #define ALT_CAN_MSGIF_IFARB_MSGVAL_RESET 0x0
1076 /* Extracts the ALT_CAN_MSGIF_IFARB_MSGVAL field value from a register. */
1077 #define ALT_CAN_MSGIF_IFARB_MSGVAL_GET(value) (((value) & 0x80000000) >> 31)
1078 /* Produces a ALT_CAN_MSGIF_IFARB_MSGVAL register field value suitable for setting the register. */
1079 #define ALT_CAN_MSGIF_IFARB_MSGVAL_SET(value) (((value) << 31) & 0x80000000)
1080 
1081 #ifndef __ASSEMBLY__
1082 /*
1083  * WARNING: The C register and register group struct declarations are provided for
1084  * convenience and illustrative purposes. They should, however, be used with
1085  * caution as the C language standard provides no guarantees about the alignment or
1086  * atomicity of device memory accesses. The recommended practice for writing
1087  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1088  * alt_write_word() functions.
1089  *
1090  * The struct declaration for register ALT_CAN_MSGIF_IFARB.
1091  */
1092 struct ALT_CAN_MSGIF_IFARB_s
1093 {
1094  uint32_t ID : 29; /* Identifier Mask */
1095  uint32_t Dir : 1; /* Message Direction */
1096  uint32_t Xtd : 1; /* Extended Identifier */
1097  uint32_t MsgVal : 1; /* Message Valid */
1098 };
1099 
1100 /* The typedef declaration for register ALT_CAN_MSGIF_IFARB. */
1101 typedef volatile struct ALT_CAN_MSGIF_IFARB_s ALT_CAN_MSGIF_IFARB_t;
1102 #endif /* __ASSEMBLY__ */
1103 
1104 /* The byte offset of the ALT_CAN_MSGIF_IFARB register from the beginning of the component. */
1105 #define ALT_CAN_MSGIF_IFARB_OFST 0x8
1106 /* The address of the ALT_CAN_MSGIF_IFARB register. */
1107 #define ALT_CAN_MSGIF_IFARB_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFARB_OFST))
1108 
1109 /*
1110  * Register : IF Message Control Register - IFMCTR
1111  *
1112  * The Arbitration Registers ID28-0, Xtd, and Dir are used to define the identifier
1113  * and type of outgoing messages and are used (together with the mask registers
1114  * Msk28-0, MXtd, and MDir) for acceptance filtering of incoming messages. A
1115  * received message is stored into the valid Message Object with matching
1116  * identifier and Direction=receive (Data Frame) or Direction=transmit (Remote
1117  * Frame). Extended frames can be stored only in Message Objects with Xtd = one,
1118  * standard frames in Message Objects with Xtd = zero. If a received message (Data
1119  * Frame or Remote Frame) matches with more than one valid Message Object, it is
1120  * stored into that with the lowest message number.
1121  *
1122  * Register Layout
1123  *
1124  * Bits | Access | Reset | Description
1125  * :--------|:-------|:------|:--------------------------
1126  * [3:0] | RW | 0x0 | Data Length Code
1127  * [6:4] | ??? | 0x0 | *UNDEFINED*
1128  * [7] | RW | 0x0 | End Of Block
1129  * [8] | RW | 0x0 | Transmit Request
1130  * [9] | RW | 0x0 | Remote Enable
1131  * [10] | RW | 0x0 | Receive Interrupt Enable
1132  * [11] | RW | 0x0 | Transmit Interrupt Enable
1133  * [12] | RW | 0x0 | Use Acceptance Mask
1134  * [13] | RW | 0x0 | Interrupt Pending
1135  * [14] | RW | 0x0 | Message Lost
1136  * [15] | RW | 0x0 | New Data
1137  * [31:16] | ??? | 0x0 | *UNDEFINED*
1138  *
1139  */
1140 /*
1141  * Field : Data Length Code - DLC
1142  *
1143  * 0-8 Data Frame has 0-8 data bytes.
1144  *
1145  * 9-15 Data Frame has 8 data bytes.
1146  *
1147  * Note: The Data Length Code of a Message Object must be defined the same as in
1148  * all the corresponding objects with the same identifier at other nodes. When the
1149  * Message Handler stores a data frame, it will write the DLC to the value given by
1150  * the received message.
1151  *
1152  * Field Access Macros:
1153  *
1154  */
1155 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1156 #define ALT_CAN_MSGIF_IFMCTR_DLC_LSB 0
1157 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1158 #define ALT_CAN_MSGIF_IFMCTR_DLC_MSB 3
1159 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1160 #define ALT_CAN_MSGIF_IFMCTR_DLC_WIDTH 4
1161 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_DLC register field value. */
1162 #define ALT_CAN_MSGIF_IFMCTR_DLC_SET_MSK 0x0000000f
1163 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_DLC register field value. */
1164 #define ALT_CAN_MSGIF_IFMCTR_DLC_CLR_MSK 0xfffffff0
1165 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1166 #define ALT_CAN_MSGIF_IFMCTR_DLC_RESET 0x0
1167 /* Extracts the ALT_CAN_MSGIF_IFMCTR_DLC field value from a register. */
1168 #define ALT_CAN_MSGIF_IFMCTR_DLC_GET(value) (((value) & 0x0000000f) >> 0)
1169 /* Produces a ALT_CAN_MSGIF_IFMCTR_DLC register field value suitable for setting the register. */
1170 #define ALT_CAN_MSGIF_IFMCTR_DLC_SET(value) (((value) << 0) & 0x0000000f)
1171 
1172 /*
1173  * Field : End Of Block - EoB
1174  *
1175  * Note: This bit is used to concatenate two or more Message Objects (up to 128) to
1176  * build a FIFO Buffer. For single Message Objects (not belonging to a FIFO Buffer)
1177  * this bit must always be set to one.
1178  *
1179  * Field Enumeration Values:
1180  *
1181  * Enum | Value | Description
1182  * :-----------------------------------------|:------|:------------------------------------------------
1183  * ALT_CAN_MSGIF_IFMCTR_EOB_E_NOTLAST | 0x0 | Message Object belongs to a FIFO Buffer Block
1184  * : | | and is not the last Message Object of that FIFO
1185  * : | | Buffer Block.
1186  * ALT_CAN_MSGIF_IFMCTR_EOB_E_SINGLEORLAST | 0x1 | Single Message Object or last Message Object of
1187  * : | | a FIFO Buffer Block.
1188  *
1189  * Field Access Macros:
1190  *
1191  */
1192 /*
1193  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_EOB
1194  *
1195  * Message Object belongs to a FIFO Buffer Block and is not the last Message Object
1196  * of that FIFO Buffer Block.
1197  */
1198 #define ALT_CAN_MSGIF_IFMCTR_EOB_E_NOTLAST 0x0
1199 /*
1200  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_EOB
1201  *
1202  * Single Message Object or last Message Object of a FIFO Buffer Block.
1203  */
1204 #define ALT_CAN_MSGIF_IFMCTR_EOB_E_SINGLEORLAST 0x1
1205 
1206 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1207 #define ALT_CAN_MSGIF_IFMCTR_EOB_LSB 7
1208 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1209 #define ALT_CAN_MSGIF_IFMCTR_EOB_MSB 7
1210 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1211 #define ALT_CAN_MSGIF_IFMCTR_EOB_WIDTH 1
1212 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_EOB register field value. */
1213 #define ALT_CAN_MSGIF_IFMCTR_EOB_SET_MSK 0x00000080
1214 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_EOB register field value. */
1215 #define ALT_CAN_MSGIF_IFMCTR_EOB_CLR_MSK 0xffffff7f
1216 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1217 #define ALT_CAN_MSGIF_IFMCTR_EOB_RESET 0x0
1218 /* Extracts the ALT_CAN_MSGIF_IFMCTR_EOB field value from a register. */
1219 #define ALT_CAN_MSGIF_IFMCTR_EOB_GET(value) (((value) & 0x00000080) >> 7)
1220 /* Produces a ALT_CAN_MSGIF_IFMCTR_EOB register field value suitable for setting the register. */
1221 #define ALT_CAN_MSGIF_IFMCTR_EOB_SET(value) (((value) << 7) & 0x00000080)
1222 
1223 /*
1224  * Field : Transmit Request - TxRqst
1225  *
1226  * Transmit Request
1227  *
1228  * Field Enumeration Values:
1229  *
1230  * Enum | Value | Description
1231  * :------------------------------------------|:------|:-------------------------------------------
1232  * ALT_CAN_MSGIF_IFMCTR_TXRQST_E_NOTWAITING | 0x0 | This Message Object is not waiting for
1233  * : | | transmission.
1234  * ALT_CAN_MSGIF_IFMCTR_TXRQST_E_PENDING | 0x1 | The transmission of this Message Object is
1235  * : | | requested and is not yet done.
1236  *
1237  * Field Access Macros:
1238  *
1239  */
1240 /*
1241  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXRQST
1242  *
1243  * This Message Object is not waiting for transmission.
1244  */
1245 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_E_NOTWAITING 0x0
1246 /*
1247  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXRQST
1248  *
1249  * The transmission of this Message Object is requested and is not yet done.
1250  */
1251 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_E_PENDING 0x1
1252 
1253 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1254 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_LSB 8
1255 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1256 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_MSB 8
1257 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1258 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_WIDTH 1
1259 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_TXRQST register field value. */
1260 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_SET_MSK 0x00000100
1261 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_TXRQST register field value. */
1262 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_CLR_MSK 0xfffffeff
1263 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1264 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_RESET 0x0
1265 /* Extracts the ALT_CAN_MSGIF_IFMCTR_TXRQST field value from a register. */
1266 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_GET(value) (((value) & 0x00000100) >> 8)
1267 /* Produces a ALT_CAN_MSGIF_IFMCTR_TXRQST register field value suitable for setting the register. */
1268 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_SET(value) (((value) << 8) & 0x00000100)
1269 
1270 /*
1271  * Field : Remote Enable - RmtEn
1272  *
1273  * Remote Enable
1274  *
1275  * Field Enumeration Values:
1276  *
1277  * Enum | Value | Description
1278  * :----------------------------------------|:------|:----------------------------------------------
1279  * ALT_CAN_MSGIF_IFMCTR_RMTEN_E_UNCHANGED | 0x0 | At the reception of a Remote Frame, TxRqst is
1280  * : | | left unchanged.
1281  * ALT_CAN_MSGIF_IFMCTR_RMTEN_E_SET | 0x1 | At the reception of a Remote Frame, TxRqst is
1282  * : | | set.
1283  *
1284  * Field Access Macros:
1285  *
1286  */
1287 /*
1288  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RMTEN
1289  *
1290  * At the reception of a Remote Frame, TxRqst is left unchanged.
1291  */
1292 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_E_UNCHANGED 0x0
1293 /*
1294  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RMTEN
1295  *
1296  * At the reception of a Remote Frame, TxRqst is set.
1297  */
1298 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_E_SET 0x1
1299 
1300 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1301 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_LSB 9
1302 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1303 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_MSB 9
1304 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1305 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_WIDTH 1
1306 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_RMTEN register field value. */
1307 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_SET_MSK 0x00000200
1308 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_RMTEN register field value. */
1309 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_CLR_MSK 0xfffffdff
1310 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1311 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_RESET 0x0
1312 /* Extracts the ALT_CAN_MSGIF_IFMCTR_RMTEN field value from a register. */
1313 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_GET(value) (((value) & 0x00000200) >> 9)
1314 /* Produces a ALT_CAN_MSGIF_IFMCTR_RMTEN register field value suitable for setting the register. */
1315 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_SET(value) (((value) << 9) & 0x00000200)
1316 
1317 /*
1318  * Field : Receive Interrupt Enable - RxIE
1319  *
1320  * Receive Interrupt Enable
1321  *
1322  * Field Enumeration Values:
1323  *
1324  * Enum | Value | Description
1325  * :---------------------------------------|:------|:------------------------------------------------
1326  * ALT_CAN_MSGIF_IFMCTR_RXIE_E_UNCHANGED | 0x0 | IntPnd will be left unchanged after the
1327  * : | | successful reception of a frame.
1328  * ALT_CAN_MSGIF_IFMCTR_RXIE_E_SET | 0x1 | IntPnd will be set after a successful reception
1329  * : | | of a frame.
1330  *
1331  * Field Access Macros:
1332  *
1333  */
1334 /*
1335  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RXIE
1336  *
1337  * IntPnd will be left unchanged after the successful reception of a frame.
1338  */
1339 #define ALT_CAN_MSGIF_IFMCTR_RXIE_E_UNCHANGED 0x0
1340 /*
1341  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RXIE
1342  *
1343  * IntPnd will be set after a successful reception of a frame.
1344  */
1345 #define ALT_CAN_MSGIF_IFMCTR_RXIE_E_SET 0x1
1346 
1347 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1348 #define ALT_CAN_MSGIF_IFMCTR_RXIE_LSB 10
1349 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1350 #define ALT_CAN_MSGIF_IFMCTR_RXIE_MSB 10
1351 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1352 #define ALT_CAN_MSGIF_IFMCTR_RXIE_WIDTH 1
1353 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_RXIE register field value. */
1354 #define ALT_CAN_MSGIF_IFMCTR_RXIE_SET_MSK 0x00000400
1355 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_RXIE register field value. */
1356 #define ALT_CAN_MSGIF_IFMCTR_RXIE_CLR_MSK 0xfffffbff
1357 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1358 #define ALT_CAN_MSGIF_IFMCTR_RXIE_RESET 0x0
1359 /* Extracts the ALT_CAN_MSGIF_IFMCTR_RXIE field value from a register. */
1360 #define ALT_CAN_MSGIF_IFMCTR_RXIE_GET(value) (((value) & 0x00000400) >> 10)
1361 /* Produces a ALT_CAN_MSGIF_IFMCTR_RXIE register field value suitable for setting the register. */
1362 #define ALT_CAN_MSGIF_IFMCTR_RXIE_SET(value) (((value) << 10) & 0x00000400)
1363 
1364 /*
1365  * Field : Transmit Interrupt Enable - TxIE
1366  *
1367  * Transmit Interrupt Enable
1368  *
1369  * Field Enumeration Values:
1370  *
1371  * Enum | Value | Description
1372  * :---------------------------------------|:------|:----------------------------------------
1373  * ALT_CAN_MSGIF_IFMCTR_TXIE_E_UNCHANGED | 0x0 | IntPnd will be left unchanged after the
1374  * : | | successful transmission of a frame.
1375  * ALT_CAN_MSGIF_IFMCTR_TXIE_E_SET | 0x1 | IntPnd will be set after a successful
1376  * : | | transmission of a frame.
1377  *
1378  * Field Access Macros:
1379  *
1380  */
1381 /*
1382  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXIE
1383  *
1384  * IntPnd will be left unchanged after the successful transmission of a frame.
1385  */
1386 #define ALT_CAN_MSGIF_IFMCTR_TXIE_E_UNCHANGED 0x0
1387 /*
1388  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXIE
1389  *
1390  * IntPnd will be set after a successful transmission of a frame.
1391  */
1392 #define ALT_CAN_MSGIF_IFMCTR_TXIE_E_SET 0x1
1393 
1394 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1395 #define ALT_CAN_MSGIF_IFMCTR_TXIE_LSB 11
1396 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1397 #define ALT_CAN_MSGIF_IFMCTR_TXIE_MSB 11
1398 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1399 #define ALT_CAN_MSGIF_IFMCTR_TXIE_WIDTH 1
1400 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_TXIE register field value. */
1401 #define ALT_CAN_MSGIF_IFMCTR_TXIE_SET_MSK 0x00000800
1402 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_TXIE register field value. */
1403 #define ALT_CAN_MSGIF_IFMCTR_TXIE_CLR_MSK 0xfffff7ff
1404 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1405 #define ALT_CAN_MSGIF_IFMCTR_TXIE_RESET 0x0
1406 /* Extracts the ALT_CAN_MSGIF_IFMCTR_TXIE field value from a register. */
1407 #define ALT_CAN_MSGIF_IFMCTR_TXIE_GET(value) (((value) & 0x00000800) >> 11)
1408 /* Produces a ALT_CAN_MSGIF_IFMCTR_TXIE register field value suitable for setting the register. */
1409 #define ALT_CAN_MSGIF_IFMCTR_TXIE_SET(value) (((value) << 11) & 0x00000800)
1410 
1411 /*
1412  * Field : Use Acceptance Mask - UMask
1413  *
1414  * Use Acceptance Mask
1415  *
1416  * Field Enumeration Values:
1417  *
1418  * Enum | Value | Description
1419  * :------------------------------------|:------|:-------------------------------------------------
1420  * ALT_CAN_MSGIF_IFMCTR_UMSK_E_IGNORE | 0x0 | Acceptance formula1: (RTRRx == ~DIR) && (IDERx
1421  * : | | == IDE) && (IDRx == ID)
1422  * ALT_CAN_MSGIF_IFMCTR_UMSK_E_USE | 0x1 | (Msk28-0, MXtd, and MDir) for acceptance
1423  * : | | filtering, formula: ((RTRRx & MDIR) == (~DIR &
1424  * : | | MDIR)) && ((IDERx & MXtd) == (IDE & MXtd)) &&
1425  * : | | ((IDRx & Msk) == (ID & Msk)) Note: If the UMask
1426  * : | | bit is set to one, the Message Object's mask
1427  * : | | bits have to be programmed during initialization
1428  * : | | of the Message Object before MsgVal is set to
1429  * : | | one.
1430  *
1431  * Field Access Macros:
1432  *
1433  */
1434 /*
1435  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_UMSK
1436  *
1437  * Acceptance formula1:
1438  *
1439  * (RTRRx == ~DIR) && (IDERx == IDE) && (IDRx == ID)
1440  */
1441 #define ALT_CAN_MSGIF_IFMCTR_UMSK_E_IGNORE 0x0
1442 /*
1443  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_UMSK
1444  *
1445  * (Msk28-0, MXtd, and MDir) for acceptance filtering, formula:
1446  *
1447  * ((RTRRx & MDIR) == (~DIR & MDIR)) &&
1448  *
1449  * ((IDERx & MXtd) == (IDE & MXtd)) &&
1450  *
1451  * ((IDRx & Msk) == (ID & Msk))
1452  *
1453  * Note: If the UMask bit is set to one, the Message Object's mask bits have to be
1454  * programmed during initialization of the Message Object before MsgVal is set to
1455  * one.
1456  */
1457 #define ALT_CAN_MSGIF_IFMCTR_UMSK_E_USE 0x1
1458 
1459 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1460 #define ALT_CAN_MSGIF_IFMCTR_UMSK_LSB 12
1461 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1462 #define ALT_CAN_MSGIF_IFMCTR_UMSK_MSB 12
1463 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1464 #define ALT_CAN_MSGIF_IFMCTR_UMSK_WIDTH 1
1465 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_UMSK register field value. */
1466 #define ALT_CAN_MSGIF_IFMCTR_UMSK_SET_MSK 0x00001000
1467 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_UMSK register field value. */
1468 #define ALT_CAN_MSGIF_IFMCTR_UMSK_CLR_MSK 0xffffefff
1469 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1470 #define ALT_CAN_MSGIF_IFMCTR_UMSK_RESET 0x0
1471 /* Extracts the ALT_CAN_MSGIF_IFMCTR_UMSK field value from a register. */
1472 #define ALT_CAN_MSGIF_IFMCTR_UMSK_GET(value) (((value) & 0x00001000) >> 12)
1473 /* Produces a ALT_CAN_MSGIF_IFMCTR_UMSK register field value suitable for setting the register. */
1474 #define ALT_CAN_MSGIF_IFMCTR_UMSK_SET(value) (((value) << 12) & 0x00001000)
1475 
1476 /*
1477  * Field : Interrupt Pending - IntPnd
1478  *
1479  * Interrupt Pending
1480  *
1481  * Field Enumeration Values:
1482  *
1483  * Enum | Value | Description
1484  * :--------------------------------------|:------|:----------------------------------------------
1485  * ALT_CAN_MSGIF_IFMCTR_INTPND_E_NOTSRC | 0x0 | This message object is not the source of an
1486  * : | | interrupt.
1487  * ALT_CAN_MSGIF_IFMCTR_INTPND_E_SRC | 0x1 | This message object is the source of an
1488  * : | | interrupt. The Interrupt Identifier in the
1489  * : | | Interrupt Register will point to this message
1490  * : | | object if there is no other interrupt source
1491  * : | | with higher priority.
1492  *
1493  * Field Access Macros:
1494  *
1495  */
1496 /*
1497  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_INTPND
1498  *
1499  * This message object is not the source of an interrupt.
1500  */
1501 #define ALT_CAN_MSGIF_IFMCTR_INTPND_E_NOTSRC 0x0
1502 /*
1503  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_INTPND
1504  *
1505  * This message object is the source of an interrupt. The Interrupt Identifier in
1506  * the Interrupt Register will point to this message object if there is no other
1507  * interrupt source with higher priority.
1508  */
1509 #define ALT_CAN_MSGIF_IFMCTR_INTPND_E_SRC 0x1
1510 
1511 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1512 #define ALT_CAN_MSGIF_IFMCTR_INTPND_LSB 13
1513 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1514 #define ALT_CAN_MSGIF_IFMCTR_INTPND_MSB 13
1515 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1516 #define ALT_CAN_MSGIF_IFMCTR_INTPND_WIDTH 1
1517 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_INTPND register field value. */
1518 #define ALT_CAN_MSGIF_IFMCTR_INTPND_SET_MSK 0x00002000
1519 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_INTPND register field value. */
1520 #define ALT_CAN_MSGIF_IFMCTR_INTPND_CLR_MSK 0xffffdfff
1521 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1522 #define ALT_CAN_MSGIF_IFMCTR_INTPND_RESET 0x0
1523 /* Extracts the ALT_CAN_MSGIF_IFMCTR_INTPND field value from a register. */
1524 #define ALT_CAN_MSGIF_IFMCTR_INTPND_GET(value) (((value) & 0x00002000) >> 13)
1525 /* Produces a ALT_CAN_MSGIF_IFMCTR_INTPND register field value suitable for setting the register. */
1526 #define ALT_CAN_MSGIF_IFMCTR_INTPND_SET(value) (((value) << 13) & 0x00002000)
1527 
1528 /*
1529  * Field : Message Lost - MsgLst
1530  *
1531  * Message Lost
1532  *
1533  * Field Enumeration Values:
1534  *
1535  * Enum | Value | Description
1536  * :---------------------------------------|:------|:-----------------------------------------------
1537  * ALT_CAN_MSGIF_IFMCTR_MSGLST_E_NOTLOST | 0x0 | No message lost since last time this bit was
1538  * : | | reset by the CPU.
1539  * ALT_CAN_MSGIF_IFMCTR_MSGLST_E_LOST | 0x1 | The Message Handler stored a new message into
1540  * : | | this object when NewDat was still set, the CPU
1541  * : | | has lost a message.
1542  *
1543  * Field Access Macros:
1544  *
1545  */
1546 /*
1547  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_MSGLST
1548  *
1549  * No message lost since last time this bit was reset by the CPU.
1550  */
1551 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_E_NOTLOST 0x0
1552 /*
1553  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_MSGLST
1554  *
1555  * The Message Handler stored a new message into this object when NewDat was still
1556  * set, the CPU has lost a message.
1557  */
1558 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_E_LOST 0x1
1559 
1560 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1561 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_LSB 14
1562 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1563 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_MSB 14
1564 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1565 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_WIDTH 1
1566 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_MSGLST register field value. */
1567 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_SET_MSK 0x00004000
1568 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_MSGLST register field value. */
1569 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_CLR_MSK 0xffffbfff
1570 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1571 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_RESET 0x0
1572 /* Extracts the ALT_CAN_MSGIF_IFMCTR_MSGLST field value from a register. */
1573 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_GET(value) (((value) & 0x00004000) >> 14)
1574 /* Produces a ALT_CAN_MSGIF_IFMCTR_MSGLST register field value suitable for setting the register. */
1575 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_SET(value) (((value) << 14) & 0x00004000)
1576 
1577 /*
1578  * Field : New Data - NewDat
1579  *
1580  * New Data
1581  *
1582  * Field Enumeration Values:
1583  *
1584  * Enum | Value | Description
1585  * :------------------------------------------|:------|:-------------------------------------------------
1586  * ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_NOTWRITTEN | 0x0 | No new data has been written into the data
1587  * : | | portion of this Message Object by the Message
1588  * : | | Handler since last time this flag was cleared by
1589  * : | | the CPU.
1590  * ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_WRITTEN | 0x1 | The Message Handler or the CPU has written new
1591  * : | | data into the data portion of this Message
1592  * : | | Object.
1593  *
1594  * Field Access Macros:
1595  *
1596  */
1597 /*
1598  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_NEWDAT
1599  *
1600  * No new data has been written into the data portion of this Message Object by the
1601  * Message Handler since last time this flag was cleared by the CPU.
1602  */
1603 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_NOTWRITTEN 0x0
1604 /*
1605  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_NEWDAT
1606  *
1607  * The Message Handler or the CPU has written new data into the data portion of
1608  * this Message Object.
1609  */
1610 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_WRITTEN 0x1
1611 
1612 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1613 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_LSB 15
1614 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1615 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_MSB 15
1616 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1617 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_WIDTH 1
1618 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field value. */
1619 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_SET_MSK 0x00008000
1620 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field value. */
1621 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_CLR_MSK 0xffff7fff
1622 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1623 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_RESET 0x0
1624 /* Extracts the ALT_CAN_MSGIF_IFMCTR_NEWDAT field value from a register. */
1625 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_GET(value) (((value) & 0x00008000) >> 15)
1626 /* Produces a ALT_CAN_MSGIF_IFMCTR_NEWDAT register field value suitable for setting the register. */
1627 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_SET(value) (((value) << 15) & 0x00008000)
1628 
1629 #ifndef __ASSEMBLY__
1630 /*
1631  * WARNING: The C register and register group struct declarations are provided for
1632  * convenience and illustrative purposes. They should, however, be used with
1633  * caution as the C language standard provides no guarantees about the alignment or
1634  * atomicity of device memory accesses. The recommended practice for writing
1635  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1636  * alt_write_word() functions.
1637  *
1638  * The struct declaration for register ALT_CAN_MSGIF_IFMCTR.
1639  */
1640 struct ALT_CAN_MSGIF_IFMCTR_s
1641 {
1642  uint32_t DLC : 4; /* Data Length Code */
1643  uint32_t : 3; /* *UNDEFINED* */
1644  uint32_t EoB : 1; /* End Of Block */
1645  uint32_t TxRqst : 1; /* Transmit Request */
1646  uint32_t RmtEn : 1; /* Remote Enable */
1647  uint32_t RxIE : 1; /* Receive Interrupt Enable */
1648  uint32_t TxIE : 1; /* Transmit Interrupt Enable */
1649  uint32_t UMask : 1; /* Use Acceptance Mask */
1650  uint32_t IntPnd : 1; /* Interrupt Pending */
1651  uint32_t MsgLst : 1; /* Message Lost */
1652  uint32_t NewDat : 1; /* New Data */
1653  uint32_t : 16; /* *UNDEFINED* */
1654 };
1655 
1656 /* The typedef declaration for register ALT_CAN_MSGIF_IFMCTR. */
1657 typedef volatile struct ALT_CAN_MSGIF_IFMCTR_s ALT_CAN_MSGIF_IFMCTR_t;
1658 #endif /* __ASSEMBLY__ */
1659 
1660 /* The byte offset of the ALT_CAN_MSGIF_IFMCTR register from the beginning of the component. */
1661 #define ALT_CAN_MSGIF_IFMCTR_OFST 0xc
1662 /* The address of the ALT_CAN_MSGIF_IFMCTR register. */
1663 #define ALT_CAN_MSGIF_IFMCTR_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFMCTR_OFST))
1664 
1665 /*
1666  * Register : IF Data A Register - IFDA
1667  *
1668  * The data bytes of CAN messages are stored in the IF/2 registers in the
1669  * following order. In a CAN Data Frame, Data(0) is the first, Data(7) is the last
1670  * byte to be transmitted or received. In CAN's serial bit stream, the MSB of each
1671  * byte will be transmitted first.
1672  *
1673  * Register Layout
1674  *
1675  * Bits | Access | Reset | Description
1676  * :--------|:-------|:------|:------------
1677  * [7:0] | RW | 0x0 | Data 0
1678  * [15:8] | RW | 0x0 | Data 1
1679  * [23:16] | RW | 0x0 | Data 2
1680  * [31:24] | RW | 0x0 | Data 3
1681  *
1682  */
1683 /*
1684  * Field : Data 0 - Data0
1685  *
1686  * 1st data byte of a CAN Data Frame
1687  *
1688  * Field Access Macros:
1689  *
1690  */
1691 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1692 #define ALT_CAN_MSGIF_IFDA_DATA0_LSB 0
1693 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1694 #define ALT_CAN_MSGIF_IFDA_DATA0_MSB 7
1695 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1696 #define ALT_CAN_MSGIF_IFDA_DATA0_WIDTH 8
1697 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA0 register field value. */
1698 #define ALT_CAN_MSGIF_IFDA_DATA0_SET_MSK 0x000000ff
1699 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA0 register field value. */
1700 #define ALT_CAN_MSGIF_IFDA_DATA0_CLR_MSK 0xffffff00
1701 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1702 #define ALT_CAN_MSGIF_IFDA_DATA0_RESET 0x0
1703 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA0 field value from a register. */
1704 #define ALT_CAN_MSGIF_IFDA_DATA0_GET(value) (((value) & 0x000000ff) >> 0)
1705 /* Produces a ALT_CAN_MSGIF_IFDA_DATA0 register field value suitable for setting the register. */
1706 #define ALT_CAN_MSGIF_IFDA_DATA0_SET(value) (((value) << 0) & 0x000000ff)
1707 
1708 /*
1709  * Field : Data 1 - Data1
1710  *
1711  * 2nd data byte of a CAN Data Frame
1712  *
1713  * Field Access Macros:
1714  *
1715  */
1716 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1717 #define ALT_CAN_MSGIF_IFDA_DATA1_LSB 8
1718 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1719 #define ALT_CAN_MSGIF_IFDA_DATA1_MSB 15
1720 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1721 #define ALT_CAN_MSGIF_IFDA_DATA1_WIDTH 8
1722 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA1 register field value. */
1723 #define ALT_CAN_MSGIF_IFDA_DATA1_SET_MSK 0x0000ff00
1724 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA1 register field value. */
1725 #define ALT_CAN_MSGIF_IFDA_DATA1_CLR_MSK 0xffff00ff
1726 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1727 #define ALT_CAN_MSGIF_IFDA_DATA1_RESET 0x0
1728 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA1 field value from a register. */
1729 #define ALT_CAN_MSGIF_IFDA_DATA1_GET(value) (((value) & 0x0000ff00) >> 8)
1730 /* Produces a ALT_CAN_MSGIF_IFDA_DATA1 register field value suitable for setting the register. */
1731 #define ALT_CAN_MSGIF_IFDA_DATA1_SET(value) (((value) << 8) & 0x0000ff00)
1732 
1733 /*
1734  * Field : Data 2 - Data2
1735  *
1736  * 3rd data byte of a CAN Data Frame
1737  *
1738  * Field Access Macros:
1739  *
1740  */
1741 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1742 #define ALT_CAN_MSGIF_IFDA_DATA2_LSB 16
1743 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1744 #define ALT_CAN_MSGIF_IFDA_DATA2_MSB 23
1745 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1746 #define ALT_CAN_MSGIF_IFDA_DATA2_WIDTH 8
1747 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA2 register field value. */
1748 #define ALT_CAN_MSGIF_IFDA_DATA2_SET_MSK 0x00ff0000
1749 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA2 register field value. */
1750 #define ALT_CAN_MSGIF_IFDA_DATA2_CLR_MSK 0xff00ffff
1751 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1752 #define ALT_CAN_MSGIF_IFDA_DATA2_RESET 0x0
1753 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA2 field value from a register. */
1754 #define ALT_CAN_MSGIF_IFDA_DATA2_GET(value) (((value) & 0x00ff0000) >> 16)
1755 /* Produces a ALT_CAN_MSGIF_IFDA_DATA2 register field value suitable for setting the register. */
1756 #define ALT_CAN_MSGIF_IFDA_DATA2_SET(value) (((value) << 16) & 0x00ff0000)
1757 
1758 /*
1759  * Field : Data 3 - Data3
1760  *
1761  * 4th data byte of a CAN Data Frame
1762  *
1763  * Field Access Macros:
1764  *
1765  */
1766 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1767 #define ALT_CAN_MSGIF_IFDA_DATA3_LSB 24
1768 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1769 #define ALT_CAN_MSGIF_IFDA_DATA3_MSB 31
1770 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1771 #define ALT_CAN_MSGIF_IFDA_DATA3_WIDTH 8
1772 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA3 register field value. */
1773 #define ALT_CAN_MSGIF_IFDA_DATA3_SET_MSK 0xff000000
1774 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA3 register field value. */
1775 #define ALT_CAN_MSGIF_IFDA_DATA3_CLR_MSK 0x00ffffff
1776 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1777 #define ALT_CAN_MSGIF_IFDA_DATA3_RESET 0x0
1778 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA3 field value from a register. */
1779 #define ALT_CAN_MSGIF_IFDA_DATA3_GET(value) (((value) & 0xff000000) >> 24)
1780 /* Produces a ALT_CAN_MSGIF_IFDA_DATA3 register field value suitable for setting the register. */
1781 #define ALT_CAN_MSGIF_IFDA_DATA3_SET(value) (((value) << 24) & 0xff000000)
1782 
1783 #ifndef __ASSEMBLY__
1784 /*
1785  * WARNING: The C register and register group struct declarations are provided for
1786  * convenience and illustrative purposes. They should, however, be used with
1787  * caution as the C language standard provides no guarantees about the alignment or
1788  * atomicity of device memory accesses. The recommended practice for writing
1789  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1790  * alt_write_word() functions.
1791  *
1792  * The struct declaration for register ALT_CAN_MSGIF_IFDA.
1793  */
1794 struct ALT_CAN_MSGIF_IFDA_s
1795 {
1796  uint32_t Data0 : 8; /* Data 0 */
1797  uint32_t Data1 : 8; /* Data 1 */
1798  uint32_t Data2 : 8; /* Data 2 */
1799  uint32_t Data3 : 8; /* Data 3 */
1800 };
1801 
1802 /* The typedef declaration for register ALT_CAN_MSGIF_IFDA. */
1803 typedef volatile struct ALT_CAN_MSGIF_IFDA_s ALT_CAN_MSGIF_IFDA_t;
1804 #endif /* __ASSEMBLY__ */
1805 
1806 /* The byte offset of the ALT_CAN_MSGIF_IFDA register from the beginning of the component. */
1807 #define ALT_CAN_MSGIF_IFDA_OFST 0x10
1808 /* The address of the ALT_CAN_MSGIF_IFDA register. */
1809 #define ALT_CAN_MSGIF_IFDA_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFDA_OFST))
1810 
1811 /*
1812  * Register : IF Data B Register - IFDB
1813  *
1814  * The data bytes of CAN messages are stored in the IF/2 registers in the
1815  * following order. In a CAN Data Frame, Data(0) is the first, Data(7) is the last
1816  * byte to be transmitted or received. In CAN's serial bit stream, the MSB of each
1817  * byte will be transmitted first.
1818  *
1819  * Register Layout
1820  *
1821  * Bits | Access | Reset | Description
1822  * :--------|:-------|:------|:------------
1823  * [7:0] | RW | 0x0 | Data 0
1824  * [15:8] | RW | 0x0 | Data 1
1825  * [23:16] | RW | 0x0 | Data 2
1826  * [31:24] | RW | 0x0 | Data 3
1827  *
1828  */
1829 /*
1830  * Field : Data 0 - Data4
1831  *
1832  * 5th data byte of a CAN Data Frame
1833  *
1834  * Field Access Macros:
1835  *
1836  */
1837 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1838 #define ALT_CAN_MSGIF_IFDB_DATA4_LSB 0
1839 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1840 #define ALT_CAN_MSGIF_IFDB_DATA4_MSB 7
1841 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1842 #define ALT_CAN_MSGIF_IFDB_DATA4_WIDTH 8
1843 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA4 register field value. */
1844 #define ALT_CAN_MSGIF_IFDB_DATA4_SET_MSK 0x000000ff
1845 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA4 register field value. */
1846 #define ALT_CAN_MSGIF_IFDB_DATA4_CLR_MSK 0xffffff00
1847 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1848 #define ALT_CAN_MSGIF_IFDB_DATA4_RESET 0x0
1849 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA4 field value from a register. */
1850 #define ALT_CAN_MSGIF_IFDB_DATA4_GET(value) (((value) & 0x000000ff) >> 0)
1851 /* Produces a ALT_CAN_MSGIF_IFDB_DATA4 register field value suitable for setting the register. */
1852 #define ALT_CAN_MSGIF_IFDB_DATA4_SET(value) (((value) << 0) & 0x000000ff)
1853 
1854 /*
1855  * Field : Data 1 - Data5
1856  *
1857  * 6th data byte of a CAN Data Frame
1858  *
1859  * Field Access Macros:
1860  *
1861  */
1862 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1863 #define ALT_CAN_MSGIF_IFDB_DATA5_LSB 8
1864 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1865 #define ALT_CAN_MSGIF_IFDB_DATA5_MSB 15
1866 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1867 #define ALT_CAN_MSGIF_IFDB_DATA5_WIDTH 8
1868 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA5 register field value. */
1869 #define ALT_CAN_MSGIF_IFDB_DATA5_SET_MSK 0x0000ff00
1870 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA5 register field value. */
1871 #define ALT_CAN_MSGIF_IFDB_DATA5_CLR_MSK 0xffff00ff
1872 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1873 #define ALT_CAN_MSGIF_IFDB_DATA5_RESET 0x0
1874 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA5 field value from a register. */
1875 #define ALT_CAN_MSGIF_IFDB_DATA5_GET(value) (((value) & 0x0000ff00) >> 8)
1876 /* Produces a ALT_CAN_MSGIF_IFDB_DATA5 register field value suitable for setting the register. */
1877 #define ALT_CAN_MSGIF_IFDB_DATA5_SET(value) (((value) << 8) & 0x0000ff00)
1878 
1879 /*
1880  * Field : Data 2 - Data6
1881  *
1882  * 7th data byte of a CAN Data Frame
1883  *
1884  * Field Access Macros:
1885  *
1886  */
1887 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1888 #define ALT_CAN_MSGIF_IFDB_DATA6_LSB 16
1889 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1890 #define ALT_CAN_MSGIF_IFDB_DATA6_MSB 23
1891 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1892 #define ALT_CAN_MSGIF_IFDB_DATA6_WIDTH 8
1893 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA6 register field value. */
1894 #define ALT_CAN_MSGIF_IFDB_DATA6_SET_MSK 0x00ff0000
1895 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA6 register field value. */
1896 #define ALT_CAN_MSGIF_IFDB_DATA6_CLR_MSK 0xff00ffff
1897 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1898 #define ALT_CAN_MSGIF_IFDB_DATA6_RESET 0x0
1899 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA6 field value from a register. */
1900 #define ALT_CAN_MSGIF_IFDB_DATA6_GET(value) (((value) & 0x00ff0000) >> 16)
1901 /* Produces a ALT_CAN_MSGIF_IFDB_DATA6 register field value suitable for setting the register. */
1902 #define ALT_CAN_MSGIF_IFDB_DATA6_SET(value) (((value) << 16) & 0x00ff0000)
1903 
1904 /*
1905  * Field : Data 3 - Data7
1906  *
1907  * 8th data byte of a CAN Data Frame
1908  *
1909  * Field Access Macros:
1910  *
1911  */
1912 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1913 #define ALT_CAN_MSGIF_IFDB_DATA7_LSB 24
1914 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1915 #define ALT_CAN_MSGIF_IFDB_DATA7_MSB 31
1916 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1917 #define ALT_CAN_MSGIF_IFDB_DATA7_WIDTH 8
1918 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA7 register field value. */
1919 #define ALT_CAN_MSGIF_IFDB_DATA7_SET_MSK 0xff000000
1920 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA7 register field value. */
1921 #define ALT_CAN_MSGIF_IFDB_DATA7_CLR_MSK 0x00ffffff
1922 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1923 #define ALT_CAN_MSGIF_IFDB_DATA7_RESET 0x0
1924 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA7 field value from a register. */
1925 #define ALT_CAN_MSGIF_IFDB_DATA7_GET(value) (((value) & 0xff000000) >> 24)
1926 /* Produces a ALT_CAN_MSGIF_IFDB_DATA7 register field value suitable for setting the register. */
1927 #define ALT_CAN_MSGIF_IFDB_DATA7_SET(value) (((value) << 24) & 0xff000000)
1928 
1929 #ifndef __ASSEMBLY__
1930 /*
1931  * WARNING: The C register and register group struct declarations are provided for
1932  * convenience and illustrative purposes. They should, however, be used with
1933  * caution as the C language standard provides no guarantees about the alignment or
1934  * atomicity of device memory accesses. The recommended practice for writing
1935  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1936  * alt_write_word() functions.
1937  *
1938  * The struct declaration for register ALT_CAN_MSGIF_IFDB.
1939  */
1940 struct ALT_CAN_MSGIF_IFDB_s
1941 {
1942  uint32_t Data4 : 8; /* Data 0 */
1943  uint32_t Data5 : 8; /* Data 1 */
1944  uint32_t Data6 : 8; /* Data 2 */
1945  uint32_t Data7 : 8; /* Data 3 */
1946 };
1947 
1948 /* The typedef declaration for register ALT_CAN_MSGIF_IFDB. */
1949 typedef volatile struct ALT_CAN_MSGIF_IFDB_s ALT_CAN_MSGIF_IFDB_t;
1950 #endif /* __ASSEMBLY__ */
1951 
1952 /* The byte offset of the ALT_CAN_MSGIF_IFDB register from the beginning of the component. */
1953 #define ALT_CAN_MSGIF_IFDB_OFST 0x14
1954 /* The address of the ALT_CAN_MSGIF_IFDB register. */
1955 #define ALT_CAN_MSGIF_IFDB_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFDB_OFST))
1956 
1957 
1958 #ifdef __cplusplus
1959 }
1960 #endif /* __cplusplus */
1961 #endif /* __ALTERA_ALT_CAN_PRIVATE_H__ */
1962