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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Each bit in this register has a corresponding mask bit in the Interrupt Mask Register. These bits are cleared by reading the matching Interrupt Clear Register. The unmasked raw versions of these bits are available in the Raw Interrupt Status Register.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | R | 0x0 | Receiver Under |
[1] | R | 0x0 | Receiver Over |
[2] | R | 0x0 | Receive Full |
[3] | R | 0x0 | Interrupt Transmit Over |
[4] | R | 0x0 | Interrupt Transmit Empty |
[5] | R | 0x0 | Interrupt Read Request |
[6] | R | 0x0 | Interrupt TX Abort |
[7] | R | 0x0 | Interrupt RX Done |
[8] | R | 0x0 | Interrupt R_activity |
[9] | R | 0x0 | Interrupt Stop Detect |
[10] | R | 0x0 | Interrupt Start Detect |
[11] | R | 0x0 | Interrupt General Call |
[31:12] | ??? | 0x0 | UNDEFINED |
Field : Receiver Under - r_rx_under | |
Set if the processor attempts to read the receive buffer when it is empty by reading from the Tx Rx Data and Command Register. If the module is disabled, Enable Register is set to 0, this bit keeps its level until the master or slave state machines go into idle, then this interrupt is cleared. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_LSB 0 |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_MSB 0 |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_SET_MSK 0x00000001 |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_CLR_MSK 0xfffffffe |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_I2C_INTR_STAT_R_RX_UNDER_SET(value) (((value) << 0) & 0x00000001) |
Field : Receiver Over - r_rx_over | |
Set if the receive buffer is completely filled to 64 and an additional byte is received from an external I2C device. The I2C acknowledges this, but any data bytes received after the FIFO is full are lost. If the module is disabled, Enable Register bit[0] is set to 0 this bit keeps its level until the master or slave state machines go into idle, then this interrupt is cleared. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_LSB 1 |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_MSB 1 |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_SET_MSK 0x00000002 |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_CLR_MSK 0xfffffffd |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_I2C_INTR_STAT_R_RX_OVER_SET(value) (((value) << 1) & 0x00000002) |
Field : Receive Full - r_rx_full | |
Set when the receive buffer reaches or goes above the Receive FIFO Threshold Value(rx_tl). It is automatically cleared by hardware when buffer level goes below the threshold. If the module is disabled, Bit [0] of the Enable Register set to 0, the RX FIFO is flushed and held in reset; therefore the RX FIFO is not full. So this bit is cleared once the Enable Register Bit 0 is programmed with a 0, regardless of the activity that continues. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_LSB 2 |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_MSB 2 |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_SET_MSK 0x00000004 |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_CLR_MSK 0xfffffffb |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_I2C_INTR_STAT_R_RX_FULL_SET(value) (((value) << 2) & 0x00000004) |
Field : Interrupt Transmit Over - r_tx_over | |
Set during transmit if the transmit buffer is filled to 64 and the processor attempts to issue another I2C command by writing to the Data and Command Register. When the module is disabled, this bit keeps its level until the master or slave state machines goes into idle, then interrupt is cleared. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_LSB 3 |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_MSB 3 |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_SET_MSK 0x00000008 |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_CLR_MSK 0xfffffff7 |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_I2C_INTR_STAT_R_TX_OVER_SET(value) (((value) << 3) & 0x00000008) |
Field : Interrupt Transmit Empty - r_tx_empty | |
This bit is set to 1 when the transmit buffer is at or below the threshold value set in the ic_tx_tl register. It is automatically cleared by hardware when the buffer level goes above the threshold. When the ic_enable bit 0 is 0, the TX FIFO is flushed and held in reset. There the TX FIFO looks like it has no data within it, so this bit is set to 1, provided there is activity in the master or slave state machines. When there is no longer activity, this bit is set to 0. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_LSB 4 |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_MSB 4 |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_SET_MSK 0x00000010 |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_CLR_MSK 0xffffffef |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_I2C_INTR_STAT_R_TX_EMPTY_SET(value) (((value) << 4) & 0x00000010) |
Field : Interrupt Read Request - r_rd_req | |
This bit is set to 1 when i2c is acting as a slave and another I2C master is attempting to read data from I2C. The I2C holds the I2C bus in a wait state (SCL=0) until this interrupt is serviced, which means that the slave has been addressed by a remote master that is asking for data to be transferred. The processor must respond to this interrupt and then write the requested data to the IC_DATA_CMD register. This bit is set to 0 just after the processor reads the ic_clr_rd_req register. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_LSB 5 |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_MSB 5 |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_SET_MSK 0x00000020 |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_CLR_MSK 0xffffffdf |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_GET(value) (((value) & 0x00000020) >> 5) |
#define | ALT_I2C_INTR_STAT_R_RD_REQ_SET(value) (((value) << 5) & 0x00000020) |
Field : Interrupt TX Abort - r_tx_abrt | |
This bit indicates if I2C, as an I2C transmitter, is unable to complete the intended actions on the contents of the transmit FIFO. This situation can occur both as an I2C master or an I2C slave, and is referred to as a 'transmit abort'.When this bit is set to 1, the ic_tx_abrt_source register indicates the reason why the transmit abort takes places. NOTE: The I2C flushes/resets/empties the TX FIFO whenever this bit is set. The TX FIFO remains in this flushed state until the register ic_clr_tx_abrt is read. Once this read is performed, the TX FIFO is then ready to accept more data bytes from the APB interface. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_LSB 6 |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_MSB 6 |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_SET_MSK 0x00000040 |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_CLR_MSK 0xffffffbf |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_GET(value) (((value) & 0x00000040) >> 6) |
#define | ALT_I2C_INTR_STAT_R_TX_ABRT_SET(value) (((value) << 6) & 0x00000040) |
Field : Interrupt RX Done - r_rx_done | |
When the I2C is acting as a slave-transmitter, this bit is set to 1, if the master does not acknowledge a transmitted byte. This occurs on the last byte of the transmission, indicating that the transmission is done. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_LSB 7 |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_MSB 7 |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_SET_MSK 0x00000080 |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_CLR_MSK 0xffffff7f |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_GET(value) (((value) & 0x00000080) >> 7) |
#define | ALT_I2C_INTR_STAT_R_RX_DONE_SET(value) (((value) << 7) & 0x00000080) |
Field : Interrupt R_activity - r_activity | |
This bit captures I2C activity and stays set until it is cleared. There are four ways to clear it:
Once this bit is set, it stays set unless one of the four methods is used to clear it. Even if the I2C module is idle, this bit remains set until cleared, indicating that there was activity on the bus. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_LSB 8 |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_MSB 8 |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_SET_MSK 0x00000100 |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_CLR_MSK 0xfffffeff |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_I2C_INTR_STAT_R_ACTIVITY_SET(value) (((value) << 8) & 0x00000100) |
Field : Interrupt Stop Detect - r_stop_det | |
Indicates whether a STOP condition has occurred on the I2C interface regardless of whether I2C is operating in slave or master mode. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_LSB 9 |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_MSB 9 |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_SET_MSK 0x00000200 |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_CLR_MSK 0xfffffdff |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_GET(value) (((value) & 0x00000200) >> 9) |
#define | ALT_I2C_INTR_STAT_R_STOP_DET_SET(value) (((value) << 9) & 0x00000200) |
Field : Interrupt Start Detect - r_start_det | |
Indicates whether a START or RESTART condition has occurred on the I2C interface regardless of whether I2C is operating in slave or master mode. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_START_DET_LSB 10 |
#define | ALT_I2C_INTR_STAT_R_START_DET_MSB 10 |
#define | ALT_I2C_INTR_STAT_R_START_DET_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_START_DET_SET_MSK 0x00000400 |
#define | ALT_I2C_INTR_STAT_R_START_DET_CLR_MSK 0xfffffbff |
#define | ALT_I2C_INTR_STAT_R_START_DET_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_START_DET_GET(value) (((value) & 0x00000400) >> 10) |
#define | ALT_I2C_INTR_STAT_R_START_DET_SET(value) (((value) << 10) & 0x00000400) |
Field : Interrupt General Call - r_gen_call | |
Set only when a General Call address is received and it is acknowledged. It stays set until it is cleared either by disabling I2C or when the CPU reads bit 0 of the ic_clr_gen_call register. I2C stores the received data in the Rx buffer. Field Access Macros: | |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_LSB 11 |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_MSB 11 |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_WIDTH 1 |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_SET_MSK 0x00000800 |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_CLR_MSK 0xfffff7ff |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_RESET 0x0 |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_GET(value) (((value) & 0x00000800) >> 11) |
#define | ALT_I2C_INTR_STAT_R_GEN_CALL_SET(value) (((value) << 11) & 0x00000800) |
Data Structures | |
struct | ALT_I2C_INTR_STAT_s |
Macros | |
#define | ALT_I2C_INTR_STAT_OFST 0x2c |
#define | ALT_I2C_INTR_STAT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_INTR_STAT_OFST)) |
Typedefs | |
typedef struct ALT_I2C_INTR_STAT_s | ALT_I2C_INTR_STAT_t |
struct ALT_I2C_INTR_STAT_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_I2C_INTR_STAT.
Data Fields | ||
---|---|---|
const uint32_t | r_rx_under: 1 | Receiver Under |
const uint32_t | r_rx_over: 1 | Receiver Over |
const uint32_t | r_rx_full: 1 | Receive Full |
const uint32_t | r_tx_over: 1 | Interrupt Transmit Over |
const uint32_t | r_tx_empty: 1 | Interrupt Transmit Empty |
const uint32_t | r_rd_req: 1 | Interrupt Read Request |
const uint32_t | r_tx_abrt: 1 | Interrupt TX Abort |
const uint32_t | r_rx_done: 1 | Interrupt RX Done |
const uint32_t | r_activity: 1 | Interrupt R_activity |
const uint32_t | r_stop_det: 1 | Interrupt Stop Detect |
const uint32_t | r_start_det: 1 | Interrupt Start Detect |
const uint32_t | r_gen_call: 1 | Interrupt General Call |
uint32_t | __pad0__: 20 | UNDEFINED |
#define ALT_I2C_INTR_STAT_R_RX_UNDER_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_RX_UNDER register field.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_RX_UNDER register field.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_RX_UNDER register field.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_SET_MSK 0x00000001 |
The mask used to set the ALT_I2C_INTR_STAT_R_RX_UNDER register field value.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_I2C_INTR_STAT_R_RX_UNDER register field value.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_RX_UNDER register field.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_I2C_INTR_STAT_R_RX_UNDER field value from a register.
#define ALT_I2C_INTR_STAT_R_RX_UNDER_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_I2C_INTR_STAT_R_RX_UNDER register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_RX_OVER_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_RX_OVER register field.
#define ALT_I2C_INTR_STAT_R_RX_OVER_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_RX_OVER register field.
#define ALT_I2C_INTR_STAT_R_RX_OVER_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_RX_OVER register field.
#define ALT_I2C_INTR_STAT_R_RX_OVER_SET_MSK 0x00000002 |
The mask used to set the ALT_I2C_INTR_STAT_R_RX_OVER register field value.
#define ALT_I2C_INTR_STAT_R_RX_OVER_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_I2C_INTR_STAT_R_RX_OVER register field value.
#define ALT_I2C_INTR_STAT_R_RX_OVER_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_RX_OVER register field.
#define ALT_I2C_INTR_STAT_R_RX_OVER_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_I2C_INTR_STAT_R_RX_OVER field value from a register.
#define ALT_I2C_INTR_STAT_R_RX_OVER_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_I2C_INTR_STAT_R_RX_OVER register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_RX_FULL_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_RX_FULL register field.
#define ALT_I2C_INTR_STAT_R_RX_FULL_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_RX_FULL register field.
#define ALT_I2C_INTR_STAT_R_RX_FULL_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_RX_FULL register field.
#define ALT_I2C_INTR_STAT_R_RX_FULL_SET_MSK 0x00000004 |
The mask used to set the ALT_I2C_INTR_STAT_R_RX_FULL register field value.
#define ALT_I2C_INTR_STAT_R_RX_FULL_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_I2C_INTR_STAT_R_RX_FULL register field value.
#define ALT_I2C_INTR_STAT_R_RX_FULL_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_RX_FULL register field.
#define ALT_I2C_INTR_STAT_R_RX_FULL_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_I2C_INTR_STAT_R_RX_FULL field value from a register.
#define ALT_I2C_INTR_STAT_R_RX_FULL_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_I2C_INTR_STAT_R_RX_FULL register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_TX_OVER_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_TX_OVER register field.
#define ALT_I2C_INTR_STAT_R_TX_OVER_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_TX_OVER register field.
#define ALT_I2C_INTR_STAT_R_TX_OVER_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_TX_OVER register field.
#define ALT_I2C_INTR_STAT_R_TX_OVER_SET_MSK 0x00000008 |
The mask used to set the ALT_I2C_INTR_STAT_R_TX_OVER register field value.
#define ALT_I2C_INTR_STAT_R_TX_OVER_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_I2C_INTR_STAT_R_TX_OVER register field value.
#define ALT_I2C_INTR_STAT_R_TX_OVER_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_TX_OVER register field.
#define ALT_I2C_INTR_STAT_R_TX_OVER_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_I2C_INTR_STAT_R_TX_OVER field value from a register.
#define ALT_I2C_INTR_STAT_R_TX_OVER_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_I2C_INTR_STAT_R_TX_OVER register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_TX_EMPTY register field.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_TX_EMPTY register field.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_TX_EMPTY register field.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_SET_MSK 0x00000010 |
The mask used to set the ALT_I2C_INTR_STAT_R_TX_EMPTY register field value.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_CLR_MSK 0xffffffef |
The mask used to clear the ALT_I2C_INTR_STAT_R_TX_EMPTY register field value.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_TX_EMPTY register field.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_I2C_INTR_STAT_R_TX_EMPTY field value from a register.
#define ALT_I2C_INTR_STAT_R_TX_EMPTY_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_I2C_INTR_STAT_R_TX_EMPTY register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_RD_REQ_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_RD_REQ register field.
#define ALT_I2C_INTR_STAT_R_RD_REQ_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_RD_REQ register field.
#define ALT_I2C_INTR_STAT_R_RD_REQ_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_RD_REQ register field.
#define ALT_I2C_INTR_STAT_R_RD_REQ_SET_MSK 0x00000020 |
The mask used to set the ALT_I2C_INTR_STAT_R_RD_REQ register field value.
#define ALT_I2C_INTR_STAT_R_RD_REQ_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_I2C_INTR_STAT_R_RD_REQ register field value.
#define ALT_I2C_INTR_STAT_R_RD_REQ_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_RD_REQ register field.
#define ALT_I2C_INTR_STAT_R_RD_REQ_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_I2C_INTR_STAT_R_RD_REQ field value from a register.
#define ALT_I2C_INTR_STAT_R_RD_REQ_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_I2C_INTR_STAT_R_RD_REQ register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_TX_ABRT register field.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_TX_ABRT register field.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_TX_ABRT register field.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_SET_MSK 0x00000040 |
The mask used to set the ALT_I2C_INTR_STAT_R_TX_ABRT register field value.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_I2C_INTR_STAT_R_TX_ABRT register field value.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_TX_ABRT register field.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_I2C_INTR_STAT_R_TX_ABRT field value from a register.
#define ALT_I2C_INTR_STAT_R_TX_ABRT_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_I2C_INTR_STAT_R_TX_ABRT register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_RX_DONE_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_RX_DONE register field.
#define ALT_I2C_INTR_STAT_R_RX_DONE_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_RX_DONE register field.
#define ALT_I2C_INTR_STAT_R_RX_DONE_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_RX_DONE register field.
#define ALT_I2C_INTR_STAT_R_RX_DONE_SET_MSK 0x00000080 |
The mask used to set the ALT_I2C_INTR_STAT_R_RX_DONE register field value.
#define ALT_I2C_INTR_STAT_R_RX_DONE_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_I2C_INTR_STAT_R_RX_DONE register field value.
#define ALT_I2C_INTR_STAT_R_RX_DONE_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_RX_DONE register field.
#define ALT_I2C_INTR_STAT_R_RX_DONE_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_I2C_INTR_STAT_R_RX_DONE field value from a register.
#define ALT_I2C_INTR_STAT_R_RX_DONE_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_I2C_INTR_STAT_R_RX_DONE register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_ACTIVITY register field.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_ACTIVITY register field.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_ACTIVITY register field.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_SET_MSK 0x00000100 |
The mask used to set the ALT_I2C_INTR_STAT_R_ACTIVITY register field value.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_I2C_INTR_STAT_R_ACTIVITY register field value.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_ACTIVITY register field.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_I2C_INTR_STAT_R_ACTIVITY field value from a register.
#define ALT_I2C_INTR_STAT_R_ACTIVITY_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_I2C_INTR_STAT_R_ACTIVITY register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_STOP_DET_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_STOP_DET register field.
#define ALT_I2C_INTR_STAT_R_STOP_DET_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_STOP_DET register field.
#define ALT_I2C_INTR_STAT_R_STOP_DET_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_STOP_DET register field.
#define ALT_I2C_INTR_STAT_R_STOP_DET_SET_MSK 0x00000200 |
The mask used to set the ALT_I2C_INTR_STAT_R_STOP_DET register field value.
#define ALT_I2C_INTR_STAT_R_STOP_DET_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_I2C_INTR_STAT_R_STOP_DET register field value.
#define ALT_I2C_INTR_STAT_R_STOP_DET_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_STOP_DET register field.
#define ALT_I2C_INTR_STAT_R_STOP_DET_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_I2C_INTR_STAT_R_STOP_DET field value from a register.
#define ALT_I2C_INTR_STAT_R_STOP_DET_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_I2C_INTR_STAT_R_STOP_DET register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_START_DET_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_START_DET register field.
#define ALT_I2C_INTR_STAT_R_START_DET_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_START_DET register field.
#define ALT_I2C_INTR_STAT_R_START_DET_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_START_DET register field.
#define ALT_I2C_INTR_STAT_R_START_DET_SET_MSK 0x00000400 |
The mask used to set the ALT_I2C_INTR_STAT_R_START_DET register field value.
#define ALT_I2C_INTR_STAT_R_START_DET_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_I2C_INTR_STAT_R_START_DET register field value.
#define ALT_I2C_INTR_STAT_R_START_DET_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_START_DET register field.
#define ALT_I2C_INTR_STAT_R_START_DET_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_I2C_INTR_STAT_R_START_DET field value from a register.
#define ALT_I2C_INTR_STAT_R_START_DET_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_I2C_INTR_STAT_R_START_DET register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_I2C_INTR_STAT_R_GEN_CALL register field.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_I2C_INTR_STAT_R_GEN_CALL register field.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_WIDTH 1 |
The width in bits of the ALT_I2C_INTR_STAT_R_GEN_CALL register field.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_SET_MSK 0x00000800 |
The mask used to set the ALT_I2C_INTR_STAT_R_GEN_CALL register field value.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_I2C_INTR_STAT_R_GEN_CALL register field value.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_RESET 0x0 |
The reset value of the ALT_I2C_INTR_STAT_R_GEN_CALL register field.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_I2C_INTR_STAT_R_GEN_CALL field value from a register.
#define ALT_I2C_INTR_STAT_R_GEN_CALL_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_I2C_INTR_STAT_R_GEN_CALL register field value suitable for setting the register.
#define ALT_I2C_INTR_STAT_OFST 0x2c |
The byte offset of the ALT_I2C_INTR_STAT register from the beginning of the component.
#define ALT_I2C_INTR_STAT_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_INTR_STAT_OFST)) |
The address of the ALT_I2C_INTR_STAT register.
typedef struct ALT_I2C_INTR_STAT_s ALT_I2C_INTR_STAT_t |
The typedef declaration for register ALT_I2C_INTR_STAT.