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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Host Mode control. This register must be programmed every time the core changes to Host mode
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[1:0] | RW | 0x0 | FS LS PHY Clock Select |
[2] | RW | 0x0 | FS- and LS-Only Suppor |
[6:3] | ??? | 0x0 | UNDEFINED |
[7] | RW | 0x0 | Enable 32 KHz Suspend mode |
[15:8] | RW | 0x2 | Resume Validation Period |
[22:16] | ??? | 0x0 | UNDEFINED |
[23] | RW | 0x0 | Enable Scatter Gather DMA in Host mode |
[25:24] | RW | 0x0 | Frame List Entries |
[26] | RW | 0x0 | Enable Periodic Scheduling |
[30:27] | ??? | 0x0 | UNDEFINED |
[31] | RW | 0x0 | Mode Change Ready Timer Enable |
Field : FS LS PHY Clock Select - fslspclksel | |||||||||||||
When the core is in FS Host mode. The internal PHY clock is running at 30/60 MHZ for ULPI PHY Interfaces. The internal PHY clock is running at 48MHZ for 1.1 FS transceiver Interface When the core is in LS Host mode, the internal PHY clock is running at 30/60 MHZ for ULPI PHY Interfaces. The internal PHY clock is running at 6 MHZ and the external clock is running at 48MHZ. When you select a 6 MHz clock during LS Mode, you must do a soft reset for 1.1 FS transceiver Interface. * When Core in FS mode, the internal and external clocks have the same frequency.
Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060 0x0 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48 0x1 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6 0x2 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_LSB 0 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_MSB 1 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_WIDTH 2 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET_MSK 0x00000003 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_CLR_MSK 0xfffffffc | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_RESET 0x0 | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_GET(value) (((value) & 0x00000003) >> 0) | ||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET(value) (((value) << 0) & 0x00000003) | ||||||||||||
Field : FS- and LS-Only Suppor - fslssupp | ||||||||||||||||
The application uses this bit to control the core's enumeration speed. Using this bit, the application can make the core enumerate as a FS host, even If the connected device supports HS traffic. Do not make changes to this field after initial programming. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS 0x0 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS 0x1 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_LSB 2 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_MSB 2 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_WIDTH 1 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_SET_MSK 0x00000004 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_CLR_MSK 0xfffffffb | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_RESET 0x0 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_GET(value) (((value) & 0x00000004) >> 2) | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FSLSSUPP_SET(value) (((value) << 2) & 0x00000004) | |||||||||||||||
Field : Enable 32 KHz Suspend mode - ena32khzs | |||||||||||||
This bit can only be set if the USB 1.1 Full-Speed Serial Transceiver Interface has been selected. If USB 1.1 Full-Speed Serial Transceiver Interface has not been selected, this bit must be zero. When the USB 1.1 Full-Speed Serial Transceiver Interface is chosen and this bit is set, the core expects the 48-MHz PHY clock to be switched to 32 KHz during a suspend. Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD 0x0 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_E_END 0x1 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_LSB 7 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_MSB 7 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_WIDTH 1 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_SET_MSK 0x00000080 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_CLR_MSK 0xffffff7f | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_RESET 0x0 | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_GET(value) (((value) & 0x00000080) >> 7) | ||||||||||||
#define | ALT_USB_HOST_HCFG_ENA32KHZS_SET(value) (((value) << 7) & 0x00000080) | ||||||||||||
Field : Resume Validation Period - resvalid | |
This field is effective only when HCFG.Ena32KHzS is set. It will control the resume period when the core resumes from suspend. The core counts for ResValid number of clock cycles to detect a valid resume when this is set. Field Access Macros: | |
#define | ALT_USB_HOST_HCFG_RESVALID_LSB 8 |
#define | ALT_USB_HOST_HCFG_RESVALID_MSB 15 |
#define | ALT_USB_HOST_HCFG_RESVALID_WIDTH 8 |
#define | ALT_USB_HOST_HCFG_RESVALID_SET_MSK 0x0000ff00 |
#define | ALT_USB_HOST_HCFG_RESVALID_CLR_MSK 0xffff00ff |
#define | ALT_USB_HOST_HCFG_RESVALID_RESET 0x2 |
#define | ALT_USB_HOST_HCFG_RESVALID_GET(value) (((value) & 0x0000ff00) >> 8) |
#define | ALT_USB_HOST_HCFG_RESVALID_SET(value) (((value) << 8) & 0x0000ff00) |
Field : Enable Scatter Gather DMA in Host mode - descdma | ||||||||||
The application can set this bit during initialization to enable the Scatter/Gather DMA operation. This bit must be modified only once after a reset. The following combinations are available for programming: GAHBCFG.DMAEn=0,HCFG.DescDMA=0 => Slave mode GAHBCFG.DMAEn=0,HCFG.DescDMA=1 => InvalidGAHBCFG.DMAEn=1,HCFG.DescDMA=0 => Buffered DMA mode GAHBCFG.DMAEn=1,HCFG.DescDMA=1 => Scatter/Gather DMA mode Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_E_DISD 0x0 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_E_END 0x1 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_LSB 23 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_MSB 23 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_WIDTH 1 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_SET_MSK 0x00800000 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_CLR_MSK 0xff7fffff | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_RESET 0x0 | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_GET(value) (((value) & 0x00800000) >> 23) | |||||||||
#define | ALT_USB_HOST_HCFG_DESCDMA_SET(value) (((value) << 23) & 0x00800000) | |||||||||
Field : Frame List Entries - frlisten | ||||||||||||||||
The value in the register specifies the number of entries in the Frame list. This field is valid only in Scatter/Gather DMA mode. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD 0x0 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8 0x1 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16 0x2 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32 0x3 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_LSB 24 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_MSB 25 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_WIDTH 2 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_SET_MSK 0x03000000 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_CLR_MSK 0xfcffffff | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_RESET 0x0 | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_GET(value) (((value) & 0x03000000) >> 24) | |||||||||||||||
#define | ALT_USB_HOST_HCFG_FRLISTEN_SET(value) (((value) << 24) & 0x03000000) | |||||||||||||||
Field : Enable Periodic Scheduling - perschedena | ||||||||||
Applicable in Scatter/Gather DMA mode only. Enables periodic scheduling within the core. Initially, the bit is reset. The core will not process any periodic channels. As soon as this bit is set, the core will get ready to start scheduling periodic channels. In non Scatter/Gather DMA mode, this bit is reserved. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD 0x0 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_E_END 0x1 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_LSB 26 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_MSB 26 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_WIDTH 1 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_SET_MSK 0x04000000 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_CLR_MSK 0xfbffffff | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_RESET 0x0 | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_GET(value) (((value) & 0x04000000) >> 26) | |||||||||
#define | ALT_USB_HOST_HCFG_PERSCHEDENA_SET(value) (((value) << 26) & 0x04000000) | |||||||||
Field : Mode Change Ready Timer Enable - modechtimen | ||||||||||||||||||||||
This bit is used to enable or disable the host core to wait for 200 PHY clock cycles at the end of Resume to change the opmode signal to the PHY to 00 after Suspend or LPM. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_E_END 0x0 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD 0x1 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_LSB 31 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_MSB 31 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_WIDTH 1 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_SET_MSK 0x80000000 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_CLR_MSK 0x7fffffff | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_RESET 0x0 | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_GET(value) (((value) & 0x80000000) >> 31) | |||||||||||||||||||||
#define | ALT_USB_HOST_HCFG_MODCHTIMEN_SET(value) (((value) << 31) & 0x80000000) | |||||||||||||||||||||
Data Structures | |
struct | ALT_USB_HOST_HCFG_s |
Macros | |
#define | ALT_USB_HOST_HCFG_OFST 0x0 |
#define | ALT_USB_HOST_HCFG_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCFG_OFST)) |
Typedefs | |
typedef struct ALT_USB_HOST_HCFG_s | ALT_USB_HOST_HCFG_t |
struct ALT_USB_HOST_HCFG_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_USB_HOST_HCFG.
Data Fields | ||
---|---|---|
uint32_t | fslspclksel: 2 | FS LS PHY Clock Select |
uint32_t | fslssupp: 1 | FS- and LS-Only Suppor |
uint32_t | __pad0__: 4 | UNDEFINED |
uint32_t | ena32khzs: 1 | Enable 32 KHz Suspend mode |
uint32_t | resvalid: 8 | Resume Validation Period |
uint32_t | __pad1__: 7 | UNDEFINED |
uint32_t | descdma: 1 | Enable Scatter Gather DMA in Host mode |
uint32_t | frlisten: 2 | Frame List Entries |
uint32_t | perschedena: 1 | Enable Periodic Scheduling |
uint32_t | __pad2__: 4 | UNDEFINED |
uint32_t | modechtimen: 1 | Mode Change Ready Timer Enable |
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL
PHY clock is running at 30/60 MHz
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL
PHY clock is running at 48 MHz
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6 0x2 |
Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL
PHY clock is running at 6 MHz
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_WIDTH 2 |
The width in bits of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET_MSK 0x00000003 |
The mask used to set the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_USB_HOST_HCFG_FSLSPCLKSEL field value from a register.
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_FSLSSUPP
HS/FS/LS, based on the maximum speed supported by the connected device
#define ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_FSLSSUPP
FS/LS-only, even if the connected device can support HS
#define ALT_USB_HOST_HCFG_FSLSSUPP_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FSLSSUPP register field.
#define ALT_USB_HOST_HCFG_FSLSSUPP_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FSLSSUPP register field.
#define ALT_USB_HOST_HCFG_FSLSSUPP_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCFG_FSLSSUPP register field.
#define ALT_USB_HOST_HCFG_FSLSSUPP_SET_MSK 0x00000004 |
The mask used to set the ALT_USB_HOST_HCFG_FSLSSUPP register field value.
#define ALT_USB_HOST_HCFG_FSLSSUPP_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_USB_HOST_HCFG_FSLSSUPP register field value.
#define ALT_USB_HOST_HCFG_FSLSSUPP_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_FSLSSUPP register field.
#define ALT_USB_HOST_HCFG_FSLSSUPP_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_USB_HOST_HCFG_FSLSSUPP field value from a register.
#define ALT_USB_HOST_HCFG_FSLSSUPP_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_USB_HOST_HCFG_FSLSSUPP register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_ENA32KHZS
USB 1.1 Full-Speed Not Selected
#define ALT_USB_HOST_HCFG_ENA32KHZS_E_END 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_ENA32KHZS
USB 1.1 Full-Speed Serial Transceiver Interface selected
#define ALT_USB_HOST_HCFG_ENA32KHZS_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_ENA32KHZS register field.
#define ALT_USB_HOST_HCFG_ENA32KHZS_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_ENA32KHZS register field.
#define ALT_USB_HOST_HCFG_ENA32KHZS_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCFG_ENA32KHZS register field.
#define ALT_USB_HOST_HCFG_ENA32KHZS_SET_MSK 0x00000080 |
The mask used to set the ALT_USB_HOST_HCFG_ENA32KHZS register field value.
#define ALT_USB_HOST_HCFG_ENA32KHZS_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_USB_HOST_HCFG_ENA32KHZS register field value.
#define ALT_USB_HOST_HCFG_ENA32KHZS_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_ENA32KHZS register field.
#define ALT_USB_HOST_HCFG_ENA32KHZS_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_USB_HOST_HCFG_ENA32KHZS field value from a register.
#define ALT_USB_HOST_HCFG_ENA32KHZS_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_USB_HOST_HCFG_ENA32KHZS register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_RESVALID_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_RESVALID register field.
#define ALT_USB_HOST_HCFG_RESVALID_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_RESVALID register field.
#define ALT_USB_HOST_HCFG_RESVALID_WIDTH 8 |
The width in bits of the ALT_USB_HOST_HCFG_RESVALID register field.
#define ALT_USB_HOST_HCFG_RESVALID_SET_MSK 0x0000ff00 |
The mask used to set the ALT_USB_HOST_HCFG_RESVALID register field value.
#define ALT_USB_HOST_HCFG_RESVALID_CLR_MSK 0xffff00ff |
The mask used to clear the ALT_USB_HOST_HCFG_RESVALID register field value.
#define ALT_USB_HOST_HCFG_RESVALID_RESET 0x2 |
The reset value of the ALT_USB_HOST_HCFG_RESVALID register field.
#define ALT_USB_HOST_HCFG_RESVALID_GET | ( | value | ) | (((value) & 0x0000ff00) >> 8) |
Extracts the ALT_USB_HOST_HCFG_RESVALID field value from a register.
#define ALT_USB_HOST_HCFG_RESVALID_SET | ( | value | ) | (((value) << 8) & 0x0000ff00) |
Produces a ALT_USB_HOST_HCFG_RESVALID register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_DESCDMA_E_DISD 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_DESCDMA
No Scatter/Gather DMA
#define ALT_USB_HOST_HCFG_DESCDMA_E_END 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_DESCDMA
Scatter/Gather DMA selected
#define ALT_USB_HOST_HCFG_DESCDMA_LSB 23 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_DESCDMA register field.
#define ALT_USB_HOST_HCFG_DESCDMA_MSB 23 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_DESCDMA register field.
#define ALT_USB_HOST_HCFG_DESCDMA_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCFG_DESCDMA register field.
#define ALT_USB_HOST_HCFG_DESCDMA_SET_MSK 0x00800000 |
The mask used to set the ALT_USB_HOST_HCFG_DESCDMA register field value.
#define ALT_USB_HOST_HCFG_DESCDMA_CLR_MSK 0xff7fffff |
The mask used to clear the ALT_USB_HOST_HCFG_DESCDMA register field value.
#define ALT_USB_HOST_HCFG_DESCDMA_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_DESCDMA register field.
#define ALT_USB_HOST_HCFG_DESCDMA_GET | ( | value | ) | (((value) & 0x00800000) >> 23) |
Extracts the ALT_USB_HOST_HCFG_DESCDMA field value from a register.
#define ALT_USB_HOST_HCFG_DESCDMA_SET | ( | value | ) | (((value) << 23) & 0x00800000) |
Produces a ALT_USB_HOST_HCFG_DESCDMA register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
Reserved
#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
8 Entries
#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16 0x2 |
Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
16 Entries
#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32 0x3 |
Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN
32 Entries
#define ALT_USB_HOST_HCFG_FRLISTEN_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FRLISTEN register field.
#define ALT_USB_HOST_HCFG_FRLISTEN_MSB 25 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FRLISTEN register field.
#define ALT_USB_HOST_HCFG_FRLISTEN_WIDTH 2 |
The width in bits of the ALT_USB_HOST_HCFG_FRLISTEN register field.
#define ALT_USB_HOST_HCFG_FRLISTEN_SET_MSK 0x03000000 |
The mask used to set the ALT_USB_HOST_HCFG_FRLISTEN register field value.
#define ALT_USB_HOST_HCFG_FRLISTEN_CLR_MSK 0xfcffffff |
The mask used to clear the ALT_USB_HOST_HCFG_FRLISTEN register field value.
#define ALT_USB_HOST_HCFG_FRLISTEN_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_FRLISTEN register field.
#define ALT_USB_HOST_HCFG_FRLISTEN_GET | ( | value | ) | (((value) & 0x03000000) >> 24) |
Extracts the ALT_USB_HOST_HCFG_FRLISTEN field value from a register.
#define ALT_USB_HOST_HCFG_FRLISTEN_SET | ( | value | ) | (((value) << 24) & 0x03000000) |
Produces a ALT_USB_HOST_HCFG_FRLISTEN register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_PERSCHEDENA
Disables periodic scheduling within the core
#define ALT_USB_HOST_HCFG_PERSCHEDENA_E_END 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_PERSCHEDENA
Enables periodic scheduling within the core
#define ALT_USB_HOST_HCFG_PERSCHEDENA_LSB 26 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_MSB 26 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_SET_MSK 0x04000000 |
The mask used to set the ALT_USB_HOST_HCFG_PERSCHEDENA register field value.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_CLR_MSK 0xfbffffff |
The mask used to clear the ALT_USB_HOST_HCFG_PERSCHEDENA register field value.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_GET | ( | value | ) | (((value) & 0x04000000) >> 26) |
Extracts the ALT_USB_HOST_HCFG_PERSCHEDENA field value from a register.
#define ALT_USB_HOST_HCFG_PERSCHEDENA_SET | ( | value | ) | (((value) << 26) & 0x04000000) |
Produces a ALT_USB_HOST_HCFG_PERSCHEDENA register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_E_END 0x0 |
Enumerated value for register field ALT_USB_HOST_HCFG_MODCHTIMEN
The Host core waits for either 200 PHY clock cycles or a linestate of SE0 at the end of resume to change the opmode from 0x2 to 0x0
#define ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD 0x1 |
Enumerated value for register field ALT_USB_HOST_HCFG_MODCHTIMEN
The Host core waits only for a linestate of SE0 at the end of resume to change the opmode from 0x2 to 0x0
#define ALT_USB_HOST_HCFG_MODCHTIMEN_LSB 31 |
The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_MSB 31 |
The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_WIDTH 1 |
The width in bits of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_SET_MSK 0x80000000 |
The mask used to set the ALT_USB_HOST_HCFG_MODCHTIMEN register field value.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_CLR_MSK 0x7fffffff |
The mask used to clear the ALT_USB_HOST_HCFG_MODCHTIMEN register field value.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_RESET 0x0 |
The reset value of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_GET | ( | value | ) | (((value) & 0x80000000) >> 31) |
Extracts the ALT_USB_HOST_HCFG_MODCHTIMEN field value from a register.
#define ALT_USB_HOST_HCFG_MODCHTIMEN_SET | ( | value | ) | (((value) << 31) & 0x80000000) |
Produces a ALT_USB_HOST_HCFG_MODCHTIMEN register field value suitable for setting the register.
#define ALT_USB_HOST_HCFG_OFST 0x0 |
The byte offset of the ALT_USB_HOST_HCFG register from the beginning of the component.
#define ALT_USB_HOST_HCFG_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCFG_OFST)) |
The address of the ALT_USB_HOST_HCFG register.
typedef struct ALT_USB_HOST_HCFG_s ALT_USB_HOST_HCFG_t |
The typedef declaration for register ALT_USB_HOST_HCFG.