![]() |
Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
|
Provides status for Clock Manager including PLL lock and HW Managed Clock State Machine busy.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | R | 0x0 | HW Managed Clocks BUSY |
[7:1] | ??? | 0x0 | UNDEFINED |
[8] | R | 0x0 | Main PLL Current Lock Status |
[9] | R | 0x0 | Peripheral PLL Current Lock Status |
[15:10] | ??? | 0x0 | UNDEFINED |
[16] | R | 0x1 | Boot Mode Status |
[17] | R | 0x0 | Boot Clock Source Status |
[31:18] | ??? | 0x0 | UNDEFINED |
Field : HW Managed Clocks BUSY - busy | ||||||||||
This read only bit indicates that the Hardware Managed clock's state machine is active. If the state machine is active, then the clocks are in transition. Software should poll this bit after changing the source of internal clocks when changing the state of CTRL.BOOTMODE, MAINPLLGRP.BYPASS.MPU or MAINPLLGRP.BYPASS.NOC register bits. Immediately following writes to any of these registers, SW should wait 0.5 usecs and then poll this BUSY bit until it is IDLE before proceeding with any other register writes in the Clock Manager. The reset value of this bit is applied on a cold reset; warm reset has no affect on this bit. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_E_IDLE 0x0 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_E_BUSY 0x1 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_LSB 0 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_MSB 0 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_WIDTH 1 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_SET_MSK 0x00000001 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_RESET 0x0 | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_CLKMGR_CLKMGR_STAT_BUSY_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Main PLL Current Lock Status - mainplllocked | |
If 1, the Main PLL is currently locked. If 0, the Main PLL is currently not locked. Field Access Macros: | |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_LSB 8 |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_MSB 8 |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_WIDTH 1 |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK 0x00000100 |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_CLR_MSK 0xfffffeff |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_RESET 0x0 |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET(value) (((value) << 8) & 0x00000100) |
Field : Peripheral PLL Current Lock Status - perplllocked | |
If 1, the Peripheral PLL is currently locked. If 0, the Peripheral PLL is currently not locked. Field Access Macros: | |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_LSB 9 |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_MSB 9 |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_WIDTH 1 |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK 0x00000200 |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_CLR_MSK 0xfffffdff |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_RESET 0x0 |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_GET(value) (((value) & 0x00000200) >> 9) |
#define | ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET(value) (((value) << 9) & 0x00000200) |
Field : Boot Mode Status - bootmode | |
If 1, the clocks are currently in Boot Mode. If 0, the clocks are not in Boot Mode. This is a read only status. For SW to exit Boot Mode, SW must clear the RW bit CTRL.BOOTMODE. Field Access Macros: | |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_LSB 16 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_MSB 16 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_WIDTH 1 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_SET_MSK 0x00010000 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_CLR_MSK 0xfffeffff |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_RESET 0x1 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_GET(value) (((value) & 0x00010000) >> 16) |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_SET(value) (((value) << 16) & 0x00010000) |
Field : Boot Clock Source Status - bootclksrc | |
If 1, the source of boot_clk is cb_intosc_hs_div2_clk. . If 0, the boot_clk source is the external oscillator (EOSC1). This is a read only status. Field Access Macros: | |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_LSB 17 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_MSB 17 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_WIDTH 1 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_SET_MSK 0x00020000 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_CLR_MSK 0xfffdffff |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_RESET 0x0 |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_GET(value) (((value) & 0x00020000) >> 17) |
#define | ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_SET(value) (((value) << 17) & 0x00020000) |
Data Structures | |
struct | ALT_CLKMGR_CLKMGR_STAT_s |
Macros | |
#define | ALT_CLKMGR_CLKMGR_STAT_RESET 0x00010000 |
#define | ALT_CLKMGR_CLKMGR_STAT_OFST 0x1c |
Typedefs | |
typedef struct ALT_CLKMGR_CLKMGR_STAT_s | ALT_CLKMGR_CLKMGR_STAT_t |
struct ALT_CLKMGR_CLKMGR_STAT_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_CLKMGR_CLKMGR_STAT.
Data Fields | ||
---|---|---|
const uint32_t | busy: 1 | HW Managed Clocks BUSY |
uint32_t | __pad0__: 7 | UNDEFINED |
const uint32_t | mainplllocked: 1 | Main PLL Current Lock Status |
const uint32_t | perplllocked: 1 | Peripheral PLL Current Lock Status |
uint32_t | __pad1__: 6 | UNDEFINED |
const uint32_t | bootmode: 1 | Boot Mode Status |
const uint32_t | bootclksrc: 1 | Boot Clock Source Status |
uint32_t | __pad2__: 14 | UNDEFINED |
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_E_IDLE 0x0 |
Enumerated value for register field ALT_CLKMGR_CLKMGR_STAT_BUSY
Clocks stable
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_E_BUSY 0x1 |
Enumerated value for register field ALT_CLKMGR_CLKMGR_STAT_BUSY
Clocks in transition
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_WIDTH 1 |
The width in bits of the ALT_CLKMGR_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_SET_MSK 0x00000001 |
The mask used to set the ALT_CLKMGR_CLKMGR_STAT_BUSY register field value.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_CLKMGR_CLKMGR_STAT_BUSY register field value.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_RESET 0x0 |
The reset value of the ALT_CLKMGR_CLKMGR_STAT_BUSY register field.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_CLKMGR_CLKMGR_STAT_BUSY field value from a register.
#define ALT_CLKMGR_CLKMGR_STAT_BUSY_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_CLKMGR_CLKMGR_STAT_BUSY register field value suitable for setting the register.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_WIDTH 1 |
The width in bits of the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK 0x00000100 |
The mask used to set the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field value.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field value.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_RESET 0x0 |
The reset value of the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED field value from a register.
#define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED register field value suitable for setting the register.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_WIDTH 1 |
The width in bits of the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK 0x00000200 |
The mask used to set the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field value.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field value.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_RESET 0x0 |
The reset value of the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED field value from a register.
#define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED register field value suitable for setting the register.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_WIDTH 1 |
The width in bits of the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_SET_MSK 0x00010000 |
The mask used to set the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field value.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field value.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_RESET 0x1 |
The reset value of the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_CLKMGR_CLKMGR_STAT_BOOTMOD field value from a register.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_CLKMGR_CLKMGR_STAT_BOOTMOD register field value suitable for setting the register.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_LSB 17 |
The Least Significant Bit (LSB) position of the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_WIDTH 1 |
The width in bits of the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_SET_MSK 0x00020000 |
The mask used to set the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field value.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_CLR_MSK 0xfffdffff |
The mask used to clear the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field value.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_RESET 0x0 |
The reset value of the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_GET | ( | value | ) | (((value) & 0x00020000) >> 17) |
Extracts the ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC field value from a register.
#define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_SET | ( | value | ) | (((value) << 17) & 0x00020000) |
Produces a ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC register field value suitable for setting the register.
#define ALT_CLKMGR_CLKMGR_STAT_RESET 0x00010000 |
The reset value of the ALT_CLKMGR_CLKMGR_STAT register.
#define ALT_CLKMGR_CLKMGR_STAT_OFST 0x1c |
The byte offset of the ALT_CLKMGR_CLKMGR_STAT register from the beginning of the component.
typedef struct ALT_CLKMGR_CLKMGR_STAT_s ALT_CLKMGR_CLKMGR_STAT_t |
The typedef declaration for register ALT_CLKMGR_CLKMGR_STAT.