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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Reports various operations of the modem signals
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | Data Terminal Ready |
[1] | RW | 0x0 | Request to Send |
[2] | RW | 0x0 | Out1 |
[3] | RW | 0x0 | out2 |
[4] | RW | 0x0 | LoopBack Bit |
[5] | RW | 0x0 | Auto Flow Control Enable |
[31:6] | ??? | 0x0 | UNDEFINED |
Field : Data Terminal Ready - dtr | ||||||||||
This is used to directly control the Data Terminal Ready output. The value written to this location is inverted and driven out on uart_dtr_n, that is: The Data Terminal Ready output is used to inform the modem or data set that the UART is ready to establish communications. Note that Loopback mode bit [4] of MCR is set to one, the uart_dtr_n output is held inactive high while the value of this location is internally looped back to an input. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_MCR_DTR_E_LOGIC1 0x0 | |||||||||
#define | ALT_UART_MCR_DTR_E_LOGIC0 0x1 | |||||||||
#define | ALT_UART_MCR_DTR_LSB 0 | |||||||||
#define | ALT_UART_MCR_DTR_MSB 0 | |||||||||
#define | ALT_UART_MCR_DTR_WIDTH 1 | |||||||||
#define | ALT_UART_MCR_DTR_SET_MSK 0x00000001 | |||||||||
#define | ALT_UART_MCR_DTR_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_UART_MCR_DTR_RESET 0x0 | |||||||||
#define | ALT_UART_MCR_DTR_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_UART_MCR_DTR_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Request to Send - rts | ||||||||||
This is used to directly control the Request to Send (uart_rts_n) output. The Request to Send (uart_rts_n) output is used to inform the modem or data set that the UART is ready to exchange data. When Auto RTS Flow Control is not enabled (MCR[5] set to zero), the uart_rts_n signal is set low by programming MCR[1] (RTS) to a high. If Auto Flow Control is active (MCR[5] set to one) and FIFO's enable (FCR[0] set to one), the uart_rts_n output is controlled in the same way, but is also gated with the receiver FIFO threshold trigger (uart_rts_n is inactive high when above the threshold). The uart_rts_n signal will be de- asserted when MCR[1] is set low. Note that in Loopback mode (MCR[4] set to one), the uart_rts_n output is held inactive high while the value of this location is internally looped back to an input. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_MCR_RTS_E_LOGIC1 0x0 | |||||||||
#define | ALT_UART_MCR_RTS_E_LOGIC0 0x1 | |||||||||
#define | ALT_UART_MCR_RTS_LSB 1 | |||||||||
#define | ALT_UART_MCR_RTS_MSB 1 | |||||||||
#define | ALT_UART_MCR_RTS_WIDTH 1 | |||||||||
#define | ALT_UART_MCR_RTS_SET_MSK 0x00000002 | |||||||||
#define | ALT_UART_MCR_RTS_CLR_MSK 0xfffffffd | |||||||||
#define | ALT_UART_MCR_RTS_RESET 0x0 | |||||||||
#define | ALT_UART_MCR_RTS_GET(value) (((value) & 0x00000002) >> 1) | |||||||||
#define | ALT_UART_MCR_RTS_SET(value) (((value) << 1) & 0x00000002) | |||||||||
Field : Out1 - out1 | ||||||||||
The value written to this location is inverted and driven out on uart_out1_n pin. Note that in Loopback mode (MCR[4] set to one), the uart_out1_n output is held inactive high while the value of this location is internally looped back to an input. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_MCR_OUT1_E_LOGIC1 0x0 | |||||||||
#define | ALT_UART_MCR_OUT1_E_LOGIC0 0x1 | |||||||||
#define | ALT_UART_MCR_OUT1_LSB 2 | |||||||||
#define | ALT_UART_MCR_OUT1_MSB 2 | |||||||||
#define | ALT_UART_MCR_OUT1_WIDTH 1 | |||||||||
#define | ALT_UART_MCR_OUT1_SET_MSK 0x00000004 | |||||||||
#define | ALT_UART_MCR_OUT1_CLR_MSK 0xfffffffb | |||||||||
#define | ALT_UART_MCR_OUT1_RESET 0x0 | |||||||||
#define | ALT_UART_MCR_OUT1_GET(value) (((value) & 0x00000004) >> 2) | |||||||||
#define | ALT_UART_MCR_OUT1_SET(value) (((value) << 2) & 0x00000004) | |||||||||
Field : out2 - out2 | ||||||||||
This is used to directly control the user-designated uart_out2_n output. The value written to this location is inverted and driven out on uart_out2_n Note: In Loopback mode bit 4 of the modem control register (MCR) is set to one, the uart_out2_n output is held inactive high while the value of this location is internally looped back to an input. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_MCR_OUT2_E_LOGIC1 0x0 | |||||||||
#define | ALT_UART_MCR_OUT2_E_LOGIC0 0x1 | |||||||||
#define | ALT_UART_MCR_OUT2_LSB 3 | |||||||||
#define | ALT_UART_MCR_OUT2_MSB 3 | |||||||||
#define | ALT_UART_MCR_OUT2_WIDTH 1 | |||||||||
#define | ALT_UART_MCR_OUT2_SET_MSK 0x00000008 | |||||||||
#define | ALT_UART_MCR_OUT2_CLR_MSK 0xfffffff7 | |||||||||
#define | ALT_UART_MCR_OUT2_RESET 0x0 | |||||||||
#define | ALT_UART_MCR_OUT2_GET(value) (((value) & 0x00000008) >> 3) | |||||||||
#define | ALT_UART_MCR_OUT2_SET(value) (((value) << 3) & 0x00000008) | |||||||||
Field : LoopBack Bit - loopback | |
This is used to put the UART into a diagnostic mode for test purposes. If UART mode is NOT active, bit [6] of the modem control register MCR is set to zero, data on the sout line is held high, while serial data output is looped back to the sin line, internally. In this mode all the interrupts are fully functional. Also, in loopback mode, the modem control inputs (uart_dsr_n, uart_cts_n, uart_ri_n, uart_dcd_n) are disconnected and the modem control outputs (uart_dtr_n, uart_rts_n, uart_out1_n, uart_out2_n) are loopedback to the inputs, internally. Field Access Macros: | |
#define | ALT_UART_MCR_LOOPBACK_LSB 4 |
#define | ALT_UART_MCR_LOOPBACK_MSB 4 |
#define | ALT_UART_MCR_LOOPBACK_WIDTH 1 |
#define | ALT_UART_MCR_LOOPBACK_SET_MSK 0x00000010 |
#define | ALT_UART_MCR_LOOPBACK_CLR_MSK 0xffffffef |
#define | ALT_UART_MCR_LOOPBACK_RESET 0x0 |
#define | ALT_UART_MCR_LOOPBACK_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_UART_MCR_LOOPBACK_SET(value) (((value) << 4) & 0x00000010) |
Field : Auto Flow Control Enable - afce | ||||||||||
When FIFOs are enabled, the Auto Flow Control enable bits are active. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_UART_MCR_AFCE_E_DISD 0x0 | |||||||||
#define | ALT_UART_MCR_AFCE_E_END 0x1 | |||||||||
#define | ALT_UART_MCR_AFCE_LSB 5 | |||||||||
#define | ALT_UART_MCR_AFCE_MSB 5 | |||||||||
#define | ALT_UART_MCR_AFCE_WIDTH 1 | |||||||||
#define | ALT_UART_MCR_AFCE_SET_MSK 0x00000020 | |||||||||
#define | ALT_UART_MCR_AFCE_CLR_MSK 0xffffffdf | |||||||||
#define | ALT_UART_MCR_AFCE_RESET 0x0 | |||||||||
#define | ALT_UART_MCR_AFCE_GET(value) (((value) & 0x00000020) >> 5) | |||||||||
#define | ALT_UART_MCR_AFCE_SET(value) (((value) << 5) & 0x00000020) | |||||||||
Data Structures | |
struct | ALT_UART_MCR_s |
Macros | |
#define | ALT_UART_MCR_OFST 0x10 |
#define | ALT_UART_MCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MCR_OFST)) |
Typedefs | |
typedef struct ALT_UART_MCR_s | ALT_UART_MCR_t |
struct ALT_UART_MCR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_UART_MCR.
Data Fields | ||
---|---|---|
uint32_t | dtr: 1 | Data Terminal Ready |
uint32_t | rts: 1 | Request to Send |
uint32_t | out1: 1 | Out1 |
uint32_t | out2: 1 | out2 |
uint32_t | loopback: 1 | LoopBack Bit |
uint32_t | afce: 1 | Auto Flow Control Enable |
uint32_t | __pad0__: 26 | UNDEFINED |
#define ALT_UART_MCR_DTR_E_LOGIC1 0x0 |
Enumerated value for register field ALT_UART_MCR_DTR
uart_dtr_n de-asserted (logic 1)
#define ALT_UART_MCR_DTR_E_LOGIC0 0x1 |
Enumerated value for register field ALT_UART_MCR_DTR
uart_dtr_n asserted (logic 0)
#define ALT_UART_MCR_DTR_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_UART_MCR_DTR register field.
#define ALT_UART_MCR_DTR_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_UART_MCR_DTR register field.
#define ALT_UART_MCR_DTR_WIDTH 1 |
The width in bits of the ALT_UART_MCR_DTR register field.
#define ALT_UART_MCR_DTR_SET_MSK 0x00000001 |
The mask used to set the ALT_UART_MCR_DTR register field value.
#define ALT_UART_MCR_DTR_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_UART_MCR_DTR register field value.
#define ALT_UART_MCR_DTR_RESET 0x0 |
The reset value of the ALT_UART_MCR_DTR register field.
#define ALT_UART_MCR_DTR_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_UART_MCR_DTR field value from a register.
#define ALT_UART_MCR_DTR_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_UART_MCR_DTR register field value suitable for setting the register.
#define ALT_UART_MCR_RTS_E_LOGIC1 0x0 |
Enumerated value for register field ALT_UART_MCR_RTS
uart_rts_n de-asserted (logic 1)
#define ALT_UART_MCR_RTS_E_LOGIC0 0x1 |
Enumerated value for register field ALT_UART_MCR_RTS
uart_rts_n asserted (logic 0)
#define ALT_UART_MCR_RTS_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_UART_MCR_RTS register field.
#define ALT_UART_MCR_RTS_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_UART_MCR_RTS register field.
#define ALT_UART_MCR_RTS_WIDTH 1 |
The width in bits of the ALT_UART_MCR_RTS register field.
#define ALT_UART_MCR_RTS_SET_MSK 0x00000002 |
The mask used to set the ALT_UART_MCR_RTS register field value.
#define ALT_UART_MCR_RTS_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_UART_MCR_RTS register field value.
#define ALT_UART_MCR_RTS_RESET 0x0 |
The reset value of the ALT_UART_MCR_RTS register field.
#define ALT_UART_MCR_RTS_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_UART_MCR_RTS field value from a register.
#define ALT_UART_MCR_RTS_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_UART_MCR_RTS register field value suitable for setting the register.
#define ALT_UART_MCR_OUT1_E_LOGIC1 0x0 |
Enumerated value for register field ALT_UART_MCR_OUT1
uart_out1_n de-asserted (logic 1)
#define ALT_UART_MCR_OUT1_E_LOGIC0 0x1 |
Enumerated value for register field ALT_UART_MCR_OUT1
uart_out1_n asserted (logic 0)
#define ALT_UART_MCR_OUT1_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_UART_MCR_OUT1 register field.
#define ALT_UART_MCR_OUT1_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_UART_MCR_OUT1 register field.
#define ALT_UART_MCR_OUT1_WIDTH 1 |
The width in bits of the ALT_UART_MCR_OUT1 register field.
#define ALT_UART_MCR_OUT1_SET_MSK 0x00000004 |
The mask used to set the ALT_UART_MCR_OUT1 register field value.
#define ALT_UART_MCR_OUT1_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_UART_MCR_OUT1 register field value.
#define ALT_UART_MCR_OUT1_RESET 0x0 |
The reset value of the ALT_UART_MCR_OUT1 register field.
#define ALT_UART_MCR_OUT1_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_UART_MCR_OUT1 field value from a register.
#define ALT_UART_MCR_OUT1_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_UART_MCR_OUT1 register field value suitable for setting the register.
#define ALT_UART_MCR_OUT2_E_LOGIC1 0x0 |
Enumerated value for register field ALT_UART_MCR_OUT2
uart_out2_n de-asserted (logic 1)
#define ALT_UART_MCR_OUT2_E_LOGIC0 0x1 |
Enumerated value for register field ALT_UART_MCR_OUT2
uart_out2_n asserted (logic 0)
#define ALT_UART_MCR_OUT2_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_UART_MCR_OUT2 register field.
#define ALT_UART_MCR_OUT2_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_UART_MCR_OUT2 register field.
#define ALT_UART_MCR_OUT2_WIDTH 1 |
The width in bits of the ALT_UART_MCR_OUT2 register field.
#define ALT_UART_MCR_OUT2_SET_MSK 0x00000008 |
The mask used to set the ALT_UART_MCR_OUT2 register field value.
#define ALT_UART_MCR_OUT2_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_UART_MCR_OUT2 register field value.
#define ALT_UART_MCR_OUT2_RESET 0x0 |
The reset value of the ALT_UART_MCR_OUT2 register field.
#define ALT_UART_MCR_OUT2_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_UART_MCR_OUT2 field value from a register.
#define ALT_UART_MCR_OUT2_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_UART_MCR_OUT2 register field value suitable for setting the register.
#define ALT_UART_MCR_LOOPBACK_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_UART_MCR_LOOPBACK register field.
#define ALT_UART_MCR_LOOPBACK_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_UART_MCR_LOOPBACK register field.
#define ALT_UART_MCR_LOOPBACK_WIDTH 1 |
The width in bits of the ALT_UART_MCR_LOOPBACK register field.
#define ALT_UART_MCR_LOOPBACK_SET_MSK 0x00000010 |
The mask used to set the ALT_UART_MCR_LOOPBACK register field value.
#define ALT_UART_MCR_LOOPBACK_CLR_MSK 0xffffffef |
The mask used to clear the ALT_UART_MCR_LOOPBACK register field value.
#define ALT_UART_MCR_LOOPBACK_RESET 0x0 |
The reset value of the ALT_UART_MCR_LOOPBACK register field.
#define ALT_UART_MCR_LOOPBACK_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_UART_MCR_LOOPBACK field value from a register.
#define ALT_UART_MCR_LOOPBACK_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_UART_MCR_LOOPBACK register field value suitable for setting the register.
#define ALT_UART_MCR_AFCE_E_DISD 0x0 |
Enumerated value for register field ALT_UART_MCR_AFCE
Auto Flow Control Mode disabled
#define ALT_UART_MCR_AFCE_E_END 0x1 |
Enumerated value for register field ALT_UART_MCR_AFCE
Auto Flow Control Mode enabled
#define ALT_UART_MCR_AFCE_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_UART_MCR_AFCE register field.
#define ALT_UART_MCR_AFCE_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_UART_MCR_AFCE register field.
#define ALT_UART_MCR_AFCE_WIDTH 1 |
The width in bits of the ALT_UART_MCR_AFCE register field.
#define ALT_UART_MCR_AFCE_SET_MSK 0x00000020 |
The mask used to set the ALT_UART_MCR_AFCE register field value.
#define ALT_UART_MCR_AFCE_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_UART_MCR_AFCE register field value.
#define ALT_UART_MCR_AFCE_RESET 0x0 |
The reset value of the ALT_UART_MCR_AFCE register field.
#define ALT_UART_MCR_AFCE_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_UART_MCR_AFCE field value from a register.
#define ALT_UART_MCR_AFCE_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_UART_MCR_AFCE register field value suitable for setting the register.
#define ALT_UART_MCR_OFST 0x10 |
The byte offset of the ALT_UART_MCR register from the beginning of the component.
#define ALT_UART_MCR_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MCR_OFST)) |
The address of the ALT_UART_MCR register.
typedef struct ALT_UART_MCR_s ALT_UART_MCR_t |
The typedef declaration for register ALT_UART_MCR.