Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Memory Protection Address Register - protruleaddr

Description

This register is used to control the memory protection for port 0 transactions. Address ranges can either be used to allow access to memory regions or disallow access to memory regions. If trustzone is being used, access can be enabled for protected transactions or disabled for unprotected transactions. The default state of this register is to allow all access. Address values used for protection are only physical addresses.

Register Layout

Bits Access Reset Description
[11:0] RW Unknown Low Address
[23:12] RW Unknown High Address
[31:24] ??? 0x0 UNDEFINED

Field : Low Address - lowaddr

Lower 12 bits of the address for a check. Address is compared to be less than or equal to the address of a transaction. Note that since AXI transactions cannot cross a 4K byte boundary, the transaction start and transaction end address must also fall within the same 1MByte block pointed to by this address pointer.

Field Access Macros:

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_LSB   0
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_MSB   11
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_WIDTH   12
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_SET_MSK   0x00000fff
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_CLR_MSK   0xfffff000
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_RESET   0x0
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_GET(value)   (((value) & 0x00000fff) >> 0)
 
#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_SET(value)   (((value) << 0) & 0x00000fff)
 

Field : High Address - highaddr

Upper 12 bits of the address for a check. Address is compared to be greater than or equal to the address of a transaction. Note that since AXI transactions cannot cross a 4K byte boundary, the transaction start and transaction end address must also fall within the same 1MByte block pointed to by this address pointer.

Field Access Macros:

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_LSB   12
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_MSB   23
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_WIDTH   12
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_SET_MSK   0x00fff000
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_CLR_MSK   0xff000fff
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_RESET   0x0
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_GET(value)   (((value) & 0x00fff000) >> 12)
 
#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_SET(value)   (((value) << 12) & 0x00fff000)
 

Data Structures

struct  ALT_SDR_CTL_PROTRULEADDR_s
 

Macros

#define ALT_SDR_CTL_PROTRULEADDR_OFST   0x90
 

Typedefs

typedef struct
ALT_SDR_CTL_PROTRULEADDR_s 
ALT_SDR_CTL_PROTRULEADDR_t
 

Data Structure Documentation

struct ALT_SDR_CTL_PROTRULEADDR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SDR_CTL_PROTRULEADDR.

Data Fields
uint32_t lowaddr: 12 Low Address
uint32_t highaddr: 12 High Address
uint32_t __pad0__: 8 UNDEFINED

Macro Definitions

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_LSB   0

The Least Significant Bit (LSB) position of the ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_MSB   11

The Most Significant Bit (MSB) position of the ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_WIDTH   12

The width in bits of the ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_SET_MSK   0x00000fff

The mask used to set the ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field value.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_CLR_MSK   0xfffff000

The mask used to clear the ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field value.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_RESET   0x0

The reset value of the ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field is UNKNOWN.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_GET (   value)    (((value) & 0x00000fff) >> 0)

Extracts the ALT_SDR_CTL_PROTRULEADDR_LOWADDR field value from a register.

#define ALT_SDR_CTL_PROTRULEADDR_LOWADDR_SET (   value)    (((value) << 0) & 0x00000fff)

Produces a ALT_SDR_CTL_PROTRULEADDR_LOWADDR register field value suitable for setting the register.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_LSB   12

The Least Significant Bit (LSB) position of the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_MSB   23

The Most Significant Bit (MSB) position of the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_WIDTH   12

The width in bits of the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_SET_MSK   0x00fff000

The mask used to set the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field value.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_CLR_MSK   0xff000fff

The mask used to clear the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field value.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_RESET   0x0

The reset value of the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field is UNKNOWN.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_GET (   value)    (((value) & 0x00fff000) >> 12)

Extracts the ALT_SDR_CTL_PROTRULEADDR_HIGHADDR field value from a register.

#define ALT_SDR_CTL_PROTRULEADDR_HIGHADDR_SET (   value)    (((value) << 12) & 0x00fff000)

Produces a ALT_SDR_CTL_PROTRULEADDR_HIGHADDR register field value suitable for setting the register.

#define ALT_SDR_CTL_PROTRULEADDR_OFST   0x90

The byte offset of the ALT_SDR_CTL_PROTRULEADDR register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SDR_CTL_PROTRULEADDR.