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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[7:0] | R | 0x4 | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID |
[31:8] | R | 0x7d4821 | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM |
Field : CORETYPEID | |
Field identifying the type of IP. Field Access Macros: | |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_LSB 0 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_MSB 7 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_WIDTH 8 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_SET_MSK 0x000000ff |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_CLR_MSK 0xffffff00 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_RESET 0x4 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0) |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff) |
Field : CORECHECKSUM | |
Field containing a checksum of the parameters of the IP. Field Access Macros: | |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_LSB 8 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_MSB 31 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_WIDTH 24 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_SET_MSK 0xffffff00 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_CLR_MSK 0x000000ff |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_RESET 0x7d4821 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8) |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00) |
Data Structures | |
struct | ALT_NOC_MPU_EMAC0_M_QOS_COREID_s |
Macros | |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_RESET 0x7d482104 |
#define | ALT_NOC_MPU_EMAC0_M_QOS_COREID_OFST 0x0 |
Typedefs | |
typedef struct ALT_NOC_MPU_EMAC0_M_QOS_COREID_s | ALT_NOC_MPU_EMAC0_M_QOS_COREID_t |
struct ALT_NOC_MPU_EMAC0_M_QOS_COREID_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NOC_MPU_EMAC0_M_QOS_COREID.
Data Fields | ||
---|---|---|
const uint32_t | CORETYPEID: 8 | ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID |
const uint32_t | CORECHECKSUM: 24 | ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM |
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_WIDTH 8 |
The width in bits of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_SET_MSK 0x000000ff |
The mask used to set the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field value.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_CLR_MSK 0xffffff00 |
The mask used to clear the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field value.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_RESET 0x4 |
The reset value of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_GET | ( | value | ) | (((value) & 0x000000ff) >> 0) |
Extracts the ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID field value from a register.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_SET | ( | value | ) | (((value) << 0) & 0x000000ff) |
Produces a ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID register field value suitable for setting the register.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_MSB 31 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_WIDTH 24 |
The width in bits of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_SET_MSK 0xffffff00 |
The mask used to set the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field value.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_CLR_MSK 0x000000ff |
The mask used to clear the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field value.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_RESET 0x7d4821 |
The reset value of the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_GET | ( | value | ) | (((value) & 0xffffff00) >> 8) |
Extracts the ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM field value from a register.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_SET | ( | value | ) | (((value) << 8) & 0xffffff00) |
Produces a ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM register field value suitable for setting the register.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_RESET 0x7d482104 |
The reset value of the ALT_NOC_MPU_EMAC0_M_QOS_COREID register.
#define ALT_NOC_MPU_EMAC0_M_QOS_COREID_OFST 0x0 |
The byte offset of the ALT_NOC_MPU_EMAC0_M_QOS_COREID register from the beginning of the component.
typedef struct ALT_NOC_MPU_EMAC0_M_QOS_COREID_s ALT_NOC_MPU_EMAC0_M_QOS_COREID_t |
The typedef declaration for register ALT_NOC_MPU_EMAC0_M_QOS_COREID.