Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : hcfg

Description

Host Configuration Register

Register Layout

Bits Access Reset Description
[1:0] RW 0x0 ALT_USB_HOST_HCFG_FSLSPCLKSEL
[2] RW 0x0 ALT_USB_HOST_HCFG_FSLSSUPP
[6:3] ??? 0x0 UNDEFINED
[7] RW 0x0 ALT_USB_HOST_HCFG_ENA32KHZS
[15:8] RW 0x2 ALT_USB_HOST_HCFG_RESVALID
[22:16] ??? 0x0 UNDEFINED
[23] RW 0x0 ALT_USB_HOST_HCFG_DESCDMA
[25:24] RW 0x0 ALT_USB_HOST_HCFG_FRLISTEN
[26] RW 0x0 ALT_USB_HOST_HCFG_PERSCHEDENA
[30:27] ??? 0x0 UNDEFINED
[31] RW 0x0 ALT_USB_HOST_HCFG_MODCHTIMEN

Field : fslspclksel

FS/LS PHY Clock Select (FSLSPclkSel)

When the core is in FS Host mode

2'b00: PHY clock is running at 30/60 MHz

2'b01: PHY clock is running at 48 MHz

Others: Reserved

When the core is in LS Host mode

2'b00: PHY clock is running at 30/60 MHz. When the

UTMI+/ULPI PHY Low Power mode is not selected, use

30/60 MHz.

2'b01: PHY clock is running at 48 MHz. When the UTMI+

PHY Low Power mode is selected, use 48MHz If the PHY

supplies a 48 MHz clock during LS mode.

2'b10: PHY clock is running at 6 MHz. In USB 1.1 FS mode,

use 6 MHz when the UTMI+ PHY Low Power mode is

selected and the PHY supplies a 6 MHz clock during LS

mode. If you select a 6 MHz clock during LS mode, you must

do a soft reset.

2'b11: Reserved

Notes:

When Core in FS mode, the internal and external clocks have the same frequency.

When Core in LS mode,

  • If FSLSPclkSel = 2’b00: Internal and external clocks have the same frequency
  • If FSLSPclkSel = 2’b10: Internal clock is the divided by eight version of external 48 MHz clock

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060 0x0 PHY clock is running at 30/60 MHz
ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48 0x1 PHY clock is running at 48 MHz
ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6 0x2 PHY clock is running at 6 MHz

Field Access Macros:

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060   0x0
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48   0x1
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6   0x2
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_LSB   0
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_MSB   1
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_WIDTH   2
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET_MSK   0x00000003
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_CLR_MSK   0xfffffffc
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_RESET   0x0
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_GET(value)   (((value) & 0x00000003) >> 0)
 
#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET(value)   (((value) << 0) & 0x00000003)
 

Field : fslssupp

FS- and LS-Only Support (FSLSSupp)

The application uses this bit to control the core's enumeration

speed. Using this bit, the application can make the core

enumerate as a FS host, even If the connected device supports

HS traffic. Do not make changes to this field after initial

programming.

1'b0: HS/FS/LS, based on the maximum speed supported by

the connected device

1'b1: FS/LS-only, even If the connected device can support

HS

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS 0x0 HS/FS/LS, based on the maximum speed supported
: by the connected device
ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS 0x1 FS/LS-only, even if the connected device can
: support HS

Field Access Macros:

#define ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS   0x0
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS   0x1
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_LSB   2
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_MSB   2
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_WIDTH   1
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_SET_MSK   0x00000004
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_CLR_MSK   0xfffffffb
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_RESET   0x0
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_USB_HOST_HCFG_FSLSSUPP_SET(value)   (((value) << 2) & 0x00000004)
 

Field : ena32khzs

Enable 32 KHz Suspend mode (Ena32KHzS)

This bit can be set only in FS PHY interface is selected.

Else, this bit needs to be set to zero.

When FS PHY interface is chosen and this bit is set,

the core expects that the PHY clock during Suspend is switched

from 48 MHz to 32 KHz.

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD 0x0 USB 1.1 Full-Speed Not Selected
ALT_USB_HOST_HCFG_ENA32KHZS_E_END 0x1 USB 1.1 Full-Speed Serial Transceiver Interface
: selected

Field Access Macros:

#define ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD   0x0
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_E_END   0x1
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_LSB   7
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_MSB   7
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_WIDTH   1
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_SET_MSK   0x00000080
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_CLR_MSK   0xffffff7f
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_RESET   0x0
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_USB_HOST_HCFG_ENA32KHZS_SET(value)   (((value) << 7) & 0x00000080)
 

Field : resvalid

Resume Validation Period (ResValid)

This field is effective only when HCFG.Ena32KHzS is set.

It will control the resume period when the core resumes from suspend.

The core counts for 'ResValid' number of clock cycles to detect a

valid resume when this is set.

Field Access Macros:

#define ALT_USB_HOST_HCFG_RESVALID_LSB   8
 
#define ALT_USB_HOST_HCFG_RESVALID_MSB   15
 
#define ALT_USB_HOST_HCFG_RESVALID_WIDTH   8
 
#define ALT_USB_HOST_HCFG_RESVALID_SET_MSK   0x0000ff00
 
#define ALT_USB_HOST_HCFG_RESVALID_CLR_MSK   0xffff00ff
 
#define ALT_USB_HOST_HCFG_RESVALID_RESET   0x2
 
#define ALT_USB_HOST_HCFG_RESVALID_GET(value)   (((value) & 0x0000ff00) >> 8)
 
#define ALT_USB_HOST_HCFG_RESVALID_SET(value)   (((value) << 8) & 0x0000ff00)
 

Field : descdma

Enable Scatter/gather DMA in Host mode (DescDMA).

When the Scatter/Gather DMA option selected during configuration

of the RTL, the application can set this bit during initialization

to enable the Scatter/Gather DMA operation.

NOTE: This bit must be modified only once after a reset.

following combinations are available for programming:

GAHBCFG.DMAEn=0,HCFG.DescDMA=0 => Slave mode

GAHBCFG.DMAEn=0,HCFG.DescDMA=1 => Invalid

GAHBCFG.DMAEn=1,HCFG.DescDMA=0 => Buffered DMA mode

GAHBCFG.DMAEn=1,HCFG.DescDMA=1 => Scatter/Gather DMA mode

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_DESCDMA_E_DISD 0x0 No Scatter/Gather DMA
ALT_USB_HOST_HCFG_DESCDMA_E_END 0x1 Scatter/Gather DMA selected

Field Access Macros:

#define ALT_USB_HOST_HCFG_DESCDMA_E_DISD   0x0
 
#define ALT_USB_HOST_HCFG_DESCDMA_E_END   0x1
 
#define ALT_USB_HOST_HCFG_DESCDMA_LSB   23
 
#define ALT_USB_HOST_HCFG_DESCDMA_MSB   23
 
#define ALT_USB_HOST_HCFG_DESCDMA_WIDTH   1
 
#define ALT_USB_HOST_HCFG_DESCDMA_SET_MSK   0x00800000
 
#define ALT_USB_HOST_HCFG_DESCDMA_CLR_MSK   0xff7fffff
 
#define ALT_USB_HOST_HCFG_DESCDMA_RESET   0x0
 
#define ALT_USB_HOST_HCFG_DESCDMA_GET(value)   (((value) & 0x00800000) >> 23)
 
#define ALT_USB_HOST_HCFG_DESCDMA_SET(value)   (((value) << 23) & 0x00800000)
 

Field : frlisten

Frame List Entries(FrListEn). The value in the register specifies the number

of entries in the Frame list.

This field is valid only in Scatter/Gather DMA mode.

2'b00: 8 Entries

2'b01: 16 Entries

2'b10: 32 Entries

2'b11: 63 Entries

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD 0x0 Reserved
ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8 0x1 8 Entries
ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16 0x2 16 Entries
ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32 0x3 32 Entries

Field Access Macros:

#define ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD   0x0
 
#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8   0x1
 
#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16   0x2
 
#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32   0x3
 
#define ALT_USB_HOST_HCFG_FRLISTEN_LSB   24
 
#define ALT_USB_HOST_HCFG_FRLISTEN_MSB   25
 
#define ALT_USB_HOST_HCFG_FRLISTEN_WIDTH   2
 
#define ALT_USB_HOST_HCFG_FRLISTEN_SET_MSK   0x03000000
 
#define ALT_USB_HOST_HCFG_FRLISTEN_CLR_MSK   0xfcffffff
 
#define ALT_USB_HOST_HCFG_FRLISTEN_RESET   0x0
 
#define ALT_USB_HOST_HCFG_FRLISTEN_GET(value)   (((value) & 0x03000000) >> 24)
 
#define ALT_USB_HOST_HCFG_FRLISTEN_SET(value)   (((value) << 24) & 0x03000000)
 

Field : perschedena

Enable Periodic Scheduling (PerSchedEna):

Applicable in host DDMA mode only.

Enables periodic scheduling within the core. Initially, the bit is reset.

The core will not process any periodic channels. As soon as this bit is set,

the core will get ready to start scheduling periodic channels and

sets HCFG.PerSchedStat. The setting of HCFG.PerSchedStat indicates the core

has enabled periodic scheduling. Once HCFG.PerSchedEna is set,

the application is not supposed to again reset the bit unless HCFG.PerSchedStat

is set. As soon as this bit is reset, the core will get ready to

stop scheduling periodic channels and resets HCFG.PerSchedStat.

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD 0x0 Disables periodic scheduling within the core
ALT_USB_HOST_HCFG_PERSCHEDENA_E_END 0x1 Enables periodic scheduling within the core

Field Access Macros:

#define ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD   0x0
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_E_END   0x1
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_LSB   26
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_MSB   26
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_WIDTH   1
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_SET_MSK   0x04000000
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_CLR_MSK   0xfbffffff
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_RESET   0x0
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_GET(value)   (((value) & 0x04000000) >> 26)
 
#define ALT_USB_HOST_HCFG_PERSCHEDENA_SET(value)   (((value) << 26) & 0x04000000)
 

Field : modechtimen

Mode Change Ready Timer Enable (ModeChTimEn)

This bit is used to enable/disable the Host core

to wait 200 PHY clock cycles at the end of Resumeto change the opmode signal to the PHY to 00

after Suspend or LPM.

1'b0 : The Host core waits for either 200 PHY clock cycles or a linestate

of SE0 at the end of resume to the change the opmode from 2'b10 to 2'b00

1'b1 : The Host core waits only for a linstate of SE0 at the end of resume

to change the opmode from 2'b10 to 2'b00.

Field Enumeration Values:

Enum Value Description
ALT_USB_HOST_HCFG_MODCHTIMEN_E_END 0x0 The Host core waits for either 200 PHY clock
: cycles or a linestate of SE0 at the end of
: resume to change the opmode from 0x2 to 0x0
ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD 0x1 The Host core waits only for a linestate of SE0
: at the end of resume to change the opmode from
: 0x2 to 0x0

Field Access Macros:

#define ALT_USB_HOST_HCFG_MODCHTIMEN_E_END   0x0
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD   0x1
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_LSB   31
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_MSB   31
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_WIDTH   1
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_SET_MSK   0x80000000
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_CLR_MSK   0x7fffffff
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_RESET   0x0
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_USB_HOST_HCFG_MODCHTIMEN_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_USB_HOST_HCFG_s
 

Macros

#define ALT_USB_HOST_HCFG_RESET   0x00000200
 
#define ALT_USB_HOST_HCFG_OFST   0x0
 
#define ALT_USB_HOST_HCFG_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCFG_OFST))
 

Typedefs

typedef struct ALT_USB_HOST_HCFG_s ALT_USB_HOST_HCFG_t
 

Data Structure Documentation

struct ALT_USB_HOST_HCFG_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_USB_HOST_HCFG.

Data Fields
uint32_t fslspclksel: 2 ALT_USB_HOST_HCFG_FSLSPCLKSEL
uint32_t fslssupp: 1 ALT_USB_HOST_HCFG_FSLSSUPP
uint32_t __pad0__: 4 UNDEFINED
uint32_t ena32khzs: 1 ALT_USB_HOST_HCFG_ENA32KHZS
uint32_t resvalid: 8 ALT_USB_HOST_HCFG_RESVALID
uint32_t __pad1__: 7 UNDEFINED
uint32_t descdma: 1 ALT_USB_HOST_HCFG_DESCDMA
uint32_t frlisten: 2 ALT_USB_HOST_HCFG_FRLISTEN
uint32_t perschedena: 1 ALT_USB_HOST_HCFG_PERSCHEDENA
uint32_t __pad2__: 4 UNDEFINED
uint32_t modechtimen: 1 ALT_USB_HOST_HCFG_MODCHTIMEN

Macro Definitions

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK3060   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL

PHY clock is running at 30/60 MHz

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK48   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL

PHY clock is running at 48 MHz

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_E_CLK6   0x2

Enumerated value for register field ALT_USB_HOST_HCFG_FSLSPCLKSEL

PHY clock is running at 6 MHz

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_LSB   0

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_MSB   1

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_WIDTH   2

The width in bits of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET_MSK   0x00000003

The mask used to set the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_CLR_MSK   0xfffffffc

The mask used to clear the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_FSLSPCLKSEL register field.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_GET (   value)    (((value) & 0x00000003) >> 0)

Extracts the ALT_USB_HOST_HCFG_FSLSPCLKSEL field value from a register.

#define ALT_USB_HOST_HCFG_FSLSPCLKSEL_SET (   value)    (((value) << 0) & 0x00000003)

Produces a ALT_USB_HOST_HCFG_FSLSPCLKSEL register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_FSLSSUPP_E_HSFSLS   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_FSLSSUPP

HS/FS/LS, based on the maximum speed supported by the connected device

#define ALT_USB_HOST_HCFG_FSLSSUPP_E_FSLS   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_FSLSSUPP

FS/LS-only, even if the connected device can support HS

#define ALT_USB_HOST_HCFG_FSLSSUPP_LSB   2

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FSLSSUPP register field.

#define ALT_USB_HOST_HCFG_FSLSSUPP_MSB   2

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FSLSSUPP register field.

#define ALT_USB_HOST_HCFG_FSLSSUPP_WIDTH   1

The width in bits of the ALT_USB_HOST_HCFG_FSLSSUPP register field.

#define ALT_USB_HOST_HCFG_FSLSSUPP_SET_MSK   0x00000004

The mask used to set the ALT_USB_HOST_HCFG_FSLSSUPP register field value.

#define ALT_USB_HOST_HCFG_FSLSSUPP_CLR_MSK   0xfffffffb

The mask used to clear the ALT_USB_HOST_HCFG_FSLSSUPP register field value.

#define ALT_USB_HOST_HCFG_FSLSSUPP_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_FSLSSUPP register field.

#define ALT_USB_HOST_HCFG_FSLSSUPP_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_USB_HOST_HCFG_FSLSSUPP field value from a register.

#define ALT_USB_HOST_HCFG_FSLSSUPP_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_USB_HOST_HCFG_FSLSSUPP register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_ENA32KHZS_E_DISD   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_ENA32KHZS

USB 1.1 Full-Speed Not Selected

#define ALT_USB_HOST_HCFG_ENA32KHZS_E_END   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_ENA32KHZS

USB 1.1 Full-Speed Serial Transceiver Interface selected

#define ALT_USB_HOST_HCFG_ENA32KHZS_LSB   7

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_ENA32KHZS register field.

#define ALT_USB_HOST_HCFG_ENA32KHZS_MSB   7

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_ENA32KHZS register field.

#define ALT_USB_HOST_HCFG_ENA32KHZS_WIDTH   1

The width in bits of the ALT_USB_HOST_HCFG_ENA32KHZS register field.

#define ALT_USB_HOST_HCFG_ENA32KHZS_SET_MSK   0x00000080

The mask used to set the ALT_USB_HOST_HCFG_ENA32KHZS register field value.

#define ALT_USB_HOST_HCFG_ENA32KHZS_CLR_MSK   0xffffff7f

The mask used to clear the ALT_USB_HOST_HCFG_ENA32KHZS register field value.

#define ALT_USB_HOST_HCFG_ENA32KHZS_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_ENA32KHZS register field.

#define ALT_USB_HOST_HCFG_ENA32KHZS_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_USB_HOST_HCFG_ENA32KHZS field value from a register.

#define ALT_USB_HOST_HCFG_ENA32KHZS_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_USB_HOST_HCFG_ENA32KHZS register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_RESVALID_LSB   8

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_RESVALID register field.

#define ALT_USB_HOST_HCFG_RESVALID_MSB   15

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_RESVALID register field.

#define ALT_USB_HOST_HCFG_RESVALID_WIDTH   8

The width in bits of the ALT_USB_HOST_HCFG_RESVALID register field.

#define ALT_USB_HOST_HCFG_RESVALID_SET_MSK   0x0000ff00

The mask used to set the ALT_USB_HOST_HCFG_RESVALID register field value.

#define ALT_USB_HOST_HCFG_RESVALID_CLR_MSK   0xffff00ff

The mask used to clear the ALT_USB_HOST_HCFG_RESVALID register field value.

#define ALT_USB_HOST_HCFG_RESVALID_RESET   0x2

The reset value of the ALT_USB_HOST_HCFG_RESVALID register field.

#define ALT_USB_HOST_HCFG_RESVALID_GET (   value)    (((value) & 0x0000ff00) >> 8)

Extracts the ALT_USB_HOST_HCFG_RESVALID field value from a register.

#define ALT_USB_HOST_HCFG_RESVALID_SET (   value)    (((value) << 8) & 0x0000ff00)

Produces a ALT_USB_HOST_HCFG_RESVALID register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_DESCDMA_E_DISD   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_DESCDMA

No Scatter/Gather DMA

#define ALT_USB_HOST_HCFG_DESCDMA_E_END   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_DESCDMA

Scatter/Gather DMA selected

#define ALT_USB_HOST_HCFG_DESCDMA_LSB   23

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_DESCDMA register field.

#define ALT_USB_HOST_HCFG_DESCDMA_MSB   23

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_DESCDMA register field.

#define ALT_USB_HOST_HCFG_DESCDMA_WIDTH   1

The width in bits of the ALT_USB_HOST_HCFG_DESCDMA register field.

#define ALT_USB_HOST_HCFG_DESCDMA_SET_MSK   0x00800000

The mask used to set the ALT_USB_HOST_HCFG_DESCDMA register field value.

#define ALT_USB_HOST_HCFG_DESCDMA_CLR_MSK   0xff7fffff

The mask used to clear the ALT_USB_HOST_HCFG_DESCDMA register field value.

#define ALT_USB_HOST_HCFG_DESCDMA_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_DESCDMA register field.

#define ALT_USB_HOST_HCFG_DESCDMA_GET (   value)    (((value) & 0x00800000) >> 23)

Extracts the ALT_USB_HOST_HCFG_DESCDMA field value from a register.

#define ALT_USB_HOST_HCFG_DESCDMA_SET (   value)    (((value) << 23) & 0x00800000)

Produces a ALT_USB_HOST_HCFG_DESCDMA register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_FRLISTEN_E_RSVD   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN

Reserved

#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY8   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN

8 Entries

#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY16   0x2

Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN

16 Entries

#define ALT_USB_HOST_HCFG_FRLISTEN_E_ENTRY32   0x3

Enumerated value for register field ALT_USB_HOST_HCFG_FRLISTEN

32 Entries

#define ALT_USB_HOST_HCFG_FRLISTEN_LSB   24

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_FRLISTEN register field.

#define ALT_USB_HOST_HCFG_FRLISTEN_MSB   25

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_FRLISTEN register field.

#define ALT_USB_HOST_HCFG_FRLISTEN_WIDTH   2

The width in bits of the ALT_USB_HOST_HCFG_FRLISTEN register field.

#define ALT_USB_HOST_HCFG_FRLISTEN_SET_MSK   0x03000000

The mask used to set the ALT_USB_HOST_HCFG_FRLISTEN register field value.

#define ALT_USB_HOST_HCFG_FRLISTEN_CLR_MSK   0xfcffffff

The mask used to clear the ALT_USB_HOST_HCFG_FRLISTEN register field value.

#define ALT_USB_HOST_HCFG_FRLISTEN_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_FRLISTEN register field.

#define ALT_USB_HOST_HCFG_FRLISTEN_GET (   value)    (((value) & 0x03000000) >> 24)

Extracts the ALT_USB_HOST_HCFG_FRLISTEN field value from a register.

#define ALT_USB_HOST_HCFG_FRLISTEN_SET (   value)    (((value) << 24) & 0x03000000)

Produces a ALT_USB_HOST_HCFG_FRLISTEN register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_E_DISD   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_PERSCHEDENA

Disables periodic scheduling within the core

#define ALT_USB_HOST_HCFG_PERSCHEDENA_E_END   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_PERSCHEDENA

Enables periodic scheduling within the core

#define ALT_USB_HOST_HCFG_PERSCHEDENA_LSB   26

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_MSB   26

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_WIDTH   1

The width in bits of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_SET_MSK   0x04000000

The mask used to set the ALT_USB_HOST_HCFG_PERSCHEDENA register field value.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_CLR_MSK   0xfbffffff

The mask used to clear the ALT_USB_HOST_HCFG_PERSCHEDENA register field value.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_PERSCHEDENA register field.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_GET (   value)    (((value) & 0x04000000) >> 26)

Extracts the ALT_USB_HOST_HCFG_PERSCHEDENA field value from a register.

#define ALT_USB_HOST_HCFG_PERSCHEDENA_SET (   value)    (((value) << 26) & 0x04000000)

Produces a ALT_USB_HOST_HCFG_PERSCHEDENA register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_E_END   0x0

Enumerated value for register field ALT_USB_HOST_HCFG_MODCHTIMEN

The Host core waits for either 200 PHY clock cycles or a linestate of SE0 at the end of resume to change the opmode from 0x2 to 0x0

#define ALT_USB_HOST_HCFG_MODCHTIMEN_E_DISD   0x1

Enumerated value for register field ALT_USB_HOST_HCFG_MODCHTIMEN

The Host core waits only for a linestate of SE0 at the end of resume to change the opmode from 0x2 to 0x0

#define ALT_USB_HOST_HCFG_MODCHTIMEN_LSB   31

The Least Significant Bit (LSB) position of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_MSB   31

The Most Significant Bit (MSB) position of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_WIDTH   1

The width in bits of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_SET_MSK   0x80000000

The mask used to set the ALT_USB_HOST_HCFG_MODCHTIMEN register field value.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_CLR_MSK   0x7fffffff

The mask used to clear the ALT_USB_HOST_HCFG_MODCHTIMEN register field value.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_RESET   0x0

The reset value of the ALT_USB_HOST_HCFG_MODCHTIMEN register field.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_USB_HOST_HCFG_MODCHTIMEN field value from a register.

#define ALT_USB_HOST_HCFG_MODCHTIMEN_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_USB_HOST_HCFG_MODCHTIMEN register field value suitable for setting the register.

#define ALT_USB_HOST_HCFG_RESET   0x00000200

The reset value of the ALT_USB_HOST_HCFG register.

#define ALT_USB_HOST_HCFG_OFST   0x0

The byte offset of the ALT_USB_HOST_HCFG register from the beginning of the component.

#define ALT_USB_HOST_HCFG_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_HOST_HCFG_OFST))

The address of the ALT_USB_HOST_HCFG register.

Typedef Documentation

The typedef declaration for register ALT_USB_HOST_HCFG.