Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Bootstrap Control Register - bootstrap

Description

Bootstrap fields sampled by NAND Flash Controller when released from reset.

All fields are reset by a cold or warm reset.

Register Layout

Bits Access Reset Description
[0] RW 0x0 Bootstrap Inhibit Initialization
[1] RW 0x0 Bootstrap 512 Byte Device
[2] RW 0x0 Bootstrap Inhibit Load Block 0 Page 0
[3] RW 0x0 Bootstrap Two Row Address Cycles
[31:4] ??? 0x0 UNDEFINED

Field : Bootstrap Inhibit Initialization - noinit

If 1, inhibits NAND Flash Controller from performing initialization when coming out of reset. Instead, software must program all registers pertaining to device parameters like page size, width, etc.

Field Access Macros:

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_LSB   0
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_MSB   0
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_WIDTH   1
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET_MSK   0x00000001
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_CLR_MSK   0xfffffffe
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_RESET   0x0
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Bootstrap 512 Byte Device - page512

If 1, NAND device has a 512 byte page size.

Field Access Macros:

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_LSB   1
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_MSB   1
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_WIDTH   1
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET_MSK   0x00000002
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_CLR_MSK   0xfffffffd
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_RESET   0x0
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET(value)   (((value) << 1) & 0x00000002)
 

Field : Bootstrap Inhibit Load Block 0 Page 0 - noloadb0p0

If 1, inhibits NAND Flash Controller from loading page 0 of block 0 of the NAND device as part of the initialization procedure.

Field Access Macros:

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_LSB   2
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_MSB   2
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_WIDTH   1
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET_MSK   0x00000004
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_CLR_MSK   0xfffffffb
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_RESET   0x0
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET(value)   (((value) << 2) & 0x00000004)
 

Field : Bootstrap Two Row Address Cycles - tworowaddr

If 1, NAND device requires only 2 row address cycles instead of the normal 3 row address cycles.

Field Access Macros:

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_LSB   3
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_MSB   3
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_WIDTH   1
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET_MSK   0x00000008
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_CLR_MSK   0xfffffff7
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_RESET   0x0
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET(value)   (((value) << 3) & 0x00000008)
 

Data Structures

struct  ALT_SYSMGR_NAND_BOOTSTRAP_s
 

Macros

#define ALT_SYSMGR_NAND_BOOTSTRAP_OFST   0x0
 

Typedefs

typedef struct
ALT_SYSMGR_NAND_BOOTSTRAP_s 
ALT_SYSMGR_NAND_BOOTSTRAP_t
 

Data Structure Documentation

struct ALT_SYSMGR_NAND_BOOTSTRAP_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_NAND_BOOTSTRAP.

Data Fields
uint32_t noinit: 1 Bootstrap Inhibit Initialization
uint32_t page512: 1 Bootstrap 512 Byte Device
uint32_t noloadb0p0: 1 Bootstrap Inhibit Load Block 0 Page 0
uint32_t tworowaddr: 1 Bootstrap Two Row Address Cycles
uint32_t __pad0__: 28 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_MSB   0

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_WIDTH   1

The width in bits of the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET_MSK   0x00000001

The mask used to set the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_RESET   0x0

The reset value of the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT field value from a register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT register field value suitable for setting the register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_LSB   1

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_MSB   1

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_WIDTH   1

The width in bits of the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET_MSK   0x00000002

The mask used to set the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_RESET   0x0

The reset value of the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 field value from a register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512 register field value suitable for setting the register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_LSB   2

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_MSB   2

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_WIDTH   1

The width in bits of the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET_MSK   0x00000004

The mask used to set the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_CLR_MSK   0xfffffffb

The mask used to clear the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_RESET   0x0

The reset value of the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 field value from a register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0 register field value suitable for setting the register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_LSB   3

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_MSB   3

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_WIDTH   1

The width in bits of the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET_MSK   0x00000008

The mask used to set the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_CLR_MSK   0xfffffff7

The mask used to clear the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field value.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_RESET   0x0

The reset value of the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR field value from a register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR register field value suitable for setting the register.

#define ALT_SYSMGR_NAND_BOOTSTRAP_OFST   0x0

The byte offset of the ALT_SYSMGR_NAND_BOOTSTRAP register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_NAND_BOOTSTRAP.