Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : DMA Receive Data Level Register - dmardlr

Description

Controls DMA Receive FIFO Threshold

Register Layout

Bits Access Reset Description
[7:0] RW 0x0 Receive Data Level
[31:8] ??? 0x0 UNDEFINED

Field : Receive Data Level - dmardl

This bit field controls the level at which a DMA request is made by the receive logic. The watermark level = DMARDL+1; that is, dma_rx_req is generated when the number of valid data entries in the receive FIFO is equal to or above this field value + 1, and RDMAE=1.

Field Access Macros:

#define ALT_SPIS_DMARDLR_DMARDL_LSB   0
 
#define ALT_SPIS_DMARDLR_DMARDL_MSB   7
 
#define ALT_SPIS_DMARDLR_DMARDL_WIDTH   8
 
#define ALT_SPIS_DMARDLR_DMARDL_SET_MSK   0x000000ff
 
#define ALT_SPIS_DMARDLR_DMARDL_CLR_MSK   0xffffff00
 
#define ALT_SPIS_DMARDLR_DMARDL_RESET   0x0
 
#define ALT_SPIS_DMARDLR_DMARDL_GET(value)   (((value) & 0x000000ff) >> 0)
 
#define ALT_SPIS_DMARDLR_DMARDL_SET(value)   (((value) << 0) & 0x000000ff)
 

Data Structures

struct  ALT_SPIS_DMARDLR_s
 

Macros

#define ALT_SPIS_DMARDLR_OFST   0x54
 
#define ALT_SPIS_DMARDLR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_DMARDLR_OFST))
 

Typedefs

typedef struct ALT_SPIS_DMARDLR_s ALT_SPIS_DMARDLR_t
 

Data Structure Documentation

struct ALT_SPIS_DMARDLR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SPIS_DMARDLR.

Data Fields
uint32_t dmardl: 8 Receive Data Level
uint32_t __pad0__: 24 UNDEFINED

Macro Definitions

#define ALT_SPIS_DMARDLR_DMARDL_LSB   0

The Least Significant Bit (LSB) position of the ALT_SPIS_DMARDLR_DMARDL register field.

#define ALT_SPIS_DMARDLR_DMARDL_MSB   7

The Most Significant Bit (MSB) position of the ALT_SPIS_DMARDLR_DMARDL register field.

#define ALT_SPIS_DMARDLR_DMARDL_WIDTH   8

The width in bits of the ALT_SPIS_DMARDLR_DMARDL register field.

#define ALT_SPIS_DMARDLR_DMARDL_SET_MSK   0x000000ff

The mask used to set the ALT_SPIS_DMARDLR_DMARDL register field value.

#define ALT_SPIS_DMARDLR_DMARDL_CLR_MSK   0xffffff00

The mask used to clear the ALT_SPIS_DMARDLR_DMARDL register field value.

#define ALT_SPIS_DMARDLR_DMARDL_RESET   0x0

The reset value of the ALT_SPIS_DMARDLR_DMARDL register field.

#define ALT_SPIS_DMARDLR_DMARDL_GET (   value)    (((value) & 0x000000ff) >> 0)

Extracts the ALT_SPIS_DMARDLR_DMARDL field value from a register.

#define ALT_SPIS_DMARDLR_DMARDL_SET (   value)    (((value) << 0) & 0x000000ff)

Produces a ALT_SPIS_DMARDLR_DMARDL register field value suitable for setting the register.

#define ALT_SPIS_DMARDLR_OFST   0x54

The byte offset of the ALT_SPIS_DMARDLR register from the beginning of the component.

#define ALT_SPIS_DMARDLR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_DMARDLR_OFST))

The address of the ALT_SPIS_DMARDLR register.

Typedef Documentation

The typedef declaration for register ALT_SPIS_DMARDLR.