Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Group : FPGA2HPS - ALT_L3_SLV_F2H

Description

FPGA2HPS

Registers associated with the FPGA2HPS AXI Bridge slave interface. This slave is used by the FPGA2HPS AXI Bridge to access slaves attached to the L3/L4 Interconnect.

Data Structures

struct  ALT_L3_SLV_F2H_s
 
struct  ALT_L3_SLV_F2H_raw_s
 

Typedefs

typedef struct ALT_L3_SLV_F2H_s ALT_L3_SLV_F2H_t
 
typedef struct ALT_L3_SLV_F2H_raw_s ALT_L3_SLV_F2H_raw_t
 

Data Structure Documentation

struct ALT_L3_SLV_F2H_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register group ALT_L3_SLV_F2H.

Data Fields
volatile uint32_t _pad_0x0_0x3f UNDEFINED
volatile ALT_L3_WR_TIDEMARK_t wr_tidemark ALT_L3_WR_TIDEMARK
volatile uint32_t _pad_0x44_0xff UNDEFINED
volatile ALT_L3_RD_QOS_t read_qos ALT_L3_RD_QOS
volatile ALT_L3_WR_QOS_t write_qos ALT_L3_WR_QOS
volatile ALT_L3_FN_MOD_t fn_mod ALT_L3_FN_MOD
struct ALT_L3_SLV_F2H_raw_s

The struct declaration for the raw register contents of register group ALT_L3_SLV_F2H.

Data Fields
volatile uint32_t _pad_0x0_0x3f UNDEFINED
volatile uint32_t wr_tidemark ALT_L3_WR_TIDEMARK
volatile uint32_t _pad_0x44_0xff UNDEFINED
volatile uint32_t read_qos ALT_L3_RD_QOS
volatile uint32_t write_qos ALT_L3_WR_QOS
volatile uint32_t fn_mod ALT_L3_FN_MOD

Typedef Documentation

The typedef declaration for register group ALT_L3_SLV_F2H.

The typedef declaration for the raw register contents of register group ALT_L3_SLV_F2H.