Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : dmagrp_hw_feature

Description

Register 22 (HW Feature Register)

This register indicates the presence of the optional features or functions of the DWC_gmac. The software driver can use this register to dynamically enable or disable the programs related to the optional blocks.

Note: All bits are set or reset as per the selection of features during the DWC_gmac configuration.

Register Layout

Bits Access Reset Description
[0] R 0x1 ALT_EMAC_DMA_HW_FEATURE_MIISEL
[1] R 0x1 ALT_EMAC_DMA_HW_FEATURE_GMIISEL
[2] R 0x1 ALT_EMAC_DMA_HW_FEATURE_HDSEL
[3] R 0x0 ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN
[4] R 0x0 ALT_EMAC_DMA_HW_FEATURE_HASHSEL
[5] R 0x1 ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL
[6] R 0x0 ALT_EMAC_DMA_HW_FEATURE_PCSSEL
[7] R 0x1 ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN
[8] R 0x1 ALT_EMAC_DMA_HW_FEATURE_SMASEL
[9] R 0x0 ALT_EMAC_DMA_HW_FEATURE_RWKSEL
[10] R 0x1 ALT_EMAC_DMA_HW_FEATURE_MGKSEL
[11] R 0x1 ALT_EMAC_DMA_HW_FEATURE_MMCSEL
[12] R 0x0 ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL
[13] R 0x1 ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL
[14] R 0x1 ALT_EMAC_DMA_HW_FEATURE_EEESEL
[15] R 0x1 ALT_EMAC_DMA_HW_FEATURE_AVSEL
[16] R 0x1 ALT_EMAC_DMA_HW_FEATURE_TXOESEL
[17] R 0x0 ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE
[18] R 0x1 ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE
[19] R 0x0 ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE
[21:20] R 0x0 ALT_EMAC_DMA_HW_FEATURE_RXCHCNT
[23:22] R 0x1 ALT_EMAC_DMA_HW_FEATURE_TXCHCNT
[24] R 0x1 ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL
[25] R 0x0 ALT_EMAC_DMA_HW_FEATURE_INTTSEN
[26] R 0x0 ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN
[27] R 0x1 ALT_EMAC_DMA_HW_FEATURE_SAVLANINS
[30:28] R 0x0 ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF
[31] R 0x0 ALT_EMAC_DMA_HW_FEATURE_RSVD_31

Field : miisel

10 or 100 Mbps support

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_MIISEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_MIISEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_LSB   0
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_MSB   0
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_SET_MSK   0x00000001
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_CLR_MSK   0xfffffffe
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_SET(value)   (((value) << 0) & 0x00000001)
 

Field : gmiisel

1000 Mbps support

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_GMIISEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_GMIISEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_LSB   1
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_MSB   1
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_SET_MSK   0x00000002
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_CLR_MSK   0xfffffffd
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_SET(value)   (((value) << 1) & 0x00000002)
 

Field : hdsel

Half-Duplex support

Field Enumeration Values:

Enum | Value | Description :--------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_HDSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_HDSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_LSB   2
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_MSB   2
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_SET_MSK   0x00000004
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_CLR_MSK   0xfffffffb
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_SET(value)   (((value) << 2) & 0x00000004)
 

Field : exthashen

Expanded DA Hash Filter

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_LSB   3
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_MSB   3
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_SET_MSK   0x00000008
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_CLR_MSK   0xfffffff7
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_SET(value)   (((value) << 3) & 0x00000008)
 

Field : hashsel

HASH Filter

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_HASHSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_HASHSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_LSB   4
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_MSB   4
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_SET_MSK   0x00000010
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_CLR_MSK   0xffffffef
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_SET(value)   (((value) << 4) & 0x00000010)
 

Field : addmacadrsel

Multiple MAC Address Registers

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_LSB   5
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_MSB   5
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_SET_MSK   0x00000020
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_CLR_MSK   0xffffffdf
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_SET(value)   (((value) << 5) & 0x00000020)
 

Field : pcssel

PCS registers (TBI, SGMII, or RTBI PHY interface)

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_PCSSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_PCSSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_LSB   6
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_MSB   6
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_SET_MSK   0x00000040
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_CLR_MSK   0xffffffbf
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_SET(value)   (((value) << 6) & 0x00000040)
 

Field : l3l4fltren

Layer 3 and Layer 4 Filter Feature

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_LSB   7
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_MSB   7
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_SET_MSK   0x00000080
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_CLR_MSK   0xffffff7f
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_GET(value)   (((value) & 0x00000080) >> 7)
 
#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_SET(value)   (((value) << 7) & 0x00000080)
 

Field : smasel

SMA (MDIO) Interface

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_SMASEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_SMASEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_LSB   8
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_MSB   8
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_SET_MSK   0x00000100
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_CLR_MSK   0xfffffeff
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_SET(value)   (((value) << 8) & 0x00000100)
 

Field : rwksel

PMT Remote Wakeup

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_RWKSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_RWKSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_LSB   9
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_MSB   9
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_SET_MSK   0x00000200
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_CLR_MSK   0xfffffdff
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_GET(value)   (((value) & 0x00000200) >> 9)
 
#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_SET(value)   (((value) << 9) & 0x00000200)
 

Field : mgksel

PMT Magic Packet

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_MGKSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_MGKSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_LSB   10
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_MSB   10
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_SET_MSK   0x00000400
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_CLR_MSK   0xfffffbff
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_GET(value)   (((value) & 0x00000400) >> 10)
 
#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_SET(value)   (((value) << 10) & 0x00000400)
 

Field : mmcsel

RMON Module

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_MMCSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_MMCSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_LSB   11
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_MSB   11
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_SET_MSK   0x00000800
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_CLR_MSK   0xfffff7ff
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_GET(value)   (((value) & 0x00000800) >> 11)
 
#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_SET(value)   (((value) << 11) & 0x00000800)
 

Field : tsver1sel

Only IEEE 1588-2002 Timestamp

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_LSB   12
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_MSB   12
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_SET_MSK   0x00001000
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_CLR_MSK   0xffffefff
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_GET(value)   (((value) & 0x00001000) >> 12)
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_SET(value)   (((value) << 12) & 0x00001000)
 

Field : tsver2sel

IEEE 1588-2008 Advanced Timestamp

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_LSB   13
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_MSB   13
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_SET_MSK   0x00002000
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_CLR_MSK   0xffffdfff
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_GET(value)   (((value) & 0x00002000) >> 13)
 
#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_SET(value)   (((value) << 13) & 0x00002000)
 

Field : eeesel

Energy Efficient Ethernet

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_EEESEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_EEESEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_LSB   14
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_MSB   14
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_SET_MSK   0x00004000
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_CLR_MSK   0xffffbfff
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_GET(value)   (((value) & 0x00004000) >> 14)
 
#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_SET(value)   (((value) << 14) & 0x00004000)
 

Field : avsel

AV Feature

Field Enumeration Values:

Enum | Value | Description :--------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_AVSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_AVSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_LSB   15
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_MSB   15
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_SET_MSK   0x00008000
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_CLR_MSK   0xffff7fff
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_GET(value)   (((value) & 0x00008000) >> 15)
 
#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_SET(value)   (((value) << 15) & 0x00008000)
 

Field : txoesel

Checksum Offload in Tx

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_TXOESEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_TXOESEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_LSB   16
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_MSB   16
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_SET_MSK   0x00010000
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_CLR_MSK   0xfffeffff
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_SET(value)   (((value) << 16) & 0x00010000)
 

Field : rxtyp1coe

IP Checksum Offload (Type 1) in Rx

Note: If IPCHKSUM_EN = Enabled and IPC_FULL_OFFLOAD = Enabled, then RXTYP1COE = 0 and RXTYP2COE =1.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_LSB   17
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_MSB   17
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_SET_MSK   0x00020000
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_CLR_MSK   0xfffdffff
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_GET(value)   (((value) & 0x00020000) >> 17)
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_SET(value)   (((value) << 17) & 0x00020000)
 

Field : rxtyp2coe

IP Checksum Offload (Type 2) in Rx

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_LSB   18
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_MSB   18
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_SET_MSK   0x00040000
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_CLR_MSK   0xfffbffff
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_GET(value)   (((value) & 0x00040000) >> 18)
 
#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_SET(value)   (((value) << 18) & 0x00040000)
 

Field : rxfifosize

Rx FIFO > 2,048 Bytes

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_LSB   19
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_MSB   19
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_SET_MSK   0x00080000
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_CLR_MSK   0xfff7ffff
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_GET(value)   (((value) & 0x00080000) >> 19)
 
#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_SET(value)   (((value) << 19) & 0x00080000)
 

Field : rxchcnt

Number of additional Rx channels

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_LSB   20
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_MSB   21
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_WIDTH   2
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_SET_MSK   0x00300000
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_CLR_MSK   0xffcfffff
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_GET(value)   (((value) & 0x00300000) >> 20)
 
#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_SET(value)   (((value) << 20) & 0x00300000)
 

Field : txchcnt

Number of additional Tx channels

Field Enumeration Values:

Enum | Value | Description :------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_LSB   22
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_MSB   23
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_WIDTH   2
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_SET_MSK   0x00c00000
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_CLR_MSK   0xff3fffff
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_GET(value)   (((value) & 0x00c00000) >> 22)
 
#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_SET(value)   (((value) << 22) & 0x00c00000)
 

Field : enhdessel

Alternate (Enhanced Descriptor)

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_E_DISD | 0x0 | ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_E_END | 0x1 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_E_DISD   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_E_END   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_LSB   24
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_MSB   24
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_SET_MSK   0x01000000
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_CLR_MSK   0xfeffffff
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_SET(value)   (((value) << 24) & 0x01000000)
 

Field : inttsen

Timestamping with Internal System Time

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_LSB   25
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_MSB   25
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_SET_MSK   0x02000000
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_CLR_MSK   0xfdffffff
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_GET(value)   (((value) & 0x02000000) >> 25)
 
#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_SET(value)   (((value) << 25) & 0x02000000)
 

Field : flexippsen

Flexible Pulse-Per-Second Output

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_LSB   26
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_MSB   26
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_SET_MSK   0x04000000
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_CLR_MSK   0xfbffffff
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_GET(value)   (((value) & 0x04000000) >> 26)
 
#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_SET(value)   (((value) << 26) & 0x04000000)
 

Field : savlanins

Source Address or VLAN Insertion

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_LSB   27
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_MSB   27
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_SET_MSK   0x08000000
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_CLR_MSK   0xf7ffffff
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_RESET   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_GET(value)   (((value) & 0x08000000) >> 27)
 
#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_SET(value)   (((value) << 27) & 0x08000000)
 

Field : actphyif

Active or Selected PHY interface

When you have multiple PHY interfaces in your configuration, this field indicates the sampled value of phy_intf_sel_i during reset de-assertion

  • 0000: GMII or MII
  • 0001: RGMII
  • 0010: SGMII
  • 0011: TBI
  • 0100: RMII
  • 0101: RTBI
  • 0110: SMII
  • 0111: RevMII
  • All Others: Reserved

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------------------—|:---—|:---------— ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_GMIIMII0 | 0x0 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RGMII1 | 0x1 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_SGMII2 | 0x2 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_TBI3 | 0x3 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RMII4 | 0x4 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RTBI5 | 0x5 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_SMII6 | 0x6 | ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_REVMII7 | 0x7 |

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_GMIIMII0   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RGMII1   0x1
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_SGMII2   0x2
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_TBI3   0x3
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RMII4   0x4
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RTBI5   0x5
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_SMII6   0x6
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_REVMII7   0x7
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_LSB   28
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_MSB   30
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_WIDTH   3
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_SET_MSK   0x70000000
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_CLR_MSK   0x8fffffff
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_GET(value)   (((value) & 0x70000000) >> 28)
 
#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_SET(value)   (((value) << 28) & 0x70000000)
 

Field : reserved_31

Reserved

Field Access Macros:

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_LSB   31
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_MSB   31
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_WIDTH   1
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_SET_MSK   0x80000000
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_CLR_MSK   0x7fffffff
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_RESET   0x0
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_EMAC_DMA_HW_FEATURE_s
 

Macros

#define ALT_EMAC_DMA_HW_FEATURE_RESET   0x0945eda7
 
#define ALT_EMAC_DMA_HW_FEATURE_OFST   0x1058
 
#define ALT_EMAC_DMA_HW_FEATURE_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_DMA_HW_FEATURE_OFST))
 

Typedefs

typedef struct
ALT_EMAC_DMA_HW_FEATURE_s 
ALT_EMAC_DMA_HW_FEATURE_t
 

Data Structure Documentation

struct ALT_EMAC_DMA_HW_FEATURE_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_DMA_HW_FEATURE.

Data Fields
const uint32_t miisel: 1 ALT_EMAC_DMA_HW_FEATURE_MIISEL
const uint32_t gmiisel: 1 ALT_EMAC_DMA_HW_FEATURE_GMIISEL
const uint32_t hdsel: 1 ALT_EMAC_DMA_HW_FEATURE_HDSEL
const uint32_t exthashen: 1 ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN
const uint32_t hashsel: 1 ALT_EMAC_DMA_HW_FEATURE_HASHSEL
const uint32_t addmacadrsel: 1 ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL
const uint32_t pcssel: 1 ALT_EMAC_DMA_HW_FEATURE_PCSSEL
const uint32_t l3l4fltren: 1 ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN
const uint32_t smasel: 1 ALT_EMAC_DMA_HW_FEATURE_SMASEL
const uint32_t rwksel: 1 ALT_EMAC_DMA_HW_FEATURE_RWKSEL
const uint32_t mgksel: 1 ALT_EMAC_DMA_HW_FEATURE_MGKSEL
const uint32_t mmcsel: 1 ALT_EMAC_DMA_HW_FEATURE_MMCSEL
const uint32_t tsver1sel: 1 ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL
const uint32_t tsver2sel: 1 ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL
const uint32_t eeesel: 1 ALT_EMAC_DMA_HW_FEATURE_EEESEL
const uint32_t avsel: 1 ALT_EMAC_DMA_HW_FEATURE_AVSEL
const uint32_t txoesel: 1 ALT_EMAC_DMA_HW_FEATURE_TXOESEL
const uint32_t rxtyp1coe: 1 ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE
const uint32_t rxtyp2coe: 1 ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE
const uint32_t rxfifosize: 1 ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE
const uint32_t rxchcnt: 2 ALT_EMAC_DMA_HW_FEATURE_RXCHCNT
const uint32_t txchcnt: 2 ALT_EMAC_DMA_HW_FEATURE_TXCHCNT
const uint32_t enhdessel: 1 ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL
const uint32_t inttsen: 1 ALT_EMAC_DMA_HW_FEATURE_INTTSEN
const uint32_t flexippsen: 1 ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN
const uint32_t savlanins: 1 ALT_EMAC_DMA_HW_FEATURE_SAVLANINS
const uint32_t actphyif: 3 ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF
const uint32_t reserved_31: 1 ALT_EMAC_DMA_HW_FEATURE_RSVD_31

Macro Definitions

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_MIISEL

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_MIISEL

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_LSB   0

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_MIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_MSB   0

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_MIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_MIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_SET_MSK   0x00000001

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_MIISEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_CLR_MSK   0xfffffffe

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_MIISEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_MIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_EMAC_DMA_HW_FEATURE_MIISEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_MIISEL_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_EMAC_DMA_HW_FEATURE_MIISEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_GMIISEL

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_GMIISEL

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_LSB   1

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_MSB   1

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_SET_MSK   0x00000002

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_CLR_MSK   0xfffffffd

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_EMAC_DMA_HW_FEATURE_GMIISEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_GMIISEL_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_EMAC_DMA_HW_FEATURE_GMIISEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_HDSEL

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_HDSEL

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_LSB   2

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_HDSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_MSB   2

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_HDSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_HDSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_SET_MSK   0x00000004

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_HDSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_CLR_MSK   0xfffffffb

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_HDSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_HDSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_EMAC_DMA_HW_FEATURE_HDSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_HDSEL_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_EMAC_DMA_HW_FEATURE_HDSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_LSB   3

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_MSB   3

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_SET_MSK   0x00000008

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_CLR_MSK   0xfffffff7

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_EMAC_DMA_HW_FEATURE_EXTHASHEN register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_HASHSEL

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_HASHSEL

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_LSB   4

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_MSB   4

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_SET_MSK   0x00000010

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_CLR_MSK   0xffffffef

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_EMAC_DMA_HW_FEATURE_HASHSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_HASHSEL_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_EMAC_DMA_HW_FEATURE_HASHSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_LSB   5

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_MSB   5

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_SET_MSK   0x00000020

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_CLR_MSK   0xffffffdf

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_EMAC_DMA_HW_FEATURE_ADDMACADRSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_PCSSEL

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_PCSSEL

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_LSB   6

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_MSB   6

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_SET_MSK   0x00000040

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_CLR_MSK   0xffffffbf

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_EMAC_DMA_HW_FEATURE_PCSSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_PCSSEL_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_EMAC_DMA_HW_FEATURE_PCSSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_LSB   7

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_MSB   7

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_SET_MSK   0x00000080

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_CLR_MSK   0xffffff7f

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_GET (   value)    (((value) & 0x00000080) >> 7)

Extracts the ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN_SET (   value)    (((value) << 7) & 0x00000080)

Produces a ALT_EMAC_DMA_HW_FEATURE_L3L4FLTREN register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_SMASEL

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_SMASEL

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_LSB   8

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_SMASEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_MSB   8

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_SMASEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_SMASEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_SET_MSK   0x00000100

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_SMASEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_CLR_MSK   0xfffffeff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_SMASEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_SMASEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_EMAC_DMA_HW_FEATURE_SMASEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_SMASEL_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_EMAC_DMA_HW_FEATURE_SMASEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RWKSEL

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RWKSEL

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_LSB   9

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_MSB   9

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_SET_MSK   0x00000200

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_CLR_MSK   0xfffffdff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_GET (   value)    (((value) & 0x00000200) >> 9)

Extracts the ALT_EMAC_DMA_HW_FEATURE_RWKSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_RWKSEL_SET (   value)    (((value) << 9) & 0x00000200)

Produces a ALT_EMAC_DMA_HW_FEATURE_RWKSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_MGKSEL

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_MGKSEL

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_LSB   10

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_MSB   10

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_SET_MSK   0x00000400

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_CLR_MSK   0xfffffbff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_GET (   value)    (((value) & 0x00000400) >> 10)

Extracts the ALT_EMAC_DMA_HW_FEATURE_MGKSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_MGKSEL_SET (   value)    (((value) << 10) & 0x00000400)

Produces a ALT_EMAC_DMA_HW_FEATURE_MGKSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_MMCSEL

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_MMCSEL

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_LSB   11

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_MSB   11

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_SET_MSK   0x00000800

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_CLR_MSK   0xfffff7ff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_GET (   value)    (((value) & 0x00000800) >> 11)

Extracts the ALT_EMAC_DMA_HW_FEATURE_MMCSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_MMCSEL_SET (   value)    (((value) << 11) & 0x00000800)

Produces a ALT_EMAC_DMA_HW_FEATURE_MMCSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_LSB   12

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_MSB   12

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_SET_MSK   0x00001000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_CLR_MSK   0xffffefff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_GET (   value)    (((value) & 0x00001000) >> 12)

Extracts the ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL_SET (   value)    (((value) << 12) & 0x00001000)

Produces a ALT_EMAC_DMA_HW_FEATURE_TSVER1SEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_LSB   13

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_MSB   13

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_SET_MSK   0x00002000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_CLR_MSK   0xffffdfff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_GET (   value)    (((value) & 0x00002000) >> 13)

Extracts the ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL_SET (   value)    (((value) << 13) & 0x00002000)

Produces a ALT_EMAC_DMA_HW_FEATURE_TSVER2SEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_EEESEL

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_EEESEL

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_LSB   14

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_EEESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_MSB   14

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_EEESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_EEESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_SET_MSK   0x00004000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_EEESEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_CLR_MSK   0xffffbfff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_EEESEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_EEESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_GET (   value)    (((value) & 0x00004000) >> 14)

Extracts the ALT_EMAC_DMA_HW_FEATURE_EEESEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_EEESEL_SET (   value)    (((value) << 14) & 0x00004000)

Produces a ALT_EMAC_DMA_HW_FEATURE_EEESEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_AVSEL

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_AVSEL

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_LSB   15

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_AVSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_MSB   15

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_AVSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_AVSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_SET_MSK   0x00008000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_AVSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_CLR_MSK   0xffff7fff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_AVSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_AVSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_GET (   value)    (((value) & 0x00008000) >> 15)

Extracts the ALT_EMAC_DMA_HW_FEATURE_AVSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_AVSEL_SET (   value)    (((value) << 15) & 0x00008000)

Produces a ALT_EMAC_DMA_HW_FEATURE_AVSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TXOESEL

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TXOESEL

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_LSB   16

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_MSB   16

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_SET_MSK   0x00010000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_CLR_MSK   0xfffeffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_EMAC_DMA_HW_FEATURE_TXOESEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_TXOESEL_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_EMAC_DMA_HW_FEATURE_TXOESEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_LSB   17

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_MSB   17

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_SET_MSK   0x00020000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_CLR_MSK   0xfffdffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_GET (   value)    (((value) & 0x00020000) >> 17)

Extracts the ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE_SET (   value)    (((value) << 17) & 0x00020000)

Produces a ALT_EMAC_DMA_HW_FEATURE_RXTYP1COE register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_LSB   18

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_MSB   18

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_SET_MSK   0x00040000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_CLR_MSK   0xfffbffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_GET (   value)    (((value) & 0x00040000) >> 18)

Extracts the ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE_SET (   value)    (((value) << 18) & 0x00040000)

Produces a ALT_EMAC_DMA_HW_FEATURE_RXTYP2COE register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_LSB   19

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_MSB   19

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_SET_MSK   0x00080000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_CLR_MSK   0xfff7ffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_GET (   value)    (((value) & 0x00080000) >> 19)

Extracts the ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE_SET (   value)    (((value) << 19) & 0x00080000)

Produces a ALT_EMAC_DMA_HW_FEATURE_RXFIFOSIZE register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXCHCNT

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_RXCHCNT

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_LSB   20

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_MSB   21

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_WIDTH   2

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_SET_MSK   0x00300000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_CLR_MSK   0xffcfffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_GET (   value)    (((value) & 0x00300000) >> 20)

Extracts the ALT_EMAC_DMA_HW_FEATURE_RXCHCNT field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_RXCHCNT_SET (   value)    (((value) << 20) & 0x00300000)

Produces a ALT_EMAC_DMA_HW_FEATURE_RXCHCNT register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TXCHCNT

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_TXCHCNT

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_LSB   22

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_MSB   23

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_WIDTH   2

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_SET_MSK   0x00c00000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_CLR_MSK   0xff3fffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field value.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_GET (   value)    (((value) & 0x00c00000) >> 22)

Extracts the ALT_EMAC_DMA_HW_FEATURE_TXCHCNT field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_TXCHCNT_SET (   value)    (((value) << 22) & 0x00c00000)

Produces a ALT_EMAC_DMA_HW_FEATURE_TXCHCNT register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_E_DISD   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_E_END   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_LSB   24

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_MSB   24

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_SET_MSK   0x01000000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_CLR_MSK   0xfeffffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field value.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_EMAC_DMA_HW_FEATURE_ENHDESSEL register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_LSB   25

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_MSB   25

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_SET_MSK   0x02000000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_CLR_MSK   0xfdffffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_GET (   value)    (((value) & 0x02000000) >> 25)

Extracts the ALT_EMAC_DMA_HW_FEATURE_INTTSEN field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_INTTSEN_SET (   value)    (((value) << 25) & 0x02000000)

Produces a ALT_EMAC_DMA_HW_FEATURE_INTTSEN register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_LSB   26

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_MSB   26

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_SET_MSK   0x04000000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_CLR_MSK   0xfbffffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field value.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_GET (   value)    (((value) & 0x04000000) >> 26)

Extracts the ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN_SET (   value)    (((value) << 26) & 0x04000000)

Produces a ALT_EMAC_DMA_HW_FEATURE_FLEXIPPSEN register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_LSB   27

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_MSB   27

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_SET_MSK   0x08000000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field value.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_CLR_MSK   0xf7ffffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field value.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_RESET   0x1

The reset value of the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_GET (   value)    (((value) & 0x08000000) >> 27)

Extracts the ALT_EMAC_DMA_HW_FEATURE_SAVLANINS field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_SAVLANINS_SET (   value)    (((value) << 27) & 0x08000000)

Produces a ALT_EMAC_DMA_HW_FEATURE_SAVLANINS register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_GMIIMII0   0x0

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RGMII1   0x1

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_SGMII2   0x2

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_TBI3   0x3

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RMII4   0x4

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_RTBI5   0x5

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_SMII6   0x6

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_E_REVMII7   0x7

Enumerated value for register field ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_LSB   28

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_MSB   30

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_WIDTH   3

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_SET_MSK   0x70000000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field value.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_CLR_MSK   0x8fffffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field value.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_GET (   value)    (((value) & 0x70000000) >> 28)

Extracts the ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF_SET (   value)    (((value) << 28) & 0x70000000)

Produces a ALT_EMAC_DMA_HW_FEATURE_ACTPHYIF register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_LSB   31

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_MSB   31

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_WIDTH   1

The width in bits of the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_SET_MSK   0x80000000

The mask used to set the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_CLR_MSK   0x7fffffff

The mask used to clear the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field value.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_RESET   0x0

The reset value of the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_EMAC_DMA_HW_FEATURE_RSVD_31 field value from a register.

#define ALT_EMAC_DMA_HW_FEATURE_RSVD_31_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_EMAC_DMA_HW_FEATURE_RSVD_31 register field value suitable for setting the register.

#define ALT_EMAC_DMA_HW_FEATURE_RESET   0x0945eda7

The reset value of the ALT_EMAC_DMA_HW_FEATURE register.

#define ALT_EMAC_DMA_HW_FEATURE_OFST   0x1058

The byte offset of the ALT_EMAC_DMA_HW_FEATURE register from the beginning of the component.

#define ALT_EMAC_DMA_HW_FEATURE_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_DMA_HW_FEATURE_OFST))

The address of the ALT_EMAC_DMA_HW_FEATURE register.

Typedef Documentation

The typedef declaration for register ALT_EMAC_DMA_HW_FEATURE.