Altera HWLIB  16.0
The Altera HW Manager API Reference Manual
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alt_int_device.h
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32 
33 /*
34  * $Id: //depot/embedded/rel/15.0/ip/hps/altera_hps/hwlib/include/soc_a10/alt_int_device.h#1 $
35  */
36 
37 #ifndef __ALT_INT_DEVICE_H__
38 #define __ALT_INT_DEVICE_H__
39 
40 #ifdef __cplusplus
41 extern "C"
42 {
43 #endif
44 
52 typedef enum ALT_INT_INTERRUPT_e
53 {
54  ALT_INT_INTERRUPT_SGI0 = 0,
55  ALT_INT_INTERRUPT_SGI1 = 1,
56  ALT_INT_INTERRUPT_SGI2 = 2,
57  ALT_INT_INTERRUPT_SGI3 = 3,
58  ALT_INT_INTERRUPT_SGI4 = 4,
59  ALT_INT_INTERRUPT_SGI5 = 5,
60  ALT_INT_INTERRUPT_SGI6 = 6,
61  ALT_INT_INTERRUPT_SGI7 = 7,
62  ALT_INT_INTERRUPT_SGI8 = 8,
63  ALT_INT_INTERRUPT_SGI9 = 9,
64  ALT_INT_INTERRUPT_SGI10 = 10,
65  ALT_INT_INTERRUPT_SGI11 = 11,
66  ALT_INT_INTERRUPT_SGI12 = 12,
67  ALT_INT_INTERRUPT_SGI13 = 13,
68  ALT_INT_INTERRUPT_SGI14 = 14,
69  ALT_INT_INTERRUPT_SGI15 = 15,
75  ALT_INT_INTERRUPT_PPI_TIMER_GLOBAL = 27,
76  ALT_INT_INTERRUPT_PPI_TIMER_PRIVATE = 29,
77  ALT_INT_INTERRUPT_PPI_TIMER_WATCHDOG = 30,
84  ALT_INT_INTERRUPT_DERR_GLOBAL = 32,
94  ALT_INT_INTERRUPT_CPUX_PARITYFAIL = 33,
107  ALT_INT_INTERRUPT_SERR_GLOBAL = 34,
117  ALT_INT_INTERRUPT_CPU0_DEFLAGS0 = 35,
118  ALT_INT_INTERRUPT_CPU0_DEFLAGS1 = 36,
119  ALT_INT_INTERRUPT_CPU0_DEFLAGS2 = 37,
120  ALT_INT_INTERRUPT_CPU0_DEFLAGS3 = 38,
121  ALT_INT_INTERRUPT_CPU0_DEFLAGS4 = 39,
122  ALT_INT_INTERRUPT_CPU0_DEFLAGS5 = 40,
123  ALT_INT_INTERRUPT_CPU0_DEFLAGS6 = 41,
124  ALT_INT_INTERRUPT_CPU1_DEFLAGS0 = 42,
125  ALT_INT_INTERRUPT_CPU1_DEFLAGS1 = 43,
126  ALT_INT_INTERRUPT_CPU1_DEFLAGS2 = 44,
127  ALT_INT_INTERRUPT_CPU1_DEFLAGS3 = 45,
128  ALT_INT_INTERRUPT_CPU1_DEFLAGS4 = 46,
129  ALT_INT_INTERRUPT_CPU1_DEFLAGS5 = 47,
130  ALT_INT_INTERRUPT_CPU1_DEFLAGS6 = 48,
136  ALT_INT_INTERRUPT_SCU_EV_ABORT = 49,
142  ALT_INT_INTERRUPT_L2_COMBINED_IRQ = 50,
150  ALT_INT_INTERRUPT_F2S_FPGA_IRQ0 = 51,
151  ALT_INT_INTERRUPT_F2S_FPGA_IRQ1 = 52,
152  ALT_INT_INTERRUPT_F2S_FPGA_IRQ2 = 53,
153  ALT_INT_INTERRUPT_F2S_FPGA_IRQ3 = 54,
154  ALT_INT_INTERRUPT_F2S_FPGA_IRQ4 = 55,
155  ALT_INT_INTERRUPT_F2S_FPGA_IRQ5 = 56,
156  ALT_INT_INTERRUPT_F2S_FPGA_IRQ6 = 57,
157  ALT_INT_INTERRUPT_F2S_FPGA_IRQ7 = 58,
158  ALT_INT_INTERRUPT_F2S_FPGA_IRQ8 = 59,
159  ALT_INT_INTERRUPT_F2S_FPGA_IRQ9 = 60,
160  ALT_INT_INTERRUPT_F2S_FPGA_IRQ10 = 61,
161  ALT_INT_INTERRUPT_F2S_FPGA_IRQ11 = 62,
162  ALT_INT_INTERRUPT_F2S_FPGA_IRQ12 = 63,
163  ALT_INT_INTERRUPT_F2S_FPGA_IRQ13 = 64,
164  ALT_INT_INTERRUPT_F2S_FPGA_IRQ14 = 65,
165  ALT_INT_INTERRUPT_F2S_FPGA_IRQ15 = 66,
166  ALT_INT_INTERRUPT_F2S_FPGA_IRQ16 = 67,
167  ALT_INT_INTERRUPT_F2S_FPGA_IRQ17 = 68,
168  ALT_INT_INTERRUPT_F2S_FPGA_IRQ18 = 69,
169  ALT_INT_INTERRUPT_F2S_FPGA_IRQ19 = 70,
170  ALT_INT_INTERRUPT_F2S_FPGA_IRQ20 = 71,
171  ALT_INT_INTERRUPT_F2S_FPGA_IRQ21 = 72,
172  ALT_INT_INTERRUPT_F2S_FPGA_IRQ22 = 73,
173  ALT_INT_INTERRUPT_F2S_FPGA_IRQ23 = 74,
174  ALT_INT_INTERRUPT_F2S_FPGA_IRQ24 = 75,
175  ALT_INT_INTERRUPT_F2S_FPGA_IRQ25 = 76,
176  ALT_INT_INTERRUPT_F2S_FPGA_IRQ26 = 77,
177  ALT_INT_INTERRUPT_F2S_FPGA_IRQ27 = 78,
178  ALT_INT_INTERRUPT_F2S_FPGA_IRQ28 = 79,
179  ALT_INT_INTERRUPT_F2S_FPGA_IRQ29 = 80,
180  ALT_INT_INTERRUPT_F2S_FPGA_IRQ30 = 81,
181  ALT_INT_INTERRUPT_F2S_FPGA_IRQ31 = 82,
182  ALT_INT_INTERRUPT_F2S_FPGA_IRQ32 = 83,
183  ALT_INT_INTERRUPT_F2S_FPGA_IRQ33 = 84,
184  ALT_INT_INTERRUPT_F2S_FPGA_IRQ34 = 85,
185  ALT_INT_INTERRUPT_F2S_FPGA_IRQ35 = 86,
186  ALT_INT_INTERRUPT_F2S_FPGA_IRQ36 = 87,
187  ALT_INT_INTERRUPT_F2S_FPGA_IRQ37 = 88,
188  ALT_INT_INTERRUPT_F2S_FPGA_IRQ38 = 89,
189  ALT_INT_INTERRUPT_F2S_FPGA_IRQ39 = 90,
190  ALT_INT_INTERRUPT_F2S_FPGA_IRQ40 = 91,
191  ALT_INT_INTERRUPT_F2S_FPGA_IRQ41 = 92,
192  ALT_INT_INTERRUPT_F2S_FPGA_IRQ42 = 93,
193  ALT_INT_INTERRUPT_F2S_FPGA_IRQ43 = 94,
194  ALT_INT_INTERRUPT_F2S_FPGA_IRQ44 = 95,
195  ALT_INT_INTERRUPT_F2S_FPGA_IRQ45 = 96,
196  ALT_INT_INTERRUPT_F2S_FPGA_IRQ46 = 97,
197  ALT_INT_INTERRUPT_F2S_FPGA_IRQ47 = 98,
198  ALT_INT_INTERRUPT_F2S_FPGA_IRQ48 = 99,
199  ALT_INT_INTERRUPT_F2S_FPGA_IRQ49 = 100,
200  ALT_INT_INTERRUPT_F2S_FPGA_IRQ50 = 101,
201  ALT_INT_INTERRUPT_F2S_FPGA_IRQ51 = 102,
202  ALT_INT_INTERRUPT_F2S_FPGA_IRQ52 = 103,
203  ALT_INT_INTERRUPT_F2S_FPGA_IRQ53 = 104,
204  ALT_INT_INTERRUPT_F2S_FPGA_IRQ54 = 105,
205  ALT_INT_INTERRUPT_F2S_FPGA_IRQ55 = 106,
206  ALT_INT_INTERRUPT_F2S_FPGA_IRQ56 = 107,
207  ALT_INT_INTERRUPT_F2S_FPGA_IRQ57 = 108,
208  ALT_INT_INTERRUPT_F2S_FPGA_IRQ58 = 109,
209  ALT_INT_INTERRUPT_F2S_FPGA_IRQ59 = 110,
210  ALT_INT_INTERRUPT_F2S_FPGA_IRQ60 = 111,
211  ALT_INT_INTERRUPT_F2S_FPGA_IRQ61 = 112,
212  ALT_INT_INTERRUPT_F2S_FPGA_IRQ62 = 113,
213  ALT_INT_INTERRUPT_F2S_FPGA_IRQ63 = 114,
219  ALT_INT_INTERRUPT_DMA_IRQ0 = 115,
220  ALT_INT_INTERRUPT_DMA_IRQ1 = 116,
221  ALT_INT_INTERRUPT_DMA_IRQ2 = 117,
222  ALT_INT_INTERRUPT_DMA_IRQ3 = 118,
223  ALT_INT_INTERRUPT_DMA_IRQ4 = 119,
224  ALT_INT_INTERRUPT_DMA_IRQ5 = 120,
225  ALT_INT_INTERRUPT_DMA_IRQ6 = 121,
226  ALT_INT_INTERRUPT_DMA_IRQ7 = 122,
227  ALT_INT_INTERRUPT_DMA_IRQ_ABORT = 123,
233  ALT_INT_INTERRUPT_EMAC0_IRQ = 124,
234  ALT_INT_INTERRUPT_EMAC1_IRQ = 125,
235  ALT_INT_INTERRUPT_EMAC2_IRQ = 126,
242  ALT_INT_INTERRUPT_USB0_IRQ = 127,
243  ALT_INT_INTERRUPT_USB1_IRQ = 128,
249  ALT_INT_INTERRUPT_HMC_ERROR = 129,
255  ALT_INT_INTERRUPT_SDMMC_IRQ = 130,
256  ALT_INT_INTERRUPT_NAND_IRQ = 131,
257  ALT_INT_INTERRUPT_QSPI_IRQ = 132,
263  ALT_INT_INTERRUPT_SPI0_IRQ = 133,
264  ALT_INT_INTERRUPT_SPI1_IRQ = 134,
265  ALT_INT_INTERRUPT_SPI2_IRQ = 135,
266  ALT_INT_INTERRUPT_SPI3_IRQ = 136,
274  ALT_INT_INTERRUPT_I2C0_IRQ = 137,
275  ALT_INT_INTERRUPT_I2C1_IRQ = 138,
276  ALT_INT_INTERRUPT_I2C2_IRQ = 139,
277  ALT_INT_INTERRUPT_I2C3_IRQ = 140,
278  ALT_INT_INTERRUPT_I2C4_IRQ = 141,
289  ALT_INT_INTERRUPT_UART0 = 142,
290  ALT_INT_INTERRUPT_UART1 = 143,
296  ALT_INT_INTERRUPT_GPIO0 = 144,
297  ALT_INT_INTERRUPT_GPIO1 = 145,
298  ALT_INT_INTERRUPT_GPIO2 = 146,
304  ALT_INT_INTERRUPT_TIMER_L4SP_0_IRQ = 147,
305  ALT_INT_INTERRUPT_TIMER_L4SP_1_IRQ = 148,
306  ALT_INT_INTERRUPT_TIMER_OSC1_0_IRQ = 149,
307  ALT_INT_INTERRUPT_TIMER_OSC1_1_IRQ = 150,
313  ALT_INT_INTERRUPT_WDOG0_IRQ = 151,
314  ALT_INT_INTERRUPT_WDOG1_IRQ = 152,
320  ALT_INT_INTERRUPT_CLKMGR_IRQ = 153,
321  ALT_INT_INTERRUPT_RESTMGR_IRQ = 154,
322  ALT_INT_INTERRUPT_FPGA_MAN_IRQ = 155,
328  ALT_INT_INTERRUPT_NCTIIRQ0 = 156,
329  ALT_INT_INTERRUPT_NCTIIRQ1 = 157,
335  ALT_INT_INTERRUPT_SEC_MGR_INTR = 158,
341  ALT_INT_INTERRUPT_DATABWERR = 157
347 } ALT_INT_INTERRUPT_t;
348 
349 #ifdef __cplusplus
350 }
351 #endif
352 
353 #endif /* __ALT_INT_DEVICE_H__ */