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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Data Structures | |
struct | ALT_PINMUX_DCTD_IO_GRP_s |
struct | ALT_PINMUX_DCTD_IO_GRP_raw_s |
Typedefs | |
typedef struct ALT_PINMUX_DCTD_IO_GRP_s | ALT_PINMUX_DCTD_IO_GRP_t |
typedef struct ALT_PINMUX_DCTD_IO_GRP_raw_s | ALT_PINMUX_DCTD_IO_GRP_raw_t |
struct ALT_PINMUX_DCTD_IO_GRP_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register group ALT_PINMUX_DCTD_IO_GRP.
struct ALT_PINMUX_DCTD_IO_GRP_raw_s |
The struct declaration for the raw register contents of register group ALT_PINMUX_DCTD_IO_GRP.
Data Fields | ||
---|---|---|
volatile uint32_t | pinmux_dedicated_io_1 | ALT_PINMUX_DCTD_IO_1 |
volatile uint32_t | pinmux_dedicated_io_2 | ALT_PINMUX_DCTD_IO_2 |
volatile uint32_t | pinmux_dedicated_io_3 | ALT_PINMUX_DCTD_IO_3 |
volatile uint32_t | pinmux_dedicated_io_4 | ALT_PINMUX_DCTD_IO_4 |
volatile uint32_t | pinmux_dedicated_io_5 | ALT_PINMUX_DCTD_IO_5 |
volatile uint32_t | pinmux_dedicated_io_6 | ALT_PINMUX_DCTD_IO_6 |
volatile uint32_t | pinmux_dedicated_io_7 | ALT_PINMUX_DCTD_IO_7 |
volatile uint32_t | pinmux_dedicated_io_8 | ALT_PINMUX_DCTD_IO_8 |
volatile uint32_t | pinmux_dedicated_io_9 | ALT_PINMUX_DCTD_IO_9 |
volatile uint32_t | pinmux_dedicated_io_10 | ALT_PINMUX_DCTD_IO_10 |
volatile uint32_t | pinmux_dedicated_io_11 | ALT_PINMUX_DCTD_IO_11 |
volatile uint32_t | pinmux_dedicated_io_12 | ALT_PINMUX_DCTD_IO_12 |
volatile uint32_t | pinmux_dedicated_io_13 | ALT_PINMUX_DCTD_IO_13 |
volatile uint32_t | pinmux_dedicated_io_14 | ALT_PINMUX_DCTD_IO_14 |
volatile uint32_t | pinmux_dedicated_io_15 | ALT_PINMUX_DCTD_IO_15 |
volatile uint32_t | pinmux_dedicated_io_16 | ALT_PINMUX_DCTD_IO_16 |
volatile uint32_t | pinmux_dedicated_io_17 | ALT_PINMUX_DCTD_IO_17 |
volatile uint32_t | _pad_0x44_0xff | UNDEFINED |
volatile uint32_t | configuration_dedicated_io_bank | ALT_PINMUX_DCTD_IO_CFG_BANK |
volatile uint32_t | configuration_dedicated_io_1 | ALT_PINMUX_DCTD_IO_CFG_1 |
volatile uint32_t | configuration_dedicated_io_2 | ALT_PINMUX_DCTD_IO_CFG_2 |
volatile uint32_t | configuration_dedicated_io_3 | ALT_PINMUX_DCTD_IO_CFG_3 |
volatile uint32_t | configuration_dedicated_io_4 | ALT_PINMUX_DCTD_IO_CFG_4 |
volatile uint32_t | configuration_dedicated_io_5 | ALT_PINMUX_DCTD_IO_CFG_5 |
volatile uint32_t | configuration_dedicated_io_6 | ALT_PINMUX_DCTD_IO_CFG_6 |
volatile uint32_t | configuration_dedicated_io_7 | ALT_PINMUX_DCTD_IO_CFG_7 |
volatile uint32_t | configuration_dedicated_io_8 | ALT_PINMUX_DCTD_IO_CFG_8 |
volatile uint32_t | configuration_dedicated_io_9 | ALT_PINMUX_DCTD_IO_CFG_9 |
volatile uint32_t | configuration_dedicated_io_10 | ALT_PINMUX_DCTD_IO_CFG_10 |
volatile uint32_t | configuration_dedicated_io_11 | ALT_PINMUX_DCTD_IO_CFG_11 |
volatile uint32_t | configuration_dedicated_io_12 | ALT_PINMUX_DCTD_IO_CFG_12 |
volatile uint32_t | configuration_dedicated_io_13 | ALT_PINMUX_DCTD_IO_CFG_13 |
volatile uint32_t | configuration_dedicated_io_14 | ALT_PINMUX_DCTD_IO_CFG_14 |
volatile uint32_t | configuration_dedicated_io_15 | ALT_PINMUX_DCTD_IO_CFG_15 |
volatile uint32_t | configuration_dedicated_io_16 | ALT_PINMUX_DCTD_IO_CFG_16 |
volatile uint32_t | configuration_dedicated_io_17 | ALT_PINMUX_DCTD_IO_CFG_17 |
volatile uint32_t | _pad_0x148_0x200 | UNDEFINED |
typedef struct ALT_PINMUX_DCTD_IO_GRP_s ALT_PINMUX_DCTD_IO_GRP_t |
The typedef declaration for register group ALT_PINMUX_DCTD_IO_GRP.
typedef struct ALT_PINMUX_DCTD_IO_GRP_raw_s ALT_PINMUX_DCTD_IO_GRP_raw_t |
The typedef declaration for the raw register contents of register group ALT_PINMUX_DCTD_IO_GRP.