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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Inject parity failures into the parity-protected RAMs in the MPU. Allows software to test the parity failure interrupt handler. The field array index corresponds to the CPU index.
All fields are reset by a cold or warm reset.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | Parity Fail Injection for Data Cache Data RAM |
[1] | RW | 0x0 | Parity Fail Injection for Data Cache Data RAM |
[2] | RW | 0x0 | Parity Fail Injection for Data Cache Tag RAM |
[3] | RW | 0x0 | Parity Fail Injection for Data Cache Tag RAM |
[4] | RW | 0x0 | Parity Fail Injection for Data Cache Outer RAM |
[5] | RW | 0x0 | Parity Fail Injection for Data Cache Outer RAM |
[6] | RW | 0x0 | Parity Fail Injection for Main TLB RAM |
[7] | RW | 0x0 | Parity Fail Injection for Main TLB RAM |
[8] | RW | 0x0 | Parity Fail Injection for Instruction Cache Data RAM |
[9] | RW | 0x0 | Parity Fail Injection for Instruction Cache Data RAM |
[10] | RW | 0x0 | Parity Fail Injection for Instruction Cache Tag RAM |
[11] | RW | 0x0 | Parity Fail Injection for Instruction Cache Tag RAM |
[12] | RW | 0x0 | Parity Fail Injection for GHB RAM |
[13] | RW | 0x0 | Parity Fail Injection for GHB RAM |
[14] | RW | 0x0 | Parity Fail Injection for BTAC RAM |
[15] | RW | 0x0 | Parity Fail Injection for BTAC RAM |
[31:16] | ??? | 0x0 | UNDEFINED |
Field : Parity Fail Injection for Data Cache Data RAM - dcdata_0 | |
If 1, injecting parity error to Data Cache Data RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_LSB 0 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_MSB 0 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_SET_MSK 0x00000001 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_CLR_MSK 0xfffffffe |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_0_SET(value) (((value) << 0) & 0x00000001) |
Field : Parity Fail Injection for Data Cache Data RAM - dcdata_1 | |
If 1, injecting parity error to Data Cache Data RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_LSB 1 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_MSB 1 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_SET_MSK 0x00000002 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_CLR_MSK 0xfffffffd |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_SYSMGR_PARITYINJ_DCDATA_1_SET(value) (((value) << 1) & 0x00000002) |
Field : Parity Fail Injection for Data Cache Tag RAM - dctag_0 | |
If 1, injecting parity error to Data Cache Tag RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_LSB 2 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_MSB 2 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_SET_MSK 0x00000004 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_CLR_MSK 0xfffffffb |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_0_SET(value) (((value) << 2) & 0x00000004) |
Field : Parity Fail Injection for Data Cache Tag RAM - dctag_1 | |
If 1, injecting parity error to Data Cache Tag RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_LSB 3 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_MSB 3 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_SET_MSK 0x00000008 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_CLR_MSK 0xfffffff7 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_SYSMGR_PARITYINJ_DCTAG_1_SET(value) (((value) << 3) & 0x00000008) |
Field : Parity Fail Injection for Data Cache Outer RAM - dcouter_0 | |
If 1, injecting parity error to Data Cache Outer RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_LSB 4 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_MSB 4 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET_MSK 0x00000010 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_CLR_MSK 0xffffffef |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET(value) (((value) << 4) & 0x00000010) |
Field : Parity Fail Injection for Data Cache Outer RAM - dcouter_1 | |
If 1, injecting parity error to Data Cache Outer RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_LSB 5 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_MSB 5 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET_MSK 0x00000020 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_CLR_MSK 0xffffffdf |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_GET(value) (((value) & 0x00000020) >> 5) |
#define | ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET(value) (((value) << 5) & 0x00000020) |
Field : Parity Fail Injection for Main TLB RAM - maintlb_0 | |
If 1, injecting parity error to Main TLB RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_LSB 6 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_MSB 6 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET_MSK 0x00000040 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_CLR_MSK 0xffffffbf |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_GET(value) (((value) & 0x00000040) >> 6) |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET(value) (((value) << 6) & 0x00000040) |
Field : Parity Fail Injection for Main TLB RAM - maintlb_1 | |
If 1, injecting parity error to Main TLB RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_LSB 7 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_MSB 7 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET_MSK 0x00000080 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_CLR_MSK 0xffffff7f |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_GET(value) (((value) & 0x00000080) >> 7) |
#define | ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET(value) (((value) << 7) & 0x00000080) |
Field : Parity Fail Injection for Instruction Cache Data RAM - icdata_0 | |
If 1, injecting parity error to Instruction Cache Data RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_LSB 8 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_MSB 8 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_SET_MSK 0x00000100 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_CLR_MSK 0xfffffeff |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_0_SET(value) (((value) << 8) & 0x00000100) |
Field : Parity Fail Injection for Instruction Cache Data RAM - icdata_1 | |
If 1, injecting parity error to Instruction Cache Data RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_LSB 9 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_MSB 9 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_SET_MSK 0x00000200 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_CLR_MSK 0xfffffdff |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_GET(value) (((value) & 0x00000200) >> 9) |
#define | ALT_SYSMGR_PARITYINJ_ICDATA_1_SET(value) (((value) << 9) & 0x00000200) |
Field : Parity Fail Injection for Instruction Cache Tag RAM - ictag_0 | |
If 1, injecting parity error to Instruction Cache Tag RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_LSB 10 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_MSB 10 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_SET_MSK 0x00000400 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_CLR_MSK 0xfffffbff |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_GET(value) (((value) & 0x00000400) >> 10) |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_0_SET(value) (((value) << 10) & 0x00000400) |
Field : Parity Fail Injection for Instruction Cache Tag RAM - ictag_1 | |
If 1, injecting parity error to Instruction Cache Tag RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_LSB 11 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_MSB 11 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_SET_MSK 0x00000800 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_CLR_MSK 0xfffff7ff |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_GET(value) (((value) & 0x00000800) >> 11) |
#define | ALT_SYSMGR_PARITYINJ_ICTAG_1_SET(value) (((value) << 11) & 0x00000800) |
Field : Parity Fail Injection for GHB RAM - ghb_0 | |
If 1, injecting parity error to GHB RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_LSB 12 |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_MSB 12 |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_SET_MSK 0x00001000 |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_CLR_MSK 0xffffefff |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_GET(value) (((value) & 0x00001000) >> 12) |
#define | ALT_SYSMGR_PARITYINJ_GHB_0_SET(value) (((value) << 12) & 0x00001000) |
Field : Parity Fail Injection for GHB RAM - ghb_1 | |
If 1, injecting parity error to GHB RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_LSB 13 |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_MSB 13 |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_SET_MSK 0x00002000 |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_CLR_MSK 0xffffdfff |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_GET(value) (((value) & 0x00002000) >> 13) |
#define | ALT_SYSMGR_PARITYINJ_GHB_1_SET(value) (((value) << 13) & 0x00002000) |
Field : Parity Fail Injection for BTAC RAM - btac_0 | |
If 1, injecting parity error to BTAC RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_LSB 14 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_MSB 14 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_SET_MSK 0x00004000 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_CLR_MSK 0xffffbfff |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_GET(value) (((value) & 0x00004000) >> 14) |
#define | ALT_SYSMGR_PARITYINJ_BTAC_0_SET(value) (((value) << 14) & 0x00004000) |
Field : Parity Fail Injection for BTAC RAM - btac_1 | |
If 1, injecting parity error to BTAC RAM.The field array index corresponds to the CPU index. Field Access Macros: | |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_LSB 15 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_MSB 15 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_WIDTH 1 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_SET_MSK 0x00008000 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_CLR_MSK 0xffff7fff |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_RESET 0x0 |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_GET(value) (((value) & 0x00008000) >> 15) |
#define | ALT_SYSMGR_PARITYINJ_BTAC_1_SET(value) (((value) << 15) & 0x00008000) |
Data Structures | |
struct | ALT_SYSMGR_PARITYINJ_s |
Macros | |
#define | ALT_SYSMGR_PARITYINJ_OFST 0x1c |
Typedefs | |
typedef struct ALT_SYSMGR_PARITYINJ_s | ALT_SYSMGR_PARITYINJ_t |
struct ALT_SYSMGR_PARITYINJ_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SYSMGR_PARITYINJ.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_DCDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_DCDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_DCDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_SET_MSK 0x00000001 |
The mask used to set the ALT_SYSMGR_PARITYINJ_DCDATA_0 register field value.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SYSMGR_PARITYINJ_DCDATA_0 register field value.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_DCDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SYSMGR_PARITYINJ_DCDATA_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_DCDATA_0_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SYSMGR_PARITYINJ_DCDATA_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_DCDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_DCDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_DCDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_SET_MSK 0x00000002 |
The mask used to set the ALT_SYSMGR_PARITYINJ_DCDATA_1 register field value.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_SYSMGR_PARITYINJ_DCDATA_1 register field value.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_DCDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_SYSMGR_PARITYINJ_DCDATA_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_DCDATA_1_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_SYSMGR_PARITYINJ_DCDATA_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_DCTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_DCTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_DCTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_SET_MSK 0x00000004 |
The mask used to set the ALT_SYSMGR_PARITYINJ_DCTAG_0 register field value.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_SYSMGR_PARITYINJ_DCTAG_0 register field value.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_DCTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_SYSMGR_PARITYINJ_DCTAG_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_DCTAG_0_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_SYSMGR_PARITYINJ_DCTAG_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_DCTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_DCTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_DCTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_SET_MSK 0x00000008 |
The mask used to set the ALT_SYSMGR_PARITYINJ_DCTAG_1 register field value.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_SYSMGR_PARITYINJ_DCTAG_1 register field value.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_DCTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_SYSMGR_PARITYINJ_DCTAG_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_DCTAG_1_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_SYSMGR_PARITYINJ_DCTAG_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET_MSK 0x00000010 |
The mask used to set the ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field value.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_CLR_MSK 0xffffffef |
The mask used to clear the ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field value.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_SYSMGR_PARITYINJ_DCOUTER_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_SYSMGR_PARITYINJ_DCOUTER_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET_MSK 0x00000020 |
The mask used to set the ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field value.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field value.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_SYSMGR_PARITYINJ_DCOUTER_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_SYSMGR_PARITYINJ_DCOUTER_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET_MSK 0x00000040 |
The mask used to set the ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field value.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field value.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_SYSMGR_PARITYINJ_MAINTLB_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_SYSMGR_PARITYINJ_MAINTLB_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET_MSK 0x00000080 |
The mask used to set the ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field value.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field value.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_SYSMGR_PARITYINJ_MAINTLB_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_SYSMGR_PARITYINJ_MAINTLB_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_ICDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_ICDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_ICDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_SET_MSK 0x00000100 |
The mask used to set the ALT_SYSMGR_PARITYINJ_ICDATA_0 register field value.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_ICDATA_0 register field value.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_ICDATA_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_SYSMGR_PARITYINJ_ICDATA_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_ICDATA_0_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_SYSMGR_PARITYINJ_ICDATA_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_ICDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_ICDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_ICDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_SET_MSK 0x00000200 |
The mask used to set the ALT_SYSMGR_PARITYINJ_ICDATA_1 register field value.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_ICDATA_1 register field value.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_ICDATA_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_SYSMGR_PARITYINJ_ICDATA_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_ICDATA_1_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_SYSMGR_PARITYINJ_ICDATA_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_ICTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_ICTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_ICTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_SET_MSK 0x00000400 |
The mask used to set the ALT_SYSMGR_PARITYINJ_ICTAG_0 register field value.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_ICTAG_0 register field value.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_ICTAG_0 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_SYSMGR_PARITYINJ_ICTAG_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_ICTAG_0_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_SYSMGR_PARITYINJ_ICTAG_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_ICTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_ICTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_ICTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_SET_MSK 0x00000800 |
The mask used to set the ALT_SYSMGR_PARITYINJ_ICTAG_1 register field value.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_ICTAG_1 register field value.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_ICTAG_1 register field.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_SYSMGR_PARITYINJ_ICTAG_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_ICTAG_1_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_SYSMGR_PARITYINJ_ICTAG_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_GHB_0_LSB 12 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_GHB_0 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_0_MSB 12 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_GHB_0 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_GHB_0 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_0_SET_MSK 0x00001000 |
The mask used to set the ALT_SYSMGR_PARITYINJ_GHB_0 register field value.
#define ALT_SYSMGR_PARITYINJ_GHB_0_CLR_MSK 0xffffefff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_GHB_0 register field value.
#define ALT_SYSMGR_PARITYINJ_GHB_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_GHB_0 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_0_GET | ( | value | ) | (((value) & 0x00001000) >> 12) |
Extracts the ALT_SYSMGR_PARITYINJ_GHB_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_GHB_0_SET | ( | value | ) | (((value) << 12) & 0x00001000) |
Produces a ALT_SYSMGR_PARITYINJ_GHB_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_GHB_1_LSB 13 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_GHB_1 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_1_MSB 13 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_GHB_1 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_GHB_1 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_1_SET_MSK 0x00002000 |
The mask used to set the ALT_SYSMGR_PARITYINJ_GHB_1 register field value.
#define ALT_SYSMGR_PARITYINJ_GHB_1_CLR_MSK 0xffffdfff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_GHB_1 register field value.
#define ALT_SYSMGR_PARITYINJ_GHB_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_GHB_1 register field.
#define ALT_SYSMGR_PARITYINJ_GHB_1_GET | ( | value | ) | (((value) & 0x00002000) >> 13) |
Extracts the ALT_SYSMGR_PARITYINJ_GHB_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_GHB_1_SET | ( | value | ) | (((value) << 13) & 0x00002000) |
Produces a ALT_SYSMGR_PARITYINJ_GHB_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_LSB 14 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_BTAC_0 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_MSB 14 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_BTAC_0 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_BTAC_0 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_SET_MSK 0x00004000 |
The mask used to set the ALT_SYSMGR_PARITYINJ_BTAC_0 register field value.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_CLR_MSK 0xffffbfff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_BTAC_0 register field value.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_BTAC_0 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_GET | ( | value | ) | (((value) & 0x00004000) >> 14) |
Extracts the ALT_SYSMGR_PARITYINJ_BTAC_0 field value from a register.
#define ALT_SYSMGR_PARITYINJ_BTAC_0_SET | ( | value | ) | (((value) << 14) & 0x00004000) |
Produces a ALT_SYSMGR_PARITYINJ_BTAC_0 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_LSB 15 |
The Least Significant Bit (LSB) position of the ALT_SYSMGR_PARITYINJ_BTAC_1 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_SYSMGR_PARITYINJ_BTAC_1 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_WIDTH 1 |
The width in bits of the ALT_SYSMGR_PARITYINJ_BTAC_1 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_SET_MSK 0x00008000 |
The mask used to set the ALT_SYSMGR_PARITYINJ_BTAC_1 register field value.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_CLR_MSK 0xffff7fff |
The mask used to clear the ALT_SYSMGR_PARITYINJ_BTAC_1 register field value.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_RESET 0x0 |
The reset value of the ALT_SYSMGR_PARITYINJ_BTAC_1 register field.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_GET | ( | value | ) | (((value) & 0x00008000) >> 15) |
Extracts the ALT_SYSMGR_PARITYINJ_BTAC_1 field value from a register.
#define ALT_SYSMGR_PARITYINJ_BTAC_1_SET | ( | value | ) | (((value) << 15) & 0x00008000) |
Produces a ALT_SYSMGR_PARITYINJ_BTAC_1 register field value suitable for setting the register.
#define ALT_SYSMGR_PARITYINJ_OFST 0x1c |
The byte offset of the ALT_SYSMGR_PARITYINJ register from the beginning of the component.
typedef struct ALT_SYSMGR_PARITYINJ_s ALT_SYSMGR_PARITYINJ_t |
The typedef declaration for register ALT_SYSMGR_PARITYINJ.