Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Flash Command Register - flashcmd

Description

Register Layout

Bits Access Reset Description
[0] RW 0x0 Execute Command
[1] R 0x0 Command Execution Status
[6:2] ??? 0x0 UNDEFINED
[11:7] RW 0x0 Number of Dummy Bytes
[14:12] RW 0x0 Number of Write Data Bytes
[15] RW 0x0 Write Data Enable
[17:16] RW 0x0 Number of Address Bytes
[18] RW 0x0 Mode Bit Enable
[19] RW 0x0 Command Address Enable
[22:20] RW 0x0 Number of Read Data Bytes
[23] RW 0x0 Read Data Enable
[31:24] RW 0x0 Command Opcode

Field : Execute Command - execcmd

Execute the command.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_EXECCMD_E_EXECUTE 0x1 Execute Command
ALT_QSPI_FLSHCMD_EXECCMD_E_NOACTION 0x0 No Action

Field Access Macros:

#define ALT_QSPI_FLSHCMD_EXECCMD_E_EXECUTE   0x1
 
#define ALT_QSPI_FLSHCMD_EXECCMD_E_NOACTION   0x0
 
#define ALT_QSPI_FLSHCMD_EXECCMD_LSB   0
 
#define ALT_QSPI_FLSHCMD_EXECCMD_MSB   0
 
#define ALT_QSPI_FLSHCMD_EXECCMD_WIDTH   1
 
#define ALT_QSPI_FLSHCMD_EXECCMD_SET_MSK   0x00000001
 
#define ALT_QSPI_FLSHCMD_EXECCMD_CLR_MSK   0xfffffffe
 
#define ALT_QSPI_FLSHCMD_EXECCMD_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_EXECCMD_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_QSPI_FLSHCMD_EXECCMD_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Command Execution Status - cmdexecstat

Command execution in progress.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_CMDEXECSTAT_E_EXECUTESTAT 0x1 Command Execution Status
ALT_QSPI_FLSHCMD_CMDEXECSTAT_E_NOACTION 0x0 No Action

Field Access Macros:

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_E_EXECUTESTAT   0x1
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_E_NOACTION   0x0
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_LSB   1
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_MSB   1
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_WIDTH   1
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_SET_MSK   0x00000002
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_CLR_MSK   0xfffffffd
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_SET(value)   (((value) << 1) & 0x00000002)
 

Field : Number of Dummy Bytes - numdummybytes

Set to the number of dummy bytes required This should be setup before triggering the command via the execute field of this register.

Field Access Macros:

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_LSB   7
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_MSB   11
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_WIDTH   5
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_SET_MSK   0x00000f80
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_CLR_MSK   0xfffff07f
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_GET(value)   (((value) & 0x00000f80) >> 7)
 
#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_SET(value)   (((value) << 7) & 0x00000f80)
 

Field : Number of Write Data Bytes - numwrdatabytes

Up to 8 Data bytes may be written using this command.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE1 0x0 Write 1 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE2 0x1 Write 2 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE3 0x2 Write 3 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE4 0x3 Write 4 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE5 0x4 Write 5 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE6 0x5 Write 6 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE7 0x6 Write 7 Byte
ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE8 0x7 Write 8 Byte

Field Access Macros:

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE1   0x0
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE2   0x1
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE3   0x2
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE4   0x3
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE5   0x4
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE6   0x5
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE7   0x6
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE8   0x7
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_LSB   12
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_MSB   14
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_WIDTH   3
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_SET_MSK   0x00007000
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_CLR_MSK   0xffff8fff
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_GET(value)   (((value) & 0x00007000) >> 12)
 
#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_SET(value)   (((value) << 12) & 0x00007000)
 

Field : Write Data Enable - enwrdata

Set to 1 if the command specified in the command opcode field requires write data bytes to be sent to the device.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_ENWRDATA_E_WRDATABYTES 0x1 Command requires write data bytes
ALT_QSPI_FLSHCMD_ENWRDATA_E_NOACTION 0x0 No Action

Field Access Macros:

#define ALT_QSPI_FLSHCMD_ENWRDATA_E_WRDATABYTES   0x1
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_E_NOACTION   0x0
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_LSB   15
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_MSB   15
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_WIDTH   1
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_SET_MSK   0x00008000
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_CLR_MSK   0xffff7fff
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_GET(value)   (((value) & 0x00008000) >> 15)
 
#define ALT_QSPI_FLSHCMD_ENWRDATA_SET(value)   (((value) << 15) & 0x00008000)
 

Field : Number of Address Bytes - numaddrbytes

Set to the number of address bytes required (the address itself is programmed in the FLASH COMMAND ADDRESS REGISTERS). This should be setup before triggering the command via bit 0 of this register. 2'b00 : 1 address byte 2'b01 : 2 address bytes 2'b10 : 3 address bytes 2'b11 : 4 address bytes

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE1 0x0 Write 1 Address Byte
ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE2 0x1 Write 2 Address Bytes
ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE3 0x2 Write 3 Address Bytes
ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE4 0x3 Write 4 Address Bytes

Field Access Macros:

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE1   0x0
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE2   0x1
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE3   0x2
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE4   0x3
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_LSB   16
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_MSB   17
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_WIDTH   2
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_SET_MSK   0x00030000
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_CLR_MSK   0xfffcffff
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_GET(value)   (((value) & 0x00030000) >> 16)
 
#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_SET(value)   (((value) << 16) & 0x00030000)
 

Field : Mode Bit Enable - enmodebit

Set to 1 to ensure the mode bits as defined in the Mode Bit Configuration register are sent following the address bytes.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_ENMODBIT_E_END 0x1 Mode Bit follows address bytes
ALT_QSPI_FLSHCMD_ENMODBIT_E_DISD 0x0 No Action

Field Access Macros:

#define ALT_QSPI_FLSHCMD_ENMODBIT_E_END   0x1
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_E_DISD   0x0
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_LSB   18
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_MSB   18
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_WIDTH   1
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_SET_MSK   0x00040000
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_CLR_MSK   0xfffbffff
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_GET(value)   (((value) & 0x00040000) >> 18)
 
#define ALT_QSPI_FLSHCMD_ENMODBIT_SET(value)   (((value) << 18) & 0x00040000)
 

Field : Command Address Enable - encmdaddr

If enabled, the command specified in bits 31:24 requires an address. This should be setup before triggering the command via writing a 1 to the execute field.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_ENCMDADDR_E_END 0x1 Command in bits 31:24 requires address
ALT_QSPI_FLSHCMD_ENCMDADDR_E_DISD 0x0 No Action

Field Access Macros:

#define ALT_QSPI_FLSHCMD_ENCMDADDR_E_END   0x1
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_E_DISD   0x0
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_LSB   19
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_MSB   19
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_WIDTH   1
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_SET_MSK   0x00080000
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_CLR_MSK   0xfff7ffff
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_GET(value)   (((value) & 0x00080000) >> 19)
 
#define ALT_QSPI_FLSHCMD_ENCMDADDR_SET(value)   (((value) << 19) & 0x00080000)
 

Field : Number of Read Data Bytes - numrddatabytes

Up to 8 data bytes may be read using this command. Set to 0 for 1 byte and 7 for 8 bytes.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE1 0x0 Read 1 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE2 0x1 Read 2 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE3 0x2 Read 3 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE4 0x3 Read 4 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE5 0x4 Read 5 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE6 0x5 Read 6 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE7 0x6 Read 7 Byte
ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE8 0x7 Read 8 Byte

Field Access Macros:

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE1   0x0
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE2   0x1
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE3   0x2
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE4   0x3
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE5   0x4
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE6   0x5
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE7   0x6
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE8   0x7
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_LSB   20
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_MSB   22
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_WIDTH   3
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_SET_MSK   0x00700000
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_CLR_MSK   0xff8fffff
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_GET(value)   (((value) & 0x00700000) >> 20)
 
#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_SET(value)   (((value) << 20) & 0x00700000)
 

Field : Read Data Enable - enrddata

If enabled, the command specified in the command opcode field (bits 31:24) requires read data bytes to be received from the device.

Field Enumeration Values:

Enum Value Description
ALT_QSPI_FLSHCMD_ENRDDATA_E_EN 0x1 Command Requires read data
ALT_QSPI_FLSHCMD_ENRDDATA_E_NOACTION 0x0 No Action

Field Access Macros:

#define ALT_QSPI_FLSHCMD_ENRDDATA_E_EN   0x1
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_E_NOACTION   0x0
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_LSB   23
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_MSB   23
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_WIDTH   1
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_SET_MSK   0x00800000
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_CLR_MSK   0xff7fffff
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_GET(value)   (((value) & 0x00800000) >> 23)
 
#define ALT_QSPI_FLSHCMD_ENRDDATA_SET(value)   (((value) << 23) & 0x00800000)
 

Field : Command Opcode - cmdopcode

The command opcode field should be setup before triggering the command. For example, 0x20 maps to SubSector Erase. Writeing to the execute field (bit 0) of this register launches the command. NOTE : Using this approach to issue commands to the device will make use of the instruction type of the device instruction configuration register. If this field is set to 2'b00, then the command opcode, command address, command dummy bytes and command data will all be transferred in a serial fashion. If this field is set to 2'b01, then the command opcode, command address, command dummy bytes and command data will all be transferred in parallel using DQ0 and DQ1 pins. If this field is set to 2'b10, then the command opcode, command address, command dummy bytes and command data will all be transferred in parallel using DQ0, DQ1, DQ2 and DQ3 pins.

Field Access Macros:

#define ALT_QSPI_FLSHCMD_CMDOPCODE_LSB   24
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_MSB   31
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_WIDTH   8
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_SET_MSK   0xff000000
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_CLR_MSK   0x00ffffff
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_RESET   0x0
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_GET(value)   (((value) & 0xff000000) >> 24)
 
#define ALT_QSPI_FLSHCMD_CMDOPCODE_SET(value)   (((value) << 24) & 0xff000000)
 

Data Structures

struct  ALT_QSPI_FLSHCMD_s
 

Macros

#define ALT_QSPI_FLSHCMD_OFST   0x90
 

Typedefs

typedef struct ALT_QSPI_FLSHCMD_s ALT_QSPI_FLSHCMD_t
 

Data Structure Documentation

struct ALT_QSPI_FLSHCMD_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_QSPI_FLSHCMD.

Data Fields
uint32_t execcmd: 1 Execute Command
const uint32_t cmdexecstat: 1 Command Execution Status
uint32_t __pad0__: 5 UNDEFINED
uint32_t numdummybytes: 5 Number of Dummy Bytes
uint32_t numwrdatabytes: 3 Number of Write Data Bytes
uint32_t enwrdata: 1 Write Data Enable
uint32_t numaddrbytes: 2 Number of Address Bytes
uint32_t enmodebit: 1 Mode Bit Enable
uint32_t encmdaddr: 1 Command Address Enable
uint32_t numrddatabytes: 3 Number of Read Data Bytes
uint32_t enrddata: 1 Read Data Enable
uint32_t cmdopcode: 8 Command Opcode

Macro Definitions

#define ALT_QSPI_FLSHCMD_EXECCMD_E_EXECUTE   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_EXECCMD

Execute Command

#define ALT_QSPI_FLSHCMD_EXECCMD_E_NOACTION   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_EXECCMD

No Action

#define ALT_QSPI_FLSHCMD_EXECCMD_LSB   0

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_EXECCMD register field.

#define ALT_QSPI_FLSHCMD_EXECCMD_MSB   0

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_EXECCMD register field.

#define ALT_QSPI_FLSHCMD_EXECCMD_WIDTH   1

The width in bits of the ALT_QSPI_FLSHCMD_EXECCMD register field.

#define ALT_QSPI_FLSHCMD_EXECCMD_SET_MSK   0x00000001

The mask used to set the ALT_QSPI_FLSHCMD_EXECCMD register field value.

#define ALT_QSPI_FLSHCMD_EXECCMD_CLR_MSK   0xfffffffe

The mask used to clear the ALT_QSPI_FLSHCMD_EXECCMD register field value.

#define ALT_QSPI_FLSHCMD_EXECCMD_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_EXECCMD register field.

#define ALT_QSPI_FLSHCMD_EXECCMD_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_QSPI_FLSHCMD_EXECCMD field value from a register.

#define ALT_QSPI_FLSHCMD_EXECCMD_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_QSPI_FLSHCMD_EXECCMD register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_E_EXECUTESTAT   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_CMDEXECSTAT

Command Execution Status

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_E_NOACTION   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_CMDEXECSTAT

No Action

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_LSB   1

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_CMDEXECSTAT register field.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_MSB   1

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_CMDEXECSTAT register field.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_WIDTH   1

The width in bits of the ALT_QSPI_FLSHCMD_CMDEXECSTAT register field.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_SET_MSK   0x00000002

The mask used to set the ALT_QSPI_FLSHCMD_CMDEXECSTAT register field value.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_CLR_MSK   0xfffffffd

The mask used to clear the ALT_QSPI_FLSHCMD_CMDEXECSTAT register field value.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_CMDEXECSTAT register field.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_QSPI_FLSHCMD_CMDEXECSTAT field value from a register.

#define ALT_QSPI_FLSHCMD_CMDEXECSTAT_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_QSPI_FLSHCMD_CMDEXECSTAT register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_LSB   7

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_MSB   11

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_WIDTH   5

The width in bits of the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_SET_MSK   0x00000f80

The mask used to set the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_CLR_MSK   0xfffff07f

The mask used to clear the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_GET (   value)    (((value) & 0x00000f80) >> 7)

Extracts the ALT_QSPI_FLSHCMD_NUMDUMMYBYTES field value from a register.

#define ALT_QSPI_FLSHCMD_NUMDUMMYBYTES_SET (   value)    (((value) << 7) & 0x00000f80)

Produces a ALT_QSPI_FLSHCMD_NUMDUMMYBYTES register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE1   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 1 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE2   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 2 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE3   0x2

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 3 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE4   0x3

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 4 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE5   0x4

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 5 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE6   0x5

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 6 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE7   0x6

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 7 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_E_WRBYTE8   0x7

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMWRDATABYTES

Write 8 Byte

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_LSB   12

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_MSB   14

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_WIDTH   3

The width in bits of the ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_SET_MSK   0x00007000

The mask used to set the ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_CLR_MSK   0xffff8fff

The mask used to clear the ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_GET (   value)    (((value) & 0x00007000) >> 12)

Extracts the ALT_QSPI_FLSHCMD_NUMWRDATABYTES field value from a register.

#define ALT_QSPI_FLSHCMD_NUMWRDATABYTES_SET (   value)    (((value) << 12) & 0x00007000)

Produces a ALT_QSPI_FLSHCMD_NUMWRDATABYTES register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_ENWRDATA_E_WRDATABYTES   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_ENWRDATA

Command requires write data bytes

#define ALT_QSPI_FLSHCMD_ENWRDATA_E_NOACTION   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_ENWRDATA

No Action

#define ALT_QSPI_FLSHCMD_ENWRDATA_LSB   15

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_ENWRDATA register field.

#define ALT_QSPI_FLSHCMD_ENWRDATA_MSB   15

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_ENWRDATA register field.

#define ALT_QSPI_FLSHCMD_ENWRDATA_WIDTH   1

The width in bits of the ALT_QSPI_FLSHCMD_ENWRDATA register field.

#define ALT_QSPI_FLSHCMD_ENWRDATA_SET_MSK   0x00008000

The mask used to set the ALT_QSPI_FLSHCMD_ENWRDATA register field value.

#define ALT_QSPI_FLSHCMD_ENWRDATA_CLR_MSK   0xffff7fff

The mask used to clear the ALT_QSPI_FLSHCMD_ENWRDATA register field value.

#define ALT_QSPI_FLSHCMD_ENWRDATA_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_ENWRDATA register field.

#define ALT_QSPI_FLSHCMD_ENWRDATA_GET (   value)    (((value) & 0x00008000) >> 15)

Extracts the ALT_QSPI_FLSHCMD_ENWRDATA field value from a register.

#define ALT_QSPI_FLSHCMD_ENWRDATA_SET (   value)    (((value) << 15) & 0x00008000)

Produces a ALT_QSPI_FLSHCMD_ENWRDATA register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE1   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMADDRBYTES

Write 1 Address Byte

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE2   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMADDRBYTES

Write 2 Address Bytes

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE3   0x2

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMADDRBYTES

Write 3 Address Bytes

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_E_ADDRBYTE4   0x3

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMADDRBYTES

Write 4 Address Bytes

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_LSB   16

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_NUMADDRBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_MSB   17

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_NUMADDRBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_WIDTH   2

The width in bits of the ALT_QSPI_FLSHCMD_NUMADDRBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_SET_MSK   0x00030000

The mask used to set the ALT_QSPI_FLSHCMD_NUMADDRBYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_CLR_MSK   0xfffcffff

The mask used to clear the ALT_QSPI_FLSHCMD_NUMADDRBYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_NUMADDRBYTES register field.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_GET (   value)    (((value) & 0x00030000) >> 16)

Extracts the ALT_QSPI_FLSHCMD_NUMADDRBYTES field value from a register.

#define ALT_QSPI_FLSHCMD_NUMADDRBYTES_SET (   value)    (((value) << 16) & 0x00030000)

Produces a ALT_QSPI_FLSHCMD_NUMADDRBYTES register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_ENMODBIT_E_END   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_ENMODBIT

Mode Bit follows address bytes

#define ALT_QSPI_FLSHCMD_ENMODBIT_E_DISD   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_ENMODBIT

No Action

#define ALT_QSPI_FLSHCMD_ENMODBIT_LSB   18

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_ENMODBIT register field.

#define ALT_QSPI_FLSHCMD_ENMODBIT_MSB   18

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_ENMODBIT register field.

#define ALT_QSPI_FLSHCMD_ENMODBIT_WIDTH   1

The width in bits of the ALT_QSPI_FLSHCMD_ENMODBIT register field.

#define ALT_QSPI_FLSHCMD_ENMODBIT_SET_MSK   0x00040000

The mask used to set the ALT_QSPI_FLSHCMD_ENMODBIT register field value.

#define ALT_QSPI_FLSHCMD_ENMODBIT_CLR_MSK   0xfffbffff

The mask used to clear the ALT_QSPI_FLSHCMD_ENMODBIT register field value.

#define ALT_QSPI_FLSHCMD_ENMODBIT_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_ENMODBIT register field.

#define ALT_QSPI_FLSHCMD_ENMODBIT_GET (   value)    (((value) & 0x00040000) >> 18)

Extracts the ALT_QSPI_FLSHCMD_ENMODBIT field value from a register.

#define ALT_QSPI_FLSHCMD_ENMODBIT_SET (   value)    (((value) << 18) & 0x00040000)

Produces a ALT_QSPI_FLSHCMD_ENMODBIT register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_E_END   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_ENCMDADDR

Command in bits 31:24 requires address

#define ALT_QSPI_FLSHCMD_ENCMDADDR_E_DISD   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_ENCMDADDR

No Action

#define ALT_QSPI_FLSHCMD_ENCMDADDR_LSB   19

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_ENCMDADDR register field.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_MSB   19

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_ENCMDADDR register field.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_WIDTH   1

The width in bits of the ALT_QSPI_FLSHCMD_ENCMDADDR register field.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_SET_MSK   0x00080000

The mask used to set the ALT_QSPI_FLSHCMD_ENCMDADDR register field value.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_CLR_MSK   0xfff7ffff

The mask used to clear the ALT_QSPI_FLSHCMD_ENCMDADDR register field value.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_ENCMDADDR register field.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_GET (   value)    (((value) & 0x00080000) >> 19)

Extracts the ALT_QSPI_FLSHCMD_ENCMDADDR field value from a register.

#define ALT_QSPI_FLSHCMD_ENCMDADDR_SET (   value)    (((value) << 19) & 0x00080000)

Produces a ALT_QSPI_FLSHCMD_ENCMDADDR register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE1   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 1 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE2   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 2 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE3   0x2

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 3 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE4   0x3

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 4 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE5   0x4

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 5 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE6   0x5

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 6 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE7   0x6

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 7 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_E_RDBYTE8   0x7

Enumerated value for register field ALT_QSPI_FLSHCMD_NUMRDDATABYTES

Read 8 Byte

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_LSB   20

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_MSB   22

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_WIDTH   3

The width in bits of the ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_SET_MSK   0x00700000

The mask used to set the ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_CLR_MSK   0xff8fffff

The mask used to clear the ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field value.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_GET (   value)    (((value) & 0x00700000) >> 20)

Extracts the ALT_QSPI_FLSHCMD_NUMRDDATABYTES field value from a register.

#define ALT_QSPI_FLSHCMD_NUMRDDATABYTES_SET (   value)    (((value) << 20) & 0x00700000)

Produces a ALT_QSPI_FLSHCMD_NUMRDDATABYTES register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_ENRDDATA_E_EN   0x1

Enumerated value for register field ALT_QSPI_FLSHCMD_ENRDDATA

Command Requires read data

#define ALT_QSPI_FLSHCMD_ENRDDATA_E_NOACTION   0x0

Enumerated value for register field ALT_QSPI_FLSHCMD_ENRDDATA

No Action

#define ALT_QSPI_FLSHCMD_ENRDDATA_LSB   23

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_ENRDDATA register field.

#define ALT_QSPI_FLSHCMD_ENRDDATA_MSB   23

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_ENRDDATA register field.

#define ALT_QSPI_FLSHCMD_ENRDDATA_WIDTH   1

The width in bits of the ALT_QSPI_FLSHCMD_ENRDDATA register field.

#define ALT_QSPI_FLSHCMD_ENRDDATA_SET_MSK   0x00800000

The mask used to set the ALT_QSPI_FLSHCMD_ENRDDATA register field value.

#define ALT_QSPI_FLSHCMD_ENRDDATA_CLR_MSK   0xff7fffff

The mask used to clear the ALT_QSPI_FLSHCMD_ENRDDATA register field value.

#define ALT_QSPI_FLSHCMD_ENRDDATA_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_ENRDDATA register field.

#define ALT_QSPI_FLSHCMD_ENRDDATA_GET (   value)    (((value) & 0x00800000) >> 23)

Extracts the ALT_QSPI_FLSHCMD_ENRDDATA field value from a register.

#define ALT_QSPI_FLSHCMD_ENRDDATA_SET (   value)    (((value) << 23) & 0x00800000)

Produces a ALT_QSPI_FLSHCMD_ENRDDATA register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_LSB   24

The Least Significant Bit (LSB) position of the ALT_QSPI_FLSHCMD_CMDOPCODE register field.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_MSB   31

The Most Significant Bit (MSB) position of the ALT_QSPI_FLSHCMD_CMDOPCODE register field.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_WIDTH   8

The width in bits of the ALT_QSPI_FLSHCMD_CMDOPCODE register field.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_SET_MSK   0xff000000

The mask used to set the ALT_QSPI_FLSHCMD_CMDOPCODE register field value.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_CLR_MSK   0x00ffffff

The mask used to clear the ALT_QSPI_FLSHCMD_CMDOPCODE register field value.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_RESET   0x0

The reset value of the ALT_QSPI_FLSHCMD_CMDOPCODE register field.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_GET (   value)    (((value) & 0xff000000) >> 24)

Extracts the ALT_QSPI_FLSHCMD_CMDOPCODE field value from a register.

#define ALT_QSPI_FLSHCMD_CMDOPCODE_SET (   value)    (((value) << 24) & 0xff000000)

Produces a ALT_QSPI_FLSHCMD_CMDOPCODE register field value suitable for setting the register.

#define ALT_QSPI_FLSHCMD_OFST   0x90

The byte offset of the ALT_QSPI_FLSHCMD register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_QSPI_FLSHCMD.