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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Current data transfer mode is Main only, Spare only or Main+Spare.
This information is per bank.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[1:0] | R | 0x0 | ALT_NAND_STAT_TFR_MOD_VALUE0 |
[3:2] | R | 0x0 | ALT_NAND_STAT_TFR_MOD_VALUE1 |
[5:4] | R | 0x0 | ALT_NAND_STAT_TFR_MOD_VALUE2 |
[7:6] | R | 0x0 | ALT_NAND_STAT_TFR_MOD_VALUE3 |
[31:8] | ??? | Unknown | UNDEFINED |
Field : value0 | |
[list][*]00 - Bank 0 is in Main mode [*]01 - Bank 0 is in Spare mode [*]10 - Bank 0 is in Main+Spare mode[/list] Field Access Macros: | |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_LSB 0 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_MSB 1 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_WIDTH 2 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_SET_MSK 0x00000003 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_CLR_MSK 0xfffffffc |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_RESET 0x0 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_GET(value) (((value) & 0x00000003) >> 0) |
#define | ALT_NAND_STAT_TFR_MOD_VALUE0_SET(value) (((value) << 0) & 0x00000003) |
Field : value1 | |
[list][*]00 - Bank 1 is in Main mode [*]01 - Bank 1 is in Spare mode [*]10 - Bank 1 is in Main+Spare mode[/list] Field Access Macros: | |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_LSB 2 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_MSB 3 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_WIDTH 2 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_SET_MSK 0x0000000c |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_CLR_MSK 0xfffffff3 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_RESET 0x0 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_GET(value) (((value) & 0x0000000c) >> 2) |
#define | ALT_NAND_STAT_TFR_MOD_VALUE1_SET(value) (((value) << 2) & 0x0000000c) |
Field : value2 | |
[list][*]00 - Bank 2 is in Main mode [*]01 - Bank 2 is in Spare mode [*]10 - Bank 2 is in Main+Spare mode[/list] Field Access Macros: | |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_LSB 4 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_MSB 5 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_WIDTH 2 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_SET_MSK 0x00000030 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_CLR_MSK 0xffffffcf |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_RESET 0x0 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_GET(value) (((value) & 0x00000030) >> 4) |
#define | ALT_NAND_STAT_TFR_MOD_VALUE2_SET(value) (((value) << 4) & 0x00000030) |
Field : value3 | |
[list][*]00 - Bank 3 is in Main mode [*]01 - Bank 3 is in Spare mode [*]10 - Bank 3 is in Main+Spare mode[/list] Field Access Macros: | |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_LSB 6 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_MSB 7 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_WIDTH 2 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_SET_MSK 0x000000c0 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_CLR_MSK 0xffffff3f |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_RESET 0x0 |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_GET(value) (((value) & 0x000000c0) >> 6) |
#define | ALT_NAND_STAT_TFR_MOD_VALUE3_SET(value) (((value) << 6) & 0x000000c0) |
Data Structures | |
struct | ALT_NAND_STAT_TFR_MOD_s |
Macros | |
#define | ALT_NAND_STAT_TFR_MOD_RESET 0x00000000 |
#define | ALT_NAND_STAT_TFR_MOD_OFST 0x0 |
Typedefs | |
typedef struct ALT_NAND_STAT_TFR_MOD_s | ALT_NAND_STAT_TFR_MOD_t |
struct ALT_NAND_STAT_TFR_MOD_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NAND_STAT_TFR_MOD.
Data Fields | ||
---|---|---|
const uint32_t | value0: 2 | ALT_NAND_STAT_TFR_MOD_VALUE0 |
const uint32_t | value1: 2 | ALT_NAND_STAT_TFR_MOD_VALUE1 |
const uint32_t | value2: 2 | ALT_NAND_STAT_TFR_MOD_VALUE2 |
const uint32_t | value3: 2 | ALT_NAND_STAT_TFR_MOD_VALUE3 |
uint32_t | __pad0__: 24 | UNDEFINED |
#define ALT_NAND_STAT_TFR_MOD_VALUE0_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE0 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE0 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_WIDTH 2 |
The width in bits of the ALT_NAND_STAT_TFR_MOD_VALUE0 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_SET_MSK 0x00000003 |
The mask used to set the ALT_NAND_STAT_TFR_MOD_VALUE0 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_NAND_STAT_TFR_MOD_VALUE0 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_RESET 0x0 |
The reset value of the ALT_NAND_STAT_TFR_MOD_VALUE0 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_NAND_STAT_TFR_MOD_VALUE0 field value from a register.
#define ALT_NAND_STAT_TFR_MOD_VALUE0_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_NAND_STAT_TFR_MOD_VALUE0 register field value suitable for setting the register.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE1 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE1 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_WIDTH 2 |
The width in bits of the ALT_NAND_STAT_TFR_MOD_VALUE1 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_SET_MSK 0x0000000c |
The mask used to set the ALT_NAND_STAT_TFR_MOD_VALUE1 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_CLR_MSK 0xfffffff3 |
The mask used to clear the ALT_NAND_STAT_TFR_MOD_VALUE1 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_RESET 0x0 |
The reset value of the ALT_NAND_STAT_TFR_MOD_VALUE1 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_GET | ( | value | ) | (((value) & 0x0000000c) >> 2) |
Extracts the ALT_NAND_STAT_TFR_MOD_VALUE1 field value from a register.
#define ALT_NAND_STAT_TFR_MOD_VALUE1_SET | ( | value | ) | (((value) << 2) & 0x0000000c) |
Produces a ALT_NAND_STAT_TFR_MOD_VALUE1 register field value suitable for setting the register.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE2 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE2 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_WIDTH 2 |
The width in bits of the ALT_NAND_STAT_TFR_MOD_VALUE2 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_SET_MSK 0x00000030 |
The mask used to set the ALT_NAND_STAT_TFR_MOD_VALUE2 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_CLR_MSK 0xffffffcf |
The mask used to clear the ALT_NAND_STAT_TFR_MOD_VALUE2 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_RESET 0x0 |
The reset value of the ALT_NAND_STAT_TFR_MOD_VALUE2 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_GET | ( | value | ) | (((value) & 0x00000030) >> 4) |
Extracts the ALT_NAND_STAT_TFR_MOD_VALUE2 field value from a register.
#define ALT_NAND_STAT_TFR_MOD_VALUE2_SET | ( | value | ) | (((value) << 4) & 0x00000030) |
Produces a ALT_NAND_STAT_TFR_MOD_VALUE2 register field value suitable for setting the register.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE3 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_NAND_STAT_TFR_MOD_VALUE3 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_WIDTH 2 |
The width in bits of the ALT_NAND_STAT_TFR_MOD_VALUE3 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_SET_MSK 0x000000c0 |
The mask used to set the ALT_NAND_STAT_TFR_MOD_VALUE3 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_CLR_MSK 0xffffff3f |
The mask used to clear the ALT_NAND_STAT_TFR_MOD_VALUE3 register field value.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_RESET 0x0 |
The reset value of the ALT_NAND_STAT_TFR_MOD_VALUE3 register field.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_GET | ( | value | ) | (((value) & 0x000000c0) >> 6) |
Extracts the ALT_NAND_STAT_TFR_MOD_VALUE3 field value from a register.
#define ALT_NAND_STAT_TFR_MOD_VALUE3_SET | ( | value | ) | (((value) << 6) & 0x000000c0) |
Produces a ALT_NAND_STAT_TFR_MOD_VALUE3 register field value suitable for setting the register.
#define ALT_NAND_STAT_TFR_MOD_RESET 0x00000000 |
The reset value of the ALT_NAND_STAT_TFR_MOD register.
#define ALT_NAND_STAT_TFR_MOD_OFST 0x0 |
The byte offset of the ALT_NAND_STAT_TFR_MOD register from the beginning of the component.
typedef struct ALT_NAND_STAT_TFR_MOD_s ALT_NAND_STAT_TFR_MOD_t |
The typedef declaration for register ALT_NAND_STAT_TFR_MOD.