Altera SoCAL  16.0
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alt_uart.h
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32 
35 #ifndef __ALTERA_ALT_UART_H__
36 #define __ALTERA_ALT_UART_H__
37 
38 #ifdef __cplusplus
39 extern "C"
40 {
41 #endif /* __cplusplus */
42 
111 #define ALT_UART_RBR_THR_DLL_VALUE_LSB 0
112 
113 #define ALT_UART_RBR_THR_DLL_VALUE_MSB 7
114 
115 #define ALT_UART_RBR_THR_DLL_VALUE_WIDTH 8
116 
117 #define ALT_UART_RBR_THR_DLL_VALUE_SET_MSK 0x000000ff
118 
119 #define ALT_UART_RBR_THR_DLL_VALUE_CLR_MSK 0xffffff00
120 
121 #define ALT_UART_RBR_THR_DLL_VALUE_RESET 0x0
122 
123 #define ALT_UART_RBR_THR_DLL_VALUE_GET(value) (((value) & 0x000000ff) >> 0)
124 
125 #define ALT_UART_RBR_THR_DLL_VALUE_SET(value) (((value) << 0) & 0x000000ff)
126 
127 #ifndef __ASSEMBLY__
128 
139 {
140  uint32_t value : 8;
141  uint32_t : 24;
142 };
143 
146 #endif /* __ASSEMBLY__ */
147 
149 #define ALT_UART_RBR_THR_DLL_OFST 0x0
150 
151 #define ALT_UART_RBR_THR_DLL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RBR_THR_DLL_OFST))
152 
223 #define ALT_UART_IER_DLH_ERBFI_DLH0_E_DISD 0x0
224 
229 #define ALT_UART_IER_DLH_ERBFI_DLH0_E_END 0x1
230 
232 #define ALT_UART_IER_DLH_ERBFI_DLH0_LSB 0
233 
234 #define ALT_UART_IER_DLH_ERBFI_DLH0_MSB 0
235 
236 #define ALT_UART_IER_DLH_ERBFI_DLH0_WIDTH 1
237 
238 #define ALT_UART_IER_DLH_ERBFI_DLH0_SET_MSK 0x00000001
239 
240 #define ALT_UART_IER_DLH_ERBFI_DLH0_CLR_MSK 0xfffffffe
241 
242 #define ALT_UART_IER_DLH_ERBFI_DLH0_RESET 0x0
243 
244 #define ALT_UART_IER_DLH_ERBFI_DLH0_GET(value) (((value) & 0x00000001) >> 0)
245 
246 #define ALT_UART_IER_DLH_ERBFI_DLH0_SET(value) (((value) << 0) & 0x00000001)
247 
276 #define ALT_UART_IER_DLH_ETBEI_DLHL_E_DISD 0x0
277 
282 #define ALT_UART_IER_DLH_ETBEI_DLHL_E_END 0x1
283 
285 #define ALT_UART_IER_DLH_ETBEI_DLHL_LSB 1
286 
287 #define ALT_UART_IER_DLH_ETBEI_DLHL_MSB 1
288 
289 #define ALT_UART_IER_DLH_ETBEI_DLHL_WIDTH 1
290 
291 #define ALT_UART_IER_DLH_ETBEI_DLHL_SET_MSK 0x00000002
292 
293 #define ALT_UART_IER_DLH_ETBEI_DLHL_CLR_MSK 0xfffffffd
294 
295 #define ALT_UART_IER_DLH_ETBEI_DLHL_RESET 0x0
296 
297 #define ALT_UART_IER_DLH_ETBEI_DLHL_GET(value) (((value) & 0x00000002) >> 1)
298 
299 #define ALT_UART_IER_DLH_ETBEI_DLHL_SET(value) (((value) << 1) & 0x00000002)
300 
328 #define ALT_UART_IER_DLH_ELSI_DHL2_E_DISD 0x0
329 
334 #define ALT_UART_IER_DLH_ELSI_DHL2_E_END 0x1
335 
337 #define ALT_UART_IER_DLH_ELSI_DHL2_LSB 2
338 
339 #define ALT_UART_IER_DLH_ELSI_DHL2_MSB 2
340 
341 #define ALT_UART_IER_DLH_ELSI_DHL2_WIDTH 1
342 
343 #define ALT_UART_IER_DLH_ELSI_DHL2_SET_MSK 0x00000004
344 
345 #define ALT_UART_IER_DLH_ELSI_DHL2_CLR_MSK 0xfffffffb
346 
347 #define ALT_UART_IER_DLH_ELSI_DHL2_RESET 0x0
348 
349 #define ALT_UART_IER_DLH_ELSI_DHL2_GET(value) (((value) & 0x00000004) >> 2)
350 
351 #define ALT_UART_IER_DLH_ELSI_DHL2_SET(value) (((value) << 2) & 0x00000004)
352 
380 #define ALT_UART_IER_DLH_EDSSI_DHL3_E_DISD 0x0
381 
386 #define ALT_UART_IER_DLH_EDSSI_DHL3_E_END 0x1
387 
389 #define ALT_UART_IER_DLH_EDSSI_DHL3_LSB 3
390 
391 #define ALT_UART_IER_DLH_EDSSI_DHL3_MSB 3
392 
393 #define ALT_UART_IER_DLH_EDSSI_DHL3_WIDTH 1
394 
395 #define ALT_UART_IER_DLH_EDSSI_DHL3_SET_MSK 0x00000008
396 
397 #define ALT_UART_IER_DLH_EDSSI_DHL3_CLR_MSK 0xfffffff7
398 
399 #define ALT_UART_IER_DLH_EDSSI_DHL3_RESET 0x0
400 
401 #define ALT_UART_IER_DLH_EDSSI_DHL3_GET(value) (((value) & 0x00000008) >> 3)
402 
403 #define ALT_UART_IER_DLH_EDSSI_DHL3_SET(value) (((value) << 3) & 0x00000008)
404 
414 #define ALT_UART_IER_DLH_DLH4_LSB 4
415 
416 #define ALT_UART_IER_DLH_DLH4_MSB 4
417 
418 #define ALT_UART_IER_DLH_DLH4_WIDTH 1
419 
420 #define ALT_UART_IER_DLH_DLH4_SET_MSK 0x00000010
421 
422 #define ALT_UART_IER_DLH_DLH4_CLR_MSK 0xffffffef
423 
424 #define ALT_UART_IER_DLH_DLH4_RESET 0x0
425 
426 #define ALT_UART_IER_DLH_DLH4_GET(value) (((value) & 0x00000010) >> 4)
427 
428 #define ALT_UART_IER_DLH_DLH4_SET(value) (((value) << 4) & 0x00000010)
429 
439 #define ALT_UART_IER_DLH_DLH5_LSB 5
440 
441 #define ALT_UART_IER_DLH_DLH5_MSB 5
442 
443 #define ALT_UART_IER_DLH_DLH5_WIDTH 1
444 
445 #define ALT_UART_IER_DLH_DLH5_SET_MSK 0x00000020
446 
447 #define ALT_UART_IER_DLH_DLH5_CLR_MSK 0xffffffdf
448 
449 #define ALT_UART_IER_DLH_DLH5_RESET 0x0
450 
451 #define ALT_UART_IER_DLH_DLH5_GET(value) (((value) & 0x00000020) >> 5)
452 
453 #define ALT_UART_IER_DLH_DLH5_SET(value) (((value) << 5) & 0x00000020)
454 
464 #define ALT_UART_IER_DLH_DLH6_LSB 6
465 
466 #define ALT_UART_IER_DLH_DLH6_MSB 6
467 
468 #define ALT_UART_IER_DLH_DLH6_WIDTH 1
469 
470 #define ALT_UART_IER_DLH_DLH6_SET_MSK 0x00000040
471 
472 #define ALT_UART_IER_DLH_DLH6_CLR_MSK 0xffffffbf
473 
474 #define ALT_UART_IER_DLH_DLH6_RESET 0x0
475 
476 #define ALT_UART_IER_DLH_DLH6_GET(value) (((value) & 0x00000040) >> 6)
477 
478 #define ALT_UART_IER_DLH_DLH6_SET(value) (((value) << 6) & 0x00000040)
479 
506 #define ALT_UART_IER_DLH_PTIME_DLH7_E_DISD 0x0
507 
512 #define ALT_UART_IER_DLH_PTIME_DLH7_E_END 0x1
513 
515 #define ALT_UART_IER_DLH_PTIME_DLH7_LSB 7
516 
517 #define ALT_UART_IER_DLH_PTIME_DLH7_MSB 7
518 
519 #define ALT_UART_IER_DLH_PTIME_DLH7_WIDTH 1
520 
521 #define ALT_UART_IER_DLH_PTIME_DLH7_SET_MSK 0x00000080
522 
523 #define ALT_UART_IER_DLH_PTIME_DLH7_CLR_MSK 0xffffff7f
524 
525 #define ALT_UART_IER_DLH_PTIME_DLH7_RESET 0x0
526 
527 #define ALT_UART_IER_DLH_PTIME_DLH7_GET(value) (((value) & 0x00000080) >> 7)
528 
529 #define ALT_UART_IER_DLH_PTIME_DLH7_SET(value) (((value) << 7) & 0x00000080)
530 
531 #ifndef __ASSEMBLY__
532 
543 {
544  uint32_t erbfi_dlh0 : 1;
545  uint32_t etbei_dlhl : 1;
546  uint32_t elsi_dhl2 : 1;
547  uint32_t edssi_dhl3 : 1;
548  uint32_t dlh4 : 1;
549  uint32_t dlh5 : 1;
550  uint32_t dlh6 : 1;
551  uint32_t ptime_dlh7 : 1;
552  uint32_t : 24;
553 };
554 
556 typedef volatile struct ALT_UART_IER_DLH_s ALT_UART_IER_DLH_t;
557 #endif /* __ASSEMBLY__ */
558 
560 #define ALT_UART_IER_DLH_OFST 0x4
561 
562 #define ALT_UART_IER_DLH_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_IER_DLH_OFST))
563 
603 #define ALT_UART_IIR_ID_E_MODMSTAT 0x0
604 
609 #define ALT_UART_IIR_ID_E_NOINTRPENDING 0x1
610 
615 #define ALT_UART_IIR_ID_E_THREMPTY 0x2
616 
621 #define ALT_UART_IIR_ID_E_RXDATAVAILABLE 0x4
622 
627 #define ALT_UART_IIR_ID_E_RXLINESTAT 0x6
628 
633 #define ALT_UART_IIR_ID_E_CHARTMO 0xc
634 
636 #define ALT_UART_IIR_ID_LSB 0
637 
638 #define ALT_UART_IIR_ID_MSB 3
639 
640 #define ALT_UART_IIR_ID_WIDTH 4
641 
642 #define ALT_UART_IIR_ID_SET_MSK 0x0000000f
643 
644 #define ALT_UART_IIR_ID_CLR_MSK 0xfffffff0
645 
646 #define ALT_UART_IIR_ID_RESET 0x1
647 
648 #define ALT_UART_IIR_ID_GET(value) (((value) & 0x0000000f) >> 0)
649 
650 #define ALT_UART_IIR_ID_SET(value) (((value) << 0) & 0x0000000f)
651 
672 #define ALT_UART_IIR_FIFOEN_E_DISD 0x0
673 
678 #define ALT_UART_IIR_FIFOEN_E_END 0x3
679 
681 #define ALT_UART_IIR_FIFOEN_LSB 6
682 
683 #define ALT_UART_IIR_FIFOEN_MSB 7
684 
685 #define ALT_UART_IIR_FIFOEN_WIDTH 2
686 
687 #define ALT_UART_IIR_FIFOEN_SET_MSK 0x000000c0
688 
689 #define ALT_UART_IIR_FIFOEN_CLR_MSK 0xffffff3f
690 
691 #define ALT_UART_IIR_FIFOEN_RESET 0x0
692 
693 #define ALT_UART_IIR_FIFOEN_GET(value) (((value) & 0x000000c0) >> 6)
694 
695 #define ALT_UART_IIR_FIFOEN_SET(value) (((value) << 6) & 0x000000c0)
696 
697 #ifndef __ASSEMBLY__
698 
709 {
710  const uint32_t id : 4;
711  uint32_t : 2;
712  const uint32_t fifoen : 2;
713  uint32_t : 24;
714 };
715 
717 typedef volatile struct ALT_UART_IIR_s ALT_UART_IIR_t;
718 #endif /* __ASSEMBLY__ */
719 
721 #define ALT_UART_IIR_OFST 0x8
722 
723 #define ALT_UART_IIR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_IIR_OFST))
724 
765 #define ALT_UART_FCR_FIFOE_E_DISD 0x0
766 
771 #define ALT_UART_FCR_FIFOE_E_END 0x1
772 
774 #define ALT_UART_FCR_FIFOE_LSB 0
775 
776 #define ALT_UART_FCR_FIFOE_MSB 0
777 
778 #define ALT_UART_FCR_FIFOE_WIDTH 1
779 
780 #define ALT_UART_FCR_FIFOE_SET_MSK 0x00000001
781 
782 #define ALT_UART_FCR_FIFOE_CLR_MSK 0xfffffffe
783 
784 #define ALT_UART_FCR_FIFOE_RESET 0x0
785 
786 #define ALT_UART_FCR_FIFOE_GET(value) (((value) & 0x00000001) >> 0)
787 
788 #define ALT_UART_FCR_FIFOE_SET(value) (((value) << 0) & 0x00000001)
789 
812 #define ALT_UART_FCR_RFIFOR_E_NORST 0x0
813 
818 #define ALT_UART_FCR_RFIFOR_E_RST 0x1
819 
821 #define ALT_UART_FCR_RFIFOR_LSB 1
822 
823 #define ALT_UART_FCR_RFIFOR_MSB 1
824 
825 #define ALT_UART_FCR_RFIFOR_WIDTH 1
826 
827 #define ALT_UART_FCR_RFIFOR_SET_MSK 0x00000002
828 
829 #define ALT_UART_FCR_RFIFOR_CLR_MSK 0xfffffffd
830 
831 #define ALT_UART_FCR_RFIFOR_RESET 0x0
832 
833 #define ALT_UART_FCR_RFIFOR_GET(value) (((value) & 0x00000002) >> 1)
834 
835 #define ALT_UART_FCR_RFIFOR_SET(value) (((value) << 1) & 0x00000002)
836 
861 #define ALT_UART_FCR_XFIFOR_E_NORST 0x0
862 
867 #define ALT_UART_FCR_XFIFOR_E_RST 0x1
868 
870 #define ALT_UART_FCR_XFIFOR_LSB 2
871 
872 #define ALT_UART_FCR_XFIFOR_MSB 2
873 
874 #define ALT_UART_FCR_XFIFOR_WIDTH 1
875 
876 #define ALT_UART_FCR_XFIFOR_SET_MSK 0x00000004
877 
878 #define ALT_UART_FCR_XFIFOR_CLR_MSK 0xfffffffb
879 
880 #define ALT_UART_FCR_XFIFOR_RESET 0x0
881 
882 #define ALT_UART_FCR_XFIFOR_GET(value) (((value) & 0x00000004) >> 2)
883 
884 #define ALT_UART_FCR_XFIFOR_SET(value) (((value) << 2) & 0x00000004)
885 
936 #define ALT_UART_FCR_DMAM_E_SINGLE 0x0
937 
942 #define ALT_UART_FCR_DMAM_E_MULT 0x1
943 
945 #define ALT_UART_FCR_DMAM_LSB 3
946 
947 #define ALT_UART_FCR_DMAM_MSB 3
948 
949 #define ALT_UART_FCR_DMAM_WIDTH 1
950 
951 #define ALT_UART_FCR_DMAM_SET_MSK 0x00000008
952 
953 #define ALT_UART_FCR_DMAM_CLR_MSK 0xfffffff7
954 
955 #define ALT_UART_FCR_DMAM_RESET 0x0
956 
957 #define ALT_UART_FCR_DMAM_GET(value) (((value) & 0x00000008) >> 3)
958 
959 #define ALT_UART_FCR_DMAM_SET(value) (((value) << 3) & 0x00000008)
960 
986 #define ALT_UART_FCR_TET_E_FIFOEMPTY 0x0
987 
992 #define ALT_UART_FCR_TET_E_TWOCHARS 0x1
993 
998 #define ALT_UART_FCR_TET_E_QUARTERFULL 0x2
999 
1004 #define ALT_UART_FCR_TET_E_HALFFULL 0x3
1005 
1007 #define ALT_UART_FCR_TET_LSB 4
1008 
1009 #define ALT_UART_FCR_TET_MSB 5
1010 
1011 #define ALT_UART_FCR_TET_WIDTH 2
1012 
1013 #define ALT_UART_FCR_TET_SET_MSK 0x00000030
1014 
1015 #define ALT_UART_FCR_TET_CLR_MSK 0xffffffcf
1016 
1017 #define ALT_UART_FCR_TET_RESET 0x0
1018 
1019 #define ALT_UART_FCR_TET_GET(value) (((value) & 0x00000030) >> 4)
1020 
1021 #define ALT_UART_FCR_TET_SET(value) (((value) << 4) & 0x00000030)
1022 
1050 #define ALT_UART_FCR_RT_E_ONECHAR 0x0
1051 
1056 #define ALT_UART_FCR_RT_E_QUARTERFULL 0x1
1057 
1062 #define ALT_UART_FCR_RT_E_HALFFULL 0x2
1063 
1068 #define ALT_UART_FCR_RT_E_FULLLESS2 0x3
1069 
1071 #define ALT_UART_FCR_RT_LSB 6
1072 
1073 #define ALT_UART_FCR_RT_MSB 7
1074 
1075 #define ALT_UART_FCR_RT_WIDTH 2
1076 
1077 #define ALT_UART_FCR_RT_SET_MSK 0x000000c0
1078 
1079 #define ALT_UART_FCR_RT_CLR_MSK 0xffffff3f
1080 
1081 #define ALT_UART_FCR_RT_RESET 0x0
1082 
1083 #define ALT_UART_FCR_RT_GET(value) (((value) & 0x000000c0) >> 6)
1084 
1085 #define ALT_UART_FCR_RT_SET(value) (((value) << 6) & 0x000000c0)
1086 
1087 #ifndef __ASSEMBLY__
1088 
1099 {
1100  uint32_t fifoe : 1;
1101  uint32_t rfifor : 1;
1102  uint32_t xfifor : 1;
1103  uint32_t dmam : 1;
1104  uint32_t tet : 2;
1105  uint32_t rt : 2;
1106  uint32_t : 24;
1107 };
1108 
1110 typedef volatile struct ALT_UART_FCR_s ALT_UART_FCR_t;
1111 #endif /* __ASSEMBLY__ */
1112 
1114 #define ALT_UART_FCR_OFST 0x8
1115 
1116 #define ALT_UART_FCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_FCR_OFST))
1117 
1160 #define ALT_UART_LCR_DLS_E_LEN5 0x0
1161 
1166 #define ALT_UART_LCR_DLS_E_LEN6 0x1
1167 
1172 #define ALT_UART_LCR_DLS_E_LEN7 0x2
1173 
1178 #define ALT_UART_LCR_DLS_E_LEN8 0x3
1179 
1181 #define ALT_UART_LCR_DLS_LSB 0
1182 
1183 #define ALT_UART_LCR_DLS_MSB 1
1184 
1185 #define ALT_UART_LCR_DLS_WIDTH 2
1186 
1187 #define ALT_UART_LCR_DLS_SET_MSK 0x00000003
1188 
1189 #define ALT_UART_LCR_DLS_CLR_MSK 0xfffffffc
1190 
1191 #define ALT_UART_LCR_DLS_RESET 0x0
1192 
1193 #define ALT_UART_LCR_DLS_GET(value) (((value) & 0x00000003) >> 0)
1194 
1195 #define ALT_UART_LCR_DLS_SET(value) (((value) << 0) & 0x00000003)
1196 
1219 #define ALT_UART_LCR_STOP_E_ONESTOP 0x0
1220 
1225 #define ALT_UART_LCR_STOP_E_ONEPOINT5STOP 0x1
1226 
1228 #define ALT_UART_LCR_STOP_LSB 2
1229 
1230 #define ALT_UART_LCR_STOP_MSB 2
1231 
1232 #define ALT_UART_LCR_STOP_WIDTH 1
1233 
1234 #define ALT_UART_LCR_STOP_SET_MSK 0x00000004
1235 
1236 #define ALT_UART_LCR_STOP_CLR_MSK 0xfffffffb
1237 
1238 #define ALT_UART_LCR_STOP_RESET 0x0
1239 
1240 #define ALT_UART_LCR_STOP_GET(value) (((value) & 0x00000004) >> 2)
1241 
1242 #define ALT_UART_LCR_STOP_SET(value) (((value) << 2) & 0x00000004)
1243 
1265 #define ALT_UART_LCR_PEN_E_DISD 0x0
1266 
1271 #define ALT_UART_LCR_PEN_E_END 0x1
1272 
1274 #define ALT_UART_LCR_PEN_LSB 3
1275 
1276 #define ALT_UART_LCR_PEN_MSB 3
1277 
1278 #define ALT_UART_LCR_PEN_WIDTH 1
1279 
1280 #define ALT_UART_LCR_PEN_SET_MSK 0x00000008
1281 
1282 #define ALT_UART_LCR_PEN_CLR_MSK 0xfffffff7
1283 
1284 #define ALT_UART_LCR_PEN_RESET 0x0
1285 
1286 #define ALT_UART_LCR_PEN_GET(value) (((value) & 0x00000008) >> 3)
1287 
1288 #define ALT_UART_LCR_PEN_SET(value) (((value) << 3) & 0x00000008)
1289 
1312 #define ALT_UART_LCR_EPS_E_ODDPAR 0x0
1313 
1318 #define ALT_UART_LCR_EPS_E_EVENPAR 0x1
1319 
1321 #define ALT_UART_LCR_EPS_LSB 4
1322 
1323 #define ALT_UART_LCR_EPS_MSB 4
1324 
1325 #define ALT_UART_LCR_EPS_WIDTH 1
1326 
1327 #define ALT_UART_LCR_EPS_SET_MSK 0x00000010
1328 
1329 #define ALT_UART_LCR_EPS_CLR_MSK 0xffffffef
1330 
1331 #define ALT_UART_LCR_EPS_RESET 0x0
1332 
1333 #define ALT_UART_LCR_EPS_GET(value) (((value) & 0x00000010) >> 4)
1334 
1335 #define ALT_UART_LCR_EPS_SET(value) (((value) << 4) & 0x00000010)
1336 
1351 #define ALT_UART_LCR_BREAK_LSB 6
1352 
1353 #define ALT_UART_LCR_BREAK_MSB 6
1354 
1355 #define ALT_UART_LCR_BREAK_WIDTH 1
1356 
1357 #define ALT_UART_LCR_BREAK_SET_MSK 0x00000040
1358 
1359 #define ALT_UART_LCR_BREAK_CLR_MSK 0xffffffbf
1360 
1361 #define ALT_UART_LCR_BREAK_RESET 0x0
1362 
1363 #define ALT_UART_LCR_BREAK_GET(value) (((value) & 0x00000040) >> 6)
1364 
1365 #define ALT_UART_LCR_BREAK_SET(value) (((value) << 6) & 0x00000040)
1366 
1378 #define ALT_UART_LCR_DLAB_LSB 7
1379 
1380 #define ALT_UART_LCR_DLAB_MSB 7
1381 
1382 #define ALT_UART_LCR_DLAB_WIDTH 1
1383 
1384 #define ALT_UART_LCR_DLAB_SET_MSK 0x00000080
1385 
1386 #define ALT_UART_LCR_DLAB_CLR_MSK 0xffffff7f
1387 
1388 #define ALT_UART_LCR_DLAB_RESET 0x0
1389 
1390 #define ALT_UART_LCR_DLAB_GET(value) (((value) & 0x00000080) >> 7)
1391 
1392 #define ALT_UART_LCR_DLAB_SET(value) (((value) << 7) & 0x00000080)
1393 
1394 #ifndef __ASSEMBLY__
1395 
1406 {
1407  uint32_t dls : 2;
1408  uint32_t stop : 1;
1409  uint32_t pen : 1;
1410  uint32_t eps : 1;
1411  uint32_t : 1;
1412  uint32_t break_ : 1;
1413  uint32_t dlab : 1;
1414  uint32_t : 24;
1415 };
1416 
1418 typedef volatile struct ALT_UART_LCR_s ALT_UART_LCR_t;
1419 #endif /* __ASSEMBLY__ */
1420 
1422 #define ALT_UART_LCR_OFST 0xc
1423 
1424 #define ALT_UART_LCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LCR_OFST))
1425 
1471 #define ALT_UART_MCR_DTR_E_LOGIC1 0x0
1472 
1477 #define ALT_UART_MCR_DTR_E_LOGIC0 0x1
1478 
1480 #define ALT_UART_MCR_DTR_LSB 0
1481 
1482 #define ALT_UART_MCR_DTR_MSB 0
1483 
1484 #define ALT_UART_MCR_DTR_WIDTH 1
1485 
1486 #define ALT_UART_MCR_DTR_SET_MSK 0x00000001
1487 
1488 #define ALT_UART_MCR_DTR_CLR_MSK 0xfffffffe
1489 
1490 #define ALT_UART_MCR_DTR_RESET 0x0
1491 
1492 #define ALT_UART_MCR_DTR_GET(value) (((value) & 0x00000001) >> 0)
1493 
1494 #define ALT_UART_MCR_DTR_SET(value) (((value) << 0) & 0x00000001)
1495 
1528 #define ALT_UART_MCR_RTS_E_LOGIC1 0x0
1529 
1534 #define ALT_UART_MCR_RTS_E_LOGIC0 0x1
1535 
1537 #define ALT_UART_MCR_RTS_LSB 1
1538 
1539 #define ALT_UART_MCR_RTS_MSB 1
1540 
1541 #define ALT_UART_MCR_RTS_WIDTH 1
1542 
1543 #define ALT_UART_MCR_RTS_SET_MSK 0x00000002
1544 
1545 #define ALT_UART_MCR_RTS_CLR_MSK 0xfffffffd
1546 
1547 #define ALT_UART_MCR_RTS_RESET 0x0
1548 
1549 #define ALT_UART_MCR_RTS_GET(value) (((value) & 0x00000002) >> 1)
1550 
1551 #define ALT_UART_MCR_RTS_SET(value) (((value) << 1) & 0x00000002)
1552 
1578 #define ALT_UART_MCR_OUT1_E_LOGIC1 0x0
1579 
1584 #define ALT_UART_MCR_OUT1_E_LOGIC0 0x1
1585 
1587 #define ALT_UART_MCR_OUT1_LSB 2
1588 
1589 #define ALT_UART_MCR_OUT1_MSB 2
1590 
1591 #define ALT_UART_MCR_OUT1_WIDTH 1
1592 
1593 #define ALT_UART_MCR_OUT1_SET_MSK 0x00000004
1594 
1595 #define ALT_UART_MCR_OUT1_CLR_MSK 0xfffffffb
1596 
1597 #define ALT_UART_MCR_OUT1_RESET 0x0
1598 
1599 #define ALT_UART_MCR_OUT1_GET(value) (((value) & 0x00000004) >> 2)
1600 
1601 #define ALT_UART_MCR_OUT1_SET(value) (((value) << 2) & 0x00000004)
1602 
1628 #define ALT_UART_MCR_OUT2_E_LOGIC1 0x0
1629 
1634 #define ALT_UART_MCR_OUT2_E_LOGIC0 0x1
1635 
1637 #define ALT_UART_MCR_OUT2_LSB 3
1638 
1639 #define ALT_UART_MCR_OUT2_MSB 3
1640 
1641 #define ALT_UART_MCR_OUT2_WIDTH 1
1642 
1643 #define ALT_UART_MCR_OUT2_SET_MSK 0x00000008
1644 
1645 #define ALT_UART_MCR_OUT2_CLR_MSK 0xfffffff7
1646 
1647 #define ALT_UART_MCR_OUT2_RESET 0x0
1648 
1649 #define ALT_UART_MCR_OUT2_GET(value) (((value) & 0x00000008) >> 3)
1650 
1651 #define ALT_UART_MCR_OUT2_SET(value) (((value) << 3) & 0x00000008)
1652 
1669 #define ALT_UART_MCR_LOOPBACK_LSB 4
1670 
1671 #define ALT_UART_MCR_LOOPBACK_MSB 4
1672 
1673 #define ALT_UART_MCR_LOOPBACK_WIDTH 1
1674 
1675 #define ALT_UART_MCR_LOOPBACK_SET_MSK 0x00000010
1676 
1677 #define ALT_UART_MCR_LOOPBACK_CLR_MSK 0xffffffef
1678 
1679 #define ALT_UART_MCR_LOOPBACK_RESET 0x0
1680 
1681 #define ALT_UART_MCR_LOOPBACK_GET(value) (((value) & 0x00000010) >> 4)
1682 
1683 #define ALT_UART_MCR_LOOPBACK_SET(value) (((value) << 4) & 0x00000010)
1684 
1705 #define ALT_UART_MCR_AFCE_E_DISD 0x0
1706 
1711 #define ALT_UART_MCR_AFCE_E_END 0x1
1712 
1714 #define ALT_UART_MCR_AFCE_LSB 5
1715 
1716 #define ALT_UART_MCR_AFCE_MSB 5
1717 
1718 #define ALT_UART_MCR_AFCE_WIDTH 1
1719 
1720 #define ALT_UART_MCR_AFCE_SET_MSK 0x00000020
1721 
1722 #define ALT_UART_MCR_AFCE_CLR_MSK 0xffffffdf
1723 
1724 #define ALT_UART_MCR_AFCE_RESET 0x0
1725 
1726 #define ALT_UART_MCR_AFCE_GET(value) (((value) & 0x00000020) >> 5)
1727 
1728 #define ALT_UART_MCR_AFCE_SET(value) (((value) << 5) & 0x00000020)
1729 
1730 #ifndef __ASSEMBLY__
1731 
1742 {
1743  uint32_t dtr : 1;
1744  uint32_t rts : 1;
1745  uint32_t out1 : 1;
1746  uint32_t out2 : 1;
1747  uint32_t loopback : 1;
1748  uint32_t afce : 1;
1749  uint32_t : 26;
1750 };
1751 
1753 typedef volatile struct ALT_UART_MCR_s ALT_UART_MCR_t;
1754 #endif /* __ASSEMBLY__ */
1755 
1757 #define ALT_UART_MCR_OFST 0x10
1758 
1759 #define ALT_UART_MCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MCR_OFST))
1760 
1803 #define ALT_UART_LSR_DR_E_NODATARDY 0x0
1804 
1809 #define ALT_UART_LSR_DR_E_DATARDY 0x1
1810 
1812 #define ALT_UART_LSR_DR_LSB 0
1813 
1814 #define ALT_UART_LSR_DR_MSB 0
1815 
1816 #define ALT_UART_LSR_DR_WIDTH 1
1817 
1818 #define ALT_UART_LSR_DR_SET_MSK 0x00000001
1819 
1820 #define ALT_UART_LSR_DR_CLR_MSK 0xfffffffe
1821 
1822 #define ALT_UART_LSR_DR_RESET 0x0
1823 
1824 #define ALT_UART_LSR_DR_GET(value) (((value) & 0x00000001) >> 0)
1825 
1826 #define ALT_UART_LSR_DR_SET(value) (((value) << 0) & 0x00000001)
1827 
1855 #define ALT_UART_LSR_OE_E_NOOVERRUN 0x0
1856 
1861 #define ALT_UART_LSR_OE_E_OVERRUN 0x1
1862 
1864 #define ALT_UART_LSR_OE_LSB 1
1865 
1866 #define ALT_UART_LSR_OE_MSB 1
1867 
1868 #define ALT_UART_LSR_OE_WIDTH 1
1869 
1870 #define ALT_UART_LSR_OE_SET_MSK 0x00000002
1871 
1872 #define ALT_UART_LSR_OE_CLR_MSK 0xfffffffd
1873 
1874 #define ALT_UART_LSR_OE_RESET 0x0
1875 
1876 #define ALT_UART_LSR_OE_GET(value) (((value) & 0x00000002) >> 1)
1877 
1878 #define ALT_UART_LSR_OE_SET(value) (((value) << 1) & 0x00000002)
1879 
1905 #define ALT_UART_LSR_PE_E_NOPARITYERR 0x0
1906 
1911 #define ALT_UART_LSR_PE_E_PARITYERR 0x1
1912 
1914 #define ALT_UART_LSR_PE_LSB 2
1915 
1916 #define ALT_UART_LSR_PE_MSB 2
1917 
1918 #define ALT_UART_LSR_PE_WIDTH 1
1919 
1920 #define ALT_UART_LSR_PE_SET_MSK 0x00000004
1921 
1922 #define ALT_UART_LSR_PE_CLR_MSK 0xfffffffb
1923 
1924 #define ALT_UART_LSR_PE_RESET 0x0
1925 
1926 #define ALT_UART_LSR_PE_GET(value) (((value) & 0x00000004) >> 2)
1927 
1928 #define ALT_UART_LSR_PE_SET(value) (((value) << 2) & 0x00000004)
1929 
1959 #define ALT_UART_LSR_FE_E_NOFRMERR 0x0
1960 
1965 #define ALT_UART_LSR_FE_E_FRMERR 0x1
1966 
1968 #define ALT_UART_LSR_FE_LSB 3
1969 
1970 #define ALT_UART_LSR_FE_MSB 3
1971 
1972 #define ALT_UART_LSR_FE_WIDTH 1
1973 
1974 #define ALT_UART_LSR_FE_SET_MSK 0x00000008
1975 
1976 #define ALT_UART_LSR_FE_CLR_MSK 0xfffffff7
1977 
1978 #define ALT_UART_LSR_FE_RESET 0x0
1979 
1980 #define ALT_UART_LSR_FE_GET(value) (((value) & 0x00000008) >> 3)
1981 
1982 #define ALT_UART_LSR_FE_SET(value) (((value) << 3) & 0x00000008)
1983 
1999 #define ALT_UART_LSR_BI_LSB 4
2000 
2001 #define ALT_UART_LSR_BI_MSB 4
2002 
2003 #define ALT_UART_LSR_BI_WIDTH 1
2004 
2005 #define ALT_UART_LSR_BI_SET_MSK 0x00000010
2006 
2007 #define ALT_UART_LSR_BI_CLR_MSK 0xffffffef
2008 
2009 #define ALT_UART_LSR_BI_RESET 0x0
2010 
2011 #define ALT_UART_LSR_BI_GET(value) (((value) & 0x00000010) >> 4)
2012 
2013 #define ALT_UART_LSR_BI_SET(value) (((value) << 4) & 0x00000010)
2014 
2031 #define ALT_UART_LSR_THRE_LSB 5
2032 
2033 #define ALT_UART_LSR_THRE_MSB 5
2034 
2035 #define ALT_UART_LSR_THRE_WIDTH 1
2036 
2037 #define ALT_UART_LSR_THRE_SET_MSK 0x00000020
2038 
2039 #define ALT_UART_LSR_THRE_CLR_MSK 0xffffffdf
2040 
2041 #define ALT_UART_LSR_THRE_RESET 0x1
2042 
2043 #define ALT_UART_LSR_THRE_GET(value) (((value) & 0x00000020) >> 5)
2044 
2045 #define ALT_UART_LSR_THRE_SET(value) (((value) << 5) & 0x00000020)
2046 
2070 #define ALT_UART_LSR_TEMT_E_NOTEMPTY 0x0
2071 
2076 #define ALT_UART_LSR_TEMT_E_EMPTY 0x1
2077 
2079 #define ALT_UART_LSR_TEMT_LSB 6
2080 
2081 #define ALT_UART_LSR_TEMT_MSB 6
2082 
2083 #define ALT_UART_LSR_TEMT_WIDTH 1
2084 
2085 #define ALT_UART_LSR_TEMT_SET_MSK 0x00000040
2086 
2087 #define ALT_UART_LSR_TEMT_CLR_MSK 0xffffffbf
2088 
2089 #define ALT_UART_LSR_TEMT_RESET 0x1
2090 
2091 #define ALT_UART_LSR_TEMT_GET(value) (((value) & 0x00000040) >> 6)
2092 
2093 #define ALT_UART_LSR_TEMT_SET(value) (((value) << 6) & 0x00000040)
2094 
2119 #define ALT_UART_LSR_RFE_E_NOERR 0x0
2120 
2125 #define ALT_UART_LSR_RFE_E_ERR 0x1
2126 
2128 #define ALT_UART_LSR_RFE_LSB 7
2129 
2130 #define ALT_UART_LSR_RFE_MSB 7
2131 
2132 #define ALT_UART_LSR_RFE_WIDTH 1
2133 
2134 #define ALT_UART_LSR_RFE_SET_MSK 0x00000080
2135 
2136 #define ALT_UART_LSR_RFE_CLR_MSK 0xffffff7f
2137 
2138 #define ALT_UART_LSR_RFE_RESET 0x0
2139 
2140 #define ALT_UART_LSR_RFE_GET(value) (((value) & 0x00000080) >> 7)
2141 
2142 #define ALT_UART_LSR_RFE_SET(value) (((value) << 7) & 0x00000080)
2143 
2144 #ifndef __ASSEMBLY__
2145 
2156 {
2157  const uint32_t dr : 1;
2158  const uint32_t oe : 1;
2159  const uint32_t pe : 1;
2160  const uint32_t fe : 1;
2161  const uint32_t bi : 1;
2162  const uint32_t thre : 1;
2163  const uint32_t temt : 1;
2164  const uint32_t rfe : 1;
2165  uint32_t : 24;
2166 };
2167 
2169 typedef volatile struct ALT_UART_LSR_s ALT_UART_LSR_t;
2170 #endif /* __ASSEMBLY__ */
2171 
2173 #define ALT_UART_LSR_OFST 0x14
2174 
2175 #define ALT_UART_LSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LSR_OFST))
2176 
2229 #define ALT_UART_MSR_DCTS_E_NOCHG 0x0
2230 
2235 #define ALT_UART_MSR_DCTS_E_CHG 0x1
2236 
2238 #define ALT_UART_MSR_DCTS_LSB 0
2239 
2240 #define ALT_UART_MSR_DCTS_MSB 0
2241 
2242 #define ALT_UART_MSR_DCTS_WIDTH 1
2243 
2244 #define ALT_UART_MSR_DCTS_SET_MSK 0x00000001
2245 
2246 #define ALT_UART_MSR_DCTS_CLR_MSK 0xfffffffe
2247 
2248 #define ALT_UART_MSR_DCTS_RESET 0x0
2249 
2250 #define ALT_UART_MSR_DCTS_GET(value) (((value) & 0x00000001) >> 0)
2251 
2252 #define ALT_UART_MSR_DCTS_SET(value) (((value) << 0) & 0x00000001)
2253 
2281 #define ALT_UART_MSR_DDSR_E_NOCHG 0x0
2282 
2287 #define ALT_UART_MSR_DDSR_E_CHG 0x1
2288 
2290 #define ALT_UART_MSR_DDSR_LSB 1
2291 
2292 #define ALT_UART_MSR_DDSR_MSB 1
2293 
2294 #define ALT_UART_MSR_DDSR_WIDTH 1
2295 
2296 #define ALT_UART_MSR_DDSR_SET_MSK 0x00000002
2297 
2298 #define ALT_UART_MSR_DDSR_CLR_MSK 0xfffffffd
2299 
2300 #define ALT_UART_MSR_DDSR_RESET 0x0
2301 
2302 #define ALT_UART_MSR_DDSR_GET(value) (((value) & 0x00000002) >> 1)
2303 
2304 #define ALT_UART_MSR_DDSR_SET(value) (((value) << 1) & 0x00000002)
2305 
2330 #define ALT_UART_MSR_TERI_E_NOCHG 0x0
2331 
2336 #define ALT_UART_MSR_TERI_E_CHG 0x1
2337 
2339 #define ALT_UART_MSR_TERI_LSB 2
2340 
2341 #define ALT_UART_MSR_TERI_MSB 2
2342 
2343 #define ALT_UART_MSR_TERI_WIDTH 1
2344 
2345 #define ALT_UART_MSR_TERI_SET_MSK 0x00000004
2346 
2347 #define ALT_UART_MSR_TERI_CLR_MSK 0xfffffffb
2348 
2349 #define ALT_UART_MSR_TERI_RESET 0x0
2350 
2351 #define ALT_UART_MSR_TERI_GET(value) (((value) & 0x00000004) >> 2)
2352 
2353 #define ALT_UART_MSR_TERI_SET(value) (((value) << 2) & 0x00000004)
2354 
2382 #define ALT_UART_MSR_DDCD_E_NOCHG 0x0
2383 
2388 #define ALT_UART_MSR_DDCD_E_CHG 0x1
2389 
2391 #define ALT_UART_MSR_DDCD_LSB 3
2392 
2393 #define ALT_UART_MSR_DDCD_MSB 3
2394 
2395 #define ALT_UART_MSR_DDCD_WIDTH 1
2396 
2397 #define ALT_UART_MSR_DDCD_SET_MSK 0x00000008
2398 
2399 #define ALT_UART_MSR_DDCD_CLR_MSK 0xfffffff7
2400 
2401 #define ALT_UART_MSR_DDCD_RESET 0x0
2402 
2403 #define ALT_UART_MSR_DDCD_GET(value) (((value) & 0x00000008) >> 3)
2404 
2405 #define ALT_UART_MSR_DDCD_SET(value) (((value) << 3) & 0x00000008)
2406 
2431 #define ALT_UART_MSR_CTS_E_LOGIC1 0x0
2432 
2437 #define ALT_UART_MSR_CTS_E_LOGIC0 0x1
2438 
2440 #define ALT_UART_MSR_CTS_LSB 4
2441 
2442 #define ALT_UART_MSR_CTS_MSB 4
2443 
2444 #define ALT_UART_MSR_CTS_WIDTH 1
2445 
2446 #define ALT_UART_MSR_CTS_SET_MSK 0x00000010
2447 
2448 #define ALT_UART_MSR_CTS_CLR_MSK 0xffffffef
2449 
2450 #define ALT_UART_MSR_CTS_RESET 0x0
2451 
2452 #define ALT_UART_MSR_CTS_GET(value) (((value) & 0x00000010) >> 4)
2453 
2454 #define ALT_UART_MSR_CTS_SET(value) (((value) << 4) & 0x00000010)
2455 
2480 #define ALT_UART_MSR_DSR_E_LOGIC1 0x0
2481 
2486 #define ALT_UART_MSR_DSR_E_LOGIC0 0x1
2487 
2489 #define ALT_UART_MSR_DSR_LSB 5
2490 
2491 #define ALT_UART_MSR_DSR_MSB 5
2492 
2493 #define ALT_UART_MSR_DSR_WIDTH 1
2494 
2495 #define ALT_UART_MSR_DSR_SET_MSK 0x00000020
2496 
2497 #define ALT_UART_MSR_DSR_CLR_MSK 0xffffffdf
2498 
2499 #define ALT_UART_MSR_DSR_RESET 0x0
2500 
2501 #define ALT_UART_MSR_DSR_GET(value) (((value) & 0x00000020) >> 5)
2502 
2503 #define ALT_UART_MSR_DSR_SET(value) (((value) << 5) & 0x00000020)
2504 
2529 #define ALT_UART_MSR_RI_E_LOGIC1 0x0
2530 
2535 #define ALT_UART_MSR_RI_E_LOGIC0 0x1
2536 
2538 #define ALT_UART_MSR_RI_LSB 6
2539 
2540 #define ALT_UART_MSR_RI_MSB 6
2541 
2542 #define ALT_UART_MSR_RI_WIDTH 1
2543 
2544 #define ALT_UART_MSR_RI_SET_MSK 0x00000040
2545 
2546 #define ALT_UART_MSR_RI_CLR_MSK 0xffffffbf
2547 
2548 #define ALT_UART_MSR_RI_RESET 0x0
2549 
2550 #define ALT_UART_MSR_RI_GET(value) (((value) & 0x00000040) >> 6)
2551 
2552 #define ALT_UART_MSR_RI_SET(value) (((value) << 6) & 0x00000040)
2553 
2578 #define ALT_UART_MSR_DCD_E_LOGIC1 0x0
2579 
2584 #define ALT_UART_MSR_DCD_E_LOGIC0 0x1
2585 
2587 #define ALT_UART_MSR_DCD_LSB 7
2588 
2589 #define ALT_UART_MSR_DCD_MSB 7
2590 
2591 #define ALT_UART_MSR_DCD_WIDTH 1
2592 
2593 #define ALT_UART_MSR_DCD_SET_MSK 0x00000080
2594 
2595 #define ALT_UART_MSR_DCD_CLR_MSK 0xffffff7f
2596 
2597 #define ALT_UART_MSR_DCD_RESET 0x0
2598 
2599 #define ALT_UART_MSR_DCD_GET(value) (((value) & 0x00000080) >> 7)
2600 
2601 #define ALT_UART_MSR_DCD_SET(value) (((value) << 7) & 0x00000080)
2602 
2603 #ifndef __ASSEMBLY__
2604 
2615 {
2616  const uint32_t dcts : 1;
2617  const uint32_t ddsr : 1;
2618  const uint32_t teri : 1;
2619  const uint32_t ddcd : 1;
2620  const uint32_t cts : 1;
2621  const uint32_t dsr : 1;
2622  const uint32_t ri : 1;
2623  const uint32_t dcd : 1;
2624  uint32_t : 24;
2625 };
2626 
2628 typedef volatile struct ALT_UART_MSR_s ALT_UART_MSR_t;
2629 #endif /* __ASSEMBLY__ */
2630 
2632 #define ALT_UART_MSR_OFST 0x18
2633 
2634 #define ALT_UART_MSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MSR_OFST))
2635 
2658 #define ALT_UART_SCR_SCR_LSB 0
2659 
2660 #define ALT_UART_SCR_SCR_MSB 7
2661 
2662 #define ALT_UART_SCR_SCR_WIDTH 8
2663 
2664 #define ALT_UART_SCR_SCR_SET_MSK 0x000000ff
2665 
2666 #define ALT_UART_SCR_SCR_CLR_MSK 0xffffff00
2667 
2668 #define ALT_UART_SCR_SCR_RESET 0x0
2669 
2670 #define ALT_UART_SCR_SCR_GET(value) (((value) & 0x000000ff) >> 0)
2671 
2672 #define ALT_UART_SCR_SCR_SET(value) (((value) << 0) & 0x000000ff)
2673 
2674 #ifndef __ASSEMBLY__
2675 
2686 {
2687  uint32_t scr : 8;
2688  uint32_t : 24;
2689 };
2690 
2692 typedef volatile struct ALT_UART_SCR_s ALT_UART_SCR_t;
2693 #endif /* __ASSEMBLY__ */
2694 
2696 #define ALT_UART_SCR_OFST 0x1c
2697 
2698 #define ALT_UART_SCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SCR_OFST))
2699 
2732 #define ALT_UART_SRBR_SRBR_LSB 0
2733 
2734 #define ALT_UART_SRBR_SRBR_MSB 7
2735 
2736 #define ALT_UART_SRBR_SRBR_WIDTH 8
2737 
2738 #define ALT_UART_SRBR_SRBR_SET_MSK 0x000000ff
2739 
2740 #define ALT_UART_SRBR_SRBR_CLR_MSK 0xffffff00
2741 
2742 #define ALT_UART_SRBR_SRBR_RESET 0x0
2743 
2744 #define ALT_UART_SRBR_SRBR_GET(value) (((value) & 0x000000ff) >> 0)
2745 
2746 #define ALT_UART_SRBR_SRBR_SET(value) (((value) << 0) & 0x000000ff)
2747 
2748 #ifndef __ASSEMBLY__
2749 
2760 {
2761  uint32_t srbr : 8;
2762  uint32_t : 24;
2763 };
2764 
2766 typedef volatile struct ALT_UART_SRBR_s ALT_UART_SRBR_t;
2767 #endif /* __ASSEMBLY__ */
2768 
2770 #define ALT_UART_SRBR_OFST 0x30
2771 
2772 #define ALT_UART_SRBR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_OFST))
2773 
2806 #define ALT_UART_STHR_STHR_LSB 0
2807 
2808 #define ALT_UART_STHR_STHR_MSB 7
2809 
2810 #define ALT_UART_STHR_STHR_WIDTH 8
2811 
2812 #define ALT_UART_STHR_STHR_SET_MSK 0x000000ff
2813 
2814 #define ALT_UART_STHR_STHR_CLR_MSK 0xffffff00
2815 
2816 #define ALT_UART_STHR_STHR_RESET 0x0
2817 
2818 #define ALT_UART_STHR_STHR_GET(value) (((value) & 0x000000ff) >> 0)
2819 
2820 #define ALT_UART_STHR_STHR_SET(value) (((value) << 0) & 0x000000ff)
2821 
2822 #ifndef __ASSEMBLY__
2823 
2834 {
2835  uint32_t sthr : 8;
2836  uint32_t : 24;
2837 };
2838 
2840 typedef volatile struct ALT_UART_STHR_s ALT_UART_STHR_t;
2841 #endif /* __ASSEMBLY__ */
2842 
2844 #define ALT_UART_STHR_OFST 0x34
2845 
2846 #define ALT_UART_STHR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_STHR_OFST))
2847 
2887 #define ALT_UART_FAR_SRBR_STHR_E_DISD 0x0
2888 
2893 #define ALT_UART_FAR_SRBR_STHR_E_END 0x1
2894 
2896 #define ALT_UART_FAR_SRBR_STHR_LSB 0
2897 
2898 #define ALT_UART_FAR_SRBR_STHR_MSB 0
2899 
2900 #define ALT_UART_FAR_SRBR_STHR_WIDTH 1
2901 
2902 #define ALT_UART_FAR_SRBR_STHR_SET_MSK 0x00000001
2903 
2904 #define ALT_UART_FAR_SRBR_STHR_CLR_MSK 0xfffffffe
2905 
2906 #define ALT_UART_FAR_SRBR_STHR_RESET 0x0
2907 
2908 #define ALT_UART_FAR_SRBR_STHR_GET(value) (((value) & 0x00000001) >> 0)
2909 
2910 #define ALT_UART_FAR_SRBR_STHR_SET(value) (((value) << 0) & 0x00000001)
2911 
2912 #ifndef __ASSEMBLY__
2913 
2924 {
2925  uint32_t srbr_sthr : 1;
2926  uint32_t : 31;
2927 };
2928 
2930 typedef volatile struct ALT_UART_FAR_s ALT_UART_FAR_t;
2931 #endif /* __ASSEMBLY__ */
2932 
2934 #define ALT_UART_FAR_OFST 0x70
2935 
2936 #define ALT_UART_FAR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_FAR_OFST))
2937 
2964 #define ALT_UART_TFR_TFR_LSB 0
2965 
2966 #define ALT_UART_TFR_TFR_MSB 7
2967 
2968 #define ALT_UART_TFR_TFR_WIDTH 8
2969 
2970 #define ALT_UART_TFR_TFR_SET_MSK 0x000000ff
2971 
2972 #define ALT_UART_TFR_TFR_CLR_MSK 0xffffff00
2973 
2974 #define ALT_UART_TFR_TFR_RESET 0x0
2975 
2976 #define ALT_UART_TFR_TFR_GET(value) (((value) & 0x000000ff) >> 0)
2977 
2978 #define ALT_UART_TFR_TFR_SET(value) (((value) << 0) & 0x000000ff)
2979 
2980 #ifndef __ASSEMBLY__
2981 
2992 {
2993  const uint32_t tfr : 8;
2994  uint32_t : 24;
2995 };
2996 
2998 typedef volatile struct ALT_UART_TFR_s ALT_UART_TFR_t;
2999 #endif /* __ASSEMBLY__ */
3000 
3002 #define ALT_UART_TFR_OFST 0x74
3003 
3004 #define ALT_UART_TFR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_TFR_OFST))
3005 
3034 #define ALT_UART_RFW_RFWD_LSB 0
3035 
3036 #define ALT_UART_RFW_RFWD_MSB 7
3037 
3038 #define ALT_UART_RFW_RFWD_WIDTH 8
3039 
3040 #define ALT_UART_RFW_RFWD_SET_MSK 0x000000ff
3041 
3042 #define ALT_UART_RFW_RFWD_CLR_MSK 0xffffff00
3043 
3044 #define ALT_UART_RFW_RFWD_RESET 0x0
3045 
3046 #define ALT_UART_RFW_RFWD_GET(value) (((value) & 0x000000ff) >> 0)
3047 
3048 #define ALT_UART_RFW_RFWD_SET(value) (((value) << 0) & 0x000000ff)
3049 
3062 #define ALT_UART_RFW_RFPE_LSB 8
3063 
3064 #define ALT_UART_RFW_RFPE_MSB 8
3065 
3066 #define ALT_UART_RFW_RFPE_WIDTH 1
3067 
3068 #define ALT_UART_RFW_RFPE_SET_MSK 0x00000100
3069 
3070 #define ALT_UART_RFW_RFPE_CLR_MSK 0xfffffeff
3071 
3072 #define ALT_UART_RFW_RFPE_RESET 0x0
3073 
3074 #define ALT_UART_RFW_RFPE_GET(value) (((value) & 0x00000100) >> 8)
3075 
3076 #define ALT_UART_RFW_RFPE_SET(value) (((value) << 8) & 0x00000100)
3077 
3090 #define ALT_UART_RFW_RFFE_LSB 9
3091 
3092 #define ALT_UART_RFW_RFFE_MSB 9
3093 
3094 #define ALT_UART_RFW_RFFE_WIDTH 1
3095 
3096 #define ALT_UART_RFW_RFFE_SET_MSK 0x00000200
3097 
3098 #define ALT_UART_RFW_RFFE_CLR_MSK 0xfffffdff
3099 
3100 #define ALT_UART_RFW_RFFE_RESET 0x0
3101 
3102 #define ALT_UART_RFW_RFFE_GET(value) (((value) & 0x00000200) >> 9)
3103 
3104 #define ALT_UART_RFW_RFFE_SET(value) (((value) << 9) & 0x00000200)
3105 
3106 #ifndef __ASSEMBLY__
3107 
3118 {
3119  uint32_t rfwd : 8;
3120  uint32_t rfpe : 1;
3121  uint32_t RFFE : 1;
3122  uint32_t : 22;
3123 };
3124 
3126 typedef volatile struct ALT_UART_RFW_s ALT_UART_RFW_t;
3127 #endif /* __ASSEMBLY__ */
3128 
3130 #define ALT_UART_RFW_OFST 0x78
3131 
3132 #define ALT_UART_RFW_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RFW_OFST))
3133 
3172 #define ALT_UART_USR_TFNF_E_FULL 0x0
3173 
3178 #define ALT_UART_USR_TFNF_E_NOTFULL 0x1
3179 
3181 #define ALT_UART_USR_TFNF_LSB 1
3182 
3183 #define ALT_UART_USR_TFNF_MSB 1
3184 
3185 #define ALT_UART_USR_TFNF_WIDTH 1
3186 
3187 #define ALT_UART_USR_TFNF_SET_MSK 0x00000002
3188 
3189 #define ALT_UART_USR_TFNF_CLR_MSK 0xfffffffd
3190 
3191 #define ALT_UART_USR_TFNF_RESET 0x1
3192 
3193 #define ALT_UART_USR_TFNF_GET(value) (((value) & 0x00000002) >> 1)
3194 
3195 #define ALT_UART_USR_TFNF_SET(value) (((value) << 1) & 0x00000002)
3196 
3218 #define ALT_UART_USR_TFE_E_NOTEMPTY 0x0
3219 
3224 #define ALT_UART_USR_TFE_E_EMPTY 0x1
3225 
3227 #define ALT_UART_USR_TFE_LSB 2
3228 
3229 #define ALT_UART_USR_TFE_MSB 2
3230 
3231 #define ALT_UART_USR_TFE_WIDTH 1
3232 
3233 #define ALT_UART_USR_TFE_SET_MSK 0x00000004
3234 
3235 #define ALT_UART_USR_TFE_CLR_MSK 0xfffffffb
3236 
3237 #define ALT_UART_USR_TFE_RESET 0x1
3238 
3239 #define ALT_UART_USR_TFE_GET(value) (((value) & 0x00000004) >> 2)
3240 
3241 #define ALT_UART_USR_TFE_SET(value) (((value) << 2) & 0x00000004)
3242 
3264 #define ALT_UART_USR_RFNE_E_EMPTY 0x0
3265 
3270 #define ALT_UART_USR_RFNE_E_NOTEMPTY 0x1
3271 
3273 #define ALT_UART_USR_RFNE_LSB 3
3274 
3275 #define ALT_UART_USR_RFNE_MSB 3
3276 
3277 #define ALT_UART_USR_RFNE_WIDTH 1
3278 
3279 #define ALT_UART_USR_RFNE_SET_MSK 0x00000008
3280 
3281 #define ALT_UART_USR_RFNE_CLR_MSK 0xfffffff7
3282 
3283 #define ALT_UART_USR_RFNE_RESET 0x0
3284 
3285 #define ALT_UART_USR_RFNE_GET(value) (((value) & 0x00000008) >> 3)
3286 
3287 #define ALT_UART_USR_RFNE_SET(value) (((value) << 3) & 0x00000008)
3288 
3310 #define ALT_UART_USR_RFF_E_NOTFULL 0x0
3311 
3316 #define ALT_UART_USR_RFF_E_FULL 0x1
3317 
3319 #define ALT_UART_USR_RFF_LSB 4
3320 
3321 #define ALT_UART_USR_RFF_MSB 4
3322 
3323 #define ALT_UART_USR_RFF_WIDTH 1
3324 
3325 #define ALT_UART_USR_RFF_SET_MSK 0x00000010
3326 
3327 #define ALT_UART_USR_RFF_CLR_MSK 0xffffffef
3328 
3329 #define ALT_UART_USR_RFF_RESET 0x0
3330 
3331 #define ALT_UART_USR_RFF_GET(value) (((value) & 0x00000010) >> 4)
3332 
3333 #define ALT_UART_USR_RFF_SET(value) (((value) << 4) & 0x00000010)
3334 
3335 #ifndef __ASSEMBLY__
3336 
3347 {
3348  uint32_t : 1;
3349  const uint32_t tfnf : 1;
3350  const uint32_t tfe : 1;
3351  const uint32_t rfne : 1;
3352  const uint32_t rff : 1;
3353  uint32_t : 27;
3354 };
3355 
3357 typedef volatile struct ALT_UART_USR_s ALT_UART_USR_t;
3358 #endif /* __ASSEMBLY__ */
3359 
3361 #define ALT_UART_USR_OFST 0x7c
3362 
3363 #define ALT_UART_USR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_USR_OFST))
3364 
3388 #define ALT_UART_TFL_TFL_LSB 0
3389 
3390 #define ALT_UART_TFL_TFL_MSB 4
3391 
3392 #define ALT_UART_TFL_TFL_WIDTH 5
3393 
3394 #define ALT_UART_TFL_TFL_SET_MSK 0x0000001f
3395 
3396 #define ALT_UART_TFL_TFL_CLR_MSK 0xffffffe0
3397 
3398 #define ALT_UART_TFL_TFL_RESET 0x0
3399 
3400 #define ALT_UART_TFL_TFL_GET(value) (((value) & 0x0000001f) >> 0)
3401 
3402 #define ALT_UART_TFL_TFL_SET(value) (((value) << 0) & 0x0000001f)
3403 
3404 #ifndef __ASSEMBLY__
3405 
3416 {
3417  const uint32_t tfl : 5;
3418  uint32_t : 27;
3419 };
3420 
3422 typedef volatile struct ALT_UART_TFL_s ALT_UART_TFL_t;
3423 #endif /* __ASSEMBLY__ */
3424 
3426 #define ALT_UART_TFL_OFST 0x80
3427 
3428 #define ALT_UART_TFL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_TFL_OFST))
3429 
3453 #define ALT_UART_RFL_RFL_LSB 0
3454 
3455 #define ALT_UART_RFL_RFL_MSB 4
3456 
3457 #define ALT_UART_RFL_RFL_WIDTH 5
3458 
3459 #define ALT_UART_RFL_RFL_SET_MSK 0x0000001f
3460 
3461 #define ALT_UART_RFL_RFL_CLR_MSK 0xffffffe0
3462 
3463 #define ALT_UART_RFL_RFL_RESET 0x0
3464 
3465 #define ALT_UART_RFL_RFL_GET(value) (((value) & 0x0000001f) >> 0)
3466 
3467 #define ALT_UART_RFL_RFL_SET(value) (((value) << 0) & 0x0000001f)
3468 
3469 #ifndef __ASSEMBLY__
3470 
3481 {
3482  const uint32_t rfl : 5;
3483  uint32_t : 27;
3484 };
3485 
3487 typedef volatile struct ALT_UART_RFL_s ALT_UART_RFL_t;
3488 #endif /* __ASSEMBLY__ */
3489 
3491 #define ALT_UART_RFL_OFST 0x84
3492 
3493 #define ALT_UART_RFL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RFL_OFST))
3494 
3531 #define ALT_UART_SRR_UR_E_NORST 0x0
3532 
3537 #define ALT_UART_SRR_UR_E_RST 0x1
3538 
3540 #define ALT_UART_SRR_UR_LSB 0
3541 
3542 #define ALT_UART_SRR_UR_MSB 0
3543 
3544 #define ALT_UART_SRR_UR_WIDTH 1
3545 
3546 #define ALT_UART_SRR_UR_SET_MSK 0x00000001
3547 
3548 #define ALT_UART_SRR_UR_CLR_MSK 0xfffffffe
3549 
3550 #define ALT_UART_SRR_UR_RESET 0x0
3551 
3552 #define ALT_UART_SRR_UR_GET(value) (((value) & 0x00000001) >> 0)
3553 
3554 #define ALT_UART_SRR_UR_SET(value) (((value) << 0) & 0x00000001)
3555 
3581 #define ALT_UART_SRR_RFR_E_NORST 0x0
3582 
3587 #define ALT_UART_SRR_RFR_E_RST 0x1
3588 
3590 #define ALT_UART_SRR_RFR_LSB 1
3591 
3592 #define ALT_UART_SRR_RFR_MSB 1
3593 
3594 #define ALT_UART_SRR_RFR_WIDTH 1
3595 
3596 #define ALT_UART_SRR_RFR_SET_MSK 0x00000002
3597 
3598 #define ALT_UART_SRR_RFR_CLR_MSK 0xfffffffd
3599 
3600 #define ALT_UART_SRR_RFR_RESET 0x0
3601 
3602 #define ALT_UART_SRR_RFR_GET(value) (((value) & 0x00000002) >> 1)
3603 
3604 #define ALT_UART_SRR_RFR_SET(value) (((value) << 1) & 0x00000002)
3605 
3630 #define ALT_UART_SRR_XFR_E_NORST 0x0
3631 
3636 #define ALT_UART_SRR_XFR_E_RST 0x1
3637 
3639 #define ALT_UART_SRR_XFR_LSB 2
3640 
3641 #define ALT_UART_SRR_XFR_MSB 2
3642 
3643 #define ALT_UART_SRR_XFR_WIDTH 1
3644 
3645 #define ALT_UART_SRR_XFR_SET_MSK 0x00000004
3646 
3647 #define ALT_UART_SRR_XFR_CLR_MSK 0xfffffffb
3648 
3649 #define ALT_UART_SRR_XFR_RESET 0x0
3650 
3651 #define ALT_UART_SRR_XFR_GET(value) (((value) & 0x00000004) >> 2)
3652 
3653 #define ALT_UART_SRR_XFR_SET(value) (((value) << 2) & 0x00000004)
3654 
3655 #ifndef __ASSEMBLY__
3656 
3667 {
3668  uint32_t ur : 1;
3669  uint32_t rfr : 1;
3670  uint32_t xfr : 1;
3671  uint32_t : 29;
3672 };
3673 
3675 typedef volatile struct ALT_UART_SRR_s ALT_UART_SRR_t;
3676 #endif /* __ASSEMBLY__ */
3677 
3679 #define ALT_UART_SRR_OFST 0x88
3680 
3681 #define ALT_UART_SRR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRR_OFST))
3682 
3727 #define ALT_UART_SRTS_SRTS_E_LOGIC0 0x1
3728 
3733 #define ALT_UART_SRTS_SRTS_E_LOGIC1 0x0
3734 
3736 #define ALT_UART_SRTS_SRTS_LSB 0
3737 
3738 #define ALT_UART_SRTS_SRTS_MSB 0
3739 
3740 #define ALT_UART_SRTS_SRTS_WIDTH 1
3741 
3742 #define ALT_UART_SRTS_SRTS_SET_MSK 0x00000001
3743 
3744 #define ALT_UART_SRTS_SRTS_CLR_MSK 0xfffffffe
3745 
3746 #define ALT_UART_SRTS_SRTS_RESET 0x0
3747 
3748 #define ALT_UART_SRTS_SRTS_GET(value) (((value) & 0x00000001) >> 0)
3749 
3750 #define ALT_UART_SRTS_SRTS_SET(value) (((value) << 0) & 0x00000001)
3751 
3752 #ifndef __ASSEMBLY__
3753 
3764 {
3765  uint32_t srts : 1;
3766  uint32_t : 31;
3767 };
3768 
3770 typedef volatile struct ALT_UART_SRTS_s ALT_UART_SRTS_t;
3771 #endif /* __ASSEMBLY__ */
3772 
3774 #define ALT_UART_SRTS_OFST 0x8c
3775 
3776 #define ALT_UART_SRTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRTS_OFST))
3777 
3817 #define ALT_UART_SBCR_SBCR_E_DISD 0x0
3818 
3823 #define ALT_UART_SBCR_SBCR_E_END 0x1
3824 
3826 #define ALT_UART_SBCR_SBCR_LSB 0
3827 
3828 #define ALT_UART_SBCR_SBCR_MSB 0
3829 
3830 #define ALT_UART_SBCR_SBCR_WIDTH 1
3831 
3832 #define ALT_UART_SBCR_SBCR_SET_MSK 0x00000001
3833 
3834 #define ALT_UART_SBCR_SBCR_CLR_MSK 0xfffffffe
3835 
3836 #define ALT_UART_SBCR_SBCR_RESET 0x0
3837 
3838 #define ALT_UART_SBCR_SBCR_GET(value) (((value) & 0x00000001) >> 0)
3839 
3840 #define ALT_UART_SBCR_SBCR_SET(value) (((value) << 0) & 0x00000001)
3841 
3842 #ifndef __ASSEMBLY__
3843 
3854 {
3855  uint32_t sbcr : 1;
3856  uint32_t : 31;
3857 };
3858 
3860 typedef volatile struct ALT_UART_SBCR_s ALT_UART_SBCR_t;
3861 #endif /* __ASSEMBLY__ */
3862 
3864 #define ALT_UART_SBCR_OFST 0x90
3865 
3866 #define ALT_UART_SBCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SBCR_OFST))
3867 
3903 #define ALT_UART_SDMAM_SDMAM_E_SINGLE 0x0
3904 
3909 #define ALT_UART_SDMAM_SDMAM_E_MULT 0x1
3910 
3912 #define ALT_UART_SDMAM_SDMAM_LSB 0
3913 
3914 #define ALT_UART_SDMAM_SDMAM_MSB 0
3915 
3916 #define ALT_UART_SDMAM_SDMAM_WIDTH 1
3917 
3918 #define ALT_UART_SDMAM_SDMAM_SET_MSK 0x00000001
3919 
3920 #define ALT_UART_SDMAM_SDMAM_CLR_MSK 0xfffffffe
3921 
3922 #define ALT_UART_SDMAM_SDMAM_RESET 0x0
3923 
3924 #define ALT_UART_SDMAM_SDMAM_GET(value) (((value) & 0x00000001) >> 0)
3925 
3926 #define ALT_UART_SDMAM_SDMAM_SET(value) (((value) << 0) & 0x00000001)
3927 
3928 #ifndef __ASSEMBLY__
3929 
3940 {
3941  uint32_t sdmam : 1;
3942  uint32_t : 31;
3943 };
3944 
3946 typedef volatile struct ALT_UART_SDMAM_s ALT_UART_SDMAM_t;
3947 #endif /* __ASSEMBLY__ */
3948 
3950 #define ALT_UART_SDMAM_OFST 0x94
3951 
3952 #define ALT_UART_SDMAM_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SDMAM_OFST))
3953 
3991 #define ALT_UART_SFE_SFE_E_DISD 0x0
3992 
3997 #define ALT_UART_SFE_SFE_E_END 0x1
3998 
4000 #define ALT_UART_SFE_SFE_LSB 0
4001 
4002 #define ALT_UART_SFE_SFE_MSB 0
4003 
4004 #define ALT_UART_SFE_SFE_WIDTH 1
4005 
4006 #define ALT_UART_SFE_SFE_SET_MSK 0x00000001
4007 
4008 #define ALT_UART_SFE_SFE_CLR_MSK 0xfffffffe
4009 
4010 #define ALT_UART_SFE_SFE_RESET 0x0
4011 
4012 #define ALT_UART_SFE_SFE_GET(value) (((value) & 0x00000001) >> 0)
4013 
4014 #define ALT_UART_SFE_SFE_SET(value) (((value) << 0) & 0x00000001)
4015 
4016 #ifndef __ASSEMBLY__
4017 
4028 {
4029  uint32_t sfe : 1;
4030  uint32_t : 31;
4031 };
4032 
4034 typedef volatile struct ALT_UART_SFE_s ALT_UART_SFE_t;
4035 #endif /* __ASSEMBLY__ */
4036 
4038 #define ALT_UART_SFE_OFST 0x98
4039 
4040 #define ALT_UART_SFE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SFE_OFST))
4041 
4083 #define ALT_UART_SRT_SRT_E_ONECHAR 0x0
4084 
4089 #define ALT_UART_SRT_SRT_E_QUARTERFULL 0x1
4090 
4095 #define ALT_UART_SRT_SRT_E_HALFFULL 0x2
4096 
4101 #define ALT_UART_SRT_SRT_E_FULLLESS2 0x3
4102 
4104 #define ALT_UART_SRT_SRT_LSB 0
4105 
4106 #define ALT_UART_SRT_SRT_MSB 1
4107 
4108 #define ALT_UART_SRT_SRT_WIDTH 2
4109 
4110 #define ALT_UART_SRT_SRT_SET_MSK 0x00000003
4111 
4112 #define ALT_UART_SRT_SRT_CLR_MSK 0xfffffffc
4113 
4114 #define ALT_UART_SRT_SRT_RESET 0x0
4115 
4116 #define ALT_UART_SRT_SRT_GET(value) (((value) & 0x00000003) >> 0)
4117 
4118 #define ALT_UART_SRT_SRT_SET(value) (((value) << 0) & 0x00000003)
4119 
4120 #ifndef __ASSEMBLY__
4121 
4132 {
4133  uint32_t srt : 2;
4134  uint32_t : 30;
4135 };
4136 
4138 typedef volatile struct ALT_UART_SRT_s ALT_UART_SRT_t;
4139 #endif /* __ASSEMBLY__ */
4140 
4142 #define ALT_UART_SRT_OFST 0x9c
4143 
4144 #define ALT_UART_SRT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRT_OFST))
4145 
4185 #define ALT_UART_STET_STET_E_FIFOEMPTY 0x0
4186 
4191 #define ALT_UART_STET_STET_E_TWOCHARS 0x1
4192 
4197 #define ALT_UART_STET_STET_E_QUARTERFULL 0x2
4198 
4203 #define ALT_UART_STET_STET_E_HALFFULL 0x3
4204 
4206 #define ALT_UART_STET_STET_LSB 0
4207 
4208 #define ALT_UART_STET_STET_MSB 1
4209 
4210 #define ALT_UART_STET_STET_WIDTH 2
4211 
4212 #define ALT_UART_STET_STET_SET_MSK 0x00000003
4213 
4214 #define ALT_UART_STET_STET_CLR_MSK 0xfffffffc
4215 
4216 #define ALT_UART_STET_STET_RESET 0x0
4217 
4218 #define ALT_UART_STET_STET_GET(value) (((value) & 0x00000003) >> 0)
4219 
4220 #define ALT_UART_STET_STET_SET(value) (((value) << 0) & 0x00000003)
4221 
4222 #ifndef __ASSEMBLY__
4223 
4234 {
4235  uint32_t stet : 2;
4236  uint32_t : 30;
4237 };
4238 
4240 typedef volatile struct ALT_UART_STET_s ALT_UART_STET_t;
4241 #endif /* __ASSEMBLY__ */
4242 
4244 #define ALT_UART_STET_OFST 0xa0
4245 
4246 #define ALT_UART_STET_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_STET_OFST))
4247 
4285 #define ALT_UART_HTX_HTX_E_DISD 0x0
4286 
4291 #define ALT_UART_HTX_HTX_E_END 0x1
4292 
4294 #define ALT_UART_HTX_HTX_LSB 0
4295 
4296 #define ALT_UART_HTX_HTX_MSB 0
4297 
4298 #define ALT_UART_HTX_HTX_WIDTH 1
4299 
4300 #define ALT_UART_HTX_HTX_SET_MSK 0x00000001
4301 
4302 #define ALT_UART_HTX_HTX_CLR_MSK 0xfffffffe
4303 
4304 #define ALT_UART_HTX_HTX_RESET 0x0
4305 
4306 #define ALT_UART_HTX_HTX_GET(value) (((value) & 0x00000001) >> 0)
4307 
4308 #define ALT_UART_HTX_HTX_SET(value) (((value) << 0) & 0x00000001)
4309 
4310 #ifndef __ASSEMBLY__
4311 
4322 {
4323  uint32_t htx : 1;
4324  uint32_t : 31;
4325 };
4326 
4328 typedef volatile struct ALT_UART_HTX_s ALT_UART_HTX_t;
4329 #endif /* __ASSEMBLY__ */
4330 
4332 #define ALT_UART_HTX_OFST 0xa4
4333 
4334 #define ALT_UART_HTX_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_HTX_OFST))
4335 
4362 #define ALT_UART_DMASA_DMASA_LSB 0
4363 
4364 #define ALT_UART_DMASA_DMASA_MSB 0
4365 
4366 #define ALT_UART_DMASA_DMASA_WIDTH 1
4367 
4368 #define ALT_UART_DMASA_DMASA_SET_MSK 0x00000001
4369 
4370 #define ALT_UART_DMASA_DMASA_CLR_MSK 0xfffffffe
4371 
4372 #define ALT_UART_DMASA_DMASA_RESET 0x0
4373 
4374 #define ALT_UART_DMASA_DMASA_GET(value) (((value) & 0x00000001) >> 0)
4375 
4376 #define ALT_UART_DMASA_DMASA_SET(value) (((value) << 0) & 0x00000001)
4377 
4378 #ifndef __ASSEMBLY__
4379 
4390 {
4391  uint32_t dmasa : 1;
4392  uint32_t : 31;
4393 };
4394 
4396 typedef volatile struct ALT_UART_DMASA_s ALT_UART_DMASA_t;
4397 #endif /* __ASSEMBLY__ */
4398 
4400 #define ALT_UART_DMASA_OFST 0xa8
4401 
4402 #define ALT_UART_DMASA_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_DMASA_OFST))
4403 
4449 #define ALT_UART_CPR_APBDATAWIDTH_E_WIDTH32BITS 0x2
4450 
4452 #define ALT_UART_CPR_APBDATAWIDTH_LSB 0
4453 
4454 #define ALT_UART_CPR_APBDATAWIDTH_MSB 1
4455 
4456 #define ALT_UART_CPR_APBDATAWIDTH_WIDTH 2
4457 
4458 #define ALT_UART_CPR_APBDATAWIDTH_SET_MSK 0x00000003
4459 
4460 #define ALT_UART_CPR_APBDATAWIDTH_CLR_MSK 0xfffffffc
4461 
4462 #define ALT_UART_CPR_APBDATAWIDTH_RESET 0x2
4463 
4464 #define ALT_UART_CPR_APBDATAWIDTH_GET(value) (((value) & 0x00000003) >> 0)
4465 
4466 #define ALT_UART_CPR_APBDATAWIDTH_SET(value) (((value) << 0) & 0x00000003)
4467 
4487 #define ALT_UART_CPR_AFCE_MOD_E_END 0x1
4488 
4490 #define ALT_UART_CPR_AFCE_MOD_LSB 4
4491 
4492 #define ALT_UART_CPR_AFCE_MOD_MSB 4
4493 
4494 #define ALT_UART_CPR_AFCE_MOD_WIDTH 1
4495 
4496 #define ALT_UART_CPR_AFCE_MOD_SET_MSK 0x00000010
4497 
4498 #define ALT_UART_CPR_AFCE_MOD_CLR_MSK 0xffffffef
4499 
4500 #define ALT_UART_CPR_AFCE_MOD_RESET 0x1
4501 
4502 #define ALT_UART_CPR_AFCE_MOD_GET(value) (((value) & 0x00000010) >> 4)
4503 
4504 #define ALT_UART_CPR_AFCE_MOD_SET(value) (((value) << 4) & 0x00000010)
4505 
4526 #define ALT_UART_CPR_THRE_MOD_E_END 0x1
4527 
4529 #define ALT_UART_CPR_THRE_MOD_LSB 5
4530 
4531 #define ALT_UART_CPR_THRE_MOD_MSB 5
4532 
4533 #define ALT_UART_CPR_THRE_MOD_WIDTH 1
4534 
4535 #define ALT_UART_CPR_THRE_MOD_SET_MSK 0x00000020
4536 
4537 #define ALT_UART_CPR_THRE_MOD_CLR_MSK 0xffffffdf
4538 
4539 #define ALT_UART_CPR_THRE_MOD_RESET 0x1
4540 
4541 #define ALT_UART_CPR_THRE_MOD_GET(value) (((value) & 0x00000020) >> 5)
4542 
4543 #define ALT_UART_CPR_THRE_MOD_SET(value) (((value) << 5) & 0x00000020)
4544 
4564 #define ALT_UART_CPR_SIR_MOD_E_DISD 0x0
4565 
4567 #define ALT_UART_CPR_SIR_MOD_LSB 6
4568 
4569 #define ALT_UART_CPR_SIR_MOD_MSB 6
4570 
4571 #define ALT_UART_CPR_SIR_MOD_WIDTH 1
4572 
4573 #define ALT_UART_CPR_SIR_MOD_SET_MSK 0x00000040
4574 
4575 #define ALT_UART_CPR_SIR_MOD_CLR_MSK 0xffffffbf
4576 
4577 #define ALT_UART_CPR_SIR_MOD_RESET 0x0
4578 
4579 #define ALT_UART_CPR_SIR_MOD_GET(value) (((value) & 0x00000040) >> 6)
4580 
4581 #define ALT_UART_CPR_SIR_MOD_SET(value) (((value) << 6) & 0x00000040)
4582 
4602 #define ALT_UART_CPR_SIR_LP_MOD_E_DISD 0x0
4603 
4605 #define ALT_UART_CPR_SIR_LP_MOD_LSB 7
4606 
4607 #define ALT_UART_CPR_SIR_LP_MOD_MSB 7
4608 
4609 #define ALT_UART_CPR_SIR_LP_MOD_WIDTH 1
4610 
4611 #define ALT_UART_CPR_SIR_LP_MOD_SET_MSK 0x00000080
4612 
4613 #define ALT_UART_CPR_SIR_LP_MOD_CLR_MSK 0xffffff7f
4614 
4615 #define ALT_UART_CPR_SIR_LP_MOD_RESET 0x0
4616 
4617 #define ALT_UART_CPR_SIR_LP_MOD_GET(value) (((value) & 0x00000080) >> 7)
4618 
4619 #define ALT_UART_CPR_SIR_LP_MOD_SET(value) (((value) << 7) & 0x00000080)
4620 
4641 #define ALT_UART_CPR_ADDITIONAL_FEAT_E_END 0x1
4642 
4644 #define ALT_UART_CPR_ADDITIONAL_FEAT_LSB 8
4645 
4646 #define ALT_UART_CPR_ADDITIONAL_FEAT_MSB 8
4647 
4648 #define ALT_UART_CPR_ADDITIONAL_FEAT_WIDTH 1
4649 
4650 #define ALT_UART_CPR_ADDITIONAL_FEAT_SET_MSK 0x00000100
4651 
4652 #define ALT_UART_CPR_ADDITIONAL_FEAT_CLR_MSK 0xfffffeff
4653 
4654 #define ALT_UART_CPR_ADDITIONAL_FEAT_RESET 0x1
4655 
4656 #define ALT_UART_CPR_ADDITIONAL_FEAT_GET(value) (((value) & 0x00000100) >> 8)
4657 
4658 #define ALT_UART_CPR_ADDITIONAL_FEAT_SET(value) (((value) << 8) & 0x00000100)
4659 
4681 #define ALT_UART_CPR_FIFO_ACCESS_E_END 0x1
4682 
4684 #define ALT_UART_CPR_FIFO_ACCESS_LSB 9
4685 
4686 #define ALT_UART_CPR_FIFO_ACCESS_MSB 9
4687 
4688 #define ALT_UART_CPR_FIFO_ACCESS_WIDTH 1
4689 
4690 #define ALT_UART_CPR_FIFO_ACCESS_SET_MSK 0x00000200
4691 
4692 #define ALT_UART_CPR_FIFO_ACCESS_CLR_MSK 0xfffffdff
4693 
4694 #define ALT_UART_CPR_FIFO_ACCESS_RESET 0x1
4695 
4696 #define ALT_UART_CPR_FIFO_ACCESS_GET(value) (((value) & 0x00000200) >> 9)
4697 
4698 #define ALT_UART_CPR_FIFO_ACCESS_SET(value) (((value) << 9) & 0x00000200)
4699 
4719 #define ALT_UART_CPR_FIFO_STAT_E_END 0x1
4720 
4722 #define ALT_UART_CPR_FIFO_STAT_LSB 10
4723 
4724 #define ALT_UART_CPR_FIFO_STAT_MSB 10
4725 
4726 #define ALT_UART_CPR_FIFO_STAT_WIDTH 1
4727 
4728 #define ALT_UART_CPR_FIFO_STAT_SET_MSK 0x00000400
4729 
4730 #define ALT_UART_CPR_FIFO_STAT_CLR_MSK 0xfffffbff
4731 
4732 #define ALT_UART_CPR_FIFO_STAT_RESET 0x1
4733 
4734 #define ALT_UART_CPR_FIFO_STAT_GET(value) (((value) & 0x00000400) >> 10)
4735 
4736 #define ALT_UART_CPR_FIFO_STAT_SET(value) (((value) << 10) & 0x00000400)
4737 
4760 #define ALT_UART_CPR_SHADOW_E_END 0x1
4761 
4763 #define ALT_UART_CPR_SHADOW_LSB 11
4764 
4765 #define ALT_UART_CPR_SHADOW_MSB 11
4766 
4767 #define ALT_UART_CPR_SHADOW_WIDTH 1
4768 
4769 #define ALT_UART_CPR_SHADOW_SET_MSK 0x00000800
4770 
4771 #define ALT_UART_CPR_SHADOW_CLR_MSK 0xfffff7ff
4772 
4773 #define ALT_UART_CPR_SHADOW_RESET 0x1
4774 
4775 #define ALT_UART_CPR_SHADOW_GET(value) (((value) & 0x00000800) >> 11)
4776 
4777 #define ALT_UART_CPR_SHADOW_SET(value) (((value) << 11) & 0x00000800)
4778 
4798 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_E_END 0x1
4799 
4801 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_LSB 12
4802 
4803 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_MSB 12
4804 
4805 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_WIDTH 1
4806 
4807 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_SET_MSK 0x00001000
4808 
4809 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_CLR_MSK 0xffffefff
4810 
4811 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_RESET 0x1
4812 
4813 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_GET(value) (((value) & 0x00001000) >> 12)
4814 
4815 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_SET(value) (((value) << 12) & 0x00001000)
4816 
4836 #define ALT_UART_CPR_DMA_EXTRA_E_END 0x1
4837 
4839 #define ALT_UART_CPR_DMA_EXTRA_LSB 13
4840 
4841 #define ALT_UART_CPR_DMA_EXTRA_MSB 13
4842 
4843 #define ALT_UART_CPR_DMA_EXTRA_WIDTH 1
4844 
4845 #define ALT_UART_CPR_DMA_EXTRA_SET_MSK 0x00002000
4846 
4847 #define ALT_UART_CPR_DMA_EXTRA_CLR_MSK 0xffffdfff
4848 
4849 #define ALT_UART_CPR_DMA_EXTRA_RESET 0x1
4850 
4851 #define ALT_UART_CPR_DMA_EXTRA_GET(value) (((value) & 0x00002000) >> 13)
4852 
4853 #define ALT_UART_CPR_DMA_EXTRA_SET(value) (((value) << 13) & 0x00002000)
4854 
4874 #define ALT_UART_CPR_FIFO_MOD_E_FIFO128BYTES 0x80
4875 
4877 #define ALT_UART_CPR_FIFO_MOD_LSB 16
4878 
4879 #define ALT_UART_CPR_FIFO_MOD_MSB 23
4880 
4881 #define ALT_UART_CPR_FIFO_MOD_WIDTH 8
4882 
4883 #define ALT_UART_CPR_FIFO_MOD_SET_MSK 0x00ff0000
4884 
4885 #define ALT_UART_CPR_FIFO_MOD_CLR_MSK 0xff00ffff
4886 
4887 #define ALT_UART_CPR_FIFO_MOD_RESET 0x37
4888 
4889 #define ALT_UART_CPR_FIFO_MOD_GET(value) (((value) & 0x00ff0000) >> 16)
4890 
4891 #define ALT_UART_CPR_FIFO_MOD_SET(value) (((value) << 16) & 0x00ff0000)
4892 
4893 #ifndef __ASSEMBLY__
4894 
4905 {
4906  const uint32_t apbdatawidth : 2;
4907  uint32_t : 2;
4908  const uint32_t afce_mode : 1;
4909  const uint32_t thre_mode : 1;
4910  const uint32_t sir_mode : 1;
4911  const uint32_t sir_lp_mode : 1;
4912  const uint32_t additional_feat : 1;
4913  const uint32_t fifo_access : 1;
4914  const uint32_t fifo_stat : 1;
4915  const uint32_t shadow : 1;
4916  const uint32_t uart_add_encoded_param : 1;
4917  const uint32_t dma_extra : 1;
4918  uint32_t : 2;
4919  const uint32_t fifo_mode : 8;
4920  uint32_t : 8;
4921 };
4922 
4924 typedef volatile struct ALT_UART_CPR_s ALT_UART_CPR_t;
4925 #endif /* __ASSEMBLY__ */
4926 
4928 #define ALT_UART_CPR_OFST 0xf4
4929 
4930 #define ALT_UART_CPR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_CPR_OFST))
4931 
4954 #define ALT_UART_UCV_UART_COMPONENT_VER_LSB 0
4955 
4956 #define ALT_UART_UCV_UART_COMPONENT_VER_MSB 31
4957 
4958 #define ALT_UART_UCV_UART_COMPONENT_VER_WIDTH 32
4959 
4960 #define ALT_UART_UCV_UART_COMPONENT_VER_SET_MSK 0xffffffff
4961 
4962 #define ALT_UART_UCV_UART_COMPONENT_VER_CLR_MSK 0x00000000
4963 
4964 #define ALT_UART_UCV_UART_COMPONENT_VER_RESET 0x3331312a
4965 
4966 #define ALT_UART_UCV_UART_COMPONENT_VER_GET(value) (((value) & 0xffffffff) >> 0)
4967 
4968 #define ALT_UART_UCV_UART_COMPONENT_VER_SET(value) (((value) << 0) & 0xffffffff)
4969 
4970 #ifndef __ASSEMBLY__
4971 
4982 {
4983  const uint32_t uart_component_version : 32;
4984 };
4985 
4987 typedef volatile struct ALT_UART_UCV_s ALT_UART_UCV_t;
4988 #endif /* __ASSEMBLY__ */
4989 
4991 #define ALT_UART_UCV_OFST 0xf8
4992 
4993 #define ALT_UART_UCV_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_UCV_OFST))
4994 
5016 #define ALT_UART_CTR_PERIPHERAL_ID_LSB 0
5017 
5018 #define ALT_UART_CTR_PERIPHERAL_ID_MSB 31
5019 
5020 #define ALT_UART_CTR_PERIPHERAL_ID_WIDTH 32
5021 
5022 #define ALT_UART_CTR_PERIPHERAL_ID_SET_MSK 0xffffffff
5023 
5024 #define ALT_UART_CTR_PERIPHERAL_ID_CLR_MSK 0x00000000
5025 
5026 #define ALT_UART_CTR_PERIPHERAL_ID_RESET 0x44570110
5027 
5028 #define ALT_UART_CTR_PERIPHERAL_ID_GET(value) (((value) & 0xffffffff) >> 0)
5029 
5030 #define ALT_UART_CTR_PERIPHERAL_ID_SET(value) (((value) << 0) & 0xffffffff)
5031 
5032 #ifndef __ASSEMBLY__
5033 
5044 {
5045  const uint32_t peripheral_id : 32;
5046 };
5047 
5049 typedef volatile struct ALT_UART_CTR_s ALT_UART_CTR_t;
5050 #endif /* __ASSEMBLY__ */
5051 
5053 #define ALT_UART_CTR_OFST 0xfc
5054 
5055 #define ALT_UART_CTR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_CTR_OFST))
5056 
5057 #ifndef __ASSEMBLY__
5058 
5069 {
5073  union
5074  {
5075  volatile ALT_UART_IIR_t iir;
5076  volatile ALT_UART_FCR_t fcr;
5077  } _u_0x8;
5078  volatile ALT_UART_LCR_t lcr;
5079  volatile ALT_UART_MCR_t mcr;
5080  volatile ALT_UART_LSR_t lsr;
5081  volatile ALT_UART_MSR_t msr;
5082  volatile ALT_UART_SCR_t scr;
5083  volatile uint32_t _pad_0x20_0x2f[4];
5086  volatile uint32_t _pad_0x38_0x6f[14];
5087  volatile ALT_UART_FAR_t far;
5088  volatile ALT_UART_TFR_t tfr;
5089  volatile ALT_UART_RFW_t RFW;
5090  volatile ALT_UART_USR_t usr;
5091  volatile ALT_UART_TFL_t tfl;
5092  volatile ALT_UART_RFL_t rfl;
5093  volatile ALT_UART_SRR_t srr;
5097  volatile ALT_UART_SFE_t sfe;
5098  volatile ALT_UART_SRT_t srt;
5100  volatile ALT_UART_HTX_t htx;
5102  volatile uint32_t _pad_0xac_0xf3[18];
5103  volatile ALT_UART_CPR_t cpr;
5104  volatile ALT_UART_UCV_t ucv;
5105  volatile ALT_UART_CTR_t ctr;
5106 };
5107 
5109 typedef volatile struct ALT_UART_s ALT_UART_t;
5112 {
5113  volatile uint32_t rbr_thr_dll;
5114  volatile uint32_t ier_dlh;
5116  union
5117  {
5118  volatile uint32_t iir;
5119  volatile uint32_t fcr;
5120  } _u_0x8;
5121  volatile uint32_t lcr;
5122  volatile uint32_t mcr;
5123  volatile uint32_t lsr;
5124  volatile uint32_t msr;
5125  volatile uint32_t scr;
5126  volatile uint32_t _pad_0x20_0x2f[4];
5127  volatile uint32_t srbr;
5128  volatile uint32_t sthr;
5129  volatile uint32_t _pad_0x38_0x6f[14];
5130  volatile uint32_t far;
5131  volatile uint32_t tfr;
5132  volatile uint32_t RFW;
5133  volatile uint32_t usr;
5134  volatile uint32_t tfl;
5135  volatile uint32_t rfl;
5136  volatile uint32_t srr;
5137  volatile uint32_t srts;
5138  volatile uint32_t sbcr;
5139  volatile uint32_t sdmam;
5140  volatile uint32_t sfe;
5141  volatile uint32_t srt;
5142  volatile uint32_t stet;
5143  volatile uint32_t htx;
5144  volatile uint32_t dmasa;
5145  volatile uint32_t _pad_0xac_0xf3[18];
5146  volatile uint32_t cpr;
5147  volatile uint32_t ucv;
5148  volatile uint32_t ctr;
5149 };
5150 
5152 typedef volatile struct ALT_UART_raw_s ALT_UART_raw_t;
5153 #endif /* __ASSEMBLY__ */
5154 
5156 #ifdef __cplusplus
5157 }
5158 #endif /* __cplusplus */
5159 #endif /* __ALTERA_ALT_UART_H__ */
5160