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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Address restriction for multiplane commands
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG |
[31:1] | ??? | Unknown | UNDEFINED |
Field : flag | |
This flag must be set for devices which require that during multiplane operations all but the address for the last plane should have their address cycles tied low. The last plane address cycles has proper values. This ensures multiplane address restrictions in the device. Field Access Macros: | |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_LSB 0 |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_MSB 0 |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_WIDTH 1 |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_SET_MSK 0x00000001 |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_CLR_MSK 0xfffffffe |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_RESET 0x0 |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_SET(value) (((value) << 0) & 0x00000001) |
Data Structures | |
struct | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_s |
Macros | |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_RESET 0x00000000 |
#define | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_OFST 0x1a0 |
Typedefs | |
typedef struct ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_s | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_t |
struct ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT.
Data Fields | ||
---|---|---|
uint32_t | flag: 1 | ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG |
uint32_t | __pad0__: 31 | UNDEFINED |
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_WIDTH 1 |
The width in bits of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_SET_MSK 0x00000001 |
The mask used to set the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field value.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field value.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_RESET 0x0 |
The reset value of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG field value from a register.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_FLAG register field value suitable for setting the register.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_RESET 0x00000000 |
The reset value of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT register.
#define ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT_OFST 0x1a0 |
The byte offset of the ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT register from the beginning of the component.
The typedef declaration for register ALT_NAND_CFG_MULTIPLANE_ADDR_RESTRICT.