Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : L3Tosoc2fpgaResp_main_RateAdapter_Bypass

Description

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS
[31:1] ??? Unknown UNDEFINED

Field : BYPASS

Disable the rate adaptation capability. This causes the rate adapter to act as a FIFO by transmitting received words, without delay, as soon as they can be transmitted. This setting is useful when the incoming throughput is equal to or greater than the downstream throughput.

Field Access Macros:

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_LSB   0
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_MSB   0
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_WIDTH   1
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_SET_MSK   0x00000001
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_CLR_MSK   0xfffffffe
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_RESET   0x0
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_SET(value)   (((value) << 0) & 0x00000001)
 

Data Structures

struct  ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_s
 

Macros

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_RESET   0x00000000
 
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_OFST   0xc
 

Typedefs

typedef struct
ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_s 
ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_t
 

Data Structure Documentation

struct ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS.

Data Fields
uint32_t BYPASS: 1 ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS
uint32_t __pad0__: 31 UNDEFINED

Macro Definitions

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS register field.

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_MSB   0

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS register field.

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_WIDTH   1
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_SET_MSK   0x00000001

The mask used to set the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS register field value.

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_CLR_MSK   0xfffffffe

The mask used to clear the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS register field value.

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_RESET   0x0
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_GET (   value)    (((value) & 0x00000001) >> 0)
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_BYPASS register field value suitable for setting the register.

#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_RESET   0x00000000
#define ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS_OFST   0xc

The byte offset of the ALT_NOC_MPU_L3TOH2FRESP_MAIN_RATE_L3TOH2FRESP_MAIN_RATE_BYPASS register from the beginning of the component.

Typedef Documentation