Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : mwcr

Description

Microwire Control Register.

This register controls the direction of the data word for the half-duplex

Microwire serial protocol. It is impossible to write to this register

when the DW_apb_ssi is enabled. The DW_apb_ssi is enabled and disabled by

writing to the SSIENR register.

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_SPIM_MWCR_MWMOD
[1] RW 0x0 ALT_SPIM_MWCR_MDD
[2] RW 0x0 ALT_SPIM_MWCR_MHS
[31:3] ??? 0x0 UNDEFINED

Field : mwmod

Microwire Transfer Mode.

Defines whether the Microwire transfer is sequential or non-sequential.

When sequential mode is used, only one control word is needed to

transmit or receive a block of data words. When non-sequential mode is

used, there must be a control word for each data word that is

transmitted or received.

0: non-sequential transfer

1: sequential transfer

Field Enumeration Values:

Enum Value Description
ALT_SPIM_MWCR_MWMOD_E_NONSEQ 0x0 non-sequential transfer
ALT_SPIM_MWCR_MWMOD_E_SEQ 0x1 sequential transfer

Field Access Macros:

#define ALT_SPIM_MWCR_MWMOD_E_NONSEQ   0x0
 
#define ALT_SPIM_MWCR_MWMOD_E_SEQ   0x1
 
#define ALT_SPIM_MWCR_MWMOD_LSB   0
 
#define ALT_SPIM_MWCR_MWMOD_MSB   0
 
#define ALT_SPIM_MWCR_MWMOD_WIDTH   1
 
#define ALT_SPIM_MWCR_MWMOD_SET_MSK   0x00000001
 
#define ALT_SPIM_MWCR_MWMOD_CLR_MSK   0xfffffffe
 
#define ALT_SPIM_MWCR_MWMOD_RESET   0x0
 
#define ALT_SPIM_MWCR_MWMOD_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SPIM_MWCR_MWMOD_SET(value)   (((value) << 0) & 0x00000001)
 

Field : mdd

Microwire Control.

Defines the direction of the data word when the Microwire serial protocol

is used. When this bit is set to 0, the data word is received by the

DW_apb_ssi MacroCell from the external serial device. When this bit is

set to 1, the data word is transmitted from the DW_apb_ssi MacroCell to

the external serial device.

Field Enumeration Values:

Enum Value Description
ALT_SPIM_MWCR_MDD_E_RXMOD 0x0 SPI Master receives data
ALT_SPIM_MWCR_MDD_E_TXMOD 0x1 SPI Master transmits data

Field Access Macros:

#define ALT_SPIM_MWCR_MDD_E_RXMOD   0x0
 
#define ALT_SPIM_MWCR_MDD_E_TXMOD   0x1
 
#define ALT_SPIM_MWCR_MDD_LSB   1
 
#define ALT_SPIM_MWCR_MDD_MSB   1
 
#define ALT_SPIM_MWCR_MDD_WIDTH   1
 
#define ALT_SPIM_MWCR_MDD_SET_MSK   0x00000002
 
#define ALT_SPIM_MWCR_MDD_CLR_MSK   0xfffffffd
 
#define ALT_SPIM_MWCR_MDD_RESET   0x0
 
#define ALT_SPIM_MWCR_MDD_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SPIM_MWCR_MDD_SET(value)   (((value) << 1) & 0x00000002)
 

Field : mhs

Microwire Handshaking.

Relevant only when the DW_apb_ssi is configured as a serial-master device.

When configured as a serial slave, this bit field has no functionality.

Used to enable and disable the busy/ready handshaking interface for the

Microwire protocol. When enabled, the DW_apb_ssi checks for a ready status

from the target slave, after the transfer of the last data/control bit,

before clearing the BUSY status in the SR register.

0: handshaking interface is disabled

1: handshaking interface is enabled

Field Enumeration Values:

Enum Value Description
ALT_SPIM_MWCR_MHS_E_DISD 0x0 Handshaking interface is disabled
ALT_SPIM_MWCR_MHS_E_END 0x1 Handshaking interface is enabled

Field Access Macros:

#define ALT_SPIM_MWCR_MHS_E_DISD   0x0
 
#define ALT_SPIM_MWCR_MHS_E_END   0x1
 
#define ALT_SPIM_MWCR_MHS_LSB   2
 
#define ALT_SPIM_MWCR_MHS_MSB   2
 
#define ALT_SPIM_MWCR_MHS_WIDTH   1
 
#define ALT_SPIM_MWCR_MHS_SET_MSK   0x00000004
 
#define ALT_SPIM_MWCR_MHS_CLR_MSK   0xfffffffb
 
#define ALT_SPIM_MWCR_MHS_RESET   0x0
 
#define ALT_SPIM_MWCR_MHS_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_SPIM_MWCR_MHS_SET(value)   (((value) << 2) & 0x00000004)
 

Data Structures

struct  ALT_SPIM_MWCR_s
 

Macros

#define ALT_SPIM_MWCR_RESET   0x00000000
 
#define ALT_SPIM_MWCR_OFST   0xc
 
#define ALT_SPIM_MWCR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_MWCR_OFST))
 

Typedefs

typedef struct ALT_SPIM_MWCR_s ALT_SPIM_MWCR_t
 

Data Structure Documentation

struct ALT_SPIM_MWCR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SPIM_MWCR.

Data Fields
uint32_t mwmod: 1 ALT_SPIM_MWCR_MWMOD
uint32_t mdd: 1 ALT_SPIM_MWCR_MDD
uint32_t mhs: 1 ALT_SPIM_MWCR_MHS
uint32_t __pad0__: 29 UNDEFINED

Macro Definitions

#define ALT_SPIM_MWCR_MWMOD_E_NONSEQ   0x0

Enumerated value for register field ALT_SPIM_MWCR_MWMOD

non-sequential transfer

#define ALT_SPIM_MWCR_MWMOD_E_SEQ   0x1

Enumerated value for register field ALT_SPIM_MWCR_MWMOD

sequential transfer

#define ALT_SPIM_MWCR_MWMOD_LSB   0

The Least Significant Bit (LSB) position of the ALT_SPIM_MWCR_MWMOD register field.

#define ALT_SPIM_MWCR_MWMOD_MSB   0

The Most Significant Bit (MSB) position of the ALT_SPIM_MWCR_MWMOD register field.

#define ALT_SPIM_MWCR_MWMOD_WIDTH   1

The width in bits of the ALT_SPIM_MWCR_MWMOD register field.

#define ALT_SPIM_MWCR_MWMOD_SET_MSK   0x00000001

The mask used to set the ALT_SPIM_MWCR_MWMOD register field value.

#define ALT_SPIM_MWCR_MWMOD_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SPIM_MWCR_MWMOD register field value.

#define ALT_SPIM_MWCR_MWMOD_RESET   0x0

The reset value of the ALT_SPIM_MWCR_MWMOD register field.

#define ALT_SPIM_MWCR_MWMOD_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SPIM_MWCR_MWMOD field value from a register.

#define ALT_SPIM_MWCR_MWMOD_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SPIM_MWCR_MWMOD register field value suitable for setting the register.

#define ALT_SPIM_MWCR_MDD_E_RXMOD   0x0

Enumerated value for register field ALT_SPIM_MWCR_MDD

SPI Master receives data

#define ALT_SPIM_MWCR_MDD_E_TXMOD   0x1

Enumerated value for register field ALT_SPIM_MWCR_MDD

SPI Master transmits data

#define ALT_SPIM_MWCR_MDD_LSB   1

The Least Significant Bit (LSB) position of the ALT_SPIM_MWCR_MDD register field.

#define ALT_SPIM_MWCR_MDD_MSB   1

The Most Significant Bit (MSB) position of the ALT_SPIM_MWCR_MDD register field.

#define ALT_SPIM_MWCR_MDD_WIDTH   1

The width in bits of the ALT_SPIM_MWCR_MDD register field.

#define ALT_SPIM_MWCR_MDD_SET_MSK   0x00000002

The mask used to set the ALT_SPIM_MWCR_MDD register field value.

#define ALT_SPIM_MWCR_MDD_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SPIM_MWCR_MDD register field value.

#define ALT_SPIM_MWCR_MDD_RESET   0x0

The reset value of the ALT_SPIM_MWCR_MDD register field.

#define ALT_SPIM_MWCR_MDD_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SPIM_MWCR_MDD field value from a register.

#define ALT_SPIM_MWCR_MDD_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SPIM_MWCR_MDD register field value suitable for setting the register.

#define ALT_SPIM_MWCR_MHS_E_DISD   0x0

Enumerated value for register field ALT_SPIM_MWCR_MHS

Handshaking interface is disabled

#define ALT_SPIM_MWCR_MHS_E_END   0x1

Enumerated value for register field ALT_SPIM_MWCR_MHS

Handshaking interface is enabled

#define ALT_SPIM_MWCR_MHS_LSB   2

The Least Significant Bit (LSB) position of the ALT_SPIM_MWCR_MHS register field.

#define ALT_SPIM_MWCR_MHS_MSB   2

The Most Significant Bit (MSB) position of the ALT_SPIM_MWCR_MHS register field.

#define ALT_SPIM_MWCR_MHS_WIDTH   1

The width in bits of the ALT_SPIM_MWCR_MHS register field.

#define ALT_SPIM_MWCR_MHS_SET_MSK   0x00000004

The mask used to set the ALT_SPIM_MWCR_MHS register field value.

#define ALT_SPIM_MWCR_MHS_CLR_MSK   0xfffffffb

The mask used to clear the ALT_SPIM_MWCR_MHS register field value.

#define ALT_SPIM_MWCR_MHS_RESET   0x0

The reset value of the ALT_SPIM_MWCR_MHS register field.

#define ALT_SPIM_MWCR_MHS_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_SPIM_MWCR_MHS field value from a register.

#define ALT_SPIM_MWCR_MHS_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_SPIM_MWCR_MHS register field value suitable for setting the register.

#define ALT_SPIM_MWCR_RESET   0x00000000

The reset value of the ALT_SPIM_MWCR register.

#define ALT_SPIM_MWCR_OFST   0xc

The byte offset of the ALT_SPIM_MWCR register from the beginning of the component.

#define ALT_SPIM_MWCR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_MWCR_OFST))

The address of the ALT_SPIM_MWCR register.

Typedef Documentation

The typedef declaration for register ALT_SPIM_MWCR.