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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Control Register
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x1 | Initialization |
[1] | RW | 0x0 | Module Interrupt Line Enable |
[2] | RW | 0x0 | Status Interrupt Enable |
[3] | RW | 0x0 | Error Interrupt Enable |
[4] | ??? | 0x0 | UNDEFINED |
[5] | RW | 0x0 | Disable Automatic Retransmission |
[6] | RW | 0x0 | Configuration Change Enable |
[7] | RW | 0x0 | Test Mode Enable |
[16:8] | ??? | 0x0 | UNDEFINED |
[17] | RW | 0x0 | Message Object Interrupt Line Enable |
[18] | RW | 0x0 | DMA Enable for IF1 |
[19] | RW | 0x0 | DMA Enable for IF2 |
[31:20] | ??? | 0x0 | UNDEFINED |
Field : Initialization - Init | ||||||||||
Initialization Note: Due to the synchronization mechanism between the two clock domains, there may be a delay until the value written to CCTRL.Init can be read back. Therefore the programmer has to assure that the previous value written to CCTRL.Init has been accepted by reading CCTRL.Init before setting CCTRL.Init to a new value. Note: The Bus_Off recovery sequence (see CAN Specification Rev. 2.0) cannot be shortened by setting or resetting CCTRL.Init. If the device goes Bus_Off, it will set CCTRL.Init of its own accord, stopping all bus activities. Once CCTRL.Init has been cleared by the CPU, the device will then wait for 129 occurrences of Bus Idle (129 * 11 consecutive recessive bits) before resuming normal operations. At the end of the Bus_Off recovery sequence, the Error Management Counters will be reset. During the waiting time after the resetting of CCTRL.Init, each time a sequence of 11 recessive bits has been monitored, a Bit0Error code is written to the Status Register, enabling the CPU to readily check up whether the CAN bus is stuck at dominant or continuously disturbed and to monitor the proceeding of the us_Off recovery sequence. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_E_NORMAL 0x0 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_E_START 0x1 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_LSB 0 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_MSB 0 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_WIDTH 1 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_SET_MSK 0x00000001 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_RESET 0x1 | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_CAN_PROTO_CCTL_INIT_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Module Interrupt Line Enable - ILE | ||||||||||||||||||||||||||||
Module Interrupt Line Enable Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_E_DISD 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_E_END 0x1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_LSB 1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_MSB 1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_WIDTH 1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_SET_MSK 0x00000002 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_CLR_MSK 0xfffffffd | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_RESET 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_GET(value) (((value) & 0x00000002) >> 1) | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_ILE_SET(value) (((value) << 1) & 0x00000002) | |||||||||||||||||||||||||||
Field : Status Interrupt Enable - SIE | ||||||||||||||||||||||||||||
Status Interrupt Enable Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_E_DISD 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_E_END 0x1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_LSB 2 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_MSB 2 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_WIDTH 1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_SET_MSK 0x00000004 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_CLR_MSK 0xfffffffb | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_RESET 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_GET(value) (((value) & 0x00000004) >> 2) | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_SIE_SET(value) (((value) << 2) & 0x00000004) | |||||||||||||||||||||||||||
Field : Error Interrupt Enable - EIE | ||||||||||||||||||||||||||||
Error Interrupt Enable Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_E_DISD 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_E_END 0x1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_LSB 3 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_MSB 3 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_WIDTH 1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_SET_MSK 0x00000008 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_CLR_MSK 0xfffffff7 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_RESET 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_GET(value) (((value) & 0x00000008) >> 3) | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_EIE_SET(value) (((value) << 3) & 0x00000008) | |||||||||||||||||||||||||||
Field : Disable Automatic Retransmission - DAR | |||||||||||||
Disable Automatic Retransmission Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_E_END 0x0 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_E_DISD 0x1 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_LSB 5 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_MSB 5 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_WIDTH 1 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_SET_MSK 0x00000020 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_CLR_MSK 0xffffffdf | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_RESET 0x0 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_GET(value) (((value) & 0x00000020) >> 5) | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_DAR_SET(value) (((value) << 5) & 0x00000020) | ||||||||||||
Field : Configuration Change Enable - CCE | ||||||||||||||||
Configuration Change Enable Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_E_NOWRACC 0x0 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_E_WRACC 0x1 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_LSB 6 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_MSB 6 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_WIDTH 1 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_SET_MSK 0x00000040 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_CLR_MSK 0xffffffbf | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_RESET 0x0 | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_GET(value) (((value) & 0x00000040) >> 6) | |||||||||||||||
#define | ALT_CAN_PROTO_CCTL_CCE_SET(value) (((value) << 6) & 0x00000040) | |||||||||||||||
Field : Test Mode Enable - Test | |||||||||||||
Test Mode Enable Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_E_DISD 0x0 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_E_TESTMOD 0x1 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_LSB 7 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_MSB 7 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_WIDTH 1 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_SET_MSK 0x00000080 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_CLR_MSK 0xffffff7f | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_RESET 0x0 | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_GET(value) (((value) & 0x00000080) >> 7) | ||||||||||||
#define | ALT_CAN_PROTO_CCTL_TEST_SET(value) (((value) << 7) & 0x00000080) | ||||||||||||
Field : Message Object Interrupt Line Enable - MIL | ||||||||||||||||||||||||||||
Message Object Interrupt Line Enable Field Enumeration Values:
Field Access Macros: | ||||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_E_DISD 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_E_END 0x1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_LSB 17 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_MSB 17 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_WIDTH 1 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_SET_MSK 0x00020000 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_CLR_MSK 0xfffdffff | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_RESET 0x0 | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_GET(value) (((value) & 0x00020000) >> 17) | |||||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_MIL_SET(value) (((value) << 17) & 0x00020000) | |||||||||||||||||||||||||||
Field : DMA Enable for IF1 - DE1 | |||||||||||||||||||||||||
DMA Enable for IF1 Field Enumeration Values:
Field Access Macros: | |||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_E_DISD 0x0 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_E_END 0x1 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_LSB 18 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_MSB 18 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_WIDTH 1 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_SET_MSK 0x00040000 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_CLR_MSK 0xfffbffff | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_RESET 0x0 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_GET(value) (((value) & 0x00040000) >> 18) | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE1_SET(value) (((value) << 18) & 0x00040000) | ||||||||||||||||||||||||
Field : DMA Enable for IF2 - DE2 | |||||||||||||||||||||||||
DMA Enable for IF2 Field Enumeration Values:
Field Access Macros: | |||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_E_DISD 0x0 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_E_END 0x1 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_LSB 19 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_MSB 19 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_WIDTH 1 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_SET_MSK 0x00080000 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_CLR_MSK 0xfff7ffff | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_RESET 0x0 | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_GET(value) (((value) & 0x00080000) >> 19) | ||||||||||||||||||||||||
#define | ALT_CAN_PROTO_CCTL_DE2_SET(value) (((value) << 19) & 0x00080000) | ||||||||||||||||||||||||
Data Structures | |
struct | ALT_CAN_PROTO_CCTL_s |
Macros | |
#define | ALT_CAN_PROTO_CCTL_OFST 0x0 |
#define | ALT_CAN_PROTO_CCTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_CAN_PROTO_CCTL_OFST)) |
Typedefs | |
typedef struct ALT_CAN_PROTO_CCTL_s | ALT_CAN_PROTO_CCTL_t |
struct ALT_CAN_PROTO_CCTL_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_CAN_PROTO_CCTL.
Data Fields | ||
---|---|---|
uint32_t | Init: 1 | Initialization |
uint32_t | ILE: 1 | Module Interrupt Line Enable |
uint32_t | SIE: 1 | Status Interrupt Enable |
uint32_t | EIE: 1 | Error Interrupt Enable |
uint32_t | __pad0__: 1 | UNDEFINED |
uint32_t | DAR: 1 | Disable Automatic Retransmission |
uint32_t | CCE: 1 | Configuration Change Enable |
uint32_t | Test: 1 | Test Mode Enable |
uint32_t | __pad1__: 9 | UNDEFINED |
uint32_t | MIL: 1 | Message Object Interrupt Line Enable |
uint32_t | DE1: 1 | DMA Enable for IF1 |
uint32_t | DE2: 1 | DMA Enable for IF2 |
uint32_t | __pad2__: 12 | UNDEFINED |
#define ALT_CAN_PROTO_CCTL_INIT_E_NORMAL 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_INIT
Normal Operation.
#define ALT_CAN_PROTO_CCTL_INIT_E_START 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_INIT
Initialization is started.
#define ALT_CAN_PROTO_CCTL_INIT_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_INIT register field.
#define ALT_CAN_PROTO_CCTL_INIT_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_INIT register field.
#define ALT_CAN_PROTO_CCTL_INIT_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_INIT register field.
#define ALT_CAN_PROTO_CCTL_INIT_SET_MSK 0x00000001 |
The mask used to set the ALT_CAN_PROTO_CCTL_INIT register field value.
#define ALT_CAN_PROTO_CCTL_INIT_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_CAN_PROTO_CCTL_INIT register field value.
#define ALT_CAN_PROTO_CCTL_INIT_RESET 0x1 |
The reset value of the ALT_CAN_PROTO_CCTL_INIT register field.
#define ALT_CAN_PROTO_CCTL_INIT_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_CAN_PROTO_CCTL_INIT field value from a register.
#define ALT_CAN_PROTO_CCTL_INIT_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_CAN_PROTO_CCTL_INIT register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_ILE_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_ILE
Module Interrupt Line CAN_INT_STATUS is always LOW.
#define ALT_CAN_PROTO_CCTL_ILE_E_END 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_ILE
Error and status interrupts (if CCTRL.EIE=1 and CCTRL.SIE=1) will set line CAN_INT_STATUS to one, signal remains one until all pending interrupts are processed. If MIL is disabled, the message object interrupts will also affect this interrupt line.
#define ALT_CAN_PROTO_CCTL_ILE_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_ILE register field.
#define ALT_CAN_PROTO_CCTL_ILE_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_ILE register field.
#define ALT_CAN_PROTO_CCTL_ILE_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_ILE register field.
#define ALT_CAN_PROTO_CCTL_ILE_SET_MSK 0x00000002 |
The mask used to set the ALT_CAN_PROTO_CCTL_ILE register field value.
#define ALT_CAN_PROTO_CCTL_ILE_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_CAN_PROTO_CCTL_ILE register field value.
#define ALT_CAN_PROTO_CCTL_ILE_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_ILE register field.
#define ALT_CAN_PROTO_CCTL_ILE_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_CAN_PROTO_CCTL_ILE field value from a register.
#define ALT_CAN_PROTO_CCTL_ILE_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_CAN_PROTO_CCTL_ILE register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_SIE_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_SIE
CSTS.RxOk, CSTS.TxOk and CSTS.LEC will still be updated, but without affecting interrupt line CAN_INT_STATUS and Interrupt register CIR.
#define ALT_CAN_PROTO_CCTL_SIE_E_END 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_SIE
When a message transfer is successfully completed or a CAN bus error is detected, indicated by flags CSTS.RxOk, CSTS.TxOk and CSTS.LEC, the interrupt line CAN_INT_STATUS gets active (if ILE=1) and CIR.StatusInt is set.
#define ALT_CAN_PROTO_CCTL_SIE_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_SIE register field.
#define ALT_CAN_PROTO_CCTL_SIE_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_SIE register field.
#define ALT_CAN_PROTO_CCTL_SIE_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_SIE register field.
#define ALT_CAN_PROTO_CCTL_SIE_SET_MSK 0x00000004 |
The mask used to set the ALT_CAN_PROTO_CCTL_SIE register field value.
#define ALT_CAN_PROTO_CCTL_SIE_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_CAN_PROTO_CCTL_SIE register field value.
#define ALT_CAN_PROTO_CCTL_SIE_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_SIE register field.
#define ALT_CAN_PROTO_CCTL_SIE_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_CAN_PROTO_CCTL_SIE field value from a register.
#define ALT_CAN_PROTO_CCTL_SIE_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_CAN_PROTO_CCTL_SIE register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_EIE_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_EIE
CSTS.PER, CSTS.BOff and CSTS.EWarn flags will still be updated, but without affecting interrupt line CAN_INT_STATUS and Interrupt register CIR
#define ALT_CAN_PROTO_CCTL_EIE_E_END 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_EIE
If CSTS.PER flag is one, or CSTS.BOff or CSTS.EWarn are changed, the interrupt line CAN_INT_STATUS gets active (if ILE=1) and CIR.StatusInt is set.
#define ALT_CAN_PROTO_CCTL_EIE_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_EIE register field.
#define ALT_CAN_PROTO_CCTL_EIE_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_EIE register field.
#define ALT_CAN_PROTO_CCTL_EIE_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_EIE register field.
#define ALT_CAN_PROTO_CCTL_EIE_SET_MSK 0x00000008 |
The mask used to set the ALT_CAN_PROTO_CCTL_EIE register field value.
#define ALT_CAN_PROTO_CCTL_EIE_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_CAN_PROTO_CCTL_EIE register field value.
#define ALT_CAN_PROTO_CCTL_EIE_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_EIE register field.
#define ALT_CAN_PROTO_CCTL_EIE_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_CAN_PROTO_CCTL_EIE field value from a register.
#define ALT_CAN_PROTO_CCTL_EIE_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_CAN_PROTO_CCTL_EIE register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_DAR_E_END 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_DAR
Automatic Retransmission of not successful messages enabled.
#define ALT_CAN_PROTO_CCTL_DAR_E_DISD 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_DAR
Automatic Retransmission disabled.
#define ALT_CAN_PROTO_CCTL_DAR_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_DAR register field.
#define ALT_CAN_PROTO_CCTL_DAR_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_DAR register field.
#define ALT_CAN_PROTO_CCTL_DAR_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_DAR register field.
#define ALT_CAN_PROTO_CCTL_DAR_SET_MSK 0x00000020 |
The mask used to set the ALT_CAN_PROTO_CCTL_DAR register field value.
#define ALT_CAN_PROTO_CCTL_DAR_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_CAN_PROTO_CCTL_DAR register field value.
#define ALT_CAN_PROTO_CCTL_DAR_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_DAR register field.
#define ALT_CAN_PROTO_CCTL_DAR_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_CAN_PROTO_CCTL_DAR field value from a register.
#define ALT_CAN_PROTO_CCTL_DAR_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_CAN_PROTO_CCTL_DAR register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_CCE_E_NOWRACC 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_CCE
The CPU has no write access to the configuration registers.
#define ALT_CAN_PROTO_CCTL_CCE_E_WRACC 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_CCE
The CPU has write access to the Bit Timing Register CBT (while CCTRL.Init = 1).
#define ALT_CAN_PROTO_CCTL_CCE_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_CCE register field.
#define ALT_CAN_PROTO_CCTL_CCE_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_CCE register field.
#define ALT_CAN_PROTO_CCTL_CCE_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_CCE register field.
#define ALT_CAN_PROTO_CCTL_CCE_SET_MSK 0x00000040 |
The mask used to set the ALT_CAN_PROTO_CCTL_CCE register field value.
#define ALT_CAN_PROTO_CCTL_CCE_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_CAN_PROTO_CCTL_CCE register field value.
#define ALT_CAN_PROTO_CCTL_CCE_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_CCE register field.
#define ALT_CAN_PROTO_CCTL_CCE_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_CAN_PROTO_CCTL_CCE field value from a register.
#define ALT_CAN_PROTO_CCTL_CCE_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_CAN_PROTO_CCTL_CCE register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_TEST_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_TEST
Normal Operation.
#define ALT_CAN_PROTO_CCTL_TEST_E_TESTMOD 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_TEST
Test Mode. Enables the write access to Test Register CTR.
#define ALT_CAN_PROTO_CCTL_TEST_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_TEST register field.
#define ALT_CAN_PROTO_CCTL_TEST_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_TEST register field.
#define ALT_CAN_PROTO_CCTL_TEST_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_TEST register field.
#define ALT_CAN_PROTO_CCTL_TEST_SET_MSK 0x00000080 |
The mask used to set the ALT_CAN_PROTO_CCTL_TEST register field value.
#define ALT_CAN_PROTO_CCTL_TEST_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_CAN_PROTO_CCTL_TEST register field value.
#define ALT_CAN_PROTO_CCTL_TEST_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_TEST register field.
#define ALT_CAN_PROTO_CCTL_TEST_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_CAN_PROTO_CCTL_TEST field value from a register.
#define ALT_CAN_PROTO_CCTL_TEST_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_CAN_PROTO_CCTL_TEST register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_MIL_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_MIL
Message Object Interrupt CAN_INT_MO is always LOW. If CCTRL.ILE is enabled all message object interrupts are routed to line CAN_INT_STATUS otherwise no message object interrupt will be visible.
#define ALT_CAN_PROTO_CCTL_MIL_E_END 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_MIL
Message object interrupts will set CAN_INT_MO to one, signal remains one until all pending interrupts are processed.
#define ALT_CAN_PROTO_CCTL_MIL_LSB 17 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_MIL register field.
#define ALT_CAN_PROTO_CCTL_MIL_MSB 17 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_MIL register field.
#define ALT_CAN_PROTO_CCTL_MIL_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_MIL register field.
#define ALT_CAN_PROTO_CCTL_MIL_SET_MSK 0x00020000 |
The mask used to set the ALT_CAN_PROTO_CCTL_MIL register field value.
#define ALT_CAN_PROTO_CCTL_MIL_CLR_MSK 0xfffdffff |
The mask used to clear the ALT_CAN_PROTO_CCTL_MIL register field value.
#define ALT_CAN_PROTO_CCTL_MIL_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_MIL register field.
#define ALT_CAN_PROTO_CCTL_MIL_GET | ( | value | ) | (((value) & 0x00020000) >> 17) |
Extracts the ALT_CAN_PROTO_CCTL_MIL field value from a register.
#define ALT_CAN_PROTO_CCTL_MIL_SET | ( | value | ) | (((value) << 17) & 0x00020000) |
Produces a ALT_CAN_PROTO_CCTL_MIL register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_DE1_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_DE1
Module DMA output port CAN_IF1DMA is always LOW.
#define ALT_CAN_PROTO_CCTL_DE1_E_END 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_DE1
Requesting a message object transfer from IF1 to Message RAM or vice versa with IF1CMR.DMAactive enabled the end of the transfer will be marked with setting port CAN_IF1DMA to one. The port remains one until first access to one of the IF1 registers.
#define ALT_CAN_PROTO_CCTL_DE1_LSB 18 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_DE1 register field.
#define ALT_CAN_PROTO_CCTL_DE1_MSB 18 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_DE1 register field.
#define ALT_CAN_PROTO_CCTL_DE1_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_DE1 register field.
#define ALT_CAN_PROTO_CCTL_DE1_SET_MSK 0x00040000 |
The mask used to set the ALT_CAN_PROTO_CCTL_DE1 register field value.
#define ALT_CAN_PROTO_CCTL_DE1_CLR_MSK 0xfffbffff |
The mask used to clear the ALT_CAN_PROTO_CCTL_DE1 register field value.
#define ALT_CAN_PROTO_CCTL_DE1_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_DE1 register field.
#define ALT_CAN_PROTO_CCTL_DE1_GET | ( | value | ) | (((value) & 0x00040000) >> 18) |
Extracts the ALT_CAN_PROTO_CCTL_DE1 field value from a register.
#define ALT_CAN_PROTO_CCTL_DE1_SET | ( | value | ) | (((value) << 18) & 0x00040000) |
Produces a ALT_CAN_PROTO_CCTL_DE1 register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_DE2_E_DISD 0x0 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_DE2
Module DMA output port CAN_IF2DMA is always LOW.
#define ALT_CAN_PROTO_CCTL_DE2_E_END 0x1 |
Enumerated value for register field ALT_CAN_PROTO_CCTL_DE2
Requesting a message object transfer from IF2 to Message RAM or vice versa with IF2CMR.DMAactive enabled the end of the transfer will be marked with setting port CAN_IF2DMA to one. The port remains one until first access to one of the IF2 registers.
#define ALT_CAN_PROTO_CCTL_DE2_LSB 19 |
The Least Significant Bit (LSB) position of the ALT_CAN_PROTO_CCTL_DE2 register field.
#define ALT_CAN_PROTO_CCTL_DE2_MSB 19 |
The Most Significant Bit (MSB) position of the ALT_CAN_PROTO_CCTL_DE2 register field.
#define ALT_CAN_PROTO_CCTL_DE2_WIDTH 1 |
The width in bits of the ALT_CAN_PROTO_CCTL_DE2 register field.
#define ALT_CAN_PROTO_CCTL_DE2_SET_MSK 0x00080000 |
The mask used to set the ALT_CAN_PROTO_CCTL_DE2 register field value.
#define ALT_CAN_PROTO_CCTL_DE2_CLR_MSK 0xfff7ffff |
The mask used to clear the ALT_CAN_PROTO_CCTL_DE2 register field value.
#define ALT_CAN_PROTO_CCTL_DE2_RESET 0x0 |
The reset value of the ALT_CAN_PROTO_CCTL_DE2 register field.
#define ALT_CAN_PROTO_CCTL_DE2_GET | ( | value | ) | (((value) & 0x00080000) >> 19) |
Extracts the ALT_CAN_PROTO_CCTL_DE2 field value from a register.
#define ALT_CAN_PROTO_CCTL_DE2_SET | ( | value | ) | (((value) << 19) & 0x00080000) |
Produces a ALT_CAN_PROTO_CCTL_DE2 register field value suitable for setting the register.
#define ALT_CAN_PROTO_CCTL_OFST 0x0 |
The byte offset of the ALT_CAN_PROTO_CCTL register from the beginning of the component.
#define ALT_CAN_PROTO_CCTL_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_CAN_PROTO_CCTL_OFST)) |
The address of the ALT_CAN_PROTO_CCTL register.
typedef struct ALT_CAN_PROTO_CCTL_s ALT_CAN_PROTO_CCTL_t |
The typedef declaration for register ALT_CAN_PROTO_CCTL.