Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : caltiming10

Description

Register Layout

Bits Access Reset Description
[7:0] RW 0x0 ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT
[31:8] ??? 0x0 UNDEFINED

Field : cfg_t_param_16_act_to_act

The 16-activate window timing parameter (RLD3).

Field Access Macros:

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_LSB   0
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_MSB   7
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_WIDTH   8
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_SET_MSK   0x000000ff
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_CLR_MSK   0xffffff00
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_RESET   0x0
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_GET(value)   (((value) & 0x000000ff) >> 0)
 
#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_SET(value)   (((value) << 0) & 0x000000ff)
 

Data Structures

struct  ALT_IO48_HMC_MMR_CALTIMING10_s
 

Macros

#define ALT_IO48_HMC_MMR_CALTIMING10_RESET   0x00000000
 
#define ALT_IO48_HMC_MMR_CALTIMING10_OFST   0xa4
 

Typedefs

typedef struct
ALT_IO48_HMC_MMR_CALTIMING10_s 
ALT_IO48_HMC_MMR_CALTIMING10_t
 

Data Structure Documentation

struct ALT_IO48_HMC_MMR_CALTIMING10_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_IO48_HMC_MMR_CALTIMING10.

Data Fields
uint32_t cfg_t_param_16_act_to_act: 8 ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT
uint32_t __pad0__: 24 UNDEFINED

Macro Definitions

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_LSB   0

The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_MSB   7

The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_WIDTH   8

The width in bits of the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_SET_MSK   0x000000ff

The mask used to set the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field value.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_CLR_MSK   0xffffff00

The mask used to clear the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field value.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_RESET   0x0

The reset value of the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_GET (   value)    (((value) & 0x000000ff) >> 0)

Extracts the ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT field value from a register.

#define ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT_SET (   value)    (((value) << 0) & 0x000000ff)

Produces a ALT_IO48_HMC_MMR_CALTIMING10_CFG_T_PARAM_16_ACT_TO_ACT register field value suitable for setting the register.

#define ALT_IO48_HMC_MMR_CALTIMING10_RESET   0x00000000

The reset value of the ALT_IO48_HMC_MMR_CALTIMING10 register.

#define ALT_IO48_HMC_MMR_CALTIMING10_OFST   0xa4

The byte offset of the ALT_IO48_HMC_MMR_CALTIMING10 register from the beginning of the component.

Typedef Documentation