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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG |
[1] | RW | 0x1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT |
[2] | RW | 0x1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE |
[7:3] | ??? | 0x0 | UNDEFINED |
[8] | RW | 0x1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG |
[15:9] | ??? | 0x0 | UNDEFINED |
[16] | RW | 0x0 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE |
[23:17] | ??? | 0x0 | UNDEFINED |
[24] | RW | 0x0 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE |
[31:25] | ??? | 0x0 | UNDEFINED |
Field : s2f_nenable_nconfig | |
HPS override Enable for nCONFIG to CSS 1: override is disabled 0: override is enabled Field Access Macros: | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_LSB 0 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_MSB 0 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_WIDTH 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_SET_MSK 0x00000001 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_CLR_MSK 0xfffffffe |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_RESET 0x1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_SET(value) (((value) << 0) & 0x00000001) |
Field : s2f_nenable_nstatus | |
HPS override Enable for nSTATUS to PIN 1: override is disabled 0: override is enabled Field Access Macros: | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_LSB 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_MSB 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_WIDTH 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_SET_MSK 0x00000002 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_CLR_MSK 0xfffffffd |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_RESET 0x1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_SET(value) (((value) << 1) & 0x00000002) |
Field : s2f_nenable_condone | |
HPS override Enable for CONF_DONE to PIN 1: override is disabled 0: override is enabled Field Access Macros: | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_LSB 2 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_MSB 2 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_WIDTH 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_SET_MSK 0x00000004 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_CLR_MSK 0xfffffffb |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_RESET 0x1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_SET(value) (((value) << 2) & 0x00000004) |
Field : s2f_nconfig | |
This bit has an effect on CSS only if curresponding override is enabled. 1: Drive nCONFIG input to CSS 1. 0: Drive nCONFIG input to CSS 0 The nCONFIG input is used to put the FPGA into its reset phase. If the FPGA was configured, its operation stops and it will have to be configured again to start operation. Field Access Macros: | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_LSB 8 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_MSB 8 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_WIDTH 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_SET_MSK 0x00000100 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_CLR_MSK 0xfffffeff |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_RESET 0x1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_GET(value) (((value) & 0x00000100) >> 8) |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_SET(value) (((value) << 8) & 0x00000100) |
Field : s2f_nstatus_oe | |
This bit has an effect on CSS only if curresponding override is enabled. 1: Drive nSTATUS pin to 0. 0: Disable nSTATUS pin drive from HPS, and allow default pull-up to take over. Driving this pin has no effect on CSS once the FPGA is in user mode. HPS can drive this pin 0 to delay the initialization phase of CSS. During configuation phase, HPS can drive this pin 0 to end the current configuration and initialize a reconfiguration. Field Access Macros: | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_LSB 16 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_MSB 16 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_WIDTH 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_SET_MSK 0x00010000 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_CLR_MSK 0xfffeffff |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_RESET 0x0 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_GET(value) (((value) & 0x00010000) >> 16) |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_SET(value) (((value) << 16) & 0x00010000) |
Field : s2f_condone_oe | |
This bit has an effect on CSS/PIN only if curresponding override is enabled. 1: Drive CONF_DONE pin to 0. 0: Disable CONF_DONE pin drive from HPS, and allow default pull-up to take over. HPS can drive CONF_DONE pin 0 to delay the FPGA from entering user mode. Field Access Macros: | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_LSB 24 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_MSB 24 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_WIDTH 1 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET_MSK 0x01000000 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_CLR_MSK 0xfeffffff |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_RESET 0x0 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_GET(value) (((value) & 0x01000000) >> 24) |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET(value) (((value) << 24) & 0x01000000) |
Data Structures | |
struct | ALT_FPGAMGR_IMGCFG_CTL_00_s |
Macros | |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_RESET 0x00000107 |
#define | ALT_FPGAMGR_IMGCFG_CTL_00_OFST 0x70 |
Typedefs | |
typedef struct ALT_FPGAMGR_IMGCFG_CTL_00_s | ALT_FPGAMGR_IMGCFG_CTL_00_t |
struct ALT_FPGAMGR_IMGCFG_CTL_00_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_FPGAMGR_IMGCFG_CTL_00.
Data Fields | ||
---|---|---|
uint32_t | s2f_nenable_nconfig: 1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG |
uint32_t | s2f_nenable_nstatus: 1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT |
uint32_t | s2f_nenable_condone: 1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE |
uint32_t | __pad0__: 5 | UNDEFINED |
uint32_t | s2f_nconfig: 1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG |
uint32_t | __pad1__: 7 | UNDEFINED |
uint32_t | s2f_nstatus_oe: 1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE |
uint32_t | __pad2__: 7 | UNDEFINED |
uint32_t | s2f_condone_oe: 1 | ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE |
uint32_t | __pad3__: 7 | UNDEFINED |
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_SET_MSK 0x00000001 |
The mask used to set the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_RESET 0x1 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG field value from a register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NCFG register field value suitable for setting the register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_SET_MSK 0x00000002 |
The mask used to set the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_RESET 0x1 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT field value from a register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_NSTAT register field value suitable for setting the register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_SET_MSK 0x00000004 |
The mask used to set the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_RESET 0x1 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE field value from a register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NEN_CONDONE register field value suitable for setting the register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_SET_MSK 0x00000100 |
The mask used to set the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_RESET 0x1 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG field value from a register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCFG register field value suitable for setting the register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_SET_MSK 0x00010000 |
The mask used to set the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE field value from a register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTAT_OE register field value suitable for setting the register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_MSB 24 |
The Most Significant Bit (MSB) position of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_WIDTH 1 |
The width in bits of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET_MSK 0x01000000 |
The mask used to set the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_CLR_MSK 0xfeffffff |
The mask used to clear the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field value.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_RESET 0x0 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_GET | ( | value | ) | (((value) & 0x01000000) >> 24) |
Extracts the ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE field value from a register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET | ( | value | ) | (((value) << 24) & 0x01000000) |
Produces a ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE register field value suitable for setting the register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_RESET 0x00000107 |
The reset value of the ALT_FPGAMGR_IMGCFG_CTL_00 register.
#define ALT_FPGAMGR_IMGCFG_CTL_00_OFST 0x70 |
The byte offset of the ALT_FPGAMGR_IMGCFG_CTL_00 register from the beginning of the component.
typedef struct ALT_FPGAMGR_IMGCFG_CTL_00_s ALT_FPGAMGR_IMGCFG_CTL_00_t |
The typedef declaration for register ALT_FPGAMGR_IMGCFG_CTL_00.