![]() |
Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
|
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[2:0] | RW | 0x0 | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE |
[6:3] | RW | 0x0 | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK |
[31:7] | ??? | 0x0 | UNDEFINED |
Field : mr_cmd_type | |
Indicates the type of Mode Register Command Field Access Macros: | |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_LSB 0 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_MSB 2 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_WIDTH 3 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_SET_MSK 0x00000007 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_CLR_MSK 0xfffffff8 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_RESET 0x0 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_GET(value) (((value) & 0x00000007) >> 0) |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_SET(value) (((value) << 0) & 0x00000007) |
Field : mr_cmd_rank | |
Indicates which rank the mode register command is intended to. Field Access Macros: | |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_LSB 3 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_MSB 6 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_WIDTH 4 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_SET_MSK 0x00000078 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_CLR_MSK 0xffffff87 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_RESET 0x0 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_GET(value) (((value) & 0x00000078) >> 3) |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_SET(value) (((value) << 3) & 0x00000078) |
Data Structures | |
struct | ALT_IO48_HMC_MMR_SIDEBAND12_s |
Macros | |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_RESET 0x00000000 |
#define | ALT_IO48_HMC_MMR_SIDEBAND12_OFST 0xdc |
Typedefs | |
typedef struct ALT_IO48_HMC_MMR_SIDEBAND12_s | ALT_IO48_HMC_MMR_SIDEBAND12_t |
struct ALT_IO48_HMC_MMR_SIDEBAND12_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_IO48_HMC_MMR_SIDEBAND12.
Data Fields | ||
---|---|---|
uint32_t | mr_cmd_type: 3 | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE |
uint32_t | mr_cmd_rank: 4 | ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK |
uint32_t | __pad0__: 25 | UNDEFINED |
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_WIDTH 3 |
The width in bits of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_SET_MSK 0x00000007 |
The mask used to set the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field value.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_CLR_MSK 0xfffffff8 |
The mask used to clear the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field value.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_RESET 0x0 |
The reset value of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_GET | ( | value | ) | (((value) & 0x00000007) >> 0) |
Extracts the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE field value from a register.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE_SET | ( | value | ) | (((value) << 0) & 0x00000007) |
Produces a ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_TYPE register field value suitable for setting the register.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_WIDTH 4 |
The width in bits of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_SET_MSK 0x00000078 |
The mask used to set the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field value.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_CLR_MSK 0xffffff87 |
The mask used to clear the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field value.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_RESET 0x0 |
The reset value of the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_GET | ( | value | ) | (((value) & 0x00000078) >> 3) |
Extracts the ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK field value from a register.
#define ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK_SET | ( | value | ) | (((value) << 3) & 0x00000078) |
Produces a ALT_IO48_HMC_MMR_SIDEBAND12_MR_CMD_RANK register field value suitable for setting the register.
#define ALT_IO48_HMC_MMR_SIDEBAND12_RESET 0x00000000 |
The reset value of the ALT_IO48_HMC_MMR_SIDEBAND12 register.
#define ALT_IO48_HMC_MMR_SIDEBAND12_OFST 0xdc |
The byte offset of the ALT_IO48_HMC_MMR_SIDEBAND12 register from the beginning of the component.
typedef struct ALT_IO48_HMC_MMR_SIDEBAND12_s ALT_IO48_HMC_MMR_SIDEBAND12_t |
The typedef declaration for register ALT_IO48_HMC_MMR_SIDEBAND12.