Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Device Control OUT Endpoint 0 Control Register - doepctl0

Description

This is Control OUT Endpoint 0 Control register.

Register Layout

Bits Access Reset Description
[1:0] R 0x0 Maximum Packet Size
[14:2] ??? 0x0 UNDEFINED
[15] R 0x1 USB Active Endpoint
[16] ??? 0x0 UNDEFINED
[17] R 0x0 NAK Status
[19:18] R 0x0 Endpoint Type
[20] RW 0x0 Snoop Mode
[21] R 0x0 STALL Handshake
[25:22] ??? 0x0 UNDEFINED
[26] W 0x0 Clear NAK
[27] W 0x0 Set NAK
[29:28] ??? 0x0 UNDEFINED
[30] R 0x0 Endpoint Disable
[31] R 0x0 Endpoint Enable

Field : Maximum Packet Size - mps

The maximum packet size for control OUT endpoint 0 is thesame as what is programmed in control IN Endpoint 0.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE64 0x0 64 bytes
ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE32 0x1 32 bytes
ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE16 0x2 16 bytes
ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE8 0x3 8 bytes

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE64   0x0
 
#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE32   0x1
 
#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE16   0x2
 
#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE8   0x3
 
#define ALT_USB_DEV_DOEPCTL0_MPS_LSB   0
 
#define ALT_USB_DEV_DOEPCTL0_MPS_MSB   1
 
#define ALT_USB_DEV_DOEPCTL0_MPS_WIDTH   2
 
#define ALT_USB_DEV_DOEPCTL0_MPS_SET_MSK   0x00000003
 
#define ALT_USB_DEV_DOEPCTL0_MPS_CLR_MSK   0xfffffffc
 
#define ALT_USB_DEV_DOEPCTL0_MPS_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_MPS_GET(value)   (((value) & 0x00000003) >> 0)
 
#define ALT_USB_DEV_DOEPCTL0_MPS_SET(value)   (((value) << 0) & 0x00000003)
 

Field : USB Active Endpoint - usbactep

This bit is always Set to 1, indicating that a control endpoint 0 is always active in all configurations and interfaces.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_USBACTEP_E_ACT 0x1 USB Active Endpoint 0

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_E_ACT   0x1
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_LSB   15
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_MSB   15
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_SET_MSK   0x00008000
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_CLR_MSK   0xffff7fff
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_RESET   0x1
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_GET(value)   (((value) & 0x00008000) >> 15)
 
#define ALT_USB_DEV_DOEPCTL0_USBACTEP_SET(value)   (((value) << 15) & 0x00008000)
 

Field : NAK Status - naksts

When either the application or the core sets this bit, the core stops receiving data, even If there is space in the RxFIFO to accommodate the incoming packet. Irrespective of this bit's setting, the core always responds to SETUP data packets with an ACK handshake.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_NAKSTS_E_INACT 0x0 The core is transmitting non-NAK handshakes
: based on the FIFO status
ALT_USB_DEV_DOEPCTL0_NAKSTS_E_ACT 0x1 The core is transmitting NAK handshakes on this
: endpoint

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_E_INACT   0x0
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_E_ACT   0x1
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_LSB   17
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_MSB   17
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_SET_MSK   0x00020000
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_CLR_MSK   0xfffdffff
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_GET(value)   (((value) & 0x00020000) >> 17)
 
#define ALT_USB_DEV_DOEPCTL0_NAKSTS_SET(value)   (((value) << 17) & 0x00020000)
 

Field : Endpoint Type - eptype

Hardcoded to 0 for control.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_EPTYPE_E_ACT 0x0 Endpoint Control 0

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_E_ACT   0x0
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_LSB   18
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_MSB   19
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_WIDTH   2
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_SET_MSK   0x000c0000
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_CLR_MSK   0xfff3ffff
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_GET(value)   (((value) & 0x000c0000) >> 18)
 
#define ALT_USB_DEV_DOEPCTL0_EPTYPE_SET(value)   (((value) << 18) & 0x000c0000)
 

Field : Snoop Mode - snp

This bit configures the endpoint to Snoop mode. In Snoop mode, the core does not check the correctness of OUT packets before transferring them to application memory.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_SNP_E_DISD 0x0 Snoop Mode disabled
ALT_USB_DEV_DOEPCTL0_SNP_E_END 0x1 Snoop Mode enabled

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_SNP_E_DISD   0x0
 
#define ALT_USB_DEV_DOEPCTL0_SNP_E_END   0x1
 
#define ALT_USB_DEV_DOEPCTL0_SNP_LSB   20
 
#define ALT_USB_DEV_DOEPCTL0_SNP_MSB   20
 
#define ALT_USB_DEV_DOEPCTL0_SNP_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_SNP_SET_MSK   0x00100000
 
#define ALT_USB_DEV_DOEPCTL0_SNP_CLR_MSK   0xffefffff
 
#define ALT_USB_DEV_DOEPCTL0_SNP_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_SNP_GET(value)   (((value) & 0x00100000) >> 20)
 
#define ALT_USB_DEV_DOEPCTL0_SNP_SET(value)   (((value) << 20) & 0x00100000)
 

Field : STALL Handshake - stall

The application can only Set this bit, and the core clears it, when a SETUP token is received for this endpoint. If a NAK bit or Global OUT NAK is Set along with this bit, the STALL bit takes priority. Irrespective of this bit's setting, the core always responds to SETUP data packets with an ACK handshake.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_STALL_E_INACT 0x0 No Stall
ALT_USB_DEV_DOEPCTL0_STALL_E_ACT 0x1 Stall Handshake

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_STALL_E_INACT   0x0
 
#define ALT_USB_DEV_DOEPCTL0_STALL_E_ACT   0x1
 
#define ALT_USB_DEV_DOEPCTL0_STALL_LSB   21
 
#define ALT_USB_DEV_DOEPCTL0_STALL_MSB   21
 
#define ALT_USB_DEV_DOEPCTL0_STALL_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_STALL_SET_MSK   0x00200000
 
#define ALT_USB_DEV_DOEPCTL0_STALL_CLR_MSK   0xffdfffff
 
#define ALT_USB_DEV_DOEPCTL0_STALL_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_STALL_GET(value)   (((value) & 0x00200000) >> 21)
 
#define ALT_USB_DEV_DOEPCTL0_STALL_SET(value)   (((value) << 21) & 0x00200000)
 

Field : Clear NAK - cnak

A write to this bit clears the NAK bit for the endpoint.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_CNAK_E_NOCLR 0x0 No action
ALT_USB_DEV_DOEPCTL0_CNAK_E_CLR 0x1 Clear NAK

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_CNAK_E_NOCLR   0x0
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_E_CLR   0x1
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_LSB   26
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_MSB   26
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_SET_MSK   0x04000000
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_CLR_MSK   0xfbffffff
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_GET(value)   (((value) & 0x04000000) >> 26)
 
#define ALT_USB_DEV_DOEPCTL0_CNAK_SET(value)   (((value) << 26) & 0x04000000)
 

Field : Set NAK - snak

A write to this bit sets the NAK bit for the endpoint.Using this bit, the application can control the transmission of NAK handshakes on an endpoint. The core can also Set bit on a Transfer Completed interrupt, or after a SETUP is received on the endpoint.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_SNAK_E_NOSET 0x0 No action
ALT_USB_DEV_DOEPCTL0_SNAK_E_SET 0x1 Set NAK

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_SNAK_E_NOSET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_E_SET   0x1
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_LSB   27
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_MSB   27
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_SET_MSK   0x08000000
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_CLR_MSK   0xf7ffffff
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_GET(value)   (((value) & 0x08000000) >> 27)
 
#define ALT_USB_DEV_DOEPCTL0_SNAK_SET(value)   (((value) << 27) & 0x08000000)
 

Field : Endpoint Disable - epdis

The application cannot disable control OUT endpoint 0.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_EPDIS_E_INACT 0x0 No Endpoint disable

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_EPDIS_E_INACT   0x0
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_LSB   30
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_MSB   30
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_SET_MSK   0x40000000
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_CLR_MSK   0xbfffffff
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_GET(value)   (((value) & 0x40000000) >> 30)
 
#define ALT_USB_DEV_DOEPCTL0_EPDIS_SET(value)   (((value) << 30) & 0x40000000)
 

Field : Endpoint Enable - epena

When Scatter/Gather DMA mode is enabled, for OUT endpoints this bit indicates that the descriptor structure and data buffer to receive data is setup. When Scatter/Gather DMA mode is disabled(such as for buffer-pointer based DMA mode)this bit indicates that the application has allocated the memory to start receiving data from the USB.The core clears this bit before setting any of the following interrupts on this endpoint:

SETUP Phase Done

Endpoint Disabled

Transfer Completed

In DMA mode, this bit must be Set for the core to transfer SETUP data packets into memory.

Field Enumeration Values:

Enum Value Description
ALT_USB_DEV_DOEPCTL0_EPENA_E_INACT 0x0 No action
ALT_USB_DEV_DOEPCTL0_EPENA_E_ACT 0x1 Endpoint Enabled

Field Access Macros:

#define ALT_USB_DEV_DOEPCTL0_EPENA_E_INACT   0x0
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_E_ACT   0x1
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_LSB   31
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_MSB   31
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_WIDTH   1
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_SET_MSK   0x80000000
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_CLR_MSK   0x7fffffff
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_RESET   0x0
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_GET(value)   (((value) & 0x80000000) >> 31)
 
#define ALT_USB_DEV_DOEPCTL0_EPENA_SET(value)   (((value) << 31) & 0x80000000)
 

Data Structures

struct  ALT_USB_DEV_DOEPCTL0_s
 

Macros

#define ALT_USB_DEV_DOEPCTL0_OFST   0x300
 
#define ALT_USB_DEV_DOEPCTL0_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL0_OFST))
 

Typedefs

typedef struct
ALT_USB_DEV_DOEPCTL0_s 
ALT_USB_DEV_DOEPCTL0_t
 

Data Structure Documentation

struct ALT_USB_DEV_DOEPCTL0_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_USB_DEV_DOEPCTL0.

Data Fields
const uint32_t mps: 2 Maximum Packet Size
uint32_t __pad0__: 13 UNDEFINED
const uint32_t usbactep: 1 USB Active Endpoint
uint32_t __pad1__: 1 UNDEFINED
const uint32_t naksts: 1 NAK Status
const uint32_t eptype: 2 Endpoint Type
uint32_t snp: 1 Snoop Mode
const uint32_t stall: 1 STALL Handshake
uint32_t __pad2__: 4 UNDEFINED
uint32_t cnak: 1 Clear NAK
uint32_t snak: 1 Set NAK
uint32_t __pad3__: 2 UNDEFINED
const uint32_t epdis: 1 Endpoint Disable
const uint32_t epena: 1 Endpoint Enable

Macro Definitions

#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE64   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS

64 bytes

#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE32   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS

32 bytes

#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE16   0x2

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS

16 bytes

#define ALT_USB_DEV_DOEPCTL0_MPS_E_BYTE8   0x3

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_MPS

8 bytes

#define ALT_USB_DEV_DOEPCTL0_MPS_LSB   0

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_MPS register field.

#define ALT_USB_DEV_DOEPCTL0_MPS_MSB   1

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_MPS register field.

#define ALT_USB_DEV_DOEPCTL0_MPS_WIDTH   2

The width in bits of the ALT_USB_DEV_DOEPCTL0_MPS register field.

#define ALT_USB_DEV_DOEPCTL0_MPS_SET_MSK   0x00000003

The mask used to set the ALT_USB_DEV_DOEPCTL0_MPS register field value.

#define ALT_USB_DEV_DOEPCTL0_MPS_CLR_MSK   0xfffffffc

The mask used to clear the ALT_USB_DEV_DOEPCTL0_MPS register field value.

#define ALT_USB_DEV_DOEPCTL0_MPS_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_MPS register field.

#define ALT_USB_DEV_DOEPCTL0_MPS_GET (   value)    (((value) & 0x00000003) >> 0)

Extracts the ALT_USB_DEV_DOEPCTL0_MPS field value from a register.

#define ALT_USB_DEV_DOEPCTL0_MPS_SET (   value)    (((value) << 0) & 0x00000003)

Produces a ALT_USB_DEV_DOEPCTL0_MPS register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_USBACTEP

USB Active Endpoint 0

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_LSB   15

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_MSB   15

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_SET_MSK   0x00008000

The mask used to set the ALT_USB_DEV_DOEPCTL0_USBACTEP register field value.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_CLR_MSK   0xffff7fff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_USBACTEP register field value.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_RESET   0x1

The reset value of the ALT_USB_DEV_DOEPCTL0_USBACTEP register field.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_GET (   value)    (((value) & 0x00008000) >> 15)

Extracts the ALT_USB_DEV_DOEPCTL0_USBACTEP field value from a register.

#define ALT_USB_DEV_DOEPCTL0_USBACTEP_SET (   value)    (((value) << 15) & 0x00008000)

Produces a ALT_USB_DEV_DOEPCTL0_USBACTEP register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_NAKSTS

The core is transmitting non-NAK handshakes based on the FIFO status

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_NAKSTS

The core is transmitting NAK handshakes on this endpoint

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_LSB   17

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_MSB   17

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_SET_MSK   0x00020000

The mask used to set the ALT_USB_DEV_DOEPCTL0_NAKSTS register field value.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_CLR_MSK   0xfffdffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_NAKSTS register field value.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_NAKSTS register field.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_GET (   value)    (((value) & 0x00020000) >> 17)

Extracts the ALT_USB_DEV_DOEPCTL0_NAKSTS field value from a register.

#define ALT_USB_DEV_DOEPCTL0_NAKSTS_SET (   value)    (((value) << 17) & 0x00020000)

Produces a ALT_USB_DEV_DOEPCTL0_NAKSTS register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_E_ACT   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPTYPE

Endpoint Control 0

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_LSB   18

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_MSB   19

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_WIDTH   2

The width in bits of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_SET_MSK   0x000c0000

The mask used to set the ALT_USB_DEV_DOEPCTL0_EPTYPE register field value.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_CLR_MSK   0xfff3ffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_EPTYPE register field value.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_EPTYPE register field.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_GET (   value)    (((value) & 0x000c0000) >> 18)

Extracts the ALT_USB_DEV_DOEPCTL0_EPTYPE field value from a register.

#define ALT_USB_DEV_DOEPCTL0_EPTYPE_SET (   value)    (((value) << 18) & 0x000c0000)

Produces a ALT_USB_DEV_DOEPCTL0_EPTYPE register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_SNP_E_DISD   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNP

Snoop Mode disabled

#define ALT_USB_DEV_DOEPCTL0_SNP_E_END   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNP

Snoop Mode enabled

#define ALT_USB_DEV_DOEPCTL0_SNP_LSB   20

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_SNP register field.

#define ALT_USB_DEV_DOEPCTL0_SNP_MSB   20

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_SNP register field.

#define ALT_USB_DEV_DOEPCTL0_SNP_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_SNP register field.

#define ALT_USB_DEV_DOEPCTL0_SNP_SET_MSK   0x00100000

The mask used to set the ALT_USB_DEV_DOEPCTL0_SNP register field value.

#define ALT_USB_DEV_DOEPCTL0_SNP_CLR_MSK   0xffefffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_SNP register field value.

#define ALT_USB_DEV_DOEPCTL0_SNP_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_SNP register field.

#define ALT_USB_DEV_DOEPCTL0_SNP_GET (   value)    (((value) & 0x00100000) >> 20)

Extracts the ALT_USB_DEV_DOEPCTL0_SNP field value from a register.

#define ALT_USB_DEV_DOEPCTL0_SNP_SET (   value)    (((value) << 20) & 0x00100000)

Produces a ALT_USB_DEV_DOEPCTL0_SNP register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_STALL_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_STALL

No Stall

#define ALT_USB_DEV_DOEPCTL0_STALL_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_STALL

Stall Handshake

#define ALT_USB_DEV_DOEPCTL0_STALL_LSB   21

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_STALL register field.

#define ALT_USB_DEV_DOEPCTL0_STALL_MSB   21

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_STALL register field.

#define ALT_USB_DEV_DOEPCTL0_STALL_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_STALL register field.

#define ALT_USB_DEV_DOEPCTL0_STALL_SET_MSK   0x00200000

The mask used to set the ALT_USB_DEV_DOEPCTL0_STALL register field value.

#define ALT_USB_DEV_DOEPCTL0_STALL_CLR_MSK   0xffdfffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_STALL register field value.

#define ALT_USB_DEV_DOEPCTL0_STALL_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_STALL register field.

#define ALT_USB_DEV_DOEPCTL0_STALL_GET (   value)    (((value) & 0x00200000) >> 21)

Extracts the ALT_USB_DEV_DOEPCTL0_STALL field value from a register.

#define ALT_USB_DEV_DOEPCTL0_STALL_SET (   value)    (((value) << 21) & 0x00200000)

Produces a ALT_USB_DEV_DOEPCTL0_STALL register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_CNAK_E_NOCLR   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_CNAK

No action

#define ALT_USB_DEV_DOEPCTL0_CNAK_E_CLR   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_CNAK

Clear NAK

#define ALT_USB_DEV_DOEPCTL0_CNAK_LSB   26

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_CNAK register field.

#define ALT_USB_DEV_DOEPCTL0_CNAK_MSB   26

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_CNAK register field.

#define ALT_USB_DEV_DOEPCTL0_CNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_CNAK register field.

#define ALT_USB_DEV_DOEPCTL0_CNAK_SET_MSK   0x04000000

The mask used to set the ALT_USB_DEV_DOEPCTL0_CNAK register field value.

#define ALT_USB_DEV_DOEPCTL0_CNAK_CLR_MSK   0xfbffffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_CNAK register field value.

#define ALT_USB_DEV_DOEPCTL0_CNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_CNAK register field.

#define ALT_USB_DEV_DOEPCTL0_CNAK_GET (   value)    (((value) & 0x04000000) >> 26)

Extracts the ALT_USB_DEV_DOEPCTL0_CNAK field value from a register.

#define ALT_USB_DEV_DOEPCTL0_CNAK_SET (   value)    (((value) << 26) & 0x04000000)

Produces a ALT_USB_DEV_DOEPCTL0_CNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_SNAK_E_NOSET   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNAK

No action

#define ALT_USB_DEV_DOEPCTL0_SNAK_E_SET   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_SNAK

Set NAK

#define ALT_USB_DEV_DOEPCTL0_SNAK_LSB   27

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_SNAK register field.

#define ALT_USB_DEV_DOEPCTL0_SNAK_MSB   27

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_SNAK register field.

#define ALT_USB_DEV_DOEPCTL0_SNAK_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_SNAK register field.

#define ALT_USB_DEV_DOEPCTL0_SNAK_SET_MSK   0x08000000

The mask used to set the ALT_USB_DEV_DOEPCTL0_SNAK register field value.

#define ALT_USB_DEV_DOEPCTL0_SNAK_CLR_MSK   0xf7ffffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_SNAK register field value.

#define ALT_USB_DEV_DOEPCTL0_SNAK_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_SNAK register field.

#define ALT_USB_DEV_DOEPCTL0_SNAK_GET (   value)    (((value) & 0x08000000) >> 27)

Extracts the ALT_USB_DEV_DOEPCTL0_SNAK field value from a register.

#define ALT_USB_DEV_DOEPCTL0_SNAK_SET (   value)    (((value) << 27) & 0x08000000)

Produces a ALT_USB_DEV_DOEPCTL0_SNAK register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPDIS

No Endpoint disable

#define ALT_USB_DEV_DOEPCTL0_EPDIS_LSB   30

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_MSB   30

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_SET_MSK   0x40000000

The mask used to set the ALT_USB_DEV_DOEPCTL0_EPDIS register field value.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_CLR_MSK   0xbfffffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_EPDIS register field value.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_EPDIS register field.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_GET (   value)    (((value) & 0x40000000) >> 30)

Extracts the ALT_USB_DEV_DOEPCTL0_EPDIS field value from a register.

#define ALT_USB_DEV_DOEPCTL0_EPDIS_SET (   value)    (((value) << 30) & 0x40000000)

Produces a ALT_USB_DEV_DOEPCTL0_EPDIS register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_EPENA_E_INACT   0x0

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPENA

No action

#define ALT_USB_DEV_DOEPCTL0_EPENA_E_ACT   0x1

Enumerated value for register field ALT_USB_DEV_DOEPCTL0_EPENA

Endpoint Enabled

#define ALT_USB_DEV_DOEPCTL0_EPENA_LSB   31

The Least Significant Bit (LSB) position of the ALT_USB_DEV_DOEPCTL0_EPENA register field.

#define ALT_USB_DEV_DOEPCTL0_EPENA_MSB   31

The Most Significant Bit (MSB) position of the ALT_USB_DEV_DOEPCTL0_EPENA register field.

#define ALT_USB_DEV_DOEPCTL0_EPENA_WIDTH   1

The width in bits of the ALT_USB_DEV_DOEPCTL0_EPENA register field.

#define ALT_USB_DEV_DOEPCTL0_EPENA_SET_MSK   0x80000000

The mask used to set the ALT_USB_DEV_DOEPCTL0_EPENA register field value.

#define ALT_USB_DEV_DOEPCTL0_EPENA_CLR_MSK   0x7fffffff

The mask used to clear the ALT_USB_DEV_DOEPCTL0_EPENA register field value.

#define ALT_USB_DEV_DOEPCTL0_EPENA_RESET   0x0

The reset value of the ALT_USB_DEV_DOEPCTL0_EPENA register field.

#define ALT_USB_DEV_DOEPCTL0_EPENA_GET (   value)    (((value) & 0x80000000) >> 31)

Extracts the ALT_USB_DEV_DOEPCTL0_EPENA field value from a register.

#define ALT_USB_DEV_DOEPCTL0_EPENA_SET (   value)    (((value) << 31) & 0x80000000)

Produces a ALT_USB_DEV_DOEPCTL0_EPENA register field value suitable for setting the register.

#define ALT_USB_DEV_DOEPCTL0_OFST   0x300

The byte offset of the ALT_USB_DEV_DOEPCTL0 register from the beginning of the component.

#define ALT_USB_DEV_DOEPCTL0_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_USB_DEV_DOEPCTL0_OFST))

The address of the ALT_USB_DEV_DOEPCTL0 register.

Typedef Documentation

The typedef declaration for register ALT_USB_DEV_DOEPCTL0.