Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Receive FIFO Level Register - rxflr

Description

This register contains the number of valid data entriesin the receive FIFO memory. This register can be read at any time. Ranges from 0 to 256.

Register Layout

Bits Access Reset Description
[8:0] R 0x0 Receive FIFO Level
[31:9] ??? 0x0 UNDEFINED

Field : Receive FIFO Level - rxtfl

Contains the number of valid data entries in the receive FIFO.

Field Access Macros:

#define ALT_SPIS_RXFLR_RXTFL_LSB   0
 
#define ALT_SPIS_RXFLR_RXTFL_MSB   8
 
#define ALT_SPIS_RXFLR_RXTFL_WIDTH   9
 
#define ALT_SPIS_RXFLR_RXTFL_SET_MSK   0x000001ff
 
#define ALT_SPIS_RXFLR_RXTFL_CLR_MSK   0xfffffe00
 
#define ALT_SPIS_RXFLR_RXTFL_RESET   0x0
 
#define ALT_SPIS_RXFLR_RXTFL_GET(value)   (((value) & 0x000001ff) >> 0)
 
#define ALT_SPIS_RXFLR_RXTFL_SET(value)   (((value) << 0) & 0x000001ff)
 

Data Structures

struct  ALT_SPIS_RXFLR_s
 

Macros

#define ALT_SPIS_RXFLR_OFST   0x24
 
#define ALT_SPIS_RXFLR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_RXFLR_OFST))
 

Typedefs

typedef struct ALT_SPIS_RXFLR_s ALT_SPIS_RXFLR_t
 

Data Structure Documentation

struct ALT_SPIS_RXFLR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SPIS_RXFLR.

Data Fields
const uint32_t rxtfl: 9 Receive FIFO Level
uint32_t __pad0__: 23 UNDEFINED

Macro Definitions

#define ALT_SPIS_RXFLR_RXTFL_LSB   0

The Least Significant Bit (LSB) position of the ALT_SPIS_RXFLR_RXTFL register field.

#define ALT_SPIS_RXFLR_RXTFL_MSB   8

The Most Significant Bit (MSB) position of the ALT_SPIS_RXFLR_RXTFL register field.

#define ALT_SPIS_RXFLR_RXTFL_WIDTH   9

The width in bits of the ALT_SPIS_RXFLR_RXTFL register field.

#define ALT_SPIS_RXFLR_RXTFL_SET_MSK   0x000001ff

The mask used to set the ALT_SPIS_RXFLR_RXTFL register field value.

#define ALT_SPIS_RXFLR_RXTFL_CLR_MSK   0xfffffe00

The mask used to clear the ALT_SPIS_RXFLR_RXTFL register field value.

#define ALT_SPIS_RXFLR_RXTFL_RESET   0x0

The reset value of the ALT_SPIS_RXFLR_RXTFL register field.

#define ALT_SPIS_RXFLR_RXTFL_GET (   value)    (((value) & 0x000001ff) >> 0)

Extracts the ALT_SPIS_RXFLR_RXTFL field value from a register.

#define ALT_SPIS_RXFLR_RXTFL_SET (   value)    (((value) << 0) & 0x000001ff)

Produces a ALT_SPIS_RXFLR_RXTFL register field value suitable for setting the register.

#define ALT_SPIS_RXFLR_OFST   0x24

The byte offset of the ALT_SPIS_RXFLR register from the beginning of the component.

#define ALT_SPIS_RXFLR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_RXFLR_OFST))

The address of the ALT_SPIS_RXFLR register.

Typedef Documentation

The typedef declaration for register ALT_SPIS_RXFLR.