Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Control Register - sdmmc

Description

Registers used by the SDMMC Controller. All fields are reset by a cold or warm reset.

Register Layout

Bits Access Reset Description
[2:0] RW 0x0 Drive Clock Phase Shift Select
[3] ??? 0x0 UNDEFINED
[6:4] RW 0x0 Sample Clock Phase Shift Select
[31:7] ??? 0x0 UNDEFINED

Field : Drive Clock Phase Shift Select - drvsel

Select which phase shift of the clock for cclk_in_drv.

Field Enumeration Values:

Enum | Value | Description :--------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES0 | 0x0 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES45 | 0x1 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES90 | 0x2 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES135 | 0x3 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES180 | 0x4 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES225 | 0x5 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES270 | 0x6 | ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES315 | 0x7 |

Field Access Macros:

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES0   0x0
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES45   0x1
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES90   0x2
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES135   0x3
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES180   0x4
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES225   0x5
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES270   0x6
 
#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES315   0x7
 
#define ALT_SYSMGR_SDMMC_DRVSEL_LSB   0
 
#define ALT_SYSMGR_SDMMC_DRVSEL_MSB   2
 
#define ALT_SYSMGR_SDMMC_DRVSEL_WIDTH   3
 
#define ALT_SYSMGR_SDMMC_DRVSEL_SET_MSK   0x00000007
 
#define ALT_SYSMGR_SDMMC_DRVSEL_CLR_MSK   0xfffffff8
 
#define ALT_SYSMGR_SDMMC_DRVSEL_RESET   0x0
 
#define ALT_SYSMGR_SDMMC_DRVSEL_GET(value)   (((value) & 0x00000007) >> 0)
 
#define ALT_SYSMGR_SDMMC_DRVSEL_SET(value)   (((value) << 0) & 0x00000007)
 

Field : Sample Clock Phase Shift Select - smplsel

Select which phase shift of the clock for cclk_in_sample.

Field Enumeration Values:

Enum | Value | Description :----------------------------------------------------------------------------------—|:---—|:---------— ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES0 | 0x0 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES45 | 0x1 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES90 | 0x2 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES135 | 0x3 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES180 | 0x4 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES225 | 0x5 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES270 | 0x6 | ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES315 | 0x7 |

Field Access Macros:

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES0   0x0
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES45   0x1
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES90   0x2
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES135   0x3
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES180   0x4
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES225   0x5
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES270   0x6
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES315   0x7
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_LSB   4
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_MSB   6
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_WIDTH   3
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_SET_MSK   0x00000070
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_CLR_MSK   0xffffff8f
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_RESET   0x0
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_GET(value)   (((value) & 0x00000070) >> 4)
 
#define ALT_SYSMGR_SDMMC_SMPLSEL_SET(value)   (((value) << 4) & 0x00000070)
 

Data Structures

struct  ALT_SYSMGR_SDMMC_s
 

Macros

#define ALT_SYSMGR_SDMMC_RESET   0x00000000
 
#define ALT_SYSMGR_SDMMC_OFST   0x28
 

Typedefs

typedef struct ALT_SYSMGR_SDMMC_s ALT_SYSMGR_SDMMC_t
 

Data Structure Documentation

struct ALT_SYSMGR_SDMMC_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_SDMMC.

Data Fields
uint32_t drvsel: 3 Drive Clock Phase Shift Select
uint32_t __pad0__: 1 UNDEFINED
uint32_t smplsel: 3 Sample Clock Phase Shift Select
uint32_t __pad1__: 25 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES0   0x0

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES45   0x1

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES90   0x2

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES135   0x3

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES180   0x4

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES225   0x5

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES270   0x6

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_E_DEGREES315   0x7

Enumerated value for register field ALT_SYSMGR_SDMMC_DRVSEL

#define ALT_SYSMGR_SDMMC_DRVSEL_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_DRVSEL register field.

#define ALT_SYSMGR_SDMMC_DRVSEL_MSB   2

The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_DRVSEL register field.

#define ALT_SYSMGR_SDMMC_DRVSEL_WIDTH   3

The width in bits of the ALT_SYSMGR_SDMMC_DRVSEL register field.

#define ALT_SYSMGR_SDMMC_DRVSEL_SET_MSK   0x00000007

The mask used to set the ALT_SYSMGR_SDMMC_DRVSEL register field value.

#define ALT_SYSMGR_SDMMC_DRVSEL_CLR_MSK   0xfffffff8

The mask used to clear the ALT_SYSMGR_SDMMC_DRVSEL register field value.

#define ALT_SYSMGR_SDMMC_DRVSEL_RESET   0x0

The reset value of the ALT_SYSMGR_SDMMC_DRVSEL register field.

#define ALT_SYSMGR_SDMMC_DRVSEL_GET (   value)    (((value) & 0x00000007) >> 0)

Extracts the ALT_SYSMGR_SDMMC_DRVSEL field value from a register.

#define ALT_SYSMGR_SDMMC_DRVSEL_SET (   value)    (((value) << 0) & 0x00000007)

Produces a ALT_SYSMGR_SDMMC_DRVSEL register field value suitable for setting the register.

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES0   0x0

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES45   0x1

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES90   0x2

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES135   0x3

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES180   0x4

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES225   0x5

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES270   0x6

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_E_DEGREES315   0x7

Enumerated value for register field ALT_SYSMGR_SDMMC_SMPLSEL

#define ALT_SYSMGR_SDMMC_SMPLSEL_LSB   4

The Least Significant Bit (LSB) position of the ALT_SYSMGR_SDMMC_SMPLSEL register field.

#define ALT_SYSMGR_SDMMC_SMPLSEL_MSB   6

The Most Significant Bit (MSB) position of the ALT_SYSMGR_SDMMC_SMPLSEL register field.

#define ALT_SYSMGR_SDMMC_SMPLSEL_WIDTH   3

The width in bits of the ALT_SYSMGR_SDMMC_SMPLSEL register field.

#define ALT_SYSMGR_SDMMC_SMPLSEL_SET_MSK   0x00000070

The mask used to set the ALT_SYSMGR_SDMMC_SMPLSEL register field value.

#define ALT_SYSMGR_SDMMC_SMPLSEL_CLR_MSK   0xffffff8f

The mask used to clear the ALT_SYSMGR_SDMMC_SMPLSEL register field value.

#define ALT_SYSMGR_SDMMC_SMPLSEL_RESET   0x0

The reset value of the ALT_SYSMGR_SDMMC_SMPLSEL register field.

#define ALT_SYSMGR_SDMMC_SMPLSEL_GET (   value)    (((value) & 0x00000070) >> 4)

Extracts the ALT_SYSMGR_SDMMC_SMPLSEL field value from a register.

#define ALT_SYSMGR_SDMMC_SMPLSEL_SET (   value)    (((value) << 4) & 0x00000070)

Produces a ALT_SYSMGR_SDMMC_SMPLSEL register field value suitable for setting the register.

#define ALT_SYSMGR_SDMMC_RESET   0x00000000

The reset value of the ALT_SYSMGR_SDMMC register.

#define ALT_SYSMGR_SDMMC_OFST   0x28

The byte offset of the ALT_SYSMGR_SDMMC register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_SDMMC.