Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : enable_clear

Description

Clears Region Enable field when written with 1

Register Layout

Bits Access Reset Description
[0] W 0x0 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN
[1] W 0x0 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN
[2] W 0x0 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN
[3] W 0x0 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN
[4] W 0x0 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN
[5] W 0x0 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN
[31:6] ??? Unknown UNDEFINED

Field : region0enable

Region 0 Enable Clear

Writing zero has no effect

Writing one will clear the region0enable bit to zero

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_LSB   0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_MSB   0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_WIDTH   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_SET_MSK   0x00000001
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_CLR_MSK   0xfffffffe
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : region1enable

Region 1 Enable Clear

Writing zero has no effect

Writing one will clear the region1enable bit to zero

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_LSB   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_MSB   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_WIDTH   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_SET_MSK   0x00000002
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_CLR_MSK   0xfffffffd
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_SET(value)   (((value) << 1) & 0x00000002)
 

Field : region2enable

Region 2 Enable Clear

Writing zero has no effect

Writing one will clear the region2enable bit to zero

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_LSB   2
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_MSB   2
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_WIDTH   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_SET_MSK   0x00000004
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_CLR_MSK   0xfffffffb
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_SET(value)   (((value) << 2) & 0x00000004)
 

Field : region3enable

Region 3 Enable Clear

Writing zero has no effect

Writing one will clear the region3enable bit to zero

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_LSB   3
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_MSB   3
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_WIDTH   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_SET_MSK   0x00000008
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_CLR_MSK   0xfffffff7
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_SET(value)   (((value) << 3) & 0x00000008)
 

Field : region4enable

Region 4 Enable Clear

Writing zero has no effect

Writing one will clear the region4enable bit to zero

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_LSB   4
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_MSB   4
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_WIDTH   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_SET_MSK   0x00000010
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_CLR_MSK   0xffffffef
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_SET(value)   (((value) << 4) & 0x00000010)
 

Field : region5enable

Region 5 Enable Clear

Writing zero has no effect

Writing one will clear the region5enable bit to zero

Field Access Macros:

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_LSB   5
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_MSB   5
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_WIDTH   1
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_SET_MSK   0x00000020
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_CLR_MSK   0xffffffdf
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_RESET   0x0
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_SET(value)   (((value) << 5) & 0x00000020)
 

Data Structures

struct  ALT_NOC_FW_OCRAM_SCR_EN_CLR_s
 

Macros

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_RESET   0x00000000
 
#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_OFST   0x8
 

Typedefs

typedef struct
ALT_NOC_FW_OCRAM_SCR_EN_CLR_s 
ALT_NOC_FW_OCRAM_SCR_EN_CLR_t
 

Data Structure Documentation

struct ALT_NOC_FW_OCRAM_SCR_EN_CLR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_FW_OCRAM_SCR_EN_CLR.

Data Fields
uint32_t region0enable: 1 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN
uint32_t region1enable: 1 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN
uint32_t region2enable: 1 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN
uint32_t region3enable: 1 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN
uint32_t region4enable: 1 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN
uint32_t region5enable: 1 ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN
uint32_t __pad0__: 26 UNDEFINED

Macro Definitions

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_MSB   0

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_WIDTH   1

The width in bits of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_SET_MSK   0x00000001

The mask used to set the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG0EN register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_LSB   1

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_MSB   1

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_WIDTH   1

The width in bits of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_SET_MSK   0x00000002

The mask used to set the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_CLR_MSK   0xfffffffd

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG1EN register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_LSB   2

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_MSB   2

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_WIDTH   1

The width in bits of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_SET_MSK   0x00000004

The mask used to set the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_CLR_MSK   0xfffffffb

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG2EN register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_LSB   3

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_MSB   3

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_WIDTH   1

The width in bits of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_SET_MSK   0x00000008

The mask used to set the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_CLR_MSK   0xfffffff7

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG3EN register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_LSB   4

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_MSB   4

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_WIDTH   1

The width in bits of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_SET_MSK   0x00000010

The mask used to set the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_CLR_MSK   0xffffffef

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG4EN register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_LSB   5

The Least Significant Bit (LSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_MSB   5

The Most Significant Bit (MSB) position of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_WIDTH   1

The width in bits of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_SET_MSK   0x00000020

The mask used to set the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_CLR_MSK   0xffffffdf

The mask used to clear the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field value.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_RESET   0x0

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN field value from a register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_NOC_FW_OCRAM_SCR_EN_CLR_REG5EN register field value suitable for setting the register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_RESET   0x00000000

The reset value of the ALT_NOC_FW_OCRAM_SCR_EN_CLR register.

#define ALT_NOC_FW_OCRAM_SCR_EN_CLR_OFST   0x8

The byte offset of the ALT_NOC_FW_OCRAM_SCR_EN_CLR register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_NOC_FW_OCRAM_SCR_EN_CLR.