Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : ic_status

Description

Name: I2C Status Register

Size: 7 bits

Address Offset: 0x70

Read/Write Access: Read

This is a read-only register used to indicate the current

transfer status and FIFO status. The status register may be

read at any time. None of the bits in this register request

an interrupt.

When the I2C is disabled by writing 0 in bit 0 of the

IC_ENABLE register:

When the master or slave state machines goes to idle

and ic_en=0:

Register Layout

Bits Access Reset Description
[0] R 0x0 ALT_I2C_STAT_ACTIVITY
[1] R 0x1 ALT_I2C_STAT_TFNF
[2] R 0x1 ALT_I2C_STAT_TFE
[3] R 0x0 ALT_I2C_STAT_RFNE
[4] R 0x0 ALT_I2C_STAT_RFF
[5] R 0x0 ALT_I2C_STAT_MST_ACTIVITY
[6] R 0x0 ALT_I2C_STAT_SLV_ACTIVITY
[31:7] ??? 0x0 UNDEFINED

Field : activity

I2C Activity Status.

Reset value: 0x0

Field Access Macros:

#define ALT_I2C_STAT_ACTIVITY_LSB   0
 
#define ALT_I2C_STAT_ACTIVITY_MSB   0
 
#define ALT_I2C_STAT_ACTIVITY_WIDTH   1
 
#define ALT_I2C_STAT_ACTIVITY_SET_MSK   0x00000001
 
#define ALT_I2C_STAT_ACTIVITY_CLR_MSK   0xfffffffe
 
#define ALT_I2C_STAT_ACTIVITY_RESET   0x0
 
#define ALT_I2C_STAT_ACTIVITY_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_I2C_STAT_ACTIVITY_SET(value)   (((value) << 0) & 0x00000001)
 

Field : tfnf

Transmit FIFO Not Full.

Set when the transmit FIFO contains one or more

empty locations, and is cleared when the FIFO is full.

0: Transmit FIFO is full

1: Transmit FIFO is not full

Reset value: 0x1

Field Enumeration Values:

Enum Value Description
ALT_I2C_STAT_TFNF_E_FULL 0x0 Transmit FIFO is full
ALT_I2C_STAT_TFNF_E_NOTFULL 0x1 Transmit FIFO is not full

Field Access Macros:

#define ALT_I2C_STAT_TFNF_E_FULL   0x0
 
#define ALT_I2C_STAT_TFNF_E_NOTFULL   0x1
 
#define ALT_I2C_STAT_TFNF_LSB   1
 
#define ALT_I2C_STAT_TFNF_MSB   1
 
#define ALT_I2C_STAT_TFNF_WIDTH   1
 
#define ALT_I2C_STAT_TFNF_SET_MSK   0x00000002
 
#define ALT_I2C_STAT_TFNF_CLR_MSK   0xfffffffd
 
#define ALT_I2C_STAT_TFNF_RESET   0x1
 
#define ALT_I2C_STAT_TFNF_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_I2C_STAT_TFNF_SET(value)   (((value) << 1) & 0x00000002)
 

Field : tfe

Transmit FIFO Completely Empty.

When the transmit FIFO is completely empty, this bit is set.

When it contains one or more valid entries, this bit is

cleared. This bit field does not request an interrupt.

0: Transmit FIFO is not empty

1: Transmit FIFO is empty

Reset value: 0x1

Field Enumeration Values:

Enum Value Description
ALT_I2C_STAT_TFE_E_NOTEMPTY 0x0 Transmit FIFO is not empty
ALT_I2C_STAT_TFE_E_EMPTY 0x1 Transmit FIFO is empty

Field Access Macros:

#define ALT_I2C_STAT_TFE_E_NOTEMPTY   0x0
 
#define ALT_I2C_STAT_TFE_E_EMPTY   0x1
 
#define ALT_I2C_STAT_TFE_LSB   2
 
#define ALT_I2C_STAT_TFE_MSB   2
 
#define ALT_I2C_STAT_TFE_WIDTH   1
 
#define ALT_I2C_STAT_TFE_SET_MSK   0x00000004
 
#define ALT_I2C_STAT_TFE_CLR_MSK   0xfffffffb
 
#define ALT_I2C_STAT_TFE_RESET   0x1
 
#define ALT_I2C_STAT_TFE_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_I2C_STAT_TFE_SET(value)   (((value) << 2) & 0x00000004)
 

Field : rfne

Receive FIFO Not Empty.

This bit is set when the receive FIFO contains one or

more entries; it is cleared when the receive FIFO is empty.

0: Receive FIFO is empty

1: Receive FIFO is not empty

Reset value: 0x0

Field Enumeration Values:

Enum Value Description
ALT_I2C_STAT_RFNE_E_EMPTY 0x0 Receive FIFO is empty
ALT_I2C_STAT_RFNE_E_NOTEMPTY 0x1 Receive FIFO is not empty

Field Access Macros:

#define ALT_I2C_STAT_RFNE_E_EMPTY   0x0
 
#define ALT_I2C_STAT_RFNE_E_NOTEMPTY   0x1
 
#define ALT_I2C_STAT_RFNE_LSB   3
 
#define ALT_I2C_STAT_RFNE_MSB   3
 
#define ALT_I2C_STAT_RFNE_WIDTH   1
 
#define ALT_I2C_STAT_RFNE_SET_MSK   0x00000008
 
#define ALT_I2C_STAT_RFNE_CLR_MSK   0xfffffff7
 
#define ALT_I2C_STAT_RFNE_RESET   0x0
 
#define ALT_I2C_STAT_RFNE_GET(value)   (((value) & 0x00000008) >> 3)
 
#define ALT_I2C_STAT_RFNE_SET(value)   (((value) << 3) & 0x00000008)
 

Field : rff

Receive FIFO Completely Full.

When the receive FIFO is completely full, this

bit is set. When the receive FIFO contains one

or more empty location, this bit is cleared.

0: Receive FIFO is not full

1: Receive FIFO is full

Reset value: 0x0

Field Enumeration Values:

Enum Value Description
ALT_I2C_STAT_RFF_E_NOTFULL 0x0 Receive FIFO is not full
ALT_I2C_STAT_RFF_E_FULL 0x1 Receive FIFO is full

Field Access Macros:

#define ALT_I2C_STAT_RFF_E_NOTFULL   0x0
 
#define ALT_I2C_STAT_RFF_E_FULL   0x1
 
#define ALT_I2C_STAT_RFF_LSB   4
 
#define ALT_I2C_STAT_RFF_MSB   4
 
#define ALT_I2C_STAT_RFF_WIDTH   1
 
#define ALT_I2C_STAT_RFF_SET_MSK   0x00000010
 
#define ALT_I2C_STAT_RFF_CLR_MSK   0xffffffef
 
#define ALT_I2C_STAT_RFF_RESET   0x0
 
#define ALT_I2C_STAT_RFF_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_I2C_STAT_RFF_SET(value)   (((value) << 4) & 0x00000010)
 

Field : mst_activity

Master FSM Activity Status.

When the Master Finite State Machine (FSM) is

not in the IDLE state, this bit is set.

0: Master FSM is in IDLE state so the Master part

of DW_apb_i2c is not Active

1: Master FSM is not in IDLE state so the Master

part of DW_apb_i2c is Active

Note

IC_STATUS[0]-that is, ACTIVITY bit-is the OR of

SLV_ACTIVITY and MST_ACTIVITY bits.

Reset value: 0x0

Field Enumeration Values:

Enum Value Description
ALT_I2C_STAT_MST_ACTIVITY_E_IDLE 0x0 Master FSM is in IDLE state. Master part of i2c
: is not Active
ALT_I2C_STAT_MST_ACTIVITY_E_NOTIDLE 0x1 Master FSM is not in IDLE state. Master part of
: i2c is Active

Field Access Macros:

#define ALT_I2C_STAT_MST_ACTIVITY_E_IDLE   0x0
 
#define ALT_I2C_STAT_MST_ACTIVITY_E_NOTIDLE   0x1
 
#define ALT_I2C_STAT_MST_ACTIVITY_LSB   5
 
#define ALT_I2C_STAT_MST_ACTIVITY_MSB   5
 
#define ALT_I2C_STAT_MST_ACTIVITY_WIDTH   1
 
#define ALT_I2C_STAT_MST_ACTIVITY_SET_MSK   0x00000020
 
#define ALT_I2C_STAT_MST_ACTIVITY_CLR_MSK   0xffffffdf
 
#define ALT_I2C_STAT_MST_ACTIVITY_RESET   0x0
 
#define ALT_I2C_STAT_MST_ACTIVITY_GET(value)   (((value) & 0x00000020) >> 5)
 
#define ALT_I2C_STAT_MST_ACTIVITY_SET(value)   (((value) << 5) & 0x00000020)
 

Field : slv_activity

Slave FSM Activity Status.

When the Slave Finite State Machine (FSM) is not

in the IDLE state, this bit is set.

0: Slave FSM is in IDLE state so the Slave part of

DW_apb_i2c is not Active

1: Slave FSM is not in IDLE state so the Slave part

of DW_apb_i2c is Active

Reset value: 0x0

Field Enumeration Values:

Enum Value Description
ALT_I2C_STAT_SLV_ACTIVITY_E_IDLE 0x0 Slave FSM is in IDLE state so the Slave part of
: i2c is not Active
ALT_I2C_STAT_SLV_ACTIVITY_E_NOTIDLE 0x1 Slave FSM is not in IDLE state so the Slave part
: of i2c is Active

Field Access Macros:

#define ALT_I2C_STAT_SLV_ACTIVITY_E_IDLE   0x0
 
#define ALT_I2C_STAT_SLV_ACTIVITY_E_NOTIDLE   0x1
 
#define ALT_I2C_STAT_SLV_ACTIVITY_LSB   6
 
#define ALT_I2C_STAT_SLV_ACTIVITY_MSB   6
 
#define ALT_I2C_STAT_SLV_ACTIVITY_WIDTH   1
 
#define ALT_I2C_STAT_SLV_ACTIVITY_SET_MSK   0x00000040
 
#define ALT_I2C_STAT_SLV_ACTIVITY_CLR_MSK   0xffffffbf
 
#define ALT_I2C_STAT_SLV_ACTIVITY_RESET   0x0
 
#define ALT_I2C_STAT_SLV_ACTIVITY_GET(value)   (((value) & 0x00000040) >> 6)
 
#define ALT_I2C_STAT_SLV_ACTIVITY_SET(value)   (((value) << 6) & 0x00000040)
 

Data Structures

struct  ALT_I2C_STAT_s
 

Macros

#define ALT_I2C_STAT_RESET   0x00000006
 
#define ALT_I2C_STAT_OFST   0x70
 
#define ALT_I2C_STAT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_STAT_OFST))
 

Typedefs

typedef struct ALT_I2C_STAT_s ALT_I2C_STAT_t
 

Data Structure Documentation

struct ALT_I2C_STAT_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_I2C_STAT.

Data Fields
const uint32_t activity: 1 ALT_I2C_STAT_ACTIVITY
const uint32_t tfnf: 1 ALT_I2C_STAT_TFNF
const uint32_t tfe: 1 ALT_I2C_STAT_TFE
const uint32_t rfne: 1 ALT_I2C_STAT_RFNE
const uint32_t rff: 1 ALT_I2C_STAT_RFF
const uint32_t mst_activity: 1 ALT_I2C_STAT_MST_ACTIVITY
const uint32_t slv_activity: 1 ALT_I2C_STAT_SLV_ACTIVITY
uint32_t __pad0__: 25 UNDEFINED

Macro Definitions

#define ALT_I2C_STAT_ACTIVITY_LSB   0

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_ACTIVITY register field.

#define ALT_I2C_STAT_ACTIVITY_MSB   0

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_ACTIVITY register field.

#define ALT_I2C_STAT_ACTIVITY_WIDTH   1

The width in bits of the ALT_I2C_STAT_ACTIVITY register field.

#define ALT_I2C_STAT_ACTIVITY_SET_MSK   0x00000001

The mask used to set the ALT_I2C_STAT_ACTIVITY register field value.

#define ALT_I2C_STAT_ACTIVITY_CLR_MSK   0xfffffffe

The mask used to clear the ALT_I2C_STAT_ACTIVITY register field value.

#define ALT_I2C_STAT_ACTIVITY_RESET   0x0

The reset value of the ALT_I2C_STAT_ACTIVITY register field.

#define ALT_I2C_STAT_ACTIVITY_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_I2C_STAT_ACTIVITY field value from a register.

#define ALT_I2C_STAT_ACTIVITY_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_I2C_STAT_ACTIVITY register field value suitable for setting the register.

#define ALT_I2C_STAT_TFNF_E_FULL   0x0

Enumerated value for register field ALT_I2C_STAT_TFNF

Transmit FIFO is full

#define ALT_I2C_STAT_TFNF_E_NOTFULL   0x1

Enumerated value for register field ALT_I2C_STAT_TFNF

Transmit FIFO is not full

#define ALT_I2C_STAT_TFNF_LSB   1

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_TFNF register field.

#define ALT_I2C_STAT_TFNF_MSB   1

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_TFNF register field.

#define ALT_I2C_STAT_TFNF_WIDTH   1

The width in bits of the ALT_I2C_STAT_TFNF register field.

#define ALT_I2C_STAT_TFNF_SET_MSK   0x00000002

The mask used to set the ALT_I2C_STAT_TFNF register field value.

#define ALT_I2C_STAT_TFNF_CLR_MSK   0xfffffffd

The mask used to clear the ALT_I2C_STAT_TFNF register field value.

#define ALT_I2C_STAT_TFNF_RESET   0x1

The reset value of the ALT_I2C_STAT_TFNF register field.

#define ALT_I2C_STAT_TFNF_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_I2C_STAT_TFNF field value from a register.

#define ALT_I2C_STAT_TFNF_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_I2C_STAT_TFNF register field value suitable for setting the register.

#define ALT_I2C_STAT_TFE_E_NOTEMPTY   0x0

Enumerated value for register field ALT_I2C_STAT_TFE

Transmit FIFO is not empty

#define ALT_I2C_STAT_TFE_E_EMPTY   0x1

Enumerated value for register field ALT_I2C_STAT_TFE

Transmit FIFO is empty

#define ALT_I2C_STAT_TFE_LSB   2

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_TFE register field.

#define ALT_I2C_STAT_TFE_MSB   2

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_TFE register field.

#define ALT_I2C_STAT_TFE_WIDTH   1

The width in bits of the ALT_I2C_STAT_TFE register field.

#define ALT_I2C_STAT_TFE_SET_MSK   0x00000004

The mask used to set the ALT_I2C_STAT_TFE register field value.

#define ALT_I2C_STAT_TFE_CLR_MSK   0xfffffffb

The mask used to clear the ALT_I2C_STAT_TFE register field value.

#define ALT_I2C_STAT_TFE_RESET   0x1

The reset value of the ALT_I2C_STAT_TFE register field.

#define ALT_I2C_STAT_TFE_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_I2C_STAT_TFE field value from a register.

#define ALT_I2C_STAT_TFE_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_I2C_STAT_TFE register field value suitable for setting the register.

#define ALT_I2C_STAT_RFNE_E_EMPTY   0x0

Enumerated value for register field ALT_I2C_STAT_RFNE

Receive FIFO is empty

#define ALT_I2C_STAT_RFNE_E_NOTEMPTY   0x1

Enumerated value for register field ALT_I2C_STAT_RFNE

Receive FIFO is not empty

#define ALT_I2C_STAT_RFNE_LSB   3

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_RFNE register field.

#define ALT_I2C_STAT_RFNE_MSB   3

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_RFNE register field.

#define ALT_I2C_STAT_RFNE_WIDTH   1

The width in bits of the ALT_I2C_STAT_RFNE register field.

#define ALT_I2C_STAT_RFNE_SET_MSK   0x00000008

The mask used to set the ALT_I2C_STAT_RFNE register field value.

#define ALT_I2C_STAT_RFNE_CLR_MSK   0xfffffff7

The mask used to clear the ALT_I2C_STAT_RFNE register field value.

#define ALT_I2C_STAT_RFNE_RESET   0x0

The reset value of the ALT_I2C_STAT_RFNE register field.

#define ALT_I2C_STAT_RFNE_GET (   value)    (((value) & 0x00000008) >> 3)

Extracts the ALT_I2C_STAT_RFNE field value from a register.

#define ALT_I2C_STAT_RFNE_SET (   value)    (((value) << 3) & 0x00000008)

Produces a ALT_I2C_STAT_RFNE register field value suitable for setting the register.

#define ALT_I2C_STAT_RFF_E_NOTFULL   0x0

Enumerated value for register field ALT_I2C_STAT_RFF

Receive FIFO is not full

#define ALT_I2C_STAT_RFF_E_FULL   0x1

Enumerated value for register field ALT_I2C_STAT_RFF

Receive FIFO is full

#define ALT_I2C_STAT_RFF_LSB   4

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_RFF register field.

#define ALT_I2C_STAT_RFF_MSB   4

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_RFF register field.

#define ALT_I2C_STAT_RFF_WIDTH   1

The width in bits of the ALT_I2C_STAT_RFF register field.

#define ALT_I2C_STAT_RFF_SET_MSK   0x00000010

The mask used to set the ALT_I2C_STAT_RFF register field value.

#define ALT_I2C_STAT_RFF_CLR_MSK   0xffffffef

The mask used to clear the ALT_I2C_STAT_RFF register field value.

#define ALT_I2C_STAT_RFF_RESET   0x0

The reset value of the ALT_I2C_STAT_RFF register field.

#define ALT_I2C_STAT_RFF_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_I2C_STAT_RFF field value from a register.

#define ALT_I2C_STAT_RFF_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_I2C_STAT_RFF register field value suitable for setting the register.

#define ALT_I2C_STAT_MST_ACTIVITY_E_IDLE   0x0

Enumerated value for register field ALT_I2C_STAT_MST_ACTIVITY

Master FSM is in IDLE state. Master part of i2c is not Active

#define ALT_I2C_STAT_MST_ACTIVITY_E_NOTIDLE   0x1

Enumerated value for register field ALT_I2C_STAT_MST_ACTIVITY

Master FSM is not in IDLE state. Master part of i2c is Active

#define ALT_I2C_STAT_MST_ACTIVITY_LSB   5

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_MST_ACTIVITY register field.

#define ALT_I2C_STAT_MST_ACTIVITY_MSB   5

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_MST_ACTIVITY register field.

#define ALT_I2C_STAT_MST_ACTIVITY_WIDTH   1

The width in bits of the ALT_I2C_STAT_MST_ACTIVITY register field.

#define ALT_I2C_STAT_MST_ACTIVITY_SET_MSK   0x00000020

The mask used to set the ALT_I2C_STAT_MST_ACTIVITY register field value.

#define ALT_I2C_STAT_MST_ACTIVITY_CLR_MSK   0xffffffdf

The mask used to clear the ALT_I2C_STAT_MST_ACTIVITY register field value.

#define ALT_I2C_STAT_MST_ACTIVITY_RESET   0x0

The reset value of the ALT_I2C_STAT_MST_ACTIVITY register field.

#define ALT_I2C_STAT_MST_ACTIVITY_GET (   value)    (((value) & 0x00000020) >> 5)

Extracts the ALT_I2C_STAT_MST_ACTIVITY field value from a register.

#define ALT_I2C_STAT_MST_ACTIVITY_SET (   value)    (((value) << 5) & 0x00000020)

Produces a ALT_I2C_STAT_MST_ACTIVITY register field value suitable for setting the register.

#define ALT_I2C_STAT_SLV_ACTIVITY_E_IDLE   0x0

Enumerated value for register field ALT_I2C_STAT_SLV_ACTIVITY

Slave FSM is in IDLE state so the Slave part of i2c is not Active

#define ALT_I2C_STAT_SLV_ACTIVITY_E_NOTIDLE   0x1

Enumerated value for register field ALT_I2C_STAT_SLV_ACTIVITY

Slave FSM is not in IDLE state so the Slave part of i2c is Active

#define ALT_I2C_STAT_SLV_ACTIVITY_LSB   6

The Least Significant Bit (LSB) position of the ALT_I2C_STAT_SLV_ACTIVITY register field.

#define ALT_I2C_STAT_SLV_ACTIVITY_MSB   6

The Most Significant Bit (MSB) position of the ALT_I2C_STAT_SLV_ACTIVITY register field.

#define ALT_I2C_STAT_SLV_ACTIVITY_WIDTH   1

The width in bits of the ALT_I2C_STAT_SLV_ACTIVITY register field.

#define ALT_I2C_STAT_SLV_ACTIVITY_SET_MSK   0x00000040

The mask used to set the ALT_I2C_STAT_SLV_ACTIVITY register field value.

#define ALT_I2C_STAT_SLV_ACTIVITY_CLR_MSK   0xffffffbf

The mask used to clear the ALT_I2C_STAT_SLV_ACTIVITY register field value.

#define ALT_I2C_STAT_SLV_ACTIVITY_RESET   0x0

The reset value of the ALT_I2C_STAT_SLV_ACTIVITY register field.

#define ALT_I2C_STAT_SLV_ACTIVITY_GET (   value)    (((value) & 0x00000040) >> 6)

Extracts the ALT_I2C_STAT_SLV_ACTIVITY field value from a register.

#define ALT_I2C_STAT_SLV_ACTIVITY_SET (   value)    (((value) << 6) & 0x00000040)

Produces a ALT_I2C_STAT_SLV_ACTIVITY register field value suitable for setting the register.

#define ALT_I2C_STAT_RESET   0x00000006

The reset value of the ALT_I2C_STAT register.

#define ALT_I2C_STAT_OFST   0x70

The byte offset of the ALT_I2C_STAT register from the beginning of the component.

#define ALT_I2C_STAT_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_STAT_OFST))

The address of the ALT_I2C_STAT register.

Typedef Documentation

The typedef declaration for register ALT_I2C_STAT.