Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : dmacr

Description

DMA Control Register.

This register is only valid when DW_apb_ssi is configured with a set of

DMA Controller interface signals (SSI_HAS_DMA = 1). When DW_apb_ssi is

not configured for DMA operation, this register will not exist and writing

to the register's address will have no effect; reading from this register

address will return zero. The register is used to enable the DMA

Controller interface operation.

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_SPIS_DMACR_RDMAE
[1] RW 0x0 ALT_SPIS_DMACR_TDMAE
[31:2] ??? 0x0 UNDEFINED

Field : rdmae

Receive DMA Enable.

This bit enables/disables the receive FIFO DMA channel

0 = Receive DMA disabled

1 = Receive DMA enabled

Field Enumeration Values:

Enum Value Description
ALT_SPIS_DMACR_RDMAE_E_DISD 0x0 Receive DMA disabled
ALT_SPIS_DMACR_RDMAE_E_END 0x1 Receive DMA enabled

Field Access Macros:

#define ALT_SPIS_DMACR_RDMAE_E_DISD   0x0
 
#define ALT_SPIS_DMACR_RDMAE_E_END   0x1
 
#define ALT_SPIS_DMACR_RDMAE_LSB   0
 
#define ALT_SPIS_DMACR_RDMAE_MSB   0
 
#define ALT_SPIS_DMACR_RDMAE_WIDTH   1
 
#define ALT_SPIS_DMACR_RDMAE_SET_MSK   0x00000001
 
#define ALT_SPIS_DMACR_RDMAE_CLR_MSK   0xfffffffe
 
#define ALT_SPIS_DMACR_RDMAE_RESET   0x0
 
#define ALT_SPIS_DMACR_RDMAE_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SPIS_DMACR_RDMAE_SET(value)   (((value) << 0) & 0x00000001)
 

Field : tdmae

Transmit DMA Enable.

This bit enables/disables the transmit FIFO DMA channel.

0 = Transmit DMA disabled

1 = Transmit DMA enabled

Field Enumeration Values:

Enum Value Description
ALT_SPIS_DMACR_TDMAE_E_DISD 0x0 Transmit DMA disabled
ALT_SPIS_DMACR_TDMAE_E_END 0x1 Transmit DMA enabled

Field Access Macros:

#define ALT_SPIS_DMACR_TDMAE_E_DISD   0x0
 
#define ALT_SPIS_DMACR_TDMAE_E_END   0x1
 
#define ALT_SPIS_DMACR_TDMAE_LSB   1
 
#define ALT_SPIS_DMACR_TDMAE_MSB   1
 
#define ALT_SPIS_DMACR_TDMAE_WIDTH   1
 
#define ALT_SPIS_DMACR_TDMAE_SET_MSK   0x00000002
 
#define ALT_SPIS_DMACR_TDMAE_CLR_MSK   0xfffffffd
 
#define ALT_SPIS_DMACR_TDMAE_RESET   0x0
 
#define ALT_SPIS_DMACR_TDMAE_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_SPIS_DMACR_TDMAE_SET(value)   (((value) << 1) & 0x00000002)
 

Data Structures

struct  ALT_SPIS_DMACR_s
 

Macros

#define ALT_SPIS_DMACR_RESET   0x00000000
 
#define ALT_SPIS_DMACR_OFST   0x4c
 
#define ALT_SPIS_DMACR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_DMACR_OFST))
 

Typedefs

typedef struct ALT_SPIS_DMACR_s ALT_SPIS_DMACR_t
 

Data Structure Documentation

struct ALT_SPIS_DMACR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SPIS_DMACR.

Data Fields
uint32_t rdmae: 1 ALT_SPIS_DMACR_RDMAE
uint32_t tdmae: 1 ALT_SPIS_DMACR_TDMAE
uint32_t __pad0__: 30 UNDEFINED

Macro Definitions

#define ALT_SPIS_DMACR_RDMAE_E_DISD   0x0

Enumerated value for register field ALT_SPIS_DMACR_RDMAE

Receive DMA disabled

#define ALT_SPIS_DMACR_RDMAE_E_END   0x1

Enumerated value for register field ALT_SPIS_DMACR_RDMAE

Receive DMA enabled

#define ALT_SPIS_DMACR_RDMAE_LSB   0

The Least Significant Bit (LSB) position of the ALT_SPIS_DMACR_RDMAE register field.

#define ALT_SPIS_DMACR_RDMAE_MSB   0

The Most Significant Bit (MSB) position of the ALT_SPIS_DMACR_RDMAE register field.

#define ALT_SPIS_DMACR_RDMAE_WIDTH   1

The width in bits of the ALT_SPIS_DMACR_RDMAE register field.

#define ALT_SPIS_DMACR_RDMAE_SET_MSK   0x00000001

The mask used to set the ALT_SPIS_DMACR_RDMAE register field value.

#define ALT_SPIS_DMACR_RDMAE_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SPIS_DMACR_RDMAE register field value.

#define ALT_SPIS_DMACR_RDMAE_RESET   0x0

The reset value of the ALT_SPIS_DMACR_RDMAE register field.

#define ALT_SPIS_DMACR_RDMAE_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SPIS_DMACR_RDMAE field value from a register.

#define ALT_SPIS_DMACR_RDMAE_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SPIS_DMACR_RDMAE register field value suitable for setting the register.

#define ALT_SPIS_DMACR_TDMAE_E_DISD   0x0

Enumerated value for register field ALT_SPIS_DMACR_TDMAE

Transmit DMA disabled

#define ALT_SPIS_DMACR_TDMAE_E_END   0x1

Enumerated value for register field ALT_SPIS_DMACR_TDMAE

Transmit DMA enabled

#define ALT_SPIS_DMACR_TDMAE_LSB   1

The Least Significant Bit (LSB) position of the ALT_SPIS_DMACR_TDMAE register field.

#define ALT_SPIS_DMACR_TDMAE_MSB   1

The Most Significant Bit (MSB) position of the ALT_SPIS_DMACR_TDMAE register field.

#define ALT_SPIS_DMACR_TDMAE_WIDTH   1

The width in bits of the ALT_SPIS_DMACR_TDMAE register field.

#define ALT_SPIS_DMACR_TDMAE_SET_MSK   0x00000002

The mask used to set the ALT_SPIS_DMACR_TDMAE register field value.

#define ALT_SPIS_DMACR_TDMAE_CLR_MSK   0xfffffffd

The mask used to clear the ALT_SPIS_DMACR_TDMAE register field value.

#define ALT_SPIS_DMACR_TDMAE_RESET   0x0

The reset value of the ALT_SPIS_DMACR_TDMAE register field.

#define ALT_SPIS_DMACR_TDMAE_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_SPIS_DMACR_TDMAE field value from a register.

#define ALT_SPIS_DMACR_TDMAE_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_SPIS_DMACR_TDMAE register field value suitable for setting the register.

#define ALT_SPIS_DMACR_RESET   0x00000000

The reset value of the ALT_SPIS_DMACR register.

#define ALT_SPIS_DMACR_OFST   0x4c

The byte offset of the ALT_SPIS_DMACR register from the beginning of the component.

#define ALT_SPIS_DMACR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_DMACR_OFST))

The address of the ALT_SPIS_DMACR register.

Typedef Documentation

The typedef declaration for register ALT_SPIS_DMACR.