Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : Receive FIFO Underflow Interrupt Clear Register - rxuicr

Description

Receive FIFO Underflow Interrupt Clear Register

Register Layout

Bits Access Reset Description
[0] R 0x0 Clear Receive FIFO Underflow Interrupt
[31:1] ??? 0x0 UNDEFINED

Field : Clear Receive FIFO Underflow Interrupt - rxuicr

This register reflects the status of the interrupt. A read from this register clears the spi_rxu_intr interrupt; writing has no effect.

Field Access Macros:

#define ALT_SPIM_RXUICR_RXUICR_LSB   0
 
#define ALT_SPIM_RXUICR_RXUICR_MSB   0
 
#define ALT_SPIM_RXUICR_RXUICR_WIDTH   1
 
#define ALT_SPIM_RXUICR_RXUICR_SET_MSK   0x00000001
 
#define ALT_SPIM_RXUICR_RXUICR_CLR_MSK   0xfffffffe
 
#define ALT_SPIM_RXUICR_RXUICR_RESET   0x0
 
#define ALT_SPIM_RXUICR_RXUICR_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SPIM_RXUICR_RXUICR_SET(value)   (((value) << 0) & 0x00000001)
 

Data Structures

struct  ALT_SPIM_RXUICR_s
 

Macros

#define ALT_SPIM_RXUICR_OFST   0x40
 
#define ALT_SPIM_RXUICR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXUICR_OFST))
 

Typedefs

typedef struct ALT_SPIM_RXUICR_s ALT_SPIM_RXUICR_t
 

Data Structure Documentation

struct ALT_SPIM_RXUICR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SPIM_RXUICR.

Data Fields
const uint32_t rxuicr: 1 Clear Receive FIFO Underflow Interrupt
uint32_t __pad0__: 31 UNDEFINED

Macro Definitions

#define ALT_SPIM_RXUICR_RXUICR_LSB   0

The Least Significant Bit (LSB) position of the ALT_SPIM_RXUICR_RXUICR register field.

#define ALT_SPIM_RXUICR_RXUICR_MSB   0

The Most Significant Bit (MSB) position of the ALT_SPIM_RXUICR_RXUICR register field.

#define ALT_SPIM_RXUICR_RXUICR_WIDTH   1

The width in bits of the ALT_SPIM_RXUICR_RXUICR register field.

#define ALT_SPIM_RXUICR_RXUICR_SET_MSK   0x00000001

The mask used to set the ALT_SPIM_RXUICR_RXUICR register field value.

#define ALT_SPIM_RXUICR_RXUICR_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SPIM_RXUICR_RXUICR register field value.

#define ALT_SPIM_RXUICR_RXUICR_RESET   0x0

The reset value of the ALT_SPIM_RXUICR_RXUICR register field.

#define ALT_SPIM_RXUICR_RXUICR_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SPIM_RXUICR_RXUICR field value from a register.

#define ALT_SPIM_RXUICR_RXUICR_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SPIM_RXUICR_RXUICR register field value suitable for setting the register.

#define ALT_SPIM_RXUICR_OFST   0x40

The byte offset of the ALT_SPIM_RXUICR register from the beginning of the component.

#define ALT_SPIM_RXUICR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXUICR_OFST))

The address of the ALT_SPIM_RXUICR register.

Typedef Documentation

The typedef declaration for register ALT_SPIM_RXUICR.