Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
 All Data Structures Variables Typedefs Groups
Register : noc_idlereq_clr

Description

Clear IDLE request to each NOC master.

Register Layout

Bits Access Reset Description
[0] RW Unknown ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F
[3:1] ??? Unknown UNDEFINED
[4] RW Unknown ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F
[7:5] ??? Unknown UNDEFINED
[8] RW Unknown ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H
[15:9] ??? Unknown UNDEFINED
[16] RW Unknown ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0
[19:17] ??? Unknown UNDEFINED
[20] RW Unknown ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1
[23:21] ??? Unknown UNDEFINED
[24] RW Unknown ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2
[31:25] ??? Unknown UNDEFINED

Field : soc2fpga

Field Access Macros:

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_LSB   0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_MSB   0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_WIDTH   1
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_SET_MSK   0x00000001
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_CLR_MSK   0xfffffffe
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_RESET   0x0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_SET(value)   (((value) << 0) & 0x00000001)
 

Field : lwsoc2fpga

Field Access Macros:

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_LSB   4
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_MSB   4
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_WIDTH   1
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_SET_MSK   0x00000010
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_CLR_MSK   0xffffffef
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_RESET   0x0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_SET(value)   (((value) << 4) & 0x00000010)
 

Field : fpga2soc

Field Access Macros:

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_LSB   8
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_MSB   8
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_WIDTH   1
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_SET_MSK   0x00000100
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_CLR_MSK   0xfffffeff
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_RESET   0x0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_GET(value)   (((value) & 0x00000100) >> 8)
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_SET(value)   (((value) << 8) & 0x00000100)
 

Field : fpga2sdram0

Field Access Macros:

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_LSB   16
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_MSB   16
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_WIDTH   1
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_SET_MSK   0x00010000
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_CLR_MSK   0xfffeffff
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_RESET   0x0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_GET(value)   (((value) & 0x00010000) >> 16)
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_SET(value)   (((value) << 16) & 0x00010000)
 

Field : fpga2sdram1

Field Access Macros:

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_LSB   20
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_MSB   20
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_WIDTH   1
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_SET_MSK   0x00100000
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_CLR_MSK   0xffefffff
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_RESET   0x0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_GET(value)   (((value) & 0x00100000) >> 20)
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_SET(value)   (((value) << 20) & 0x00100000)
 

Field : fpga2sdram2

Field Access Macros:

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_LSB   24
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_MSB   24
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_WIDTH   1
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_SET_MSK   0x01000000
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_CLR_MSK   0xfeffffff
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_RESET   0x0
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_GET(value)   (((value) & 0x01000000) >> 24)
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_SET(value)   (((value) << 24) & 0x01000000)
 

Data Structures

struct  ALT_SYSMGR_NOC_IDLEREQ_CLR_s
 

Macros

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_RESET   0x00000000
 
#define ALT_SYSMGR_NOC_IDLEREQ_CLR_OFST   0xc8
 

Typedefs

typedef struct
ALT_SYSMGR_NOC_IDLEREQ_CLR_s 
ALT_SYSMGR_NOC_IDLEREQ_CLR_t
 

Data Structure Documentation

struct ALT_SYSMGR_NOC_IDLEREQ_CLR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_NOC_IDLEREQ_CLR.

Data Fields
uint32_t soc2fpga: 1 ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F
uint32_t __pad0__: 3 UNDEFINED
uint32_t lwsoc2fpga: 1 ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F
uint32_t __pad1__: 3 UNDEFINED
uint32_t fpga2soc: 1 ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H
uint32_t __pad2__: 7 UNDEFINED
uint32_t fpga2sdram0: 1 ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0
uint32_t __pad3__: 3 UNDEFINED
uint32_t fpga2sdram1: 1 ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1
uint32_t __pad4__: 3 UNDEFINED
uint32_t fpga2sdram2: 1 ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2
uint32_t __pad5__: 7 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_MSB   0

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_WIDTH   1

The width in bits of the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_SET_MSK   0x00000001

The mask used to set the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_CLR_MSK   0xfffffffe

The mask used to clear the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_RESET   0x0

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field is UNKNOWN.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F field value from a register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_SYSMGR_NOC_IDLEREQ_CLR_H2F register field value suitable for setting the register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_LSB   4

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_MSB   4

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_WIDTH   1

The width in bits of the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_SET_MSK   0x00000010

The mask used to set the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_CLR_MSK   0xffffffef

The mask used to clear the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_RESET   0x0

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field is UNKNOWN.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F field value from a register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_SYSMGR_NOC_IDLEREQ_CLR_LWH2F register field value suitable for setting the register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_LSB   8

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_MSB   8

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_WIDTH   1

The width in bits of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_SET_MSK   0x00000100

The mask used to set the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_CLR_MSK   0xfffffeff

The mask used to clear the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_RESET   0x0

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field is UNKNOWN.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_GET (   value)    (((value) & 0x00000100) >> 8)

Extracts the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H field value from a register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H_SET (   value)    (((value) << 8) & 0x00000100)

Produces a ALT_SYSMGR_NOC_IDLEREQ_CLR_F2H register field value suitable for setting the register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_LSB   16

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_MSB   16

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_WIDTH   1

The width in bits of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_SET_MSK   0x00010000

The mask used to set the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_CLR_MSK   0xfffeffff

The mask used to clear the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_RESET   0x0

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field is UNKNOWN.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_GET (   value)    (((value) & 0x00010000) >> 16)

Extracts the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 field value from a register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0_SET (   value)    (((value) << 16) & 0x00010000)

Produces a ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR0 register field value suitable for setting the register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_LSB   20

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_MSB   20

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_WIDTH   1

The width in bits of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_SET_MSK   0x00100000

The mask used to set the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_CLR_MSK   0xffefffff

The mask used to clear the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_RESET   0x0

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field is UNKNOWN.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_GET (   value)    (((value) & 0x00100000) >> 20)

Extracts the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 field value from a register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1_SET (   value)    (((value) << 20) & 0x00100000)

Produces a ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR1 register field value suitable for setting the register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_LSB   24

The Least Significant Bit (LSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_MSB   24

The Most Significant Bit (MSB) position of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_WIDTH   1

The width in bits of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_SET_MSK   0x01000000

The mask used to set the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_CLR_MSK   0xfeffffff

The mask used to clear the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field value.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_RESET   0x0

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field is UNKNOWN.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_GET (   value)    (((value) & 0x01000000) >> 24)

Extracts the ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 field value from a register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2_SET (   value)    (((value) << 24) & 0x01000000)

Produces a ALT_SYSMGR_NOC_IDLEREQ_CLR_F2SDR2 register field value suitable for setting the register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_RESET   0x00000000

The reset value of the ALT_SYSMGR_NOC_IDLEREQ_CLR register.

#define ALT_SYSMGR_NOC_IDLEREQ_CLR_OFST   0xc8

The byte offset of the ALT_SYSMGR_NOC_IDLEREQ_CLR register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_NOC_IDLEREQ_CLR.