Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Scan-Chain Enable Register - jtag_config

Description

This register is used to configure the JTAG master interface.

It is recommended that software write this register before initiating a transfer.

If the software writes to this register while an active session is in progress (as indicated by jtag_status.SessionStatus), the expected behavior is "undefined".

Register Layout

Bits Access Reset Description
[0] RW 0x0 Jtag Host Enable
[1] RW 0x0 Jtag Port Enable
[2] RW 0x0 Loop Back Enable
[3] ??? 0x0 UNDEFINED
[4] RW 0x0 ALT_FPGAMGR_JTAG_CFG_TRSTEN
[7:5] ??? 0x0 UNDEFINED
[15:8] RW 0x14 TCK Divide Ratio
[31:16] RW 0x0 Number of TX bits

Field : Jtag Host Enable - JtagHostEn

This bit field drives the enable signal to the FPGA CSS. Please note that this enable should be driven long before you start any JTAG transactions.

Field Enumeration Values:

Enum Value Description
ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_E_DIS 0x0 Disable scan-chain
ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_E_DIS   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_E_EN   0x1
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_LSB   0
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_MSB   0
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_WIDTH   1
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_SET_MSK   0x00000001
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_CLR_MSK   0xfffffffe
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_RESET   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : Jtag Port Enable - jtagPortEn

This bit field gates off TDI/TMS/TCK driven to the FPGA CSS interface. This allows the software to take over JTAG but keep them tied low. If this bit is 0 the internal core logic will still be active and all the status will be updated as in regular operation.

Field Enumeration Values:

Enum Value Description
ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_E_DIS 0x0 Disable scan-chain
ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_E_DIS   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_E_EN   0x1
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_LSB   1
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_MSB   1
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_WIDTH   1
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_SET_MSK   0x00000002
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_CLR_MSK   0xfffffffd
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_RESET   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_SET(value)   (((value) << 1) & 0x00000002)
 

Field : Loop Back Enable - loopBackEn

Enables the internal loopback mode. A typical scenario will be to set JtagHostEn=0, JtagPortEn=0, and then initiate transmits by software writes to TXFifo. All transfers should receive back on RxFifo. Also this should not affect anything external, since the Jtag ports will be gated off.

Field Enumeration Values:

Enum Value Description
ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_E_DIS 0x0 Disable scan-chain
ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_E_EN 0x1 Enable scan-chain

Field Access Macros:

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_E_DIS   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_E_EN   0x1
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_LSB   2
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_MSB   2
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_WIDTH   1
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_SET_MSK   0x00000004
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_CLR_MSK   0xfffffffb
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_RESET   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_GET(value)   (((value) & 0x00000004) >> 2)
 
#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_SET(value)   (((value) << 2) & 0x00000004)
 

Field : trstEn

Set this bit and then writing at least 1 data in jtag_data_w will cause a JTAG reset to happen. Please note that writing TRSTEN while a data transmission is undergoing could cause undesired effects, so it is recommended that software poll the SESSIONSTATUS bit to make sure there is no existing transfers before writing TRSTEN. Software should manually write 0 to this bit after the completion of the reset and after the SESSIONSTATUS is inactive.

Field Access Macros:

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_LSB   4
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_MSB   4
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_WIDTH   1
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_SET_MSK   0x00000010
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_CLR_MSK   0xffffffef
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_RESET   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_GET(value)   (((value) & 0x00000010) >> 4)
 
#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_SET(value)   (((value) << 4) & 0x00000010)
 

Field : TCK Divide Ratio - tckRatio

Ratio of TCK division. The FPGA manager clock is 100MHz.

value of 4 provides a 25MHz TCK

value of 20 (0x14) provides a 5MHz TCK.

Maximum supported TCK frequency is 25MHz.

So writing a value less than 4 to this field will cause unexpected behavior.

Field Access Macros:

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_LSB   8
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_MSB   15
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_WIDTH   8
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_SET_MSK   0x0000ff00
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_CLR_MSK   0xffff00ff
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_RESET   0x14
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_GET(value)   (((value) & 0x0000ff00) >> 8)
 
#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_SET(value)   (((value) << 8) & 0x0000ff00)
 

Field : Number of TX bits - txSize

Defines the number of bits to be transmitted. Once the software kicks of the transfer via Start_Transfer bits, the hardware will stop the transfer, when either of the below conditions are reached.

a) Completed a transfer of programmed Number of TX Bits +1.

b) TxFifo became empty (under-run of TxFifo).

c) A Stop Transfer request received from software.

So for a successful transfer of fixed number of bits, software has to make sure continuous flow of data.

The exact number of bits to be transferred in the current session is 1+ the value in this register field.

For example

0 -> 1 bit to be transmitted once start session is triggered.

1-> 2 bits to be transmitted.once start session is triggered.

Field Access Macros:

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_LSB   16
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_MSB   31
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_WIDTH   16
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_SET_MSK   0xffff0000
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_CLR_MSK   0x0000ffff
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_RESET   0x0
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_GET(value)   (((value) & 0xffff0000) >> 16)
 
#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_SET(value)   (((value) << 16) & 0xffff0000)
 

Data Structures

struct  ALT_FPGAMGR_JTAG_CFG_s
 

Macros

#define ALT_FPGAMGR_JTAG_CFG_RESET   0x00001400
 
#define ALT_FPGAMGR_JTAG_CFG_OFST   0x50
 

Typedefs

typedef struct
ALT_FPGAMGR_JTAG_CFG_s 
ALT_FPGAMGR_JTAG_CFG_t
 

Data Structure Documentation

struct ALT_FPGAMGR_JTAG_CFG_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_FPGAMGR_JTAG_CFG.

Data Fields
uint32_t JtagHostEn: 1 Jtag Host Enable
uint32_t jtagPortEn: 1 Jtag Port Enable
uint32_t loopBackEn: 1 Loop Back Enable
uint32_t __pad0__: 1 UNDEFINED
uint32_t trstEn: 1 ALT_FPGAMGR_JTAG_CFG_TRSTEN
uint32_t __pad1__: 3 UNDEFINED
uint32_t tckRatio: 8 TCK Divide Ratio
uint32_t txSize: 16 Number of TX bits

Macro Definitions

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_E_DIS   0x0

Enumerated value for register field ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN

Disable scan-chain

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_E_EN   0x1

Enumerated value for register field ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN

Enable scan-chain

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_LSB   0

The Least Significant Bit (LSB) position of the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_MSB   0

The Most Significant Bit (MSB) position of the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_WIDTH   1

The width in bits of the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_SET_MSK   0x00000001

The mask used to set the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_RESET   0x0

The reset value of the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN field value from a register.

#define ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_FPGAMGR_JTAG_CFG_JTAGHOSTEN register field value suitable for setting the register.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_E_DIS   0x0

Enumerated value for register field ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN

Disable scan-chain

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_E_EN   0x1

Enumerated value for register field ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN

Enable scan-chain

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_LSB   1

The Least Significant Bit (LSB) position of the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_MSB   1

The Most Significant Bit (MSB) position of the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_WIDTH   1

The width in bits of the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_SET_MSK   0x00000002

The mask used to set the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_CLR_MSK   0xfffffffd

The mask used to clear the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_RESET   0x0

The reset value of the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN field value from a register.

#define ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_FPGAMGR_JTAG_CFG_JTAGPORTEN register field value suitable for setting the register.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_E_DIS   0x0

Enumerated value for register field ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN

Disable scan-chain

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_E_EN   0x1

Enumerated value for register field ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN

Enable scan-chain

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_LSB   2

The Least Significant Bit (LSB) position of the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_MSB   2

The Most Significant Bit (MSB) position of the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_WIDTH   1

The width in bits of the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_SET_MSK   0x00000004

The mask used to set the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_CLR_MSK   0xfffffffb

The mask used to clear the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_RESET   0x0

The reset value of the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_GET (   value)    (((value) & 0x00000004) >> 2)

Extracts the ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN field value from a register.

#define ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN_SET (   value)    (((value) << 2) & 0x00000004)

Produces a ALT_FPGAMGR_JTAG_CFG_LOOPBACKEN register field value suitable for setting the register.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_LSB   4

The Least Significant Bit (LSB) position of the ALT_FPGAMGR_JTAG_CFG_TRSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_MSB   4

The Most Significant Bit (MSB) position of the ALT_FPGAMGR_JTAG_CFG_TRSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_WIDTH   1

The width in bits of the ALT_FPGAMGR_JTAG_CFG_TRSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_SET_MSK   0x00000010

The mask used to set the ALT_FPGAMGR_JTAG_CFG_TRSTEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_CLR_MSK   0xffffffef

The mask used to clear the ALT_FPGAMGR_JTAG_CFG_TRSTEN register field value.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_RESET   0x0

The reset value of the ALT_FPGAMGR_JTAG_CFG_TRSTEN register field.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_GET (   value)    (((value) & 0x00000010) >> 4)

Extracts the ALT_FPGAMGR_JTAG_CFG_TRSTEN field value from a register.

#define ALT_FPGAMGR_JTAG_CFG_TRSTEN_SET (   value)    (((value) << 4) & 0x00000010)

Produces a ALT_FPGAMGR_JTAG_CFG_TRSTEN register field value suitable for setting the register.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_LSB   8

The Least Significant Bit (LSB) position of the ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_MSB   15

The Most Significant Bit (MSB) position of the ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_WIDTH   8

The width in bits of the ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_SET_MSK   0x0000ff00

The mask used to set the ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field value.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_CLR_MSK   0xffff00ff

The mask used to clear the ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field value.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_RESET   0x14

The reset value of the ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_GET (   value)    (((value) & 0x0000ff00) >> 8)

Extracts the ALT_FPGAMGR_JTAG_CFG_TCKRATIO field value from a register.

#define ALT_FPGAMGR_JTAG_CFG_TCKRATIO_SET (   value)    (((value) << 8) & 0x0000ff00)

Produces a ALT_FPGAMGR_JTAG_CFG_TCKRATIO register field value suitable for setting the register.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_LSB   16

The Least Significant Bit (LSB) position of the ALT_FPGAMGR_JTAG_CFG_TXSIZE register field.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_MSB   31

The Most Significant Bit (MSB) position of the ALT_FPGAMGR_JTAG_CFG_TXSIZE register field.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_WIDTH   16

The width in bits of the ALT_FPGAMGR_JTAG_CFG_TXSIZE register field.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_SET_MSK   0xffff0000

The mask used to set the ALT_FPGAMGR_JTAG_CFG_TXSIZE register field value.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_CLR_MSK   0x0000ffff

The mask used to clear the ALT_FPGAMGR_JTAG_CFG_TXSIZE register field value.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_RESET   0x0

The reset value of the ALT_FPGAMGR_JTAG_CFG_TXSIZE register field.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_GET (   value)    (((value) & 0xffff0000) >> 16)

Extracts the ALT_FPGAMGR_JTAG_CFG_TXSIZE field value from a register.

#define ALT_FPGAMGR_JTAG_CFG_TXSIZE_SET (   value)    (((value) << 16) & 0xffff0000)

Produces a ALT_FPGAMGR_JTAG_CFG_TXSIZE register field value suitable for setting the register.

#define ALT_FPGAMGR_JTAG_CFG_RESET   0x00001400

The reset value of the ALT_FPGAMGR_JTAG_CFG register.

#define ALT_FPGAMGR_JTAG_CFG_OFST   0x50

The byte offset of the ALT_FPGAMGR_JTAG_CFG register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_FPGAMGR_JTAG_CFG.