The macro definitions in this section support access to the short-descriptor first-level table entries and their constituent fields.
These macros may be used to create descriptor entry values that are passed to a first level translation table contruction function such as alt_mmu_ttb1_desc_set().
Each short-descriptor has a set of macro definitions of the following form:
- ALT_MMU_TTB1_<type_and_field_name>_MASK - bit mask for the descriptor type and field.
- ALT_MMU_TTB1_<type_and_field_name>_GET(desc) - extracts the field value from the descriptor entry desc.
- ALT_MMU_TTB1_<type_and_field_name>_SET(val) - returns a field val shifted and masked that is suitable for setting a descriptor entry.
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The Non-Secure [NS] bit. This bit specifies whether the translated PA is in the Secure or Non-Secure address map.
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#define | ALT_MMU_TTB1_PAGE_TBL_NS_MASK 0x00000008 |
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#define | ALT_MMU_TTB1_PAGE_TBL_NS_GET(desc) (((desc) & ALT_MMU_TTB1_PAGE_TBL_NS_MASK) >> 3) |
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#define | ALT_MMU_TTB1_PAGE_TBL_NS_SET(val) (((val) << 3) & ALT_MMU_TTB1_PAGE_TBL_NS_MASK) |
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Domain field. Page table descriptor applies to all entries in the corresponding second-level translation table.
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#define | ALT_MMU_TTB1_PAGE_TBL_DOMAIN_MASK 0x000001e0 |
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#define | ALT_MMU_TTB1_PAGE_TBL_DOMAIN_GET(desc) (((desc) & ALT_MMU_TTB1_PAGE_TBL_DOMAIN_MASK) >> 5) |
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#define | ALT_MMU_TTB1_PAGE_TBL_DOMAIN_SET(val) (((val) << 5) & ALT_MMU_TTB1_PAGE_TBL_DOMAIN_MASK) |
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#define | ALT_MMU_TTB1_PAGE_TBL_BASE_ADDR_MASK 0xfffffc00 |
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#define | ALT_MMU_TTB1_PAGE_TBL_BASE_ADDR_GET(desc) (((desc) & ALT_MMU_TTB1_PAGE_TBL_BASE_ADDR_MASK) >> 10) |
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#define | ALT_MMU_TTB1_PAGE_TBL_BASE_ADDR_SET(val) (((val) << 10) & ALT_MMU_TTB1_PAGE_TBL_BASE_ADDR_MASK) |
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The [B] field of the memory region attributes. [B] is an arcane reference to Bufferable attribute.
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#define | ALT_MMU_TTB1_SECTION_B_MASK 0x00000004 |
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#define | ALT_MMU_TTB1_SECTION_B_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_B_MASK) >> 2) |
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#define | ALT_MMU_TTB1_SECTION_B_SET(val) (((val) << 2) & ALT_MMU_TTB1_SECTION_B_MASK) |
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The [C] field of the memory region attributes. [C] is an arcane reference to Cacheable attribute.
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#define | ALT_MMU_TTB1_SECTION_C_MASK 0x00000008 |
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#define | ALT_MMU_TTB1_SECTION_C_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_C_MASK) >> 3) |
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#define | ALT_MMU_TTB1_SECTION_C_SET(val) (((val) << 3) & ALT_MMU_TTB1_SECTION_C_MASK) |
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The Execute-Never bit. Determines whether the processor can execute software from the addressed region.
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#define | ALT_MMU_TTB1_SECTION_XN_MASK 0x00000010 |
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#define | ALT_MMU_TTB1_SECTION_XN_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_XN_MASK) >> 4) |
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#define | ALT_MMU_TTB1_SECTION_XN_SET(val) (((val) << 4) & ALT_MMU_TTB1_SECTION_XN_MASK) |
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Domain field.
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#define | ALT_MMU_TTB1_SECTION_DOMAIN_MASK 0x000001e0 |
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#define | ALT_MMU_TTB1_SECTION_DOMAIN_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_DOMAIN_MASK) >> 5) |
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#define | ALT_MMU_TTB1_SECTION_DOMAIN_SET(val) (((val) << 5) & ALT_MMU_TTB1_SECTION_DOMAIN_MASK) |
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Access Permissions bits.
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#define | ALT_MMU_TTB1_SECTION_AP_MASK 0x00008c00 |
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#define | ALT_MMU_TTB1_SECTION_AP_GET(desc) ((((desc) & 0x00008000) >> 13) | (((desc) & 0x00000c00) >> 10)) |
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#define | ALT_MMU_TTB1_SECTION_AP_SET(val) ((((val) << 13) & 0x00008000) | (((val) << 10) & 0x00000c00)) |
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The [TEX] field of the memory region attributes. [TEX] is an arcane reference to Type EXtension attribute.
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#define | ALT_MMU_TTB1_SECTION_TEX_MASK 0x00007000 |
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#define | ALT_MMU_TTB1_SECTION_TEX_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_TEX_MASK) >> 12) |
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#define | ALT_MMU_TTB1_SECTION_TEX_SET(val) (((val) << 12) & ALT_MMU_TTB1_SECTION_TEX_MASK) |
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The Shareable bit. Determines whether the addressed region is shareable memory.
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#define | ALT_MMU_TTB1_SECTION_S_MASK 0x00010000 |
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#define | ALT_MMU_TTB1_SECTION_S_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_S_MASK) >> 16) |
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#define | ALT_MMU_TTB1_SECTION_S_SET(val) (((val) << 16) & ALT_MMU_TTB1_SECTION_S_MASK) |
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The not global bit. Determines how the translation is marked in the TLB.
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#define | ALT_MMU_TTB1_SECTION_NG_MASK 0x00020000 |
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#define | ALT_MMU_TTB1_SECTION_NG_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_NG_MASK) >> 17) |
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#define | ALT_MMU_TTB1_SECTION_NG_SET(val) (((val) << 17) & ALT_MMU_TTB1_SECTION_NG_MASK) |
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The Non-Secure [NS] bit. This bit specifies whether the translated PA is in the Secure or Non-Secure address map.
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#define | ALT_MMU_TTB1_SECTION_NS_MASK 0x00080000 |
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#define | ALT_MMU_TTB1_SECTION_NS_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_NS_MASK) >> 19) |
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#define | ALT_MMU_TTB1_SECTION_NS_SET(val) (((val) << 19) & ALT_MMU_TTB1_SECTION_NS_MASK) |
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#define | ALT_MMU_TTB1_SECTION_BASE_ADDR_MASK 0xfff00000 |
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#define | ALT_MMU_TTB1_SECTION_BASE_ADDR_GET(desc) (((desc) & ALT_MMU_TTB1_SECTION_BASE_ADDR_MASK) >> 20) |
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#define | ALT_MMU_TTB1_SECTION_BASE_ADDR_SET(val) (((val) << 20) & ALT_MMU_TTB1_SECTION_BASE_ADDR_MASK) |
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The [B] field of the memory region attributes. [B] is an arcane reference to Bufferable attribute.
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#define | ALT_MMU_TTB1_SUPERSECTION_B_MASK 0x00000004 |
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#define | ALT_MMU_TTB1_SUPERSECTION_B_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_B_MASK) >> 2) |
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#define | ALT_MMU_TTB1_SUPERSECTION_B_SET(val) (((val) << 2) & ALT_MMU_TTB1_SUPERSECTION_B_MASK) |
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The [C] field of the memory region attributes. [C] is an arcane reference to Cacheable attribute.
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#define | ALT_MMU_TTB1_SUPERSECTION_C_MASK 0x00000008 |
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#define | ALT_MMU_TTB1_SUPERSECTION_C_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_C_MASK) >> 3) |
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#define | ALT_MMU_TTB1_SUPERSECTION_C_SET(val) (((val) << 3) & ALT_MMU_TTB1_SUPERSECTION_C_MASK) |
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The Execute-Never bit. Determines whether the processor can execute software from the addressed region.
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#define | ALT_MMU_TTB1_SUPERSECTION_XN_MASK 0x00000010 |
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#define | ALT_MMU_TTB1_SUPERSECTION_XN_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_XN_MASK) >> 4) |
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#define | ALT_MMU_TTB1_SUPERSECTION_XN_SET(val) (((val) << 4) & ALT_MMU_TTB1_SUPERSECTION_XN_MASK) |
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Domain field.
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#define | ALT_MMU_TTB1_SUPERSECTION_DOMAIN_MASK 0x000001e0 |
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#define | ALT_MMU_TTB1_SUPERSECTION_DOMAIN_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_DOMAIN_MASK) >> 5) |
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#define | ALT_MMU_TTB1_SUPERSECTION_DOMAIN_SET(val) (((val) << 5) & ALT_MMU_TTB1_SUPERSECTION_DOMAIN_MASK) |
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Access Permissions bits.
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#define | ALT_MMU_TTB1_SUPERSECTION_AP_MASK 0x00008c00 |
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#define | ALT_MMU_TTB1_SUPERSECTION_AP_GET(desc) ((((desc) & 0x00008000) >> 13) | (((desc) & 0x00000c00) >> 10)) |
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#define | ALT_MMU_TTB1_SUPERSECTION_AP_SET(val) ((((val) << 13) & 0x00008000) | (((val) << 10) & 0x00000c00)) |
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The [TEX] field of the memory region attributes. [TEX] is an arcane reference to Type EXtension attribute.
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#define | ALT_MMU_TTB1_SUPERSECTION_TEX_MASK 0x00007000 |
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#define | ALT_MMU_TTB1_SUPERSECTION_TEX_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_TEX_MASK) >> 12) |
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#define | ALT_MMU_TTB1_SUPERSECTION_TEX_SET(val) (((val) << 12) & ALT_MMU_TTB1_SUPERSECTION_TEX_MASK) |
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The Shareable bit. Determines whether the addressed region is shareable memory.
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#define | ALT_MMU_TTB1_SUPERSECTION_S_MASK 0x00010000 |
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#define | ALT_MMU_TTB1_SUPERSECTION_S_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_S_MASK) >> 16) |
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#define | ALT_MMU_TTB1_SUPERSECTION_S_SET(val) (((val) << 16) & ALT_MMU_TTB1_SUPERSECTION_S_MASK) |
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The not global bit. Determines how the translation is marked in the TLB.
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#define | ALT_MMU_TTB1_SUPERSECTION_NG_MASK 0x00020000 |
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#define | ALT_MMU_TTB1_SUPERSECTION_NG_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_NG_MASK) >> 17) |
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#define | ALT_MMU_TTB1_SUPERSECTION_NG_SET(val) (((val) << 17) & ALT_MMU_TTB1_SUPERSECTION_NG_MASK) |
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The Non-Secure [NS] bit. This bit specifies whether the translated PA is in the Secure or Non-Secure address map.
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#define | ALT_MMU_TTB1_SUPERSECTION_NS_MASK 0x00080000 |
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#define | ALT_MMU_TTB1_SUPERSECTION_NS_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_NS_MASK) >> 19) |
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#define | ALT_MMU_TTB1_SUPERSECTION_NS_SET(val) (((val) << 19) & ALT_MMU_TTB1_SUPERSECTION_NS_MASK) |
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#define | ALT_MMU_TTB1_SUPERSECTION_BASE_ADDR_MASK 0xff000000 |
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#define | ALT_MMU_TTB1_SUPERSECTION_BASE_ADDR_GET(desc) (((desc) & ALT_MMU_TTB1_SUPERSECTION_BASE_ADDR_MASK) >> 24) |
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#define | ALT_MMU_TTB1_SUPERSECTION_BASE_ADDR_SET(val) (((val) << 24) & ALT_MMU_TTB1_SUPERSECTION_BASE_ADDR_MASK) |
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