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alt_noc_fw_h2f_scr.h
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/***********************************************************************************
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* *
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* Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
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* *
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* Redistribution and use in source and binary forms, with or without *
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* modification, are permitted provided that the following conditions are met: *
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* *
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* 1. Redistributions of source code must retain the above copyright notice, *
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* this list of conditions and the following disclaimer. *
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* *
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* 2. Redistributions in binary form must reproduce the above copyright notice, *
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* this list of conditions and the following disclaimer in the documentation *
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* and/or other materials provided with the distribution. *
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* *
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* 3. Neither the name of the copyright holder nor the names of its contributors *
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* may be used to endorse or promote products derived from this software without *
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* specific prior written permission. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" *
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE *
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE *
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE *
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF *
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS *
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN *
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) *
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE *
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* POSSIBILITY OF SUCH DAMAGE. *
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* *
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***********************************************************************************/
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#ifndef __ALT_SOCAL_NOC_FW_H2F_SCR_H__
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#define __ALT_SOCAL_NOC_FW_H2F_SCR_H__
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#include <cstdint>
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extern
"C"
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{
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#else
/* __cplusplus */
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#include <stdint.h>
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#endif
/* __cplusplus */
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#endif
/* __ASSEMBLY__ */
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_LSB 0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_MSB 0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_SET_MSK 0x00000001
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_CLR_MSK 0xfffffffe
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_GET(value) (((value) & 0x00000001) >> 0)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_MPU_M0_SET(value) (((value) << 0) & 0x00000001)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_LSB 8
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_MSB 8
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_SET_MSK 0x00000100
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_CLR_MSK 0xfffffeff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_GET(value) (((value) & 0x00000100) >> 8)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_DMA_SET(value) (((value) << 8) & 0x00000100)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_LSB 17
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_MSB 17
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_SET_MSK 0x00020000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_CLR_MSK 0xfffdffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_GET(value) (((value) & 0x00020000) >> 17)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC0_SET(value) (((value) << 17) & 0x00020000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_LSB 18
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_MSB 18
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_SET_MSK 0x00040000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_CLR_MSK 0xfffbffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_GET(value) (((value) & 0x00040000) >> 18)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC1_SET(value) (((value) << 18) & 0x00040000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_LSB 19
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_MSB 19
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_SET_MSK 0x00080000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_CLR_MSK 0xfff7ffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_GET(value) (((value) & 0x00080000) >> 19)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_EMAC2_SET(value) (((value) << 19) & 0x00080000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_LSB 20
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_MSB 20
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_SET_MSK 0x00100000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_CLR_MSK 0xffefffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_GET(value) (((value) & 0x00100000) >> 20)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB0_SET(value) (((value) << 20) & 0x00100000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_LSB 21
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_MSB 21
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_SET_MSK 0x00200000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_CLR_MSK 0xffdfffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_GET(value) (((value) & 0x00200000) >> 21)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_USB1_SET(value) (((value) << 21) & 0x00200000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_LSB 22
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_MSB 22
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_SET_MSK 0x00400000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_CLR_MSK 0xffbfffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_GET(value) (((value) & 0x00400000) >> 22)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_SDMMC_SET(value) (((value) << 22) & 0x00400000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_LSB 23
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_MSB 23
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_SET_MSK 0x00800000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_CLR_MSK 0xff7fffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_GET(value) (((value) & 0x00800000) >> 23)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_NAND_SET(value) (((value) << 23) & 0x00800000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_LSB 24
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_MSB 24
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_SET_MSK 0x01000000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_CLR_MSK 0xfeffffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_GET(value) (((value) & 0x01000000) >> 24)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_AHB_AP_SET(value) (((value) << 24) & 0x01000000)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_LSB 25
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_MSB 25
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_SET_MSK 0x02000000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_CLR_MSK 0xfdffffff
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_GET(value) (((value) & 0x02000000) >> 25)
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#define ALT_NOC_FW_H2F_SCR_LWH2F_ETR_SET(value) (((value) << 25) & 0x02000000)
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#ifndef __ASSEMBLY__
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struct
ALT_NOC_FW_H2F_SCR_LWH2F_s
386
{
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uint32_t
mpu_m0
: 1;
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uint32_t : 7;
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uint32_t
dma
: 1;
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uint32_t : 8;
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uint32_t
emac0
: 1;
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uint32_t
emac1
: 1;
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uint32_t
emac2
: 1;
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uint32_t
usb0
: 1;
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uint32_t
usb1
: 1;
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uint32_t
sdmmc
: 1;
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uint32_t
nand
: 1;
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uint32_t
ahb_ap
: 1;
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uint32_t
etr
: 1;
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uint32_t : 6;
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};
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typedef
volatile
struct
ALT_NOC_FW_H2F_SCR_LWH2F_s
ALT_NOC_FW_H2F_SCR_LWH2F_t
;
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#endif
/* __ASSEMBLY__ */
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#define ALT_NOC_FW_H2F_SCR_LWH2F_RESET 0x00000000
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#define ALT_NOC_FW_H2F_SCR_LWH2F_OFST 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_LSB 0
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_MSB 0
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET_MSK 0x00000001
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_CLR_MSK 0xfffffffe
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_GET(value) (((value) & 0x00000001) >> 0)
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#define ALT_NOC_FW_H2F_SCR_H2F_MPU_M0_SET(value) (((value) << 0) & 0x00000001)
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_LSB 8
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_MSB 8
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET_MSK 0x00000100
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_CLR_MSK 0xfffffeff
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_GET(value) (((value) & 0x00000100) >> 8)
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#define ALT_NOC_FW_H2F_SCR_H2F_DMA_SET(value) (((value) << 8) & 0x00000100)
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_LSB 17
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_MSB 17
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET_MSK 0x00020000
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_CLR_MSK 0xfffdffff
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_GET(value) (((value) & 0x00020000) >> 17)
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC0_SET(value) (((value) << 17) & 0x00020000)
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_LSB 18
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_MSB 18
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET_MSK 0x00040000
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_CLR_MSK 0xfffbffff
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_GET(value) (((value) & 0x00040000) >> 18)
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC1_SET(value) (((value) << 18) & 0x00040000)
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_LSB 19
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_MSB 19
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET_MSK 0x00080000
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_CLR_MSK 0xfff7ffff
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_GET(value) (((value) & 0x00080000) >> 19)
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#define ALT_NOC_FW_H2F_SCR_H2F_EMAC2_SET(value) (((value) << 19) & 0x00080000)
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_LSB 20
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_MSB 20
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET_MSK 0x00100000
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_CLR_MSK 0xffefffff
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_GET(value) (((value) & 0x00100000) >> 20)
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#define ALT_NOC_FW_H2F_SCR_H2F_USB0_SET(value) (((value) << 20) & 0x00100000)
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_LSB 21
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_MSB 21
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET_MSK 0x00200000
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_CLR_MSK 0xffdfffff
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_GET(value) (((value) & 0x00200000) >> 21)
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#define ALT_NOC_FW_H2F_SCR_H2F_USB1_SET(value) (((value) << 21) & 0x00200000)
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_LSB 22
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_MSB 22
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET_MSK 0x00400000
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_CLR_MSK 0xffbfffff
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_GET(value) (((value) & 0x00400000) >> 22)
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#define ALT_NOC_FW_H2F_SCR_H2F_SDMMC_SET(value) (((value) << 22) & 0x00400000)
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_LSB 23
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_MSB 23
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET_MSK 0x00800000
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_CLR_MSK 0xff7fffff
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_GET(value) (((value) & 0x00800000) >> 23)
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#define ALT_NOC_FW_H2F_SCR_H2F_NAND_SET(value) (((value) << 23) & 0x00800000)
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_LSB 24
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_MSB 24
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET_MSK 0x01000000
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_CLR_MSK 0xfeffffff
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_RESET 0x0
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_GET(value) (((value) & 0x01000000) >> 24)
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#define ALT_NOC_FW_H2F_SCR_H2F_AHB_AP_SET(value) (((value) << 24) & 0x01000000)
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#define ALT_NOC_FW_H2F_SCR_H2F_ETR_LSB 25
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#define ALT_NOC_FW_H2F_SCR_H2F_ETR_MSB 25
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#define ALT_NOC_FW_H2F_SCR_H2F_ETR_WIDTH 1
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#define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET_MSK 0x02000000
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#define ALT_NOC_FW_H2F_SCR_H2F_ETR_CLR_MSK 0xfdffffff
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#define ALT_NOC_FW_H2F_SCR_H2F_ETR_RESET 0x0
729
730
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_GET(value) (((value) & 0x02000000) >> 25)
731
732
#define ALT_NOC_FW_H2F_SCR_H2F_ETR_SET(value) (((value) << 25) & 0x02000000)
733
734
#ifndef __ASSEMBLY__
735
745
struct
ALT_NOC_FW_H2F_SCR_H2F_s
746
{
747
uint32_t
mpu_m0
: 1;
748
uint32_t : 7;
749
uint32_t
dma
: 1;
750
uint32_t : 8;
751
uint32_t
emac0
: 1;
752
uint32_t
emac1
: 1;
753
uint32_t
emac2
: 1;
754
uint32_t
usb0
: 1;
755
uint32_t
usb1
: 1;
756
uint32_t
sdmmc
: 1;
757
uint32_t
nand
: 1;
758
uint32_t
ahb_ap
: 1;
759
uint32_t
etr
: 1;
760
uint32_t : 6;
761
};
762
764
typedef
volatile
struct
ALT_NOC_FW_H2F_SCR_H2F_s
ALT_NOC_FW_H2F_SCR_H2F_t
;
765
#endif
/* __ASSEMBLY__ */
766
768
#define ALT_NOC_FW_H2F_SCR_H2F_RESET 0x00000000
769
770
#define ALT_NOC_FW_H2F_SCR_H2F_OFST 0x4
771
772
#ifndef __ASSEMBLY__
773
783
struct
ALT_NOC_FW_H2F_SCR_s
784
{
785
volatile
ALT_NOC_FW_H2F_SCR_LWH2F_t
lwsoc2fpga
;
786
volatile
ALT_NOC_FW_H2F_SCR_H2F_t
soc2fpga
;
787
volatile
uint32_t
_pad_0x8_0x100
[62];
788
};
789
791
typedef
volatile
struct
ALT_NOC_FW_H2F_SCR_s
ALT_NOC_FW_H2F_SCR_t
;
793
struct
ALT_NOC_FW_H2F_SCR_raw_s
794
{
795
volatile
uint32_t
lwsoc2fpga
;
796
volatile
uint32_t
soc2fpga
;
797
volatile
uint32_t
_pad_0x8_0x100
[62];
798
};
799
801
typedef
volatile
struct
ALT_NOC_FW_H2F_SCR_raw_s
ALT_NOC_FW_H2F_SCR_raw_t
;
802
#endif
/* __ASSEMBLY__ */
803
805
#ifdef __cplusplus
806
}
807
#endif
/* __cplusplus */
808
#endif
/* __ALT_SOCAL_NOC_FW_H2F_SCR_H__ */
809
include
soc_a10
socal
alt_noc_fw_h2f_scr.h
Generated on Tue Sep 8 2015 13:33:01 for Altera SoCAL by
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