Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : caltiming6

Description

Register Layout

Bits Access Reset Description
[12:0] RW 0x0 ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD
[28:13] RW 0x0 ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD
[31:29] ??? 0x0 UNDEFINED

Field : cfg_t_param_arf_period

Auto-refresh period

Field Access Macros:

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_LSB   0
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_MSB   12
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_WIDTH   13
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_SET_MSK   0x00001fff
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_CLR_MSK   0xffffe000
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_RESET   0x0
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_GET(value)   (((value) & 0x00001fff) >> 0)
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_SET(value)   (((value) << 0) & 0x00001fff)
 

Field : cfg_t_param_pdn_period

Clock power down recovery period.

Field Access Macros:

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_LSB   13
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_MSB   28
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_WIDTH   16
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_SET_MSK   0x1fffe000
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_CLR_MSK   0xe0001fff
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_RESET   0x0
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_GET(value)   (((value) & 0x1fffe000) >> 13)
 
#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_SET(value)   (((value) << 13) & 0x1fffe000)
 

Data Structures

struct  ALT_IO48_HMC_MMR_CALTIMING6_s
 

Macros

#define ALT_IO48_HMC_MMR_CALTIMING6_RESET   0x00000000
 
#define ALT_IO48_HMC_MMR_CALTIMING6_OFST   0x94
 

Typedefs

typedef struct
ALT_IO48_HMC_MMR_CALTIMING6_s 
ALT_IO48_HMC_MMR_CALTIMING6_t
 

Data Structure Documentation

struct ALT_IO48_HMC_MMR_CALTIMING6_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_IO48_HMC_MMR_CALTIMING6.

Data Fields
uint32_t cfg_t_param_arf_period: 13 ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD
uint32_t cfg_t_param_pdn_period: 16 ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD
uint32_t __pad0__: 3 UNDEFINED

Macro Definitions

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_LSB   0

The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_MSB   12

The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_WIDTH   13

The width in bits of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_SET_MSK   0x00001fff

The mask used to set the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field value.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_CLR_MSK   0xffffe000

The mask used to clear the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field value.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_RESET   0x0

The reset value of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_GET (   value)    (((value) & 0x00001fff) >> 0)

Extracts the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD field value from a register.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD_SET (   value)    (((value) << 0) & 0x00001fff)

Produces a ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_ARF_PERIOD register field value suitable for setting the register.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_LSB   13

The Least Significant Bit (LSB) position of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_MSB   28

The Most Significant Bit (MSB) position of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_WIDTH   16

The width in bits of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_SET_MSK   0x1fffe000

The mask used to set the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field value.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_CLR_MSK   0xe0001fff

The mask used to clear the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field value.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_RESET   0x0

The reset value of the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_GET (   value)    (((value) & 0x1fffe000) >> 13)

Extracts the ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD field value from a register.

#define ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD_SET (   value)    (((value) << 13) & 0x1fffe000)

Produces a ALT_IO48_HMC_MMR_CALTIMING6_CFG_T_PARAM_PDN_PERIOD register field value suitable for setting the register.

#define ALT_IO48_HMC_MMR_CALTIMING6_RESET   0x00000000

The reset value of the ALT_IO48_HMC_MMR_CALTIMING6 register.

#define ALT_IO48_HMC_MMR_CALTIMING6_OFST   0x94

The byte offset of the ALT_IO48_HMC_MMR_CALTIMING6 register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_IO48_HMC_MMR_CALTIMING6.