Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Probe_MPU_main_Probe_Filters_0_SecurityBase

Description

Register Layout

Bits Access Reset Description
[2:0] RW 0x0 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE
[31:3] ??? Unknown UNDEFINED

Field : FILTERS_0_SECURITYBASE

Register SecurityBase contains the security base used to filter packets.

Field Access Macros:

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_LSB   0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_MSB   2
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_WIDTH   3
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET_MSK   0x00000007
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_CLR_MSK   0xfffffff8
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_RESET   0x0
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_GET(value)   (((value) & 0x00000007) >> 0)
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET(value)   (((value) << 0) & 0x00000007)
 

Data Structures

struct  ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_s
 

Macros

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_RESET   0x00000000
 
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_OFST   0x58
 

Typedefs

typedef struct
ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_s 
ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_t
 

Data Structure Documentation

struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE.

Data Fields
uint32_t FILTERS_0_SECURITYBASE: 3 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE
uint32_t __pad0__: 29 UNDEFINED

Macro Definitions

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_MSB   2

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_WIDTH   3

The width in bits of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE register field.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET_MSK   0x00000007

The mask used to set the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_CLR_MSK   0xfffffff8

The mask used to clear the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE register field value.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_RESET   0x0
#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_GET (   value)    (((value) & 0x00000007) >> 0)

Extracts the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE field value from a register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET (   value)    (((value) << 0) & 0x00000007)

Produces a ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE register field value suitable for setting the register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_RESET   0x00000000

The reset value of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE register.

#define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_OFST   0x58

The byte offset of the ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE register from the beginning of the component.

Typedef Documentation