Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : SD Clock Source Register - clksrc

Description

Selects among available clock dividers. The sdmmc_cclk_out is always from clock divider 0.

Register Layout

Bits Access Reset Description
[1:0] RW 0x0 Clock Source
[31:2] ??? 0x0 UNDEFINED

Field : Clock Source - clk_source

Selects among available clock dividers. The SD/MMC module is configured with just one clock divider so this register should always be set to choose clkdiv0.

Field Enumeration Values:

Enum Value Description
ALT_SDMMC_CLKSRC_CLK_SRC_E_CLKDIV0 0x0 Clock divider 0

Field Access Macros:

#define ALT_SDMMC_CLKSRC_CLK_SRC_E_CLKDIV0   0x0
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_LSB   0
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_MSB   1
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_WIDTH   2
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_SET_MSK   0x00000003
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_CLR_MSK   0xfffffffc
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_RESET   0x0
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_GET(value)   (((value) & 0x00000003) >> 0)
 
#define ALT_SDMMC_CLKSRC_CLK_SRC_SET(value)   (((value) << 0) & 0x00000003)
 

Data Structures

struct  ALT_SDMMC_CLKSRC_s
 

Macros

#define ALT_SDMMC_CLKSRC_OFST   0xc
 

Typedefs

typedef struct ALT_SDMMC_CLKSRC_s ALT_SDMMC_CLKSRC_t
 

Data Structure Documentation

struct ALT_SDMMC_CLKSRC_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SDMMC_CLKSRC.

Data Fields
uint32_t clk_source: 2 Clock Source
uint32_t __pad0__: 30 UNDEFINED

Macro Definitions

#define ALT_SDMMC_CLKSRC_CLK_SRC_E_CLKDIV0   0x0

Enumerated value for register field ALT_SDMMC_CLKSRC_CLK_SRC

Clock divider 0

#define ALT_SDMMC_CLKSRC_CLK_SRC_LSB   0

The Least Significant Bit (LSB) position of the ALT_SDMMC_CLKSRC_CLK_SRC register field.

#define ALT_SDMMC_CLKSRC_CLK_SRC_MSB   1

The Most Significant Bit (MSB) position of the ALT_SDMMC_CLKSRC_CLK_SRC register field.

#define ALT_SDMMC_CLKSRC_CLK_SRC_WIDTH   2

The width in bits of the ALT_SDMMC_CLKSRC_CLK_SRC register field.

#define ALT_SDMMC_CLKSRC_CLK_SRC_SET_MSK   0x00000003

The mask used to set the ALT_SDMMC_CLKSRC_CLK_SRC register field value.

#define ALT_SDMMC_CLKSRC_CLK_SRC_CLR_MSK   0xfffffffc

The mask used to clear the ALT_SDMMC_CLKSRC_CLK_SRC register field value.

#define ALT_SDMMC_CLKSRC_CLK_SRC_RESET   0x0

The reset value of the ALT_SDMMC_CLKSRC_CLK_SRC register field.

#define ALT_SDMMC_CLKSRC_CLK_SRC_GET (   value)    (((value) & 0x00000003) >> 0)

Extracts the ALT_SDMMC_CLKSRC_CLK_SRC field value from a register.

#define ALT_SDMMC_CLKSRC_CLK_SRC_SET (   value)    (((value) << 0) & 0x00000003)

Produces a ALT_SDMMC_CLKSRC_CLK_SRC register field value suitable for setting the register.

#define ALT_SDMMC_CLKSRC_OFST   0xc

The byte offset of the ALT_SDMMC_CLKSRC register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SDMMC_CLKSRC.