Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Group : Pin Mux Control Group - ALT_SYSMGR_PINMUX

Description

Pin Mux Control Group

Controls Pin Mux selections

NOTE: These registers should not be modified after IO configuration.There is no support for dynamically changing the Pin Mux selections.

Members

 Register : emac0_tx_clk Mux Selection Register - EMACIO0
 
 Register : emac0_tx_d0 Mux Selection Register - EMACIO1
 
 Register : emac0_tx_d1 Mux Selection Register - EMACIO2
 
 Register : emac0_tx_d2 Mux Selection Register - EMACIO3
 
 Register : emac0_tx_d3 Mux Selection Register - EMACIO4
 
 Register : emac0_rx_d0 Mux Selection Register - EMACIO5
 
 Register : emac0_mdio Mux Selection Register - EMACIO6
 
 Register : emac0_mdc Mux Selection Register - EMACIO7
 
 Register : emac0_rx_ctl Mux Selection Register - EMACIO8
 
 Register : emac0_tx_ctl Mux Selection Register - EMACIO9
 
 Register : emac0_rx_clk Mux Selection Register - EMACIO10
 
 Register : emac0_rx_d1 Mux Selection Register - EMACIO11
 
 Register : emac0_rx_d2 Mux Selection Register - EMACIO12
 
 Register : emac0_rx_d3 Mux Selection Register - EMACIO13
 
 Register : emac1_tx_clk Mux Selection Register - EMACIO14
 
 Register : emac1_tx_d0 Mux Selection Register - EMACIO15
 
 Register : emac1_tx_d1 Mux Selection Register - EMACIO16
 
 Register : emac1_tx_ctl Mux Selection Register - EMACIO17
 
 Register : emac1_rx_d0 Mux Selection Register - EMACIO18
 
 Register : emac1_rx_d1 Mux Selection Register - EMACIO19
 
 Register : sdmmc_cmd Mux Selection Register - FLASHIO0
 
 Register : sdmmc_pwren Mux Selection Register - FLASHIO1
 
 Register : sdmmc_d0 Mux Selection Register - FLASHIO2
 
 Register : sdmmc_d1 Mux Selection Register - FLASHIO3
 
 Register : sdmmc_d4 Mux Selection Register - FLASHIO4
 
 Register : sdmmc_d5 Mux Selection Register - FLASHIO5
 
 Register : sdmmc_d6 Mux Selection Register - FLASHIO6
 
 Register : sdmmc_d7 Mux Selection Register - FLASHIO7
 
 Register : sdmmc_clk_in Mux Selection Register - FLASHIO8
 
 Register : sdmmc_clk Mux Selection Register - FLASHIO9
 
 Register : sdmmc_d2 Mux Selection Register - FLASHIO10
 
 Register : sdmmc_d3 Mux Selection Register - FLASHIO11
 
 Register : trace_clk Mux Selection Register - GENERALIO0
 
 Register : trace_d0 Mux Selection Register - GENERALIO1
 
 Register : trace_d1 Mux Selection Register - GENERALIO2
 
 Register : trace_d2 Mux Selection Register - GENERALIO3
 
 Register : trace_d3 Mux Selection Register - GENERALIO4
 
 Register : trace_d4 Mux Selection Register - GENERALIO5
 
 Register : trace_d5 Mux Selection Register - GENERALIO6
 
 Register : trace_d6 Mux Selection Register - GENERALIO7
 
 Register : trace_d7 Mux Selection Register - GENERALIO8
 
 Register : spim0_clk Mux Selection Register - GENERALIO9
 
 Register : spim0_mosi Mux Selection Register - GENERALIO10
 
 Register : spim0_miso Mux Selection Register - GENERALIO11
 
 Register : spim0_ss0 Mux Selection Register - GENERALIO12
 
 Register : uart0_rx Mux Selection Register - GENERALIO13
 
 Register : uart0_tx Mux Selection Register - GENERALIO14
 
 Register : i2c0_sda Mux Selection Register - GENERALIO15
 
 Register : i2c0_scl Mux Selection Register - GENERALIO16
 
 Register : can0_rx Mux Selection Register - GENERALIO17
 
 Register : can0_tx Mux Selection Register - GENERALIO18
 
 Register : spis1_clk Mux Selection Register - GENERALIO19
 
 Register : spis1_mosi Mux Selection Register - GENERALIO20
 
 Register : spis1_miso Mux Selection Register - GENERALIO21
 
 Register : spis1_ss0 Mux Selection Register - GENERALIO22
 
 Register : uart1_rx Mux Selection Register - GENERALIO23
 
 Register : uart1_tx Mux Selection Register - GENERALIO24
 
 Register : i2c1_sda Mux Selection Register - GENERALIO25
 
 Register : i2c1_scl Mux Selection Register - GENERALIO26
 
 Register : spim0_ss0_alt Mux Selection Register - GENERALIO27
 
 Register : spis0_clk Mux Selection Register - GENERALIO28
 
 Register : spis0_mosi Mux Selection Register - GENERALIO29
 
 Register : spis0_miso Mux Selection Register - GENERALIO30
 
 Register : spis0_ss0 Mux Selection Register - GENERALIO31
 
 Register : nand_ale Mux Selection Register - MIXED1IO0
 
 Register : nand_ce Mux Selection Register - MIXED1IO1
 
 Register : nand_cle Mux Selection Register - MIXED1IO2
 
 Register : nand_re Mux Selection Register - MIXED1IO3
 
 Register : nand_rb Mux Selection Register - MIXED1IO4
 
 Register : nand_dq0 Mux Selection Register - MIXED1IO5
 
 Register : nand_dq1 Mux Selection Register - MIXED1IO6
 
 Register : nand_dq2 Mux Selection Register - MIXED1IO7
 
 Register : nand_dq3 Mux Selection Register - MIXED1IO8
 
 Register : nand_dq4 Mux Selection Register - MIXED1IO9
 
 Register : nand_dq5 Mux Selection Register - MIXED1IO10
 
 Register : nand_dq6 Mux Selection Register - MIXED1IO11
 
 Register : nand_dq7 Mux Selection Register - MIXED1IO12
 
 Register : nand_wp Mux Selection Register - MIXED1IO13
 
 Register : nand_we Mux Selection Register - MIXED1IO14
 
 Register : qspi_io0 Mux Selection Register - MIXED1IO15
 
 Register : qspi_io1 Mux Selection Register - MIXED1IO16
 
 Register : qspi_io2 Mux Selection Register - MIXED1IO17
 
 Register : qspi_io3 Mux Selection Register - MIXED1IO18
 
 Register : qspi_ss0 Mux Selection Register - MIXED1IO19
 
 Register : qpsi_clk Mux Selection Register - MIXED1IO20
 
 Register : qspi_ss1 Mux Selection Register - MIXED1IO21
 
 Register : emac1_mdio Mux Selection Register - MIXED2IO0
 
 Register : emac1_mdc Mux Selection Register - MIXED2IO1
 
 Register : emac1_tx_d2 Mux Selection Register - MIXED2IO2
 
 Register : emac1_tx_d3 Mux Selection Register - MIXED2IO3
 
 Register : emac1_rx_clk Mux Selection Register - MIXED2IO4
 
 Register : emac1_rx_ctl Mux Selection Register - MIXED2IO5
 
 Register : emac1_rx_d2 Mux Selection Register - MIXED2IO6
 
 Register : emac1_rx_d3 Mux Selection Register - MIXED2IO7
 
 Register : GPIO/LoanIO 48 Input Mux Selection Register - GPLINMUX48
 
 Register : GPIO/LoanIO 49 Input Mux Selection Register - GPLINMUX49
 
 Register : GPIO/LoanIO 50 Input Mux Selection Register - GPLINMUX50
 
 Register : GPIO/LoanIO 51 Input Mux Selection Register - GPLINMUX51
 
 Register : GPIO/LoanIO 52 Input Mux Selection Register - GPLINMUX52
 
 Register : GPIO/LoanIO 53 Input Mux Selection Register - GPLINMUX53
 
 Register : GPIO/LoanIO 54 Input Mux Selection Register - GPLINMUX54
 
 Register : GPIO/LoanIO 55 Input Mux Selection Register - GPLINMUX55
 
 Register : GPIO/LoanIO 56 Input Mux Selection Register - GPLINMUX56
 
 Register : GPIO/LoanIO 57 Input Mux Selection Register - GPLINMUX57
 
 Register : GPIO/LoanIO 58 Input Mux Selection Register - GPLINMUX58
 
 Register : GPIO/LoanIO 59 Input Mux Selection Register - GPLINMUX59
 
 Register : GPIO/LoanIO 60 Input Mux Selection Register - GPLINMUX60
 
 Register : GPIO/LoanIO 61 Input Mux Selection Register - GPLINMUX61
 
 Register : GPIO/LoanIO 62 Input Mux Selection Register - GPLINMUX62
 
 Register : GPIO/LoanIO 63 Input Mux Selection Register - GPLINMUX63
 
 Register : GPIO/LoanIO 64 Input Mux Selection Register - GPLINMUX64
 
 Register : GPIO/LoanIO 65 Input Mux Selection Register - GPLINMUX65
 
 Register : GPIO/LoanIO 66 Input Mux Selection Register - GPLINMUX66
 
 Register : GPIO/LoanIO 67 Input Mux Selection Register - GPLINMUX67
 
 Register : GPIO/LoanIO 68 Input Mux Selection Register - GPLINMUX68
 
 Register : GPIO/LoanIO 69 Input Mux Selection Register - GPLINMUX69
 
 Register : GPIO/LoanIO 70 Input Mux Selection Register - GPLINMUX70
 
 Register : GPIO/LoanIO 0 Output/Output Enable Mux Selection Register - GPLMUX0
 
 Register : GPIO/LoanIO 1 Output/Output Enable Mux Selection Register - GPLMUX1
 
 Register : GPIO/LoanIO 2 Output/Output Enable Mux Selection Register - GPLMUX2
 
 Register : GPIO/LoanIO 3 Output/Output Enable Mux Selection Register - GPLMUX3
 
 Register : GPIO/LoanIO 4 Output/Output Enable Mux Selection Register - GPLMUX4
 
 Register : GPIO/LoanIO 5 Output/Output Enable Mux Selection Register - GPLMUX5
 
 Register : GPIO/LoanIO 6 Output/Output Enable Mux Selection Register - GPLMUX6
 
 Register : GPIO/LoanIO 7 Output/Output Enable Mux Selection Register - GPLMUX7
 
 Register : GPIO/LoanIO 8 Output/Output Enable Mux Selection Register - GPLMUX8
 
 Register : GPIO/LoanIO 9 Output/Output Enable Mux Selection Register - GPLMUX9
 
 Register : GPIO/LoanIO 10 Output/Output Enable Mux Selection Register - GPLMUX10
 
 Register : GPIO/LoanIO 11 Output/Output Enable Mux Selection Register - GPLMUX11
 
 Register : GPIO/LoanIO 12 Output/Output Enable Mux Selection Register - GPLMUX12
 
 Register : GPIO/LoanIO 13 Output/Output Enable Mux Selection Register - GPLMUX13
 
 Register : GPIO/LoanIO 14 Output/Output Enable Mux Selection Register - GPLMUX14
 
 Register : GPIO/LoanIO 15 Output/Output Enable Mux Selection Register - GPLMUX15
 
 Register : GPIO/LoanIO 16 Output/Output Enable Mux Selection Register - GPLMUX16
 
 Register : GPIO/LoanIO 17 Output/Output Enable Mux Selection Register - GPLMUX17
 
 Register : GPIO/LoanIO 18 Output/Output Enable Mux Selection Register - GPLMUX18
 
 Register : GPIO/LoanIO 19 Output/Output Enable Mux Selection Register - GPLMUX19
 
 Register : GPIO/LoanIO 20 Output/Output Enable Mux Selection Register - GPLMUX20
 
 Register : GPIO/LoanIO 21 Output/Output Enable Mux Selection Register - GPLMUX21
 
 Register : GPIO/LoanIO 22 Output/Output Enable Mux Selection Register - GPLMUX22
 
 Register : GPIO/LoanIO 23 Output/Output Enable Mux Selection Register - GPLMUX23
 
 Register : GPIO/LoanIO 24 Output/Output Enable Mux Selection Register - GPLMUX24
 
 Register : GPIO/LoanIO 25 Output/Output Enable Mux Selection Register - GPLMUX25
 
 Register : GPIO/LoanIO 26 Output/Output Enable Mux Selection Register - GPLMUX26
 
 Register : GPIO/LoanIO 27 Output/Output Enable Mux Selection Register - GPLMUX27
 
 Register : GPIO/LoanIO 28 Output/Output Enable Mux Selection Register - GPLMUX28
 
 Register : GPIO/LoanIO 29 Output/Output Enable Mux Selection Register - GPLMUX29
 
 Register : GPIO/LoanIO 30 Output/Output Enable Mux Selection Register - GPLMUX30
 
 Register : GPIO/LoanIO 31 Output/Output Enable Mux Selection Register - GPLMUX31
 
 Register : GPIO/LoanIO 32 Output/Output Enable Mux Selection Register - GPLMUX32
 
 Register : GPIO/LoanIO 33 Output/Output Enable Mux Selection Register - GPLMUX33
 
 Register : GPIO/LoanIO 34 Output/Output Enable Mux Selection Register - GPLMUX34
 
 Register : GPIO/LoanIO 35 Output/Output Enable Mux Selection Register - GPLMUX35
 
 Register : GPIO/LoanIO 36 Output/Output Enable Mux Selection Register - GPLMUX36
 
 Register : GPIO/LoanIO 37 Output/Output Enable Mux Selection Register - GPLMUX37
 
 Register : GPIO/LoanIO 38 Output/Output Enable Mux Selection Register - GPLMUX38
 
 Register : GPIO/LoanIO 39 Output/Output Enable Mux Selection Register - GPLMUX39
 
 Register : GPIO/LoanIO 40 Output/Output Enable Mux Selection Register - GPLMUX40
 
 Register : GPIO/LoanIO 41 Output/Output Enable Mux Selection Register - GPLMUX41
 
 Register : GPIO/LoanIO 42 Output/Output Enable Mux Selection Register - GPLMUX42
 
 Register : GPIO/LoanIO 43 Output/Output Enable Mux Selection Register - GPLMUX43
 
 Register : GPIO/LoanIO 44 Output/Output Enable Mux Selection Register - GPLMUX44
 
 Register : GPIO/LoanIO 45 Output/Output Enable Mux Selection Register - GPLMUX45
 
 Register : GPIO/LoanIO 46 Output/Output Enable Mux Selection Register - GPLMUX46
 
 Register : GPIO/LoanIO 47 Output/Output Enable Mux Selection Register - GPLMUX47
 
 Register : GPIO/LoanIO 48 Output/Output Enable Mux Selection Register - GPLMUX48
 
 Register : GPIO/LoanIO 49 Output/Output Enable Mux Selection Register - GPLMUX49
 
 Register : GPIO/LoanIO 50 Output/Output Enable Mux Selection Register - GPLMUX50
 
 Register : GPIO/LoanIO 51 Output/Output Enable Mux Selection Register - GPLMUX51
 
 Register : GPIO/LoanIO 52 Output/Output Enable Mux Selection Register - GPLMUX52
 
 Register : GPIO/LoanIO 53 Output/Output Enable Mux Selection Register - GPLMUX53
 
 Register : GPIO/LoanIO 54 Output/Output Enable Mux Selection Register - GPLMUX54
 
 Register : GPIO/LoanIO 55 Output/Output Enable Mux Selection Register - GPLMUX55
 
 Register : GPIO/LoanIO 56 Output/Output Enable Mux Selection Register - GPLMUX56
 
 Register : GPIO/LoanIO 57 Output/Output Enable Mux Selection Register - GPLMUX57
 
 Register : GPIO/LoanIO 58 Output/Output Enable Mux Selection Register - GPLMUX58
 
 Register : GPIO/LoanIO 59 Output/Output Enable Mux Selection Register - GPLMUX59
 
 Register : GPIO/LoanIO 60 Output/Output Enable Mux Selection Register - GPLMUX60
 
 Register : GPIO/LoanIO 61 Output/Output Enable Mux Selection Register - GPLMUX61
 
 Register : GPIO/LoanIO 62 Output/Output Enable Mux Selection Register - GPLMUX62
 
 Register : GPIO/LoanIO 63 Output/Output Enable Mux Selection Register - GPLMUX63
 
 Register : GPIO/LoanIO 64 Output/Output Enable Mux Selection Register - GPLMUX64
 
 Register : GPIO/LoanIO 65 Output/Output Enable Mux Selection Register - GPLMUX65
 
 Register : GPIO/LoanIO 66 Output/Output Enable Mux Selection Register - GPLMUX66
 
 Register : GPIO/LoanIO 67 Output/Output Enable Mux Selection Register - GPLMUX67
 
 Register : GPIO/LoanIO 68 Output/Output Enable Mux Selection Register - GPLMUX68
 
 Register : GPIO/LoanIO 69 Output/Output Enable Mux Selection Register - GPLMUX69
 
 Register : GPIO/LoanIO 70 Output/Output Enable Mux Selection Register - GPLMUX70
 
 Register : Select source for NAND signals (HPS Pins or FPGA Interface) - NANDUSEFPGA
 
 Register : Select source for RGMII1 signals (HPS Pins or FPGA Interface) - RGMII1USEFPGA
 
 Register : Select source for I2C0 signals (HPS Pins or FPGA Interface) - I2C0USEFPGA
 
 Register : Select source for RGMII0 signals (HPS Pins or FPGA Interface) - RGMII0USEFPGA
 
 Register : Select source for I2C3 signals (HPS Pins or FPGA Interface) - I2C3USEFPGA
 
 Register : Select source for I2C2 signals (HPS Pins or FPGA Interface) - I2C2USEFPGA
 
 Register : Select source for I2C1 signals (HPS Pins or FPGA Interface) - I2C1USEFPGA
 
 Register : Select source for SPIM1 signals (HPS Pins or FPGA Interface) - SPIM1USEFPGA
 
 Register : Select source for SPIM0 signals (HPS Pins or FPGA Interface) - SPIM0USEFPGA
 

Data Structures

struct  ALT_SYSMGR_PINMUX_s
 
struct  ALT_SYSMGR_PINMUX_raw_s
 

Typedefs

typedef struct ALT_SYSMGR_PINMUX_s ALT_SYSMGR_PINMUX_t
 
typedef struct
ALT_SYSMGR_PINMUX_raw_s 
ALT_SYSMGR_PINMUX_raw_t
 

Data Structure Documentation

struct ALT_SYSMGR_PINMUX_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register group ALT_SYSMGR_PINMUX.

Data Fields
volatile
ALT_SYSMGR_PINMUX_EMACIO0_t
EMACIO0 ALT_SYSMGR_PINMUX_EMACIO0
volatile
ALT_SYSMGR_PINMUX_EMACIO1_t
EMACIO1 ALT_SYSMGR_PINMUX_EMACIO1
volatile
ALT_SYSMGR_PINMUX_EMACIO2_t
EMACIO2 ALT_SYSMGR_PINMUX_EMACIO2
volatile
ALT_SYSMGR_PINMUX_EMACIO3_t
EMACIO3 ALT_SYSMGR_PINMUX_EMACIO3
volatile
ALT_SYSMGR_PINMUX_EMACIO4_t
EMACIO4 ALT_SYSMGR_PINMUX_EMACIO4
volatile
ALT_SYSMGR_PINMUX_EMACIO5_t
EMACIO5 ALT_SYSMGR_PINMUX_EMACIO5
volatile
ALT_SYSMGR_PINMUX_EMACIO6_t
EMACIO6 ALT_SYSMGR_PINMUX_EMACIO6
volatile
ALT_SYSMGR_PINMUX_EMACIO7_t
EMACIO7 ALT_SYSMGR_PINMUX_EMACIO7
volatile
ALT_SYSMGR_PINMUX_EMACIO8_t
EMACIO8 ALT_SYSMGR_PINMUX_EMACIO8
volatile
ALT_SYSMGR_PINMUX_EMACIO9_t
EMACIO9 ALT_SYSMGR_PINMUX_EMACIO9
volatile
ALT_SYSMGR_PINMUX_EMACIO10_t
EMACIO10 ALT_SYSMGR_PINMUX_EMACIO10
volatile
ALT_SYSMGR_PINMUX_EMACIO11_t
EMACIO11 ALT_SYSMGR_PINMUX_EMACIO11
volatile
ALT_SYSMGR_PINMUX_EMACIO12_t
EMACIO12 ALT_SYSMGR_PINMUX_EMACIO12
volatile
ALT_SYSMGR_PINMUX_EMACIO13_t
EMACIO13 ALT_SYSMGR_PINMUX_EMACIO13
volatile
ALT_SYSMGR_PINMUX_EMACIO14_t
EMACIO14 ALT_SYSMGR_PINMUX_EMACIO14
volatile
ALT_SYSMGR_PINMUX_EMACIO15_t
EMACIO15 ALT_SYSMGR_PINMUX_EMACIO15
volatile
ALT_SYSMGR_PINMUX_EMACIO16_t
EMACIO16 ALT_SYSMGR_PINMUX_EMACIO16
volatile
ALT_SYSMGR_PINMUX_EMACIO17_t
EMACIO17 ALT_SYSMGR_PINMUX_EMACIO17
volatile
ALT_SYSMGR_PINMUX_EMACIO18_t
EMACIO18 ALT_SYSMGR_PINMUX_EMACIO18
volatile
ALT_SYSMGR_PINMUX_EMACIO19_t
EMACIO19 ALT_SYSMGR_PINMUX_EMACIO19
volatile
ALT_SYSMGR_PINMUX_FLSHIO0_t
FLASHIO0 ALT_SYSMGR_PINMUX_FLSHIO0
volatile
ALT_SYSMGR_PINMUX_FLSHIO1_t
FLASHIO1 ALT_SYSMGR_PINMUX_FLSHIO1
volatile
ALT_SYSMGR_PINMUX_FLSHIO2_t
FLASHIO2 ALT_SYSMGR_PINMUX_FLSHIO2
volatile
ALT_SYSMGR_PINMUX_FLSHIO3_t
FLASHIO3 ALT_SYSMGR_PINMUX_FLSHIO3
volatile
ALT_SYSMGR_PINMUX_FLSHIO4_t
FLASHIO4 ALT_SYSMGR_PINMUX_FLSHIO4
volatile
ALT_SYSMGR_PINMUX_FLSHIO5_t
FLASHIO5 ALT_SYSMGR_PINMUX_FLSHIO5
volatile
ALT_SYSMGR_PINMUX_FLSHIO6_t
FLASHIO6 ALT_SYSMGR_PINMUX_FLSHIO6
volatile
ALT_SYSMGR_PINMUX_FLSHIO7_t
FLASHIO7 ALT_SYSMGR_PINMUX_FLSHIO7
volatile
ALT_SYSMGR_PINMUX_FLSHIO8_t
FLASHIO8 ALT_SYSMGR_PINMUX_FLSHIO8
volatile
ALT_SYSMGR_PINMUX_FLSHIO9_t
FLASHIO9 ALT_SYSMGR_PINMUX_FLSHIO9
volatile
ALT_SYSMGR_PINMUX_FLSHIO10_t
FLASHIO10 ALT_SYSMGR_PINMUX_FLSHIO10
volatile
ALT_SYSMGR_PINMUX_FLSHIO11_t
FLASHIO11 ALT_SYSMGR_PINMUX_FLSHIO11
volatile
ALT_SYSMGR_PINMUX_GENERALIO0_t
GENERALIO0 ALT_SYSMGR_PINMUX_GENERALIO0
volatile
ALT_SYSMGR_PINMUX_GENERALIO1_t
GENERALIO1 ALT_SYSMGR_PINMUX_GENERALIO1
volatile
ALT_SYSMGR_PINMUX_GENERALIO2_t
GENERALIO2 ALT_SYSMGR_PINMUX_GENERALIO2
volatile
ALT_SYSMGR_PINMUX_GENERALIO3_t
GENERALIO3 ALT_SYSMGR_PINMUX_GENERALIO3
volatile
ALT_SYSMGR_PINMUX_GENERALIO4_t
GENERALIO4 ALT_SYSMGR_PINMUX_GENERALIO4
volatile
ALT_SYSMGR_PINMUX_GENERALIO5_t
GENERALIO5 ALT_SYSMGR_PINMUX_GENERALIO5
volatile
ALT_SYSMGR_PINMUX_GENERALIO6_t
GENERALIO6 ALT_SYSMGR_PINMUX_GENERALIO6
volatile
ALT_SYSMGR_PINMUX_GENERALIO7_t
GENERALIO7 ALT_SYSMGR_PINMUX_GENERALIO7
volatile
ALT_SYSMGR_PINMUX_GENERALIO8_t
GENERALIO8 ALT_SYSMGR_PINMUX_GENERALIO8
volatile
ALT_SYSMGR_PINMUX_GENERALIO9_t
GENERALIO9 ALT_SYSMGR_PINMUX_GENERALIO9
volatile
ALT_SYSMGR_PINMUX_GENERALIO10_t
GENERALIO10 ALT_SYSMGR_PINMUX_GENERALIO10
volatile
ALT_SYSMGR_PINMUX_GENERALIO11_t
GENERALIO11 ALT_SYSMGR_PINMUX_GENERALIO11
volatile
ALT_SYSMGR_PINMUX_GENERALIO12_t
GENERALIO12 ALT_SYSMGR_PINMUX_GENERALIO12
volatile
ALT_SYSMGR_PINMUX_GENERALIO13_t
GENERALIO13 ALT_SYSMGR_PINMUX_GENERALIO13
volatile
ALT_SYSMGR_PINMUX_GENERALIO14_t
GENERALIO14 ALT_SYSMGR_PINMUX_GENERALIO14
volatile
ALT_SYSMGR_PINMUX_GENERALIO15_t
GENERALIO15 ALT_SYSMGR_PINMUX_GENERALIO15
volatile
ALT_SYSMGR_PINMUX_GENERALIO16_t
GENERALIO16 ALT_SYSMGR_PINMUX_GENERALIO16
volatile
ALT_SYSMGR_PINMUX_GENERALIO17_t
GENERALIO17 ALT_SYSMGR_PINMUX_GENERALIO17
volatile
ALT_SYSMGR_PINMUX_GENERALIO18_t
GENERALIO18 ALT_SYSMGR_PINMUX_GENERALIO18
volatile
ALT_SYSMGR_PINMUX_GENERALIO19_t
GENERALIO19 ALT_SYSMGR_PINMUX_GENERALIO19
volatile
ALT_SYSMGR_PINMUX_GENERALIO20_t
GENERALIO20 ALT_SYSMGR_PINMUX_GENERALIO20
volatile
ALT_SYSMGR_PINMUX_GENERALIO21_t
GENERALIO21 ALT_SYSMGR_PINMUX_GENERALIO21
volatile
ALT_SYSMGR_PINMUX_GENERALIO22_t
GENERALIO22 ALT_SYSMGR_PINMUX_GENERALIO22
volatile
ALT_SYSMGR_PINMUX_GENERALIO23_t
GENERALIO23 ALT_SYSMGR_PINMUX_GENERALIO23
volatile
ALT_SYSMGR_PINMUX_GENERALIO24_t
GENERALIO24 ALT_SYSMGR_PINMUX_GENERALIO24
volatile
ALT_SYSMGR_PINMUX_GENERALIO25_t
GENERALIO25 ALT_SYSMGR_PINMUX_GENERALIO25
volatile
ALT_SYSMGR_PINMUX_GENERALIO26_t
GENERALIO26 ALT_SYSMGR_PINMUX_GENERALIO26
volatile
ALT_SYSMGR_PINMUX_GENERALIO27_t
GENERALIO27 ALT_SYSMGR_PINMUX_GENERALIO27
volatile
ALT_SYSMGR_PINMUX_GENERALIO28_t
GENERALIO28 ALT_SYSMGR_PINMUX_GENERALIO28
volatile
ALT_SYSMGR_PINMUX_GENERALIO29_t
GENERALIO29 ALT_SYSMGR_PINMUX_GENERALIO29
volatile
ALT_SYSMGR_PINMUX_GENERALIO30_t
GENERALIO30 ALT_SYSMGR_PINMUX_GENERALIO30
volatile
ALT_SYSMGR_PINMUX_GENERALIO31_t
GENERALIO31 ALT_SYSMGR_PINMUX_GENERALIO31
volatile
ALT_SYSMGR_PINMUX_MIXED1IO0_t
MIXED1IO0 ALT_SYSMGR_PINMUX_MIXED1IO0
volatile
ALT_SYSMGR_PINMUX_MIXED1IO1_t
MIXED1IO1 ALT_SYSMGR_PINMUX_MIXED1IO1
volatile
ALT_SYSMGR_PINMUX_MIXED1IO2_t
MIXED1IO2 ALT_SYSMGR_PINMUX_MIXED1IO2
volatile
ALT_SYSMGR_PINMUX_MIXED1IO3_t
MIXED1IO3 ALT_SYSMGR_PINMUX_MIXED1IO3
volatile
ALT_SYSMGR_PINMUX_MIXED1IO4_t
MIXED1IO4 ALT_SYSMGR_PINMUX_MIXED1IO4
volatile
ALT_SYSMGR_PINMUX_MIXED1IO5_t
MIXED1IO5 ALT_SYSMGR_PINMUX_MIXED1IO5
volatile
ALT_SYSMGR_PINMUX_MIXED1IO6_t
MIXED1IO6 ALT_SYSMGR_PINMUX_MIXED1IO6
volatile
ALT_SYSMGR_PINMUX_MIXED1IO7_t
MIXED1IO7 ALT_SYSMGR_PINMUX_MIXED1IO7
volatile
ALT_SYSMGR_PINMUX_MIXED1IO8_t
MIXED1IO8 ALT_SYSMGR_PINMUX_MIXED1IO8
volatile
ALT_SYSMGR_PINMUX_MIXED1IO9_t
MIXED1IO9 ALT_SYSMGR_PINMUX_MIXED1IO9
volatile
ALT_SYSMGR_PINMUX_MIXED1IO10_t
MIXED1IO10 ALT_SYSMGR_PINMUX_MIXED1IO10
volatile
ALT_SYSMGR_PINMUX_MIXED1IO11_t
MIXED1IO11 ALT_SYSMGR_PINMUX_MIXED1IO11
volatile
ALT_SYSMGR_PINMUX_MIXED1IO12_t
MIXED1IO12 ALT_SYSMGR_PINMUX_MIXED1IO12
volatile
ALT_SYSMGR_PINMUX_MIXED1IO13_t
MIXED1IO13 ALT_SYSMGR_PINMUX_MIXED1IO13
volatile
ALT_SYSMGR_PINMUX_MIXED1IO14_t
MIXED1IO14 ALT_SYSMGR_PINMUX_MIXED1IO14
volatile
ALT_SYSMGR_PINMUX_MIXED1IO15_t
MIXED1IO15 ALT_SYSMGR_PINMUX_MIXED1IO15
volatile
ALT_SYSMGR_PINMUX_MIXED1IO16_t
MIXED1IO16 ALT_SYSMGR_PINMUX_MIXED1IO16
volatile
ALT_SYSMGR_PINMUX_MIXED1IO17_t
MIXED1IO17 ALT_SYSMGR_PINMUX_MIXED1IO17
volatile
ALT_SYSMGR_PINMUX_MIXED1IO18_t
MIXED1IO18 ALT_SYSMGR_PINMUX_MIXED1IO18
volatile
ALT_SYSMGR_PINMUX_MIXED1IO19_t
MIXED1IO19 ALT_SYSMGR_PINMUX_MIXED1IO19
volatile
ALT_SYSMGR_PINMUX_MIXED1IO20_t
MIXED1IO20 ALT_SYSMGR_PINMUX_MIXED1IO20
volatile
ALT_SYSMGR_PINMUX_MIXED1IO21_t
MIXED1IO21 ALT_SYSMGR_PINMUX_MIXED1IO21
volatile
ALT_SYSMGR_PINMUX_MIXED2IO0_t
MIXED2IO0 ALT_SYSMGR_PINMUX_MIXED2IO0
volatile
ALT_SYSMGR_PINMUX_MIXED2IO1_t
MIXED2IO1 ALT_SYSMGR_PINMUX_MIXED2IO1
volatile
ALT_SYSMGR_PINMUX_MIXED2IO2_t
MIXED2IO2 ALT_SYSMGR_PINMUX_MIXED2IO2
volatile
ALT_SYSMGR_PINMUX_MIXED2IO3_t
MIXED2IO3 ALT_SYSMGR_PINMUX_MIXED2IO3
volatile
ALT_SYSMGR_PINMUX_MIXED2IO4_t
MIXED2IO4 ALT_SYSMGR_PINMUX_MIXED2IO4
volatile
ALT_SYSMGR_PINMUX_MIXED2IO5_t
MIXED2IO5 ALT_SYSMGR_PINMUX_MIXED2IO5
volatile
ALT_SYSMGR_PINMUX_MIXED2IO6_t
MIXED2IO6 ALT_SYSMGR_PINMUX_MIXED2IO6
volatile
ALT_SYSMGR_PINMUX_MIXED2IO7_t
MIXED2IO7 ALT_SYSMGR_PINMUX_MIXED2IO7
volatile
ALT_SYSMGR_PINMUX_GPLINMUX48_t
GPLINMUX48 ALT_SYSMGR_PINMUX_GPLINMUX48
volatile
ALT_SYSMGR_PINMUX_GPLINMUX49_t
GPLINMUX49 ALT_SYSMGR_PINMUX_GPLINMUX49
volatile
ALT_SYSMGR_PINMUX_GPLINMUX50_t
GPLINMUX50 ALT_SYSMGR_PINMUX_GPLINMUX50
volatile
ALT_SYSMGR_PINMUX_GPLINMUX51_t
GPLINMUX51 ALT_SYSMGR_PINMUX_GPLINMUX51
volatile
ALT_SYSMGR_PINMUX_GPLINMUX52_t
GPLINMUX52 ALT_SYSMGR_PINMUX_GPLINMUX52
volatile
ALT_SYSMGR_PINMUX_GPLINMUX53_t
GPLINMUX53 ALT_SYSMGR_PINMUX_GPLINMUX53
volatile
ALT_SYSMGR_PINMUX_GPLINMUX54_t
GPLINMUX54 ALT_SYSMGR_PINMUX_GPLINMUX54
volatile
ALT_SYSMGR_PINMUX_GPLINMUX55_t
GPLINMUX55 ALT_SYSMGR_PINMUX_GPLINMUX55
volatile
ALT_SYSMGR_PINMUX_GPLINMUX56_t
GPLINMUX56 ALT_SYSMGR_PINMUX_GPLINMUX56
volatile
ALT_SYSMGR_PINMUX_GPLINMUX57_t
GPLINMUX57 ALT_SYSMGR_PINMUX_GPLINMUX57
volatile
ALT_SYSMGR_PINMUX_GPLINMUX58_t
GPLINMUX58 ALT_SYSMGR_PINMUX_GPLINMUX58
volatile
ALT_SYSMGR_PINMUX_GPLINMUX59_t
GPLINMUX59 ALT_SYSMGR_PINMUX_GPLINMUX59
volatile
ALT_SYSMGR_PINMUX_GPLINMUX60_t
GPLINMUX60 ALT_SYSMGR_PINMUX_GPLINMUX60
volatile
ALT_SYSMGR_PINMUX_GPLINMUX61_t
GPLINMUX61 ALT_SYSMGR_PINMUX_GPLINMUX61
volatile
ALT_SYSMGR_PINMUX_GPLINMUX62_t
GPLINMUX62 ALT_SYSMGR_PINMUX_GPLINMUX62
volatile
ALT_SYSMGR_PINMUX_GPLINMUX63_t
GPLINMUX63 ALT_SYSMGR_PINMUX_GPLINMUX63
volatile
ALT_SYSMGR_PINMUX_GPLINMUX64_t
GPLINMUX64 ALT_SYSMGR_PINMUX_GPLINMUX64
volatile
ALT_SYSMGR_PINMUX_GPLINMUX65_t
GPLINMUX65 ALT_SYSMGR_PINMUX_GPLINMUX65
volatile
ALT_SYSMGR_PINMUX_GPLINMUX66_t
GPLINMUX66 ALT_SYSMGR_PINMUX_GPLINMUX66
volatile
ALT_SYSMGR_PINMUX_GPLINMUX67_t
GPLINMUX67 ALT_SYSMGR_PINMUX_GPLINMUX67
volatile
ALT_SYSMGR_PINMUX_GPLINMUX68_t
GPLINMUX68 ALT_SYSMGR_PINMUX_GPLINMUX68
volatile
ALT_SYSMGR_PINMUX_GPLINMUX69_t
GPLINMUX69 ALT_SYSMGR_PINMUX_GPLINMUX69
volatile
ALT_SYSMGR_PINMUX_GPLINMUX70_t
GPLINMUX70 ALT_SYSMGR_PINMUX_GPLINMUX70
volatile
ALT_SYSMGR_PINMUX_GPLMUX0_t
GPLMUX0 ALT_SYSMGR_PINMUX_GPLMUX0
volatile
ALT_SYSMGR_PINMUX_GPLMUX1_t
GPLMUX1 ALT_SYSMGR_PINMUX_GPLMUX1
volatile
ALT_SYSMGR_PINMUX_GPLMUX2_t
GPLMUX2 ALT_SYSMGR_PINMUX_GPLMUX2
volatile
ALT_SYSMGR_PINMUX_GPLMUX3_t
GPLMUX3 ALT_SYSMGR_PINMUX_GPLMUX3
volatile
ALT_SYSMGR_PINMUX_GPLMUX4_t
GPLMUX4 ALT_SYSMGR_PINMUX_GPLMUX4
volatile
ALT_SYSMGR_PINMUX_GPLMUX5_t
GPLMUX5 ALT_SYSMGR_PINMUX_GPLMUX5
volatile
ALT_SYSMGR_PINMUX_GPLMUX6_t
GPLMUX6 ALT_SYSMGR_PINMUX_GPLMUX6
volatile
ALT_SYSMGR_PINMUX_GPLMUX7_t
GPLMUX7 ALT_SYSMGR_PINMUX_GPLMUX7
volatile
ALT_SYSMGR_PINMUX_GPLMUX8_t
GPLMUX8 ALT_SYSMGR_PINMUX_GPLMUX8
volatile
ALT_SYSMGR_PINMUX_GPLMUX9_t
GPLMUX9 ALT_SYSMGR_PINMUX_GPLMUX9
volatile
ALT_SYSMGR_PINMUX_GPLMUX10_t
GPLMUX10 ALT_SYSMGR_PINMUX_GPLMUX10
volatile
ALT_SYSMGR_PINMUX_GPLMUX11_t
GPLMUX11 ALT_SYSMGR_PINMUX_GPLMUX11
volatile
ALT_SYSMGR_PINMUX_GPLMUX12_t
GPLMUX12 ALT_SYSMGR_PINMUX_GPLMUX12
volatile
ALT_SYSMGR_PINMUX_GPLMUX13_t
GPLMUX13 ALT_SYSMGR_PINMUX_GPLMUX13
volatile
ALT_SYSMGR_PINMUX_GPLMUX14_t
GPLMUX14 ALT_SYSMGR_PINMUX_GPLMUX14
volatile
ALT_SYSMGR_PINMUX_GPLMUX15_t
GPLMUX15 ALT_SYSMGR_PINMUX_GPLMUX15
volatile
ALT_SYSMGR_PINMUX_GPLMUX16_t
GPLMUX16 ALT_SYSMGR_PINMUX_GPLMUX16
volatile
ALT_SYSMGR_PINMUX_GPLMUX17_t
GPLMUX17 ALT_SYSMGR_PINMUX_GPLMUX17
volatile
ALT_SYSMGR_PINMUX_GPLMUX18_t
GPLMUX18 ALT_SYSMGR_PINMUX_GPLMUX18
volatile
ALT_SYSMGR_PINMUX_GPLMUX19_t
GPLMUX19 ALT_SYSMGR_PINMUX_GPLMUX19
volatile
ALT_SYSMGR_PINMUX_GPLMUX20_t
GPLMUX20 ALT_SYSMGR_PINMUX_GPLMUX20
volatile
ALT_SYSMGR_PINMUX_GPLMUX21_t
GPLMUX21 ALT_SYSMGR_PINMUX_GPLMUX21
volatile
ALT_SYSMGR_PINMUX_GPLMUX22_t
GPLMUX22 ALT_SYSMGR_PINMUX_GPLMUX22
volatile
ALT_SYSMGR_PINMUX_GPLMUX23_t
GPLMUX23 ALT_SYSMGR_PINMUX_GPLMUX23
volatile
ALT_SYSMGR_PINMUX_GPLMUX24_t
GPLMUX24 ALT_SYSMGR_PINMUX_GPLMUX24
volatile
ALT_SYSMGR_PINMUX_GPLMUX25_t
GPLMUX25 ALT_SYSMGR_PINMUX_GPLMUX25
volatile
ALT_SYSMGR_PINMUX_GPLMUX26_t
GPLMUX26 ALT_SYSMGR_PINMUX_GPLMUX26
volatile
ALT_SYSMGR_PINMUX_GPLMUX27_t
GPLMUX27 ALT_SYSMGR_PINMUX_GPLMUX27
volatile
ALT_SYSMGR_PINMUX_GPLMUX28_t
GPLMUX28 ALT_SYSMGR_PINMUX_GPLMUX28
volatile
ALT_SYSMGR_PINMUX_GPLMUX29_t
GPLMUX29 ALT_SYSMGR_PINMUX_GPLMUX29
volatile
ALT_SYSMGR_PINMUX_GPLMUX30_t
GPLMUX30 ALT_SYSMGR_PINMUX_GPLMUX30
volatile
ALT_SYSMGR_PINMUX_GPLMUX31_t
GPLMUX31 ALT_SYSMGR_PINMUX_GPLMUX31
volatile
ALT_SYSMGR_PINMUX_GPLMUX32_t
GPLMUX32 ALT_SYSMGR_PINMUX_GPLMUX32
volatile
ALT_SYSMGR_PINMUX_GPLMUX33_t
GPLMUX33 ALT_SYSMGR_PINMUX_GPLMUX33
volatile
ALT_SYSMGR_PINMUX_GPLMUX34_t
GPLMUX34 ALT_SYSMGR_PINMUX_GPLMUX34
volatile
ALT_SYSMGR_PINMUX_GPLMUX35_t
GPLMUX35 ALT_SYSMGR_PINMUX_GPLMUX35
volatile
ALT_SYSMGR_PINMUX_GPLMUX36_t
GPLMUX36 ALT_SYSMGR_PINMUX_GPLMUX36
volatile
ALT_SYSMGR_PINMUX_GPLMUX37_t
GPLMUX37 ALT_SYSMGR_PINMUX_GPLMUX37
volatile
ALT_SYSMGR_PINMUX_GPLMUX38_t
GPLMUX38 ALT_SYSMGR_PINMUX_GPLMUX38
volatile
ALT_SYSMGR_PINMUX_GPLMUX39_t
GPLMUX39 ALT_SYSMGR_PINMUX_GPLMUX39
volatile
ALT_SYSMGR_PINMUX_GPLMUX40_t
GPLMUX40 ALT_SYSMGR_PINMUX_GPLMUX40
volatile
ALT_SYSMGR_PINMUX_GPLMUX41_t
GPLMUX41 ALT_SYSMGR_PINMUX_GPLMUX41
volatile
ALT_SYSMGR_PINMUX_GPLMUX42_t
GPLMUX42 ALT_SYSMGR_PINMUX_GPLMUX42
volatile
ALT_SYSMGR_PINMUX_GPLMUX43_t
GPLMUX43 ALT_SYSMGR_PINMUX_GPLMUX43
volatile
ALT_SYSMGR_PINMUX_GPLMUX44_t
GPLMUX44 ALT_SYSMGR_PINMUX_GPLMUX44
volatile
ALT_SYSMGR_PINMUX_GPLMUX45_t
GPLMUX45 ALT_SYSMGR_PINMUX_GPLMUX45
volatile
ALT_SYSMGR_PINMUX_GPLMUX46_t
GPLMUX46 ALT_SYSMGR_PINMUX_GPLMUX46
volatile
ALT_SYSMGR_PINMUX_GPLMUX47_t
GPLMUX47 ALT_SYSMGR_PINMUX_GPLMUX47
volatile
ALT_SYSMGR_PINMUX_GPLMUX48_t
GPLMUX48 ALT_SYSMGR_PINMUX_GPLMUX48
volatile
ALT_SYSMGR_PINMUX_GPLMUX49_t
GPLMUX49 ALT_SYSMGR_PINMUX_GPLMUX49
volatile
ALT_SYSMGR_PINMUX_GPLMUX50_t
GPLMUX50 ALT_SYSMGR_PINMUX_GPLMUX50
volatile
ALT_SYSMGR_PINMUX_GPLMUX51_t
GPLMUX51 ALT_SYSMGR_PINMUX_GPLMUX51
volatile
ALT_SYSMGR_PINMUX_GPLMUX52_t
GPLMUX52 ALT_SYSMGR_PINMUX_GPLMUX52
volatile
ALT_SYSMGR_PINMUX_GPLMUX53_t
GPLMUX53 ALT_SYSMGR_PINMUX_GPLMUX53
volatile
ALT_SYSMGR_PINMUX_GPLMUX54_t
GPLMUX54 ALT_SYSMGR_PINMUX_GPLMUX54
volatile
ALT_SYSMGR_PINMUX_GPLMUX55_t
GPLMUX55 ALT_SYSMGR_PINMUX_GPLMUX55
volatile
ALT_SYSMGR_PINMUX_GPLMUX56_t
GPLMUX56 ALT_SYSMGR_PINMUX_GPLMUX56
volatile
ALT_SYSMGR_PINMUX_GPLMUX57_t
GPLMUX57 ALT_SYSMGR_PINMUX_GPLMUX57
volatile
ALT_SYSMGR_PINMUX_GPLMUX58_t
GPLMUX58 ALT_SYSMGR_PINMUX_GPLMUX58
volatile
ALT_SYSMGR_PINMUX_GPLMUX59_t
GPLMUX59 ALT_SYSMGR_PINMUX_GPLMUX59
volatile
ALT_SYSMGR_PINMUX_GPLMUX60_t
GPLMUX60 ALT_SYSMGR_PINMUX_GPLMUX60
volatile
ALT_SYSMGR_PINMUX_GPLMUX61_t
GPLMUX61 ALT_SYSMGR_PINMUX_GPLMUX61
volatile
ALT_SYSMGR_PINMUX_GPLMUX62_t
GPLMUX62 ALT_SYSMGR_PINMUX_GPLMUX62
volatile
ALT_SYSMGR_PINMUX_GPLMUX63_t
GPLMUX63 ALT_SYSMGR_PINMUX_GPLMUX63
volatile
ALT_SYSMGR_PINMUX_GPLMUX64_t
GPLMUX64 ALT_SYSMGR_PINMUX_GPLMUX64
volatile
ALT_SYSMGR_PINMUX_GPLMUX65_t
GPLMUX65 ALT_SYSMGR_PINMUX_GPLMUX65
volatile
ALT_SYSMGR_PINMUX_GPLMUX66_t
GPLMUX66 ALT_SYSMGR_PINMUX_GPLMUX66
volatile
ALT_SYSMGR_PINMUX_GPLMUX67_t
GPLMUX67 ALT_SYSMGR_PINMUX_GPLMUX67
volatile
ALT_SYSMGR_PINMUX_GPLMUX68_t
GPLMUX68 ALT_SYSMGR_PINMUX_GPLMUX68
volatile
ALT_SYSMGR_PINMUX_GPLMUX69_t
GPLMUX69 ALT_SYSMGR_PINMUX_GPLMUX69
volatile
ALT_SYSMGR_PINMUX_GPLMUX70_t
GPLMUX70 ALT_SYSMGR_PINMUX_GPLMUX70
volatile
ALT_SYSMGR_PINMUX_NANDUSEFPGA_t
NANDUSEFPGA ALT_SYSMGR_PINMUX_NANDUSEFPGA
volatile uint32_t _pad_0x2f4_0x2f7 UNDEFINED
volatile
ALT_SYSMGR_PINMUX_RGMII1USEFPGA_t
RGMII1USEFPGA ALT_SYSMGR_PINMUX_RGMII1USEFPGA
volatile uint32_t _pad_0x2fc_0x303 UNDEFINED
volatile
ALT_SYSMGR_PINMUX_I2C0USEFPGA_t
I2C0USEFPGA ALT_SYSMGR_PINMUX_I2C0USEFPGA
volatile uint32_t _pad_0x308_0x313 UNDEFINED
volatile
ALT_SYSMGR_PINMUX_RGMII0USEFPGA_t
RGMII0USEFPGA ALT_SYSMGR_PINMUX_RGMII0USEFPGA
volatile uint32_t _pad_0x318_0x323 UNDEFINED
volatile
ALT_SYSMGR_PINMUX_I2C3USEFPGA_t
I2C3USEFPGA ALT_SYSMGR_PINMUX_I2C3USEFPGA
volatile
ALT_SYSMGR_PINMUX_I2C2USEFPGA_t
I2C2USEFPGA ALT_SYSMGR_PINMUX_I2C2USEFPGA
volatile
ALT_SYSMGR_PINMUX_I2C1USEFPGA_t
I2C1USEFPGA ALT_SYSMGR_PINMUX_I2C1USEFPGA
volatile
ALT_SYSMGR_PINMUX_SPIM1USEFPGA_t
SPIM1USEFPGA ALT_SYSMGR_PINMUX_SPIM1USEFPGA
volatile uint32_t _pad_0x334_0x337 UNDEFINED
volatile
ALT_SYSMGR_PINMUX_SPIM0USEFPGA_t
SPIM0USEFPGA ALT_SYSMGR_PINMUX_SPIM0USEFPGA
volatile uint32_t _pad_0x33c_0x400 UNDEFINED
struct ALT_SYSMGR_PINMUX_raw_s

The struct declaration for the raw register contents of register group ALT_SYSMGR_PINMUX.

Data Fields
volatile uint32_t EMACIO0 ALT_SYSMGR_PINMUX_EMACIO0
volatile uint32_t EMACIO1 ALT_SYSMGR_PINMUX_EMACIO1
volatile uint32_t EMACIO2 ALT_SYSMGR_PINMUX_EMACIO2
volatile uint32_t EMACIO3 ALT_SYSMGR_PINMUX_EMACIO3
volatile uint32_t EMACIO4 ALT_SYSMGR_PINMUX_EMACIO4
volatile uint32_t EMACIO5 ALT_SYSMGR_PINMUX_EMACIO5
volatile uint32_t EMACIO6 ALT_SYSMGR_PINMUX_EMACIO6
volatile uint32_t EMACIO7 ALT_SYSMGR_PINMUX_EMACIO7
volatile uint32_t EMACIO8 ALT_SYSMGR_PINMUX_EMACIO8
volatile uint32_t EMACIO9 ALT_SYSMGR_PINMUX_EMACIO9
volatile uint32_t EMACIO10 ALT_SYSMGR_PINMUX_EMACIO10
volatile uint32_t EMACIO11 ALT_SYSMGR_PINMUX_EMACIO11
volatile uint32_t EMACIO12 ALT_SYSMGR_PINMUX_EMACIO12
volatile uint32_t EMACIO13 ALT_SYSMGR_PINMUX_EMACIO13
volatile uint32_t EMACIO14 ALT_SYSMGR_PINMUX_EMACIO14
volatile uint32_t EMACIO15 ALT_SYSMGR_PINMUX_EMACIO15
volatile uint32_t EMACIO16 ALT_SYSMGR_PINMUX_EMACIO16
volatile uint32_t EMACIO17 ALT_SYSMGR_PINMUX_EMACIO17
volatile uint32_t EMACIO18 ALT_SYSMGR_PINMUX_EMACIO18
volatile uint32_t EMACIO19 ALT_SYSMGR_PINMUX_EMACIO19
volatile uint32_t FLASHIO0 ALT_SYSMGR_PINMUX_FLSHIO0
volatile uint32_t FLASHIO1 ALT_SYSMGR_PINMUX_FLSHIO1
volatile uint32_t FLASHIO2 ALT_SYSMGR_PINMUX_FLSHIO2
volatile uint32_t FLASHIO3 ALT_SYSMGR_PINMUX_FLSHIO3
volatile uint32_t FLASHIO4 ALT_SYSMGR_PINMUX_FLSHIO4
volatile uint32_t FLASHIO5 ALT_SYSMGR_PINMUX_FLSHIO5
volatile uint32_t FLASHIO6 ALT_SYSMGR_PINMUX_FLSHIO6
volatile uint32_t FLASHIO7 ALT_SYSMGR_PINMUX_FLSHIO7
volatile uint32_t FLASHIO8 ALT_SYSMGR_PINMUX_FLSHIO8
volatile uint32_t FLASHIO9 ALT_SYSMGR_PINMUX_FLSHIO9
volatile uint32_t FLASHIO10 ALT_SYSMGR_PINMUX_FLSHIO10
volatile uint32_t FLASHIO11 ALT_SYSMGR_PINMUX_FLSHIO11
volatile uint32_t GENERALIO0 ALT_SYSMGR_PINMUX_GENERALIO0
volatile uint32_t GENERALIO1 ALT_SYSMGR_PINMUX_GENERALIO1
volatile uint32_t GENERALIO2 ALT_SYSMGR_PINMUX_GENERALIO2
volatile uint32_t GENERALIO3 ALT_SYSMGR_PINMUX_GENERALIO3
volatile uint32_t GENERALIO4 ALT_SYSMGR_PINMUX_GENERALIO4
volatile uint32_t GENERALIO5 ALT_SYSMGR_PINMUX_GENERALIO5
volatile uint32_t GENERALIO6 ALT_SYSMGR_PINMUX_GENERALIO6
volatile uint32_t GENERALIO7 ALT_SYSMGR_PINMUX_GENERALIO7
volatile uint32_t GENERALIO8 ALT_SYSMGR_PINMUX_GENERALIO8
volatile uint32_t GENERALIO9 ALT_SYSMGR_PINMUX_GENERALIO9
volatile uint32_t GENERALIO10 ALT_SYSMGR_PINMUX_GENERALIO10
volatile uint32_t GENERALIO11 ALT_SYSMGR_PINMUX_GENERALIO11
volatile uint32_t GENERALIO12 ALT_SYSMGR_PINMUX_GENERALIO12
volatile uint32_t GENERALIO13 ALT_SYSMGR_PINMUX_GENERALIO13
volatile uint32_t GENERALIO14 ALT_SYSMGR_PINMUX_GENERALIO14
volatile uint32_t GENERALIO15 ALT_SYSMGR_PINMUX_GENERALIO15
volatile uint32_t GENERALIO16 ALT_SYSMGR_PINMUX_GENERALIO16
volatile uint32_t GENERALIO17 ALT_SYSMGR_PINMUX_GENERALIO17
volatile uint32_t GENERALIO18 ALT_SYSMGR_PINMUX_GENERALIO18
volatile uint32_t GENERALIO19 ALT_SYSMGR_PINMUX_GENERALIO19
volatile uint32_t GENERALIO20 ALT_SYSMGR_PINMUX_GENERALIO20
volatile uint32_t GENERALIO21 ALT_SYSMGR_PINMUX_GENERALIO21
volatile uint32_t GENERALIO22 ALT_SYSMGR_PINMUX_GENERALIO22
volatile uint32_t GENERALIO23 ALT_SYSMGR_PINMUX_GENERALIO23
volatile uint32_t GENERALIO24 ALT_SYSMGR_PINMUX_GENERALIO24
volatile uint32_t GENERALIO25 ALT_SYSMGR_PINMUX_GENERALIO25
volatile uint32_t GENERALIO26 ALT_SYSMGR_PINMUX_GENERALIO26
volatile uint32_t GENERALIO27 ALT_SYSMGR_PINMUX_GENERALIO27
volatile uint32_t GENERALIO28 ALT_SYSMGR_PINMUX_GENERALIO28
volatile uint32_t GENERALIO29 ALT_SYSMGR_PINMUX_GENERALIO29
volatile uint32_t GENERALIO30 ALT_SYSMGR_PINMUX_GENERALIO30
volatile uint32_t GENERALIO31 ALT_SYSMGR_PINMUX_GENERALIO31
volatile uint32_t MIXED1IO0 ALT_SYSMGR_PINMUX_MIXED1IO0
volatile uint32_t MIXED1IO1 ALT_SYSMGR_PINMUX_MIXED1IO1
volatile uint32_t MIXED1IO2 ALT_SYSMGR_PINMUX_MIXED1IO2
volatile uint32_t MIXED1IO3 ALT_SYSMGR_PINMUX_MIXED1IO3
volatile uint32_t MIXED1IO4 ALT_SYSMGR_PINMUX_MIXED1IO4
volatile uint32_t MIXED1IO5 ALT_SYSMGR_PINMUX_MIXED1IO5
volatile uint32_t MIXED1IO6 ALT_SYSMGR_PINMUX_MIXED1IO6
volatile uint32_t MIXED1IO7 ALT_SYSMGR_PINMUX_MIXED1IO7
volatile uint32_t MIXED1IO8 ALT_SYSMGR_PINMUX_MIXED1IO8
volatile uint32_t MIXED1IO9 ALT_SYSMGR_PINMUX_MIXED1IO9
volatile uint32_t MIXED1IO10 ALT_SYSMGR_PINMUX_MIXED1IO10
volatile uint32_t MIXED1IO11 ALT_SYSMGR_PINMUX_MIXED1IO11
volatile uint32_t MIXED1IO12 ALT_SYSMGR_PINMUX_MIXED1IO12
volatile uint32_t MIXED1IO13 ALT_SYSMGR_PINMUX_MIXED1IO13
volatile uint32_t MIXED1IO14 ALT_SYSMGR_PINMUX_MIXED1IO14
volatile uint32_t MIXED1IO15 ALT_SYSMGR_PINMUX_MIXED1IO15
volatile uint32_t MIXED1IO16 ALT_SYSMGR_PINMUX_MIXED1IO16
volatile uint32_t MIXED1IO17 ALT_SYSMGR_PINMUX_MIXED1IO17
volatile uint32_t MIXED1IO18 ALT_SYSMGR_PINMUX_MIXED1IO18
volatile uint32_t MIXED1IO19 ALT_SYSMGR_PINMUX_MIXED1IO19
volatile uint32_t MIXED1IO20 ALT_SYSMGR_PINMUX_MIXED1IO20
volatile uint32_t MIXED1IO21 ALT_SYSMGR_PINMUX_MIXED1IO21
volatile uint32_t MIXED2IO0 ALT_SYSMGR_PINMUX_MIXED2IO0
volatile uint32_t MIXED2IO1 ALT_SYSMGR_PINMUX_MIXED2IO1
volatile uint32_t MIXED2IO2 ALT_SYSMGR_PINMUX_MIXED2IO2
volatile uint32_t MIXED2IO3 ALT_SYSMGR_PINMUX_MIXED2IO3
volatile uint32_t MIXED2IO4 ALT_SYSMGR_PINMUX_MIXED2IO4
volatile uint32_t MIXED2IO5 ALT_SYSMGR_PINMUX_MIXED2IO5
volatile uint32_t MIXED2IO6 ALT_SYSMGR_PINMUX_MIXED2IO6
volatile uint32_t MIXED2IO7 ALT_SYSMGR_PINMUX_MIXED2IO7
volatile uint32_t GPLINMUX48 ALT_SYSMGR_PINMUX_GPLINMUX48
volatile uint32_t GPLINMUX49 ALT_SYSMGR_PINMUX_GPLINMUX49
volatile uint32_t GPLINMUX50 ALT_SYSMGR_PINMUX_GPLINMUX50
volatile uint32_t GPLINMUX51 ALT_SYSMGR_PINMUX_GPLINMUX51
volatile uint32_t GPLINMUX52 ALT_SYSMGR_PINMUX_GPLINMUX52
volatile uint32_t GPLINMUX53 ALT_SYSMGR_PINMUX_GPLINMUX53
volatile uint32_t GPLINMUX54 ALT_SYSMGR_PINMUX_GPLINMUX54
volatile uint32_t GPLINMUX55 ALT_SYSMGR_PINMUX_GPLINMUX55
volatile uint32_t GPLINMUX56 ALT_SYSMGR_PINMUX_GPLINMUX56
volatile uint32_t GPLINMUX57 ALT_SYSMGR_PINMUX_GPLINMUX57
volatile uint32_t GPLINMUX58 ALT_SYSMGR_PINMUX_GPLINMUX58
volatile uint32_t GPLINMUX59 ALT_SYSMGR_PINMUX_GPLINMUX59
volatile uint32_t GPLINMUX60 ALT_SYSMGR_PINMUX_GPLINMUX60
volatile uint32_t GPLINMUX61 ALT_SYSMGR_PINMUX_GPLINMUX61
volatile uint32_t GPLINMUX62 ALT_SYSMGR_PINMUX_GPLINMUX62
volatile uint32_t GPLINMUX63 ALT_SYSMGR_PINMUX_GPLINMUX63
volatile uint32_t GPLINMUX64 ALT_SYSMGR_PINMUX_GPLINMUX64
volatile uint32_t GPLINMUX65 ALT_SYSMGR_PINMUX_GPLINMUX65
volatile uint32_t GPLINMUX66 ALT_SYSMGR_PINMUX_GPLINMUX66
volatile uint32_t GPLINMUX67 ALT_SYSMGR_PINMUX_GPLINMUX67
volatile uint32_t GPLINMUX68 ALT_SYSMGR_PINMUX_GPLINMUX68
volatile uint32_t GPLINMUX69 ALT_SYSMGR_PINMUX_GPLINMUX69
volatile uint32_t GPLINMUX70 ALT_SYSMGR_PINMUX_GPLINMUX70
volatile uint32_t GPLMUX0 ALT_SYSMGR_PINMUX_GPLMUX0
volatile uint32_t GPLMUX1 ALT_SYSMGR_PINMUX_GPLMUX1
volatile uint32_t GPLMUX2 ALT_SYSMGR_PINMUX_GPLMUX2
volatile uint32_t GPLMUX3 ALT_SYSMGR_PINMUX_GPLMUX3
volatile uint32_t GPLMUX4 ALT_SYSMGR_PINMUX_GPLMUX4
volatile uint32_t GPLMUX5 ALT_SYSMGR_PINMUX_GPLMUX5
volatile uint32_t GPLMUX6 ALT_SYSMGR_PINMUX_GPLMUX6
volatile uint32_t GPLMUX7 ALT_SYSMGR_PINMUX_GPLMUX7
volatile uint32_t GPLMUX8 ALT_SYSMGR_PINMUX_GPLMUX8
volatile uint32_t GPLMUX9 ALT_SYSMGR_PINMUX_GPLMUX9
volatile uint32_t GPLMUX10 ALT_SYSMGR_PINMUX_GPLMUX10
volatile uint32_t GPLMUX11 ALT_SYSMGR_PINMUX_GPLMUX11
volatile uint32_t GPLMUX12 ALT_SYSMGR_PINMUX_GPLMUX12
volatile uint32_t GPLMUX13 ALT_SYSMGR_PINMUX_GPLMUX13
volatile uint32_t GPLMUX14 ALT_SYSMGR_PINMUX_GPLMUX14
volatile uint32_t GPLMUX15 ALT_SYSMGR_PINMUX_GPLMUX15
volatile uint32_t GPLMUX16 ALT_SYSMGR_PINMUX_GPLMUX16
volatile uint32_t GPLMUX17 ALT_SYSMGR_PINMUX_GPLMUX17
volatile uint32_t GPLMUX18 ALT_SYSMGR_PINMUX_GPLMUX18
volatile uint32_t GPLMUX19 ALT_SYSMGR_PINMUX_GPLMUX19
volatile uint32_t GPLMUX20 ALT_SYSMGR_PINMUX_GPLMUX20
volatile uint32_t GPLMUX21 ALT_SYSMGR_PINMUX_GPLMUX21
volatile uint32_t GPLMUX22 ALT_SYSMGR_PINMUX_GPLMUX22
volatile uint32_t GPLMUX23 ALT_SYSMGR_PINMUX_GPLMUX23
volatile uint32_t GPLMUX24 ALT_SYSMGR_PINMUX_GPLMUX24
volatile uint32_t GPLMUX25 ALT_SYSMGR_PINMUX_GPLMUX25
volatile uint32_t GPLMUX26 ALT_SYSMGR_PINMUX_GPLMUX26
volatile uint32_t GPLMUX27 ALT_SYSMGR_PINMUX_GPLMUX27
volatile uint32_t GPLMUX28 ALT_SYSMGR_PINMUX_GPLMUX28
volatile uint32_t GPLMUX29 ALT_SYSMGR_PINMUX_GPLMUX29
volatile uint32_t GPLMUX30 ALT_SYSMGR_PINMUX_GPLMUX30
volatile uint32_t GPLMUX31 ALT_SYSMGR_PINMUX_GPLMUX31
volatile uint32_t GPLMUX32 ALT_SYSMGR_PINMUX_GPLMUX32
volatile uint32_t GPLMUX33 ALT_SYSMGR_PINMUX_GPLMUX33
volatile uint32_t GPLMUX34 ALT_SYSMGR_PINMUX_GPLMUX34
volatile uint32_t GPLMUX35 ALT_SYSMGR_PINMUX_GPLMUX35
volatile uint32_t GPLMUX36 ALT_SYSMGR_PINMUX_GPLMUX36
volatile uint32_t GPLMUX37 ALT_SYSMGR_PINMUX_GPLMUX37
volatile uint32_t GPLMUX38 ALT_SYSMGR_PINMUX_GPLMUX38
volatile uint32_t GPLMUX39 ALT_SYSMGR_PINMUX_GPLMUX39
volatile uint32_t GPLMUX40 ALT_SYSMGR_PINMUX_GPLMUX40
volatile uint32_t GPLMUX41 ALT_SYSMGR_PINMUX_GPLMUX41
volatile uint32_t GPLMUX42 ALT_SYSMGR_PINMUX_GPLMUX42
volatile uint32_t GPLMUX43 ALT_SYSMGR_PINMUX_GPLMUX43
volatile uint32_t GPLMUX44 ALT_SYSMGR_PINMUX_GPLMUX44
volatile uint32_t GPLMUX45 ALT_SYSMGR_PINMUX_GPLMUX45
volatile uint32_t GPLMUX46 ALT_SYSMGR_PINMUX_GPLMUX46
volatile uint32_t GPLMUX47 ALT_SYSMGR_PINMUX_GPLMUX47
volatile uint32_t GPLMUX48 ALT_SYSMGR_PINMUX_GPLMUX48
volatile uint32_t GPLMUX49 ALT_SYSMGR_PINMUX_GPLMUX49
volatile uint32_t GPLMUX50 ALT_SYSMGR_PINMUX_GPLMUX50
volatile uint32_t GPLMUX51 ALT_SYSMGR_PINMUX_GPLMUX51
volatile uint32_t GPLMUX52 ALT_SYSMGR_PINMUX_GPLMUX52
volatile uint32_t GPLMUX53 ALT_SYSMGR_PINMUX_GPLMUX53
volatile uint32_t GPLMUX54 ALT_SYSMGR_PINMUX_GPLMUX54
volatile uint32_t GPLMUX55 ALT_SYSMGR_PINMUX_GPLMUX55
volatile uint32_t GPLMUX56 ALT_SYSMGR_PINMUX_GPLMUX56
volatile uint32_t GPLMUX57 ALT_SYSMGR_PINMUX_GPLMUX57
volatile uint32_t GPLMUX58 ALT_SYSMGR_PINMUX_GPLMUX58
volatile uint32_t GPLMUX59 ALT_SYSMGR_PINMUX_GPLMUX59
volatile uint32_t GPLMUX60 ALT_SYSMGR_PINMUX_GPLMUX60
volatile uint32_t GPLMUX61 ALT_SYSMGR_PINMUX_GPLMUX61
volatile uint32_t GPLMUX62 ALT_SYSMGR_PINMUX_GPLMUX62
volatile uint32_t GPLMUX63 ALT_SYSMGR_PINMUX_GPLMUX63
volatile uint32_t GPLMUX64 ALT_SYSMGR_PINMUX_GPLMUX64
volatile uint32_t GPLMUX65 ALT_SYSMGR_PINMUX_GPLMUX65
volatile uint32_t GPLMUX66 ALT_SYSMGR_PINMUX_GPLMUX66
volatile uint32_t GPLMUX67 ALT_SYSMGR_PINMUX_GPLMUX67
volatile uint32_t GPLMUX68 ALT_SYSMGR_PINMUX_GPLMUX68
volatile uint32_t GPLMUX69 ALT_SYSMGR_PINMUX_GPLMUX69
volatile uint32_t GPLMUX70 ALT_SYSMGR_PINMUX_GPLMUX70
volatile uint32_t NANDUSEFPGA ALT_SYSMGR_PINMUX_NANDUSEFPGA
volatile uint32_t _pad_0x2f4_0x2f7 UNDEFINED
volatile uint32_t RGMII1USEFPGA ALT_SYSMGR_PINMUX_RGMII1USEFPGA
volatile uint32_t _pad_0x2fc_0x303 UNDEFINED
volatile uint32_t I2C0USEFPGA ALT_SYSMGR_PINMUX_I2C0USEFPGA
volatile uint32_t _pad_0x308_0x313 UNDEFINED
volatile uint32_t RGMII0USEFPGA ALT_SYSMGR_PINMUX_RGMII0USEFPGA
volatile uint32_t _pad_0x318_0x323 UNDEFINED
volatile uint32_t I2C3USEFPGA ALT_SYSMGR_PINMUX_I2C3USEFPGA
volatile uint32_t I2C2USEFPGA ALT_SYSMGR_PINMUX_I2C2USEFPGA
volatile uint32_t I2C1USEFPGA ALT_SYSMGR_PINMUX_I2C1USEFPGA
volatile uint32_t SPIM1USEFPGA ALT_SYSMGR_PINMUX_SPIM1USEFPGA
volatile uint32_t _pad_0x334_0x337 UNDEFINED
volatile uint32_t SPIM0USEFPGA ALT_SYSMGR_PINMUX_SPIM0USEFPGA
volatile uint32_t _pad_0x33c_0x400 UNDEFINED

Typedef Documentation

The typedef declaration for register group ALT_SYSMGR_PINMUX.

The typedef declaration for the raw register contents of register group ALT_SYSMGR_PINMUX.