Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Write Tidemark - wr_tidemark

Description

Controls the release of the transaction in the write data FIFO.

Register Layout

Bits Access Reset Description
[3:0] RW 0x4 Level
[31:4] ??? 0x0 UNDEFINED

Field : Level - level

Stalls the transaction in the write data FIFO until the number of occupied slots in the write data FIFO exceeds the level. Note that the transaction is released before this level is achieved if the network receives the WLAST beat or the write FIFO becomes full.

Field Access Macros:

#define ALT_L3_WR_TIDEMARK_LEVEL_LSB   0
 
#define ALT_L3_WR_TIDEMARK_LEVEL_MSB   3
 
#define ALT_L3_WR_TIDEMARK_LEVEL_WIDTH   4
 
#define ALT_L3_WR_TIDEMARK_LEVEL_SET_MSK   0x0000000f
 
#define ALT_L3_WR_TIDEMARK_LEVEL_CLR_MSK   0xfffffff0
 
#define ALT_L3_WR_TIDEMARK_LEVEL_RESET   0x4
 
#define ALT_L3_WR_TIDEMARK_LEVEL_GET(value)   (((value) & 0x0000000f) >> 0)
 
#define ALT_L3_WR_TIDEMARK_LEVEL_SET(value)   (((value) << 0) & 0x0000000f)
 

Data Structures

struct  ALT_L3_WR_TIDEMARK_s
 

Macros

#define ALT_L3_WR_TIDEMARK_OFST   0x40
 
#define ALT_L3_WR_TIDEMARK_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_TIDEMARK_OFST))
 

Typedefs

typedef struct ALT_L3_WR_TIDEMARK_s ALT_L3_WR_TIDEMARK_t
 

Data Structure Documentation

struct ALT_L3_WR_TIDEMARK_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_L3_WR_TIDEMARK.

Data Fields
uint32_t level: 4 Level
uint32_t __pad0__: 28 UNDEFINED

Macro Definitions

#define ALT_L3_WR_TIDEMARK_LEVEL_LSB   0

The Least Significant Bit (LSB) position of the ALT_L3_WR_TIDEMARK_LEVEL register field.

#define ALT_L3_WR_TIDEMARK_LEVEL_MSB   3

The Most Significant Bit (MSB) position of the ALT_L3_WR_TIDEMARK_LEVEL register field.

#define ALT_L3_WR_TIDEMARK_LEVEL_WIDTH   4

The width in bits of the ALT_L3_WR_TIDEMARK_LEVEL register field.

#define ALT_L3_WR_TIDEMARK_LEVEL_SET_MSK   0x0000000f

The mask used to set the ALT_L3_WR_TIDEMARK_LEVEL register field value.

#define ALT_L3_WR_TIDEMARK_LEVEL_CLR_MSK   0xfffffff0

The mask used to clear the ALT_L3_WR_TIDEMARK_LEVEL register field value.

#define ALT_L3_WR_TIDEMARK_LEVEL_RESET   0x4

The reset value of the ALT_L3_WR_TIDEMARK_LEVEL register field.

#define ALT_L3_WR_TIDEMARK_LEVEL_GET (   value)    (((value) & 0x0000000f) >> 0)

Extracts the ALT_L3_WR_TIDEMARK_LEVEL field value from a register.

#define ALT_L3_WR_TIDEMARK_LEVEL_SET (   value)    (((value) << 0) & 0x0000000f)

Produces a ALT_L3_WR_TIDEMARK_LEVEL register field value suitable for setting the register.

#define ALT_L3_WR_TIDEMARK_OFST   0x40

The byte offset of the ALT_L3_WR_TIDEMARK register from the beginning of the component.

#define ALT_L3_WR_TIDEMARK_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_TIDEMARK_OFST))

The address of the ALT_L3_WR_TIDEMARK register.

Typedef Documentation

The typedef declaration for register ALT_L3_WR_TIDEMARK.