Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : DRAM Address Widths Register - dramaddrw

Description

This register configures the width of the various address fields of the DRAM. The values specified in this register must match the memory devices being used.

Register Layout

Bits Access Reset Description
[4:0] RW Unknown DRAM Column Address Bits
[9:5] RW Unknown DRAM Row Address Bits
[12:10] RW Unknown DRAM Bank Address Bits
[15:13] RW Unknown DRAM Chip Address Bits
[31:16] ??? 0x0 UNDEFINED

Field : DRAM Column Address Bits - colbits

The number of column address bits for the memory devices in your memory interface.

Field Access Macros:

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_LSB   0
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_MSB   4
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_WIDTH   5
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_SET_MSK   0x0000001f
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_CLR_MSK   0xffffffe0
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_RESET   0x0
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_GET(value)   (((value) & 0x0000001f) >> 0)
 
#define ALT_SDR_CTL_DRAMADDRW_COLBITS_SET(value)   (((value) << 0) & 0x0000001f)
 

Field : DRAM Row Address Bits - rowbits

The number of row address bits for the memory devices in your memory interface.

Field Access Macros:

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_LSB   5
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_MSB   9
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_WIDTH   5
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_SET_MSK   0x000003e0
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_CLR_MSK   0xfffffc1f
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_RESET   0x0
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_GET(value)   (((value) & 0x000003e0) >> 5)
 
#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_SET(value)   (((value) << 5) & 0x000003e0)
 

Field : DRAM Bank Address Bits - bankbits

The number of bank address bits for the memory devices in your memory interface.

Field Access Macros:

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_LSB   10
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_MSB   12
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_WIDTH   3
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_SET_MSK   0x00001c00
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_CLR_MSK   0xffffe3ff
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_RESET   0x0
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_GET(value)   (((value) & 0x00001c00) >> 10)
 
#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_SET(value)   (((value) << 10) & 0x00001c00)
 

Field : DRAM Chip Address Bits - csbits

The number of chip select address bits for the memory devices in your memory interface.

Field Access Macros:

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_LSB   13
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_MSB   15
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_WIDTH   3
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_SET_MSK   0x0000e000
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_CLR_MSK   0xffff1fff
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_RESET   0x0
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_GET(value)   (((value) & 0x0000e000) >> 13)
 
#define ALT_SDR_CTL_DRAMADDRW_CSBITS_SET(value)   (((value) << 13) & 0x0000e000)
 

Data Structures

struct  ALT_SDR_CTL_DRAMADDRW_s
 

Macros

#define ALT_SDR_CTL_DRAMADDRW_OFST   0x2c
 

Typedefs

typedef struct
ALT_SDR_CTL_DRAMADDRW_s 
ALT_SDR_CTL_DRAMADDRW_t
 

Data Structure Documentation

struct ALT_SDR_CTL_DRAMADDRW_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SDR_CTL_DRAMADDRW.

Data Fields
uint32_t colbits: 5 DRAM Column Address Bits
uint32_t rowbits: 5 DRAM Row Address Bits
uint32_t bankbits: 3 DRAM Bank Address Bits
uint32_t csbits: 3 DRAM Chip Address Bits
uint32_t __pad0__: 16 UNDEFINED

Macro Definitions

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_LSB   0

The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMADDRW_COLBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_MSB   4

The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMADDRW_COLBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_WIDTH   5

The width in bits of the ALT_SDR_CTL_DRAMADDRW_COLBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_SET_MSK   0x0000001f

The mask used to set the ALT_SDR_CTL_DRAMADDRW_COLBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_CLR_MSK   0xffffffe0

The mask used to clear the ALT_SDR_CTL_DRAMADDRW_COLBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_RESET   0x0

The reset value of the ALT_SDR_CTL_DRAMADDRW_COLBITS register field is UNKNOWN.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_GET (   value)    (((value) & 0x0000001f) >> 0)

Extracts the ALT_SDR_CTL_DRAMADDRW_COLBITS field value from a register.

#define ALT_SDR_CTL_DRAMADDRW_COLBITS_SET (   value)    (((value) << 0) & 0x0000001f)

Produces a ALT_SDR_CTL_DRAMADDRW_COLBITS register field value suitable for setting the register.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_LSB   5

The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMADDRW_ROWBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_MSB   9

The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMADDRW_ROWBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_WIDTH   5

The width in bits of the ALT_SDR_CTL_DRAMADDRW_ROWBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_SET_MSK   0x000003e0

The mask used to set the ALT_SDR_CTL_DRAMADDRW_ROWBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_CLR_MSK   0xfffffc1f

The mask used to clear the ALT_SDR_CTL_DRAMADDRW_ROWBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_RESET   0x0

The reset value of the ALT_SDR_CTL_DRAMADDRW_ROWBITS register field is UNKNOWN.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_GET (   value)    (((value) & 0x000003e0) >> 5)

Extracts the ALT_SDR_CTL_DRAMADDRW_ROWBITS field value from a register.

#define ALT_SDR_CTL_DRAMADDRW_ROWBITS_SET (   value)    (((value) << 5) & 0x000003e0)

Produces a ALT_SDR_CTL_DRAMADDRW_ROWBITS register field value suitable for setting the register.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_LSB   10

The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMADDRW_BANKBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_MSB   12

The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMADDRW_BANKBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_WIDTH   3

The width in bits of the ALT_SDR_CTL_DRAMADDRW_BANKBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_SET_MSK   0x00001c00

The mask used to set the ALT_SDR_CTL_DRAMADDRW_BANKBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_CLR_MSK   0xffffe3ff

The mask used to clear the ALT_SDR_CTL_DRAMADDRW_BANKBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_RESET   0x0

The reset value of the ALT_SDR_CTL_DRAMADDRW_BANKBITS register field is UNKNOWN.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_GET (   value)    (((value) & 0x00001c00) >> 10)

Extracts the ALT_SDR_CTL_DRAMADDRW_BANKBITS field value from a register.

#define ALT_SDR_CTL_DRAMADDRW_BANKBITS_SET (   value)    (((value) << 10) & 0x00001c00)

Produces a ALT_SDR_CTL_DRAMADDRW_BANKBITS register field value suitable for setting the register.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_LSB   13

The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMADDRW_CSBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_MSB   15

The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMADDRW_CSBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_WIDTH   3

The width in bits of the ALT_SDR_CTL_DRAMADDRW_CSBITS register field.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_SET_MSK   0x0000e000

The mask used to set the ALT_SDR_CTL_DRAMADDRW_CSBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_CLR_MSK   0xffff1fff

The mask used to clear the ALT_SDR_CTL_DRAMADDRW_CSBITS register field value.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_RESET   0x0

The reset value of the ALT_SDR_CTL_DRAMADDRW_CSBITS register field is UNKNOWN.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_GET (   value)    (((value) & 0x0000e000) >> 13)

Extracts the ALT_SDR_CTL_DRAMADDRW_CSBITS field value from a register.

#define ALT_SDR_CTL_DRAMADDRW_CSBITS_SET (   value)    (((value) << 13) & 0x0000e000)

Produces a ALT_SDR_CTL_DRAMADDRW_CSBITS register field value suitable for setting the register.

#define ALT_SDR_CTL_DRAMADDRW_OFST   0x2c

The byte offset of the ALT_SDR_CTL_DRAMADDRW register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SDR_CTL_DRAMADDRW.