![]() |
Altera HWLIB
16.0
The Altera HW Manager API Reference Manual
|
This group provides functions for controlling and determining status of the FPGA Manager.
Typedefs | |
typedef enum ALT_FPGA_STATE_e | ALT_FPGA_STATE_t |
typedef enum ALT_FPGA_MON_STATUS_e | ALT_FPGA_MON_STATUS_t |
ENUMS | |
enum | ALT_FPGA_STATE_e { ALT_FPGA_STATE_POWER_UP = 0x0, ALT_FPGA_STATE_RESET = 0x1, ALT_FPGA_STATE_CFG = 0x2, ALT_FPGA_STATE_INIT = 0x3, ALT_FPGA_STATE_USER_MODE = 0x4, ALT_FPGA_STATE_UNKNOWN = 0x5, ALT_FPGA_STATE_POWER_OFF = 0xF } |
enum | ALT_FPGA_MON_STATUS_e { ALT_FPGA_MON_nSTATUS = 0x0001, ALT_FPGA_MON_CONF_DONE = 0x0002, ALT_FPGA_MON_INIT_DONE = 0x0004, ALT_FPGA_MON_CRC_ERROR = 0x0008, ALT_FPGA_MON_CVP_CONF_DONE = 0x0010, ALT_FPGA_MON_PR_READY = 0x0020, ALT_FPGA_MON_PR_ERROR = 0x0040, ALT_FPGA_MON_PR_DONE = 0x0080, ALT_FPGA_MON_nCONFIG_PIN = 0x0100, ALT_FPGA_MON_nSTATUS_PIN = 0x0200, ALT_FPGA_MON_CONF_DONE_PIN = 0x0400, ALT_FPGA_MON_FPGA_POWER_ON = 0x0800 } |
Functions | |
ALT_STATUS_CODE | alt_fpga_control_enable (void) |
ALT_STATUS_CODE | alt_fpga_control_disable (void) |
bool | alt_fpga_control_is_enabled (void) |
ALT_FPGA_STATE_t | alt_fpga_state_get (void) |
uint32_t | alt_fpga_mon_status_get (void) |
ALT_STATUS_CODE | alt_fgpa_reset_assert (void) |
ALT_STATUS_CODE | alt_fgpa_reset_deassert (void) |
typedef enum ALT_FPGA_STATE_e ALT_FPGA_STATE_t |
This type definition enumerates the possible states the FPGA can be in at any one time.
typedef enum ALT_FPGA_MON_STATUS_e ALT_FPGA_MON_STATUS_t |
This type definition enumerates the monitored status conditions for the FPGA Control Block (CB).
enum ALT_FPGA_STATE_e |
This type definition enumerates the possible states the FPGA can be in at any one time.
This type definition enumerates the monitored status conditions for the FPGA Control Block (CB).
ALT_STATUS_CODE alt_fpga_control_enable | ( | void | ) |
Instructs the CPU core to acquire control of the FPGA control block. This must API must be called before any other API is issued.
ALT_E_SUCCESS | Successful status. |
ALT_E_ERROR | Error acquiring control of the FPGA control block. This is likely due to another device on the system controlling the FPGA control block or a repeat call to this API without first being released. |
ALT_STATUS_CODE alt_fpga_control_disable | ( | void | ) |
Instructs the CPU core to release control of the FPGA control block. This API should be called after all FPGA related operations are completed. This will allow another device on the system to configure the FPGA.
ALT_E_SUCCESS | Successful status. |
ALT_E_ERROR | Failure status. |
bool alt_fpga_control_is_enabled | ( | void | ) |
Returns true if the HPS currently has control of the FPGA control block and false otherwise.
true | HPS has control of the FPGA control block. |
false | HPS does not have control of the FPGA control block. |
ALT_FPGA_STATE_t alt_fpga_state_get | ( | void | ) |
Returns the current operational state of the FPGA fabric.
uint32_t alt_fpga_mon_status_get | ( | void | ) |
Returns the FPGA Control Block monitor status conditions.
This function returns the current value of the FPGA Control Block monitor status conditions.
ALT_STATUS_CODE alt_fgpa_reset_assert | ( | void | ) |
Assert and hold the FPGA in reset.
This function asserts and holds the FPGA in reset. Any FPGA configuration is cleared. The FPGA must be reconfigured to resume operation.
The FPGA is reset by the assertion of the nCONFIG signal. The signal remains asserted until alt_fgpa_reset_deassert() is called.
ALT_E_SUCCESS | Successful status. |
ALT_E_FPGA_PWR_OFF | FPGA is not powered on. |
ALT_E_FPGA_NO_SOC_CTRL | SoC software is not in control of the FPGA. Use alt_fpga_control_enable() to gain control. |
ALT_STATUS_CODE alt_fgpa_reset_deassert | ( | void | ) |
Deassert and release the FPGA from reset.
This function deasserts the FPGA from reset. The FPGA must be reconfigured to resume operation.
The FPGA is reset by the deassertion of the nCONFIG signal.
ALT_E_SUCCESS | Successful status. |
ALT_E_FPGA_PWR_OFF | FPGA is not powered on. |
ALT_E_FPGA_NO_SOC_CTRL | SoC software is not in control of the FPGA. Use alt_fpga_control_enable() to gain control. |