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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register controls the threshold value for the receive FIFO memory. It is impossible to write to this register when the SPI Slave is enabled. The SPI Slave is enabled and disabled by writing to the SPIENR register.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[7:0] | RW | 0x0 | Receive FIFO Threshold |
[31:8] | ??? | 0x0 | UNDEFINED |
Field : Receive FIFO Threshold - rft | |
Controls the level of entries (or above) at which the receive FIFO controller triggers an interrupt. When the number of receive FIFO entries is greater than or equal to this value + 1, the receive FIFO full interrupt is triggered. Field Access Macros: | |
#define | ALT_SPIS_RXFTLR_RFT_LSB 0 |
#define | ALT_SPIS_RXFTLR_RFT_MSB 7 |
#define | ALT_SPIS_RXFTLR_RFT_WIDTH 8 |
#define | ALT_SPIS_RXFTLR_RFT_SET_MSK 0x000000ff |
#define | ALT_SPIS_RXFTLR_RFT_CLR_MSK 0xffffff00 |
#define | ALT_SPIS_RXFTLR_RFT_RESET 0x0 |
#define | ALT_SPIS_RXFTLR_RFT_GET(value) (((value) & 0x000000ff) >> 0) |
#define | ALT_SPIS_RXFTLR_RFT_SET(value) (((value) << 0) & 0x000000ff) |
Data Structures | |
struct | ALT_SPIS_RXFTLR_s |
Macros | |
#define | ALT_SPIS_RXFTLR_OFST 0x1c |
#define | ALT_SPIS_RXFTLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_RXFTLR_OFST)) |
Typedefs | |
typedef struct ALT_SPIS_RXFTLR_s | ALT_SPIS_RXFTLR_t |
struct ALT_SPIS_RXFTLR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SPIS_RXFTLR.
Data Fields | ||
---|---|---|
uint32_t | rft: 8 | Receive FIFO Threshold |
uint32_t | __pad0__: 24 | UNDEFINED |
#define ALT_SPIS_RXFTLR_RFT_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SPIS_RXFTLR_RFT register field.
#define ALT_SPIS_RXFTLR_RFT_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_SPIS_RXFTLR_RFT register field.
#define ALT_SPIS_RXFTLR_RFT_WIDTH 8 |
The width in bits of the ALT_SPIS_RXFTLR_RFT register field.
#define ALT_SPIS_RXFTLR_RFT_SET_MSK 0x000000ff |
The mask used to set the ALT_SPIS_RXFTLR_RFT register field value.
#define ALT_SPIS_RXFTLR_RFT_CLR_MSK 0xffffff00 |
The mask used to clear the ALT_SPIS_RXFTLR_RFT register field value.
#define ALT_SPIS_RXFTLR_RFT_RESET 0x0 |
The reset value of the ALT_SPIS_RXFTLR_RFT register field.
#define ALT_SPIS_RXFTLR_RFT_GET | ( | value | ) | (((value) & 0x000000ff) >> 0) |
Extracts the ALT_SPIS_RXFTLR_RFT field value from a register.
#define ALT_SPIS_RXFTLR_RFT_SET | ( | value | ) | (((value) << 0) & 0x000000ff) |
Produces a ALT_SPIS_RXFTLR_RFT register field value suitable for setting the register.
#define ALT_SPIS_RXFTLR_OFST 0x1c |
The byte offset of the ALT_SPIS_RXFTLR register from the beginning of the component.
#define ALT_SPIS_RXFTLR_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_RXFTLR_OFST)) |
The address of the ALT_SPIS_RXFTLR register.
typedef struct ALT_SPIS_RXFTLR_s ALT_SPIS_RXFTLR_t |
The typedef declaration for register ALT_SPIS_RXFTLR.