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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register controls the direction of the data word for the half-duplex Microwire serial protocol. It is impossible to write to this register when the SPI Slave is enabled. The SPI Slave is enabled and disabled by writing to the SPIENR register.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | Microwire Transfer Mode |
[1] | RW | 0x0 | Microwire Control |
[31:2] | ??? | 0x0 | UNDEFINED |
Field : Microwire Transfer Mode - mwmod | ||||||||||
Defines whether the Microwire transfer is sequential or non-sequential. When sequential mode is used, only one control word is needed to transmit or receive a block of data words. When non-sequential mode is used, there must be a control word for each data word that is transmitted or received. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SPIS_MWCR_MWMOD_E_NONSEQ 0x0 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_E_SEQ 0x1 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_LSB 0 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_MSB 0 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_WIDTH 1 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_SET_MSK 0x00000001 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_RESET 0x0 | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_SPIS_MWCR_MWMOD_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Microwire Control - mdd | ||||||||||
Defines the direction of the data word when the Microwire serial protocol is used. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SPIS_MWCR_MDD_E_RXMOD 0x0 | |||||||||
#define | ALT_SPIS_MWCR_MDD_E_TXMOD 0x1 | |||||||||
#define | ALT_SPIS_MWCR_MDD_LSB 1 | |||||||||
#define | ALT_SPIS_MWCR_MDD_MSB 1 | |||||||||
#define | ALT_SPIS_MWCR_MDD_WIDTH 1 | |||||||||
#define | ALT_SPIS_MWCR_MDD_SET_MSK 0x00000002 | |||||||||
#define | ALT_SPIS_MWCR_MDD_CLR_MSK 0xfffffffd | |||||||||
#define | ALT_SPIS_MWCR_MDD_RESET 0x0 | |||||||||
#define | ALT_SPIS_MWCR_MDD_GET(value) (((value) & 0x00000002) >> 1) | |||||||||
#define | ALT_SPIS_MWCR_MDD_SET(value) (((value) << 1) & 0x00000002) | |||||||||
Data Structures | |
struct | ALT_SPIS_MWCR_s |
Macros | |
#define | ALT_SPIS_MWCR_OFST 0xc |
#define | ALT_SPIS_MWCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_MWCR_OFST)) |
Typedefs | |
typedef struct ALT_SPIS_MWCR_s | ALT_SPIS_MWCR_t |
struct ALT_SPIS_MWCR_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SPIS_MWCR.
Data Fields | ||
---|---|---|
uint32_t | mwmod: 1 | Microwire Transfer Mode |
uint32_t | mdd: 1 | Microwire Control |
uint32_t | __pad0__: 30 | UNDEFINED |
#define ALT_SPIS_MWCR_MWMOD_E_NONSEQ 0x0 |
Enumerated value for register field ALT_SPIS_MWCR_MWMOD
non-sequential transfer
#define ALT_SPIS_MWCR_MWMOD_E_SEQ 0x1 |
Enumerated value for register field ALT_SPIS_MWCR_MWMOD
sequential transfer
#define ALT_SPIS_MWCR_MWMOD_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SPIS_MWCR_MWMOD register field.
#define ALT_SPIS_MWCR_MWMOD_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SPIS_MWCR_MWMOD register field.
#define ALT_SPIS_MWCR_MWMOD_WIDTH 1 |
The width in bits of the ALT_SPIS_MWCR_MWMOD register field.
#define ALT_SPIS_MWCR_MWMOD_SET_MSK 0x00000001 |
The mask used to set the ALT_SPIS_MWCR_MWMOD register field value.
#define ALT_SPIS_MWCR_MWMOD_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SPIS_MWCR_MWMOD register field value.
#define ALT_SPIS_MWCR_MWMOD_RESET 0x0 |
The reset value of the ALT_SPIS_MWCR_MWMOD register field.
#define ALT_SPIS_MWCR_MWMOD_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SPIS_MWCR_MWMOD field value from a register.
#define ALT_SPIS_MWCR_MWMOD_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SPIS_MWCR_MWMOD register field value suitable for setting the register.
#define ALT_SPIS_MWCR_MDD_E_RXMOD 0x0 |
Enumerated value for register field ALT_SPIS_MWCR_MDD
SPI Slave receives data
#define ALT_SPIS_MWCR_MDD_E_TXMOD 0x1 |
Enumerated value for register field ALT_SPIS_MWCR_MDD
SPI Slave transmits data
#define ALT_SPIS_MWCR_MDD_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_SPIS_MWCR_MDD register field.
#define ALT_SPIS_MWCR_MDD_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SPIS_MWCR_MDD register field.
#define ALT_SPIS_MWCR_MDD_WIDTH 1 |
The width in bits of the ALT_SPIS_MWCR_MDD register field.
#define ALT_SPIS_MWCR_MDD_SET_MSK 0x00000002 |
The mask used to set the ALT_SPIS_MWCR_MDD register field value.
#define ALT_SPIS_MWCR_MDD_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_SPIS_MWCR_MDD register field value.
#define ALT_SPIS_MWCR_MDD_RESET 0x0 |
The reset value of the ALT_SPIS_MWCR_MDD register field.
#define ALT_SPIS_MWCR_MDD_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_SPIS_MWCR_MDD field value from a register.
#define ALT_SPIS_MWCR_MDD_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_SPIS_MWCR_MDD register field value suitable for setting the register.
#define ALT_SPIS_MWCR_OFST 0xc |
The byte offset of the ALT_SPIS_MWCR register from the beginning of the component.
#define ALT_SPIS_MWCR_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIS_MWCR_OFST)) |
The address of the ALT_SPIS_MWCR register.
typedef struct ALT_SPIS_MWCR_s ALT_SPIS_MWCR_t |
The typedef declaration for register ALT_SPIS_MWCR.