Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : Register 3 (Receive Descriptor List Address Register) - Receive_Descriptor_List_Address

Description

The Receive Descriptor List Address register points to the start of the Receive Descriptor List. The descriptor lists reside in the host's physical memory space and must be Word, Dword, or Lword-aligned (for 32-bit, 64-bit, or 128-bit data bus). The DMA internally converts it to bus width aligned address by making the corresponding LS bits low. Writing to this register is permitted only when reception is stopped. When stopped, this register must be written to before the receive Start command is given.

You can write to this register only when Rx DMA has stopped, that is, Bit 1 (SR) is set to zero in Register 6 (Operation Mode Register). When stopped, this register can be written with a new descriptor list address. When you set the SR bit to 1, the DMA takes the newly programmed descriptor base address.

If this register is not changed when the SR bit is set to 0, then the DMA takes the descriptor address where it was stopped earlier.

Register Layout

Bits Access Reset Description
[1:0] ??? 0x0 UNDEFINED
[31:2] RW 0x0 Start of Receive List

Field : Start of Receive List - rdesla_32bit

This field contains the base address of the first descriptor in the Receive Descriptor list. The LSB bits (1:0) are ignored (32-bit wide bus) and internally taken as all-zero by the DMA. Therefore, these LSB bits are read-only (RO).

Field Access Macros:

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_LSB   2
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_MSB   31
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_WIDTH   30
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_SET_MSK   0xfffffffc
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_CLR_MSK   0x00000003
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_RESET   0x0
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_GET(value)   (((value) & 0xfffffffc) >> 2)
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_SET(value)   (((value) << 2) & 0xfffffffc)
 

Data Structures

struct  ALT_EMAC_DMA_RX_DESC_LIST_ADDR_s
 

Macros

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_OFST   0xc
 
#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_DMA_RX_DESC_LIST_ADDR_OFST))
 

Typedefs

typedef struct
ALT_EMAC_DMA_RX_DESC_LIST_ADDR_s 
ALT_EMAC_DMA_RX_DESC_LIST_ADDR_t
 

Data Structure Documentation

struct ALT_EMAC_DMA_RX_DESC_LIST_ADDR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_EMAC_DMA_RX_DESC_LIST_ADDR.

Data Fields
uint32_t __pad0__: 2 UNDEFINED
uint32_t rdesla_32bit: 30 Start of Receive List

Macro Definitions

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_LSB   2

The Least Significant Bit (LSB) position of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_MSB   31

The Most Significant Bit (MSB) position of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_WIDTH   30

The width in bits of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_SET_MSK   0xfffffffc

The mask used to set the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field value.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_CLR_MSK   0x00000003

The mask used to clear the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field value.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_RESET   0x0

The reset value of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_GET (   value)    (((value) & 0xfffffffc) >> 2)

Extracts the ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT field value from a register.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT_SET (   value)    (((value) << 2) & 0xfffffffc)

Produces a ALT_EMAC_DMA_RX_DESC_LIST_ADDR_RDESLA_32BIT register field value suitable for setting the register.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_OFST   0xc

The byte offset of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR register from the beginning of the component.

#define ALT_EMAC_DMA_RX_DESC_LIST_ADDR_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_DMA_RX_DESC_LIST_ADDR_OFST))

The address of the ALT_EMAC_DMA_RX_DESC_LIST_ADDR register.

Typedef Documentation