Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : ic_enable

Description

Name: I2C Enable Register

Size: 2 bits

Address Offset: 0x6c

Read/Write Access: Read/Write

Register Layout

Bits Access Reset Description
[0] RW 0x0 ALT_I2C_EN_EN
[1] RW 0x0 ALT_I2C_EN_TXABT
[31:2] ??? 0x0 UNDEFINED

Field : enable

Controls whether the DW_apb_i2c is enabled.

0: Disables DW_apb_i2c (TX and RX FIFOs are

held in an erased state)

1: Enables DW_apb_i2c

Software can disable DW_apb_i2c while it is active.

However, it is important that care be taken to ensure

that DW_apb_i2c is disabled properly.

When DW_apb_i2c is disabled, the following occurs:

  • The TX FIFO and RX FIFO get flushed.
  • Status bits in the IC_INTR_STAT register are still

active until DW_apb_i2c goes into IDLE state.

If the module is transmitting, it stops as well as deletes

the contents of the transmit buffer after the current transfer

is complete. If the module is receiving, the DW_apb_i2c stops

the current transfer at the end of the current byte and does not

acknowledge the transfer.

In systems with asynchronous pclk and ic_clk when IC_CLK_TYPE

parameter set to asynchronous (1), there is a two ic_clk delay

when enabling or disabling the DW_apb_i2c.

Reset value: 0x0

Field Enumeration Values:

Enum Value Description
ALT_I2C_EN_EN_E_DIS 0x0 Disables i2c. TX and RX FIFOs are held in an
: erased state
ALT_I2C_EN_EN_E_EN 0x1 Enables i2c. Software can disable i2c while it
: is active

Field Access Macros:

#define ALT_I2C_EN_EN_E_DIS   0x0
 
#define ALT_I2C_EN_EN_E_EN   0x1
 
#define ALT_I2C_EN_EN_LSB   0
 
#define ALT_I2C_EN_EN_MSB   0
 
#define ALT_I2C_EN_EN_WIDTH   1
 
#define ALT_I2C_EN_EN_SET_MSK   0x00000001
 
#define ALT_I2C_EN_EN_CLR_MSK   0xfffffffe
 
#define ALT_I2C_EN_EN_RESET   0x0
 
#define ALT_I2C_EN_EN_GET(value)   (((value) & 0x00000001) >> 0)
 
#define ALT_I2C_EN_EN_SET(value)   (((value) << 0) & 0x00000001)
 

Field : txabort

When set, the controller initiates the transfer abort.

0: ABORT not initiated or ABORT done

1: ABORT operation in progress

The software can abort the I2C transfer in master mode by setting this bit. The software

can set this bit only when ENABLE is already set; otherwise, the controller ignores any

write to ABORT bit. The software cannot clear the ABORT bit once set. In response to

an ABORT, the controller issues a STOP and flushes the Tx FIFO after completing the

current transfer, then sets the TX_ABORT interrupt after the abort operation. The

ABORT bit is cleared automatically after the abort operation.

Reset value: 0x0

Field Access Macros:

#define ALT_I2C_EN_TXABT_LSB   1
 
#define ALT_I2C_EN_TXABT_MSB   1
 
#define ALT_I2C_EN_TXABT_WIDTH   1
 
#define ALT_I2C_EN_TXABT_SET_MSK   0x00000002
 
#define ALT_I2C_EN_TXABT_CLR_MSK   0xfffffffd
 
#define ALT_I2C_EN_TXABT_RESET   0x0
 
#define ALT_I2C_EN_TXABT_GET(value)   (((value) & 0x00000002) >> 1)
 
#define ALT_I2C_EN_TXABT_SET(value)   (((value) << 1) & 0x00000002)
 

Data Structures

struct  ALT_I2C_EN_s
 

Macros

#define ALT_I2C_EN_RESET   0x00000000
 
#define ALT_I2C_EN_OFST   0x6c
 
#define ALT_I2C_EN_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_OFST))
 

Typedefs

typedef struct ALT_I2C_EN_s ALT_I2C_EN_t
 

Data Structure Documentation

struct ALT_I2C_EN_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_I2C_EN.

Data Fields
uint32_t enable: 1 ALT_I2C_EN_EN
uint32_t txabort: 1 ALT_I2C_EN_TXABT
uint32_t __pad0__: 30 UNDEFINED

Macro Definitions

#define ALT_I2C_EN_EN_E_DIS   0x0

Enumerated value for register field ALT_I2C_EN_EN

Disables i2c. TX and RX FIFOs are held in an erased state

#define ALT_I2C_EN_EN_E_EN   0x1

Enumerated value for register field ALT_I2C_EN_EN

Enables i2c. Software can disable i2c while it is active

#define ALT_I2C_EN_EN_LSB   0

The Least Significant Bit (LSB) position of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_MSB   0

The Most Significant Bit (MSB) position of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_WIDTH   1

The width in bits of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_SET_MSK   0x00000001

The mask used to set the ALT_I2C_EN_EN register field value.

#define ALT_I2C_EN_EN_CLR_MSK   0xfffffffe

The mask used to clear the ALT_I2C_EN_EN register field value.

#define ALT_I2C_EN_EN_RESET   0x0

The reset value of the ALT_I2C_EN_EN register field.

#define ALT_I2C_EN_EN_GET (   value)    (((value) & 0x00000001) >> 0)

Extracts the ALT_I2C_EN_EN field value from a register.

#define ALT_I2C_EN_EN_SET (   value)    (((value) << 0) & 0x00000001)

Produces a ALT_I2C_EN_EN register field value suitable for setting the register.

#define ALT_I2C_EN_TXABT_LSB   1

The Least Significant Bit (LSB) position of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_MSB   1

The Most Significant Bit (MSB) position of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_WIDTH   1

The width in bits of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_SET_MSK   0x00000002

The mask used to set the ALT_I2C_EN_TXABT register field value.

#define ALT_I2C_EN_TXABT_CLR_MSK   0xfffffffd

The mask used to clear the ALT_I2C_EN_TXABT register field value.

#define ALT_I2C_EN_TXABT_RESET   0x0

The reset value of the ALT_I2C_EN_TXABT register field.

#define ALT_I2C_EN_TXABT_GET (   value)    (((value) & 0x00000002) >> 1)

Extracts the ALT_I2C_EN_TXABT field value from a register.

#define ALT_I2C_EN_TXABT_SET (   value)    (((value) << 1) & 0x00000002)

Produces a ALT_I2C_EN_TXABT register field value suitable for setting the register.

#define ALT_I2C_EN_RESET   0x00000000

The reset value of the ALT_I2C_EN register.

#define ALT_I2C_EN_OFST   0x6c

The byte offset of the ALT_I2C_EN register from the beginning of the component.

#define ALT_I2C_EN_ADDR (   base)    ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_OFST))

The address of the ALT_I2C_EN register.

Typedef Documentation

typedef struct ALT_I2C_EN_s ALT_I2C_EN_t

The typedef declaration for register ALT_I2C_EN.