Altera HWLIB  16.0
The Altera HW Manager API Reference Manual
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Clock Gating Control

Description

This functional group provides gating control of selected clock signals.

When a clock is enabled, then its clock signal propogates to its respective clocked IP block(s). When a clock is disabled, then its clock signal is prevented from propogating to its respective clocked IP block(s).

The following clocks may be gated:

Functions

ALT_STATUS_CODE alt_clk_clock_disable (ALT_CLK_t clk)
 
ALT_STATUS_CODE alt_clk_clock_enable (ALT_CLK_t clk)
 
ALT_STATUS_CODE alt_clk_is_enabled (ALT_CLK_t clk)
 

Function Documentation

ALT_STATUS_CODE alt_clk_clock_disable ( ALT_CLK_t  clk)

Disable the specified clock. Once the clock is disabled, its clock signal does not propogate to its clocked elements.

Parameters
clkThe clock to disable.
Return values
ALT_E_SUCCESSThe operation was succesful.
ALT_E_ERRORThe operation failed.
ALT_E_BAD_ARGThe clk argument designates a non gated clock value.
ALT_STATUS_CODE alt_clk_clock_enable ( ALT_CLK_t  clk)

Enable the specified clock. Once the clock is enabled, its clock signal propogates to its elements.

Parameters
clkThe clock to enable.
Return values
ALT_E_SUCCESSThe operation was succesful.
ALT_E_ERRORThe operation failed.
ALT_E_BAD_ARGThe clk argument designates a non gated clock value.
ALT_STATUS_CODE alt_clk_is_enabled ( ALT_CLK_t  clk)

Return whether the specified clock is enabled or not.

Parameters
clkThe clock to check whether enabled or not.
Return values
ALT_E_TRUEThe clock is enabled.
ALT_E_FALSEThe clock is not enabled.
ALT_E_BAD_ARGThe clk argument designates a non gated clock value.