Altera HWLIB  16.0
The Altera HW Manager API Reference Manual
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FPGA Interface Group

Description

These functions provide enable/disable control and operational status of the signal interfaces between the FPGA and HPS. Selective enabling/disabling of interfaces may be required under the following scenarios:

Typedefs

typedef enum ALT_FPGA_INTERFACE_e ALT_FPGA_INTERFACE_t
 

ENUMS

enum  ALT_FPGA_INTERFACE_e {
  ALT_FPGA_INTERFACE_GLOBAL, ALT_FPGA_INTERFACE_RESET_REQ, ALT_FPGA_INTERFACE_JTAG_ENABLE, ALT_FPGA_INTERFACE_CONFIG_IO,
  ALT_FPGA_INTERFACE_BSCAN, ALT_FPGA_INTERFACE_TRACE, ALT_FPGA_INTERFACE_DBG_APB, ALT_FPGA_INTERFACE_STM,
  ALT_FPGA_INTERFACE_CTI, ALT_FPGA_INTERFACE_EMAC0, ALT_FPGA_INTERFACE_EMAC1, ALT_FPGA_INTERFACE_SPIM0,
  ALT_FPGA_INTERFACE_SPIM1, ALT_FPGA_INTERFACE_NAND, ALT_FPGA_INTERFACE_SDMMC
}
 

Functions

ALT_STATUS_CODE alt_fpga_interface_disable (ALT_FPGA_INTERFACE_t intfc)
 
ALT_STATUS_CODE alt_fpga_interface_enable (ALT_FPGA_INTERFACE_t intfc)
 
ALT_STATUS_CODE alt_fpga_interface_is_enabled (ALT_FPGA_INTERFACE_t intfc)
 

Typedef Documentation

This type definition enumerates the FPGA to HPS signal interfaces controlled by the functions in this API group.

Enumeration Type Documentation

This type definition enumerates the FPGA to HPS signal interfaces controlled by the functions in this API group.

Enumerator:
ALT_FPGA_INTERFACE_GLOBAL 

All interfaces between the FPGA and HPS. If ALT_FPGA_INTERFACE_ALL is disabled then all of the individual and module interfaces between the FPGA and HPS are disabled regardless of their separate enable/disable settings. If ALT_FPGA_INTERFACE_ALL is enabled then each individual and module interface between the FPGA and HPS may be separately enabled/disabled.

ALT_FPGA_INTERFACE_RESET_REQ 

The reset request interface. This interface allows logic in the FPGA to request HPS resets. The following reset request signals from the FPGA fabric to HPS are part of this interface:

  • f2h_cold_rst_req_n - Triggers a HPS cold reset
  • f2h_warm_rst_req_n - Triggers a HPS warm reset
  • f2h_dbg_rst_req_n - Triggers a HPS debug reset
ALT_FPGA_INTERFACE_JTAG_ENABLE 

The JTAG enable interface. This interface allows logic in the FPGA fabric to disable the HPS JTAG operation.

ALT_FPGA_INTERFACE_CONFIG_IO 

The CONFIG_IO interface. This interface allows the FPGA JTAG TAP controller to execute the CONFIG_IO instruction and configure all device I/O (FPGA and HPS).

ALT_FPGA_INTERFACE_BSCAN 

The boundary-scan interface. This interface allows the FPGA JTAG TAP controller to execute boundary-scan instructions.

ALT_FPGA_INTERFACE_TRACE 

The trace interface. This interface allows the HPS debug logic to send trace data to logic in the FPGA.

ALT_FPGA_INTERFACE_DBG_APB 

(Private) The debug APB interface. This interface allows the HPS debug logic to communicate with debug APB slaves in the FPGA fabric.

ALT_FPGA_INTERFACE_STM 

The STM event interface. This interface allows logic in the FPGA to trigger events to the HPS STM debug module.

ALT_FPGA_INTERFACE_CTI 

The Cross Trigger Interface (CTI). This interface allows logic in the FPGA to send triggers to HPS debug logic. Note that this does not prevent the HPS debug logic from sending triggers to the FPGA.

ALT_FPGA_INTERFACE_EMAC0 

Signal interface from the FPGA to the EMAC0 module.

ALT_FPGA_INTERFACE_EMAC1 

Signal interface from the FPGA to the EMAC1 module.

ALT_FPGA_INTERFACE_SPIM0 

(Private) Signal interface from the FPGA to the SPI Master 0 module.

ALT_FPGA_INTERFACE_SPIM1 

(Private) Signal interface from the FPGA to the SPI Master 0 module.

ALT_FPGA_INTERFACE_NAND 

(Private) Signal interface from the FPGA to the NAND Flash Controller module.

ALT_FPGA_INTERFACE_SDMMC 

(Private) Signal interface from the FPGA to the SD/MMC Controller module.

Function Documentation

ALT_STATUS_CODE alt_fpga_interface_disable ( ALT_FPGA_INTERFACE_t  intfc)

Disables the specified FPGA to HPS signal interface.

Isolates and disables the designated FPGA/HPS signal interface. User is responsible for determining that the interface is inactive before disabling it.

Parameters
intfcThe interface to disable.
Return values
ALT_E_SUCCESSThe operation was succesful.
ALT_E_ERRORThe operation failed.
ALT_E_BAD_ARGThe intfc argument designates an invalid FPGA/HPS signal interface.
ALT_STATUS_CODE alt_fpga_interface_enable ( ALT_FPGA_INTERFACE_t  intfc)

Enables the specified FPGA to HPS signal interface.

Parameters
intfcThe interface to enable.
Return values
ALT_E_SUCCESSThe operation was succesful.
ALT_E_ERRORThe operation failed.
ALT_E_BAD_ARGThe intfc argument designates an invalid FPGA/HPS signal interface.
ALT_STATUS_CODE alt_fpga_interface_is_enabled ( ALT_FPGA_INTERFACE_t  intfc)

Return whether the specified FPGA/HPS signal interface is enabled or not.

Parameters
intfcThe interface to enable.
Return values
ALT_E_TRUEThe interface is enabled.
ALT_E_FALSEThe interface is not enabled.
ALT_E_BAD_ARGThe intfc argument designates an invalid FPGA/HPS signal interface.