Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Component : ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR

Description

Members

 Register : enable
 
 Register : enable_set
 
 Register : enable_clear
 
 Register : mpuregion0addr
 
 Register : mpuregion1addr
 
 Register : mpuregion2addr
 
 Register : mpuregion3addr
 
 Register : fpga2sdram0region0addr
 
 Register : fpga2sdram0region1addr
 
 Register : fpga2sdram0region2addr
 
 Register : fpga2sdram0region3addr
 
 Register : fpga2sdram1region0addr
 
 Register : fpga2sdram1region1addr
 
 Register : fpga2sdram1region2addr
 
 Register : fpga2sdram1region3addr
 
 Register : fpga2sdram2region0addr
 
 Register : fpga2sdram2region1addr
 
 Register : fpga2sdram2region2addr
 
 Register : fpga2sdram2region3addr
 

Data Structures

struct  ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_s
 
struct  ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_raw_s
 

Typedefs

typedef struct
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_s 
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_t
 
typedef struct
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_raw_s 
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_raw_t
 

Data Structure Documentation

struct ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register group ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR.

Data Fields
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_t
enable ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET_t
enable_set ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR_t
enable_clear ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR
volatile uint32_t _pad_0xc_0xf UNDEFINED
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR_t
mpuregion0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR_t
mpuregion1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR_t
mpuregion2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR_t
mpuregion3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR_t
fpga2sdram0region0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR_t
fpga2sdram0region1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR_t
fpga2sdram0region2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR_t
fpga2sdram0region3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR_t
fpga2sdram1region0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR_t
fpga2sdram1region1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR_t
fpga2sdram1region2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR_t
fpga2sdram1region3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR_t
fpga2sdram2region0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR_t
fpga2sdram2region1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR_t
fpga2sdram2region2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR
volatile
ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR_t
fpga2sdram2region3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR
volatile uint32_t _pad_0x50_0x100 UNDEFINED
struct ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_raw_s

The struct declaration for the raw register contents of register group ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR.

Data Fields
volatile uint32_t enable ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN
volatile uint32_t enable_set ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_SET
volatile uint32_t enable_clear ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_EN_CLR
volatile uint32_t _pad_0xc_0xf UNDEFINED
volatile uint32_t mpuregion0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG0ADDR
volatile uint32_t mpuregion1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG1ADDR
volatile uint32_t mpuregion2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG2ADDR
volatile uint32_t mpuregion3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_MPUREG3ADDR
volatile uint32_t fpga2sdram0region0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG0ADDR
volatile uint32_t fpga2sdram0region1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG1ADDR
volatile uint32_t fpga2sdram0region2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG2ADDR
volatile uint32_t fpga2sdram0region3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR0REG3ADDR
volatile uint32_t fpga2sdram1region0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG0ADDR
volatile uint32_t fpga2sdram1region1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG1ADDR
volatile uint32_t fpga2sdram1region2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG2ADDR
volatile uint32_t fpga2sdram1region3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR1REG3ADDR
volatile uint32_t fpga2sdram2region0addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG0ADDR
volatile uint32_t fpga2sdram2region1addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG1ADDR
volatile uint32_t fpga2sdram2region2addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG2ADDR
volatile uint32_t fpga2sdram2region3addr ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR_F2SDR2REG3ADDR
volatile uint32_t _pad_0x50_0x100 UNDEFINED

Typedef Documentation

The typedef declaration for the raw register contents of register group ALT_NOC_FW_DDR_MPU_F2SDR_DDR_SCR.