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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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timing values concerning device to device data bus ownership change, in Generic clock unit.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[1:0] | RW | 0x1 | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD |
[3:2] | RW | 0x1 | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR |
[5:4] | RW | 0x1 | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD |
[31:6] | ??? | Unknown | UNDEFINED |
Field : BUSRDTORD | |
number of cycle between the last read data of a device and the first read data of another device. Field Access Macros: | |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_LSB 0 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_MSB 1 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_WIDTH 2 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_SET_MSK 0x00000003 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_CLR_MSK 0xfffffffc |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_RESET 0x1 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_GET(value) (((value) & 0x00000003) >> 0) |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_SET(value) (((value) << 0) & 0x00000003) |
Field : BUSRDTOWR | |
number of cycle between the last read data of a device and the first write data to another device. Field Access Macros: | |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_LSB 2 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_MSB 3 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_WIDTH 2 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_SET_MSK 0x0000000c |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_CLR_MSK 0xfffffff3 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_RESET 0x1 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_GET(value) (((value) & 0x0000000c) >> 2) |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_SET(value) (((value) << 2) & 0x0000000c) |
Field : BUSWRTORD | |
number of cycle between the last write data to a device and the first read data of another device. Field Access Macros: | |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_LSB 4 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_MSB 5 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_WIDTH 2 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_SET_MSK 0x00000030 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_CLR_MSK 0xffffffcf |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_RESET 0x1 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_GET(value) (((value) & 0x00000030) >> 4) |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_SET(value) (((value) << 4) & 0x00000030) |
Data Structures | |
struct | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_s |
Macros | |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_RESET 0x00000015 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_OFST 0x3c |
Typedefs | |
typedef struct ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_s | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_t |
struct ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV.
Data Fields | ||
---|---|---|
uint32_t | BUSRDTORD: 2 | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD |
uint32_t | BUSRDTOWR: 2 | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR |
uint32_t | BUSWRTORD: 2 | ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD |
uint32_t | __pad0__: 26 | UNDEFINED |
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_WIDTH 2 |
The width in bits of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_SET_MSK 0x00000003 |
The mask used to set the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_CLR_MSK 0xfffffffc |
The mask used to clear the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_RESET 0x1 |
The reset value of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_GET | ( | value | ) | (((value) & 0x00000003) >> 0) |
Extracts the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD field value from a register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_SET | ( | value | ) | (((value) << 0) & 0x00000003) |
Produces a ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD register field value suitable for setting the register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_WIDTH 2 |
The width in bits of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_SET_MSK 0x0000000c |
The mask used to set the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_CLR_MSK 0xfffffff3 |
The mask used to clear the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_RESET 0x1 |
The reset value of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_GET | ( | value | ) | (((value) & 0x0000000c) >> 2) |
Extracts the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR field value from a register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_SET | ( | value | ) | (((value) << 2) & 0x0000000c) |
Produces a ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR register field value suitable for setting the register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_WIDTH 2 |
The width in bits of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_SET_MSK 0x00000030 |
The mask used to set the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_CLR_MSK 0xffffffcf |
The mask used to clear the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_RESET 0x1 |
The reset value of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_GET | ( | value | ) | (((value) & 0x00000030) >> 4) |
Extracts the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD field value from a register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_SET | ( | value | ) | (((value) << 4) & 0x00000030) |
Produces a ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD register field value suitable for setting the register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_RESET 0x00000015 |
The reset value of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV register.
#define ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_OFST 0x3c |
The byte offset of the ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV register from the beginning of the component.
The typedef declaration for register ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV.