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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Message Interface Group
These registers provide indirect read and write access for the host CPU to the Message RAM. Buffers the data to be transferred to and from the RAM, avoiding conflicts between CPU accesses and CAN frame reception/transmission.
The function of the two Interface Register sets is identical. The second interface register set is provided to serve application programming. Two groups of software drivers may defined, each group is restricted to the use of one of the Interface Register sets. The software drivers of one group may interrupt software drivers of the other group, but not of the same group.
In a simple example, there is one Read_Message task that uses IF1 to get received messages from the Message RAM and there is one Write_Message task that uses IF2 to write messages to be transmitted into the Message RAM. Both tasks may interrupt each other.
Each set of Interface Registers consists controlled by their own Command Registers. The Command Mask Register specifies the direction of the data transfer and which parts of a Message Object will be transferred. The Command Request Register is used to select a Message Object in the Message RAM as target or source for the transfer and to start the action specified in the Command Mask Register.
Data Structures | |
struct | ALT_CAN_MSGIF_s |
struct | ALT_CAN_MSGIF_raw_s |
Typedefs | |
typedef struct ALT_CAN_MSGIF_s | ALT_CAN_MSGIF_t |
typedef struct ALT_CAN_MSGIF_raw_s | ALT_CAN_MSGIF_raw_t |
struct ALT_CAN_MSGIF_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register group ALT_CAN_MSGIF.
Data Fields | ||
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volatile ALT_CAN_MSGIF_IF1CMR_t | IF1CMR | ALT_CAN_MSGIF_IF1CMR |
volatile ALT_CAN_MSGIF_IF1MSK_t | IF1MSK | ALT_CAN_MSGIF_IF1MSK |
volatile ALT_CAN_MSGIF_IF1ARB_t | IF1ARB | ALT_CAN_MSGIF_IF1ARB |
volatile ALT_CAN_MSGIF_IF1MCTR_t | IF1MCTR | ALT_CAN_MSGIF_IF1MCTR |
volatile ALT_CAN_MSGIF_IF1DA_t | IF1DA | ALT_CAN_MSGIF_IF1DA |
volatile ALT_CAN_MSGIF_IF1DB_t | IF1DB | ALT_CAN_MSGIF_IF1DB |
volatile uint32_t | _pad_0x18_0x1f | UNDEFINED |
volatile ALT_CAN_MSGIF_IF2CMR_t | IF2CMR | ALT_CAN_MSGIF_IF2CMR |
volatile ALT_CAN_MSGIF_IF2MSK_t | IF2MSK | ALT_CAN_MSGIF_IF2MSK |
volatile ALT_CAN_MSGIF_IF2ARB_t | IF2ARB | ALT_CAN_MSGIF_IF2ARB |
volatile ALT_CAN_MSGIF_IF2MCTR_t | IF2MCTR | ALT_CAN_MSGIF_IF2MCTR |
volatile ALT_CAN_MSGIF_IF2DA_t | IF2DA | ALT_CAN_MSGIF_IF2DA |
volatile ALT_CAN_MSGIF_IF2DB_t | IF2DB | ALT_CAN_MSGIF_IF2DB |
struct ALT_CAN_MSGIF_raw_s |
The struct declaration for the raw register contents of register group ALT_CAN_MSGIF.
Data Fields | ||
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volatile uint32_t | IF1CMR | ALT_CAN_MSGIF_IF1CMR |
volatile uint32_t | IF1MSK | ALT_CAN_MSGIF_IF1MSK |
volatile uint32_t | IF1ARB | ALT_CAN_MSGIF_IF1ARB |
volatile uint32_t | IF1MCTR | ALT_CAN_MSGIF_IF1MCTR |
volatile uint32_t | IF1DA | ALT_CAN_MSGIF_IF1DA |
volatile uint32_t | IF1DB | ALT_CAN_MSGIF_IF1DB |
volatile uint32_t | _pad_0x18_0x1f | UNDEFINED |
volatile uint32_t | IF2CMR | ALT_CAN_MSGIF_IF2CMR |
volatile uint32_t | IF2MSK | ALT_CAN_MSGIF_IF2MSK |
volatile uint32_t | IF2ARB | ALT_CAN_MSGIF_IF2ARB |
volatile uint32_t | IF2MCTR | ALT_CAN_MSGIF_IF2MCTR |
volatile uint32_t | IF2DA | ALT_CAN_MSGIF_IF2DA |
volatile uint32_t | IF2DB | ALT_CAN_MSGIF_IF2DB |
typedef struct ALT_CAN_MSGIF_s ALT_CAN_MSGIF_t |
The typedef declaration for register group ALT_CAN_MSGIF.
typedef struct ALT_CAN_MSGIF_raw_s ALT_CAN_MSGIF_raw_t |
The typedef declaration for the raw register contents of register group ALT_CAN_MSGIF.