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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Controls security settings for L4 Main peripherals.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | W | 0x0 | SPI Slave 0 Security |
[1] | W | 0x0 | SPI Slave 1 Security |
[2] | W | 0x0 | DMA Secure Security |
[3] | W | 0x0 | DMA Non-secure Security |
[31:4] | ??? | 0x0 | UNDEFINED |
Field : SPI Slave 0 Security - spis0 | ||||||||||||||||
Controls whether secure or non-secure masters can access the SPI Slave 0 slave. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_E_SECURE 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_E_NONSECURE 0x1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_LSB 0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_MSB 0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_WIDTH 1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_SET_MSK 0x00000001 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_CLR_MSK 0xfffffffe | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_RESET 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_GET(value) (((value) & 0x00000001) >> 0) | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS0_SET(value) (((value) << 0) & 0x00000001) | |||||||||||||||
Field : SPI Slave 1 Security - spis1 | ||||||||||||||||
Controls whether secure or non-secure masters can access the SPI Slave 1 slave. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_E_SECURE 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_E_NONSECURE 0x1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_LSB 1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_MSB 1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_WIDTH 1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_SET_MSK 0x00000002 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_CLR_MSK 0xfffffffd | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_RESET 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_GET(value) (((value) & 0x00000002) >> 1) | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_SPIS1_SET(value) (((value) << 1) & 0x00000002) | |||||||||||||||
Field : DMA Secure Security - dmasecure | ||||||||||||||||
Controls whether secure or non-secure masters can access the DMA Secure slave. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_E_SECURE 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_E_NONSECURE 0x1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_LSB 2 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_MSB 2 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_WIDTH 1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_SET_MSK 0x00000004 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_CLR_MSK 0xfffffffb | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_RESET 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_GET(value) (((value) & 0x00000004) >> 2) | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMASECURE_SET(value) (((value) << 2) & 0x00000004) | |||||||||||||||
Field : DMA Non-secure Security - dmanonsecure | ||||||||||||||||
Controls whether secure or non-secure masters can access the DMA Non-secure slave. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_E_SECURE 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_E_NONSECURE 0x1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_LSB 3 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_MSB 3 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_WIDTH 1 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_SET_MSK 0x00000008 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_CLR_MSK 0xfffffff7 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_RESET 0x0 | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_GET(value) (((value) & 0x00000008) >> 3) | |||||||||||||||
#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_SET(value) (((value) << 3) & 0x00000008) | |||||||||||||||
Data Structures | |
struct | ALT_L3_SEC_L4MAIN_s |
Macros | |
#define | ALT_L3_SEC_L4MAIN_OFST 0x0 |
Typedefs | |
typedef struct ALT_L3_SEC_L4MAIN_s | ALT_L3_SEC_L4MAIN_t |
struct ALT_L3_SEC_L4MAIN_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_L3_SEC_L4MAIN.
Data Fields | ||
---|---|---|
uint32_t | spis0: 1 | SPI Slave 0 Security |
uint32_t | spis1: 1 | SPI Slave 1 Security |
uint32_t | dmasecure: 1 | DMA Secure Security |
uint32_t | dmanonsecure: 1 | DMA Non-secure Security |
uint32_t | __pad0__: 28 | UNDEFINED |
#define ALT_L3_SEC_L4MAIN_SPIS0_E_SECURE 0x0 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_SPIS0
The slave can only be accessed by a secure master.
#define ALT_L3_SEC_L4MAIN_SPIS0_E_NONSECURE 0x1 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_SPIS0
The slave can only be accessed by a secure or non-secure masters.
#define ALT_L3_SEC_L4MAIN_SPIS0_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_L3_SEC_L4MAIN_SPIS0 register field.
#define ALT_L3_SEC_L4MAIN_SPIS0_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_L3_SEC_L4MAIN_SPIS0 register field.
#define ALT_L3_SEC_L4MAIN_SPIS0_WIDTH 1 |
The width in bits of the ALT_L3_SEC_L4MAIN_SPIS0 register field.
#define ALT_L3_SEC_L4MAIN_SPIS0_SET_MSK 0x00000001 |
The mask used to set the ALT_L3_SEC_L4MAIN_SPIS0 register field value.
#define ALT_L3_SEC_L4MAIN_SPIS0_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_L3_SEC_L4MAIN_SPIS0 register field value.
#define ALT_L3_SEC_L4MAIN_SPIS0_RESET 0x0 |
The reset value of the ALT_L3_SEC_L4MAIN_SPIS0 register field.
#define ALT_L3_SEC_L4MAIN_SPIS0_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_L3_SEC_L4MAIN_SPIS0 field value from a register.
#define ALT_L3_SEC_L4MAIN_SPIS0_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_L3_SEC_L4MAIN_SPIS0 register field value suitable for setting the register.
#define ALT_L3_SEC_L4MAIN_SPIS1_E_SECURE 0x0 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_SPIS1
The slave can only be accessed by a secure master.
#define ALT_L3_SEC_L4MAIN_SPIS1_E_NONSECURE 0x1 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_SPIS1
The slave can only be accessed by a secure or non-secure masters.
#define ALT_L3_SEC_L4MAIN_SPIS1_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_L3_SEC_L4MAIN_SPIS1 register field.
#define ALT_L3_SEC_L4MAIN_SPIS1_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_L3_SEC_L4MAIN_SPIS1 register field.
#define ALT_L3_SEC_L4MAIN_SPIS1_WIDTH 1 |
The width in bits of the ALT_L3_SEC_L4MAIN_SPIS1 register field.
#define ALT_L3_SEC_L4MAIN_SPIS1_SET_MSK 0x00000002 |
The mask used to set the ALT_L3_SEC_L4MAIN_SPIS1 register field value.
#define ALT_L3_SEC_L4MAIN_SPIS1_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_L3_SEC_L4MAIN_SPIS1 register field value.
#define ALT_L3_SEC_L4MAIN_SPIS1_RESET 0x0 |
The reset value of the ALT_L3_SEC_L4MAIN_SPIS1 register field.
#define ALT_L3_SEC_L4MAIN_SPIS1_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_L3_SEC_L4MAIN_SPIS1 field value from a register.
#define ALT_L3_SEC_L4MAIN_SPIS1_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_L3_SEC_L4MAIN_SPIS1 register field value suitable for setting the register.
#define ALT_L3_SEC_L4MAIN_DMASECURE_E_SECURE 0x0 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_DMASECURE
The slave can only be accessed by a secure master.
#define ALT_L3_SEC_L4MAIN_DMASECURE_E_NONSECURE 0x1 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_DMASECURE
The slave can only be accessed by a secure or non-secure masters.
#define ALT_L3_SEC_L4MAIN_DMASECURE_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_L3_SEC_L4MAIN_DMASECURE register field.
#define ALT_L3_SEC_L4MAIN_DMASECURE_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_L3_SEC_L4MAIN_DMASECURE register field.
#define ALT_L3_SEC_L4MAIN_DMASECURE_WIDTH 1 |
The width in bits of the ALT_L3_SEC_L4MAIN_DMASECURE register field.
#define ALT_L3_SEC_L4MAIN_DMASECURE_SET_MSK 0x00000004 |
The mask used to set the ALT_L3_SEC_L4MAIN_DMASECURE register field value.
#define ALT_L3_SEC_L4MAIN_DMASECURE_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_L3_SEC_L4MAIN_DMASECURE register field value.
#define ALT_L3_SEC_L4MAIN_DMASECURE_RESET 0x0 |
The reset value of the ALT_L3_SEC_L4MAIN_DMASECURE register field.
#define ALT_L3_SEC_L4MAIN_DMASECURE_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_L3_SEC_L4MAIN_DMASECURE field value from a register.
#define ALT_L3_SEC_L4MAIN_DMASECURE_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_L3_SEC_L4MAIN_DMASECURE register field value suitable for setting the register.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_E_SECURE 0x0 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_DMANONSECURE
The slave can only be accessed by a secure master.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_E_NONSECURE 0x1 |
Enumerated value for register field ALT_L3_SEC_L4MAIN_DMANONSECURE
The slave can only be accessed by a secure or non-secure masters.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_L3_SEC_L4MAIN_DMANONSECURE register field.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_L3_SEC_L4MAIN_DMANONSECURE register field.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_WIDTH 1 |
The width in bits of the ALT_L3_SEC_L4MAIN_DMANONSECURE register field.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_SET_MSK 0x00000008 |
The mask used to set the ALT_L3_SEC_L4MAIN_DMANONSECURE register field value.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_L3_SEC_L4MAIN_DMANONSECURE register field value.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_RESET 0x0 |
The reset value of the ALT_L3_SEC_L4MAIN_DMANONSECURE register field.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_L3_SEC_L4MAIN_DMANONSECURE field value from a register.
#define ALT_L3_SEC_L4MAIN_DMANONSECURE_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_L3_SEC_L4MAIN_DMANONSECURE register field value suitable for setting the register.
#define ALT_L3_SEC_L4MAIN_OFST 0x0 |
The byte offset of the ALT_L3_SEC_L4MAIN register from the beginning of the component.
typedef struct ALT_L3_SEC_L4MAIN_s ALT_L3_SEC_L4MAIN_t |
The typedef declaration for register ALT_L3_SEC_L4MAIN.