Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : tsmc_tsel_1

Description

Register Layout

Bits Access Reset Description
[2:0] RW 0x0 ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL
[3] ??? 0x0 UNDEFINED
[5:4] RW 0x1 ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL
[7:6] ??? 0x0 UNDEFINED
[10:8] RW 0x0 ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL
[11] ??? 0x0 UNDEFINED
[13:12] RW 0x1 ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL
[15:14] ??? 0x0 UNDEFINED
[18:16] RW 0x0 ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL
[19] ??? 0x0 UNDEFINED
[21:20] RW 0x1 ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL
[23:22] ??? 0x0 UNDEFINED
[26:24] RW 0x0 ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL
[27] ??? 0x0 UNDEFINED
[29:28] RW 0x1 ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL
[31:30] ??? 0x0 UNDEFINED

Field : ocram_wtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_LSB   0
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_MSB   2
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_WIDTH   3
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_SET_MSK   0x00000007
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_CLR_MSK   0xfffffff8
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_RESET   0x0
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_GET(value)   (((value) & 0x00000007) >> 0)
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_SET(value)   (((value) << 0) & 0x00000007)
 

Field : ocram_rtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_LSB   4
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_MSB   5
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_WIDTH   2
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_SET_MSK   0x00000030
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_CLR_MSK   0xffffffcf
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_RESET   0x1
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_GET(value)   (((value) & 0x00000030) >> 4)
 
#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_SET(value)   (((value) << 4) & 0x00000030)
 

Field : otg_wtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_LSB   8
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_MSB   10
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_WIDTH   3
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_SET_MSK   0x00000700
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_CLR_MSK   0xfffff8ff
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_RESET   0x0
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_GET(value)   (((value) & 0x00000700) >> 8)
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_SET(value)   (((value) << 8) & 0x00000700)
 

Field : otg_rtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_LSB   12
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_MSB   13
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_WIDTH   2
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_SET_MSK   0x00003000
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_CLR_MSK   0xffffcfff
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_RESET   0x1
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_GET(value)   (((value) & 0x00003000) >> 12)
 
#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_SET(value)   (((value) << 12) & 0x00003000)
 

Field : qspi_wtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_LSB   16
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_MSB   18
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_WIDTH   3
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_SET_MSK   0x00070000
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_CLR_MSK   0xfff8ffff
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_RESET   0x0
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_GET(value)   (((value) & 0x00070000) >> 16)
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_SET(value)   (((value) << 16) & 0x00070000)
 

Field : qspi_rtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_LSB   20
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_MSB   21
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_WIDTH   2
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_SET_MSK   0x00300000
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_CLR_MSK   0xffcfffff
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_RESET   0x1
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_GET(value)   (((value) & 0x00300000) >> 20)
 
#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_SET(value)   (((value) << 20) & 0x00300000)
 

Field : etf_wtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_LSB   24
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_MSB   26
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_WIDTH   3
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_SET_MSK   0x07000000
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_CLR_MSK   0xf8ffffff
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_RESET   0x0
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_GET(value)   (((value) & 0x07000000) >> 24)
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_SET(value)   (((value) << 24) & 0x07000000)
 

Field : etf_rtsel

Field Access Macros:

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_LSB   28
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_MSB   29
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_WIDTH   2
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_SET_MSK   0x30000000
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_CLR_MSK   0xcfffffff
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_RESET   0x1
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_GET(value)   (((value) & 0x30000000) >> 28)
 
#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_SET(value)   (((value) << 28) & 0x30000000)
 

Data Structures

struct  ALT_SYSMGR_TSMC_TSEL_1_s
 

Macros

#define ALT_SYSMGR_TSMC_TSEL_1_RESET   0x10101010
 
#define ALT_SYSMGR_TSMC_TSEL_1_OFST   0x104
 

Typedefs

typedef struct
ALT_SYSMGR_TSMC_TSEL_1_s 
ALT_SYSMGR_TSMC_TSEL_1_t
 

Data Structure Documentation

struct ALT_SYSMGR_TSMC_TSEL_1_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_SYSMGR_TSMC_TSEL_1.

Data Fields
uint32_t ocram_wtsel: 3 ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL
uint32_t __pad0__: 1 UNDEFINED
uint32_t ocram_rtsel: 2 ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL
uint32_t __pad1__: 2 UNDEFINED
uint32_t otg_wtsel: 3 ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL
uint32_t __pad2__: 1 UNDEFINED
uint32_t otg_rtsel: 2 ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL
uint32_t __pad3__: 2 UNDEFINED
uint32_t qspi_wtsel: 3 ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL
uint32_t __pad4__: 1 UNDEFINED
uint32_t qspi_rtsel: 2 ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL
uint32_t __pad5__: 2 UNDEFINED
uint32_t etf_wtsel: 3 ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL
uint32_t __pad6__: 1 UNDEFINED
uint32_t etf_rtsel: 2 ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL
uint32_t __pad7__: 2 UNDEFINED

Macro Definitions

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_LSB   0

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_MSB   2

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_WIDTH   3

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_SET_MSK   0x00000007

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_CLR_MSK   0xfffffff8

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_RESET   0x0

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_GET (   value)    (((value) & 0x00000007) >> 0)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL_SET (   value)    (((value) << 0) & 0x00000007)

Produces a ALT_SYSMGR_TSMC_TSEL_1_OCRAM_WTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_LSB   4

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_MSB   5

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_WIDTH   2

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_SET_MSK   0x00000030

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_CLR_MSK   0xffffffcf

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_RESET   0x1

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_GET (   value)    (((value) & 0x00000030) >> 4)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL_SET (   value)    (((value) << 4) & 0x00000030)

Produces a ALT_SYSMGR_TSMC_TSEL_1_OCRAM_RTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_LSB   8

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_MSB   10

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_WIDTH   3

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_SET_MSK   0x00000700

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_CLR_MSK   0xfffff8ff

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_RESET   0x0

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_GET (   value)    (((value) & 0x00000700) >> 8)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL_SET (   value)    (((value) << 8) & 0x00000700)

Produces a ALT_SYSMGR_TSMC_TSEL_1_OTG_WTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_LSB   12

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_MSB   13

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_WIDTH   2

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_SET_MSK   0x00003000

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_CLR_MSK   0xffffcfff

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_RESET   0x1

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_GET (   value)    (((value) & 0x00003000) >> 12)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL_SET (   value)    (((value) << 12) & 0x00003000)

Produces a ALT_SYSMGR_TSMC_TSEL_1_OTG_RTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_LSB   16

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_MSB   18

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_WIDTH   3

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_SET_MSK   0x00070000

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_CLR_MSK   0xfff8ffff

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_RESET   0x0

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_GET (   value)    (((value) & 0x00070000) >> 16)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL_SET (   value)    (((value) << 16) & 0x00070000)

Produces a ALT_SYSMGR_TSMC_TSEL_1_QSPI_WTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_LSB   20

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_MSB   21

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_WIDTH   2

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_SET_MSK   0x00300000

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_CLR_MSK   0xffcfffff

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_RESET   0x1

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_GET (   value)    (((value) & 0x00300000) >> 20)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL_SET (   value)    (((value) << 20) & 0x00300000)

Produces a ALT_SYSMGR_TSMC_TSEL_1_QSPI_RTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_LSB   24

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_MSB   26

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_WIDTH   3

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_SET_MSK   0x07000000

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_CLR_MSK   0xf8ffffff

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_RESET   0x0

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_GET (   value)    (((value) & 0x07000000) >> 24)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL_SET (   value)    (((value) << 24) & 0x07000000)

Produces a ALT_SYSMGR_TSMC_TSEL_1_ETF_WTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_LSB   28

The Least Significant Bit (LSB) position of the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_MSB   29

The Most Significant Bit (MSB) position of the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_WIDTH   2

The width in bits of the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_SET_MSK   0x30000000

The mask used to set the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_CLR_MSK   0xcfffffff

The mask used to clear the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field value.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_RESET   0x1

The reset value of the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_GET (   value)    (((value) & 0x30000000) >> 28)

Extracts the ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL field value from a register.

#define ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL_SET (   value)    (((value) << 28) & 0x30000000)

Produces a ALT_SYSMGR_TSMC_TSEL_1_ETF_RTSEL register field value suitable for setting the register.

#define ALT_SYSMGR_TSMC_TSEL_1_RESET   0x10101010

The reset value of the ALT_SYSMGR_TSMC_TSEL_1 register.

#define ALT_SYSMGR_TSMC_TSEL_1_OFST   0x104

The byte offset of the ALT_SYSMGR_TSMC_TSEL_1 register from the beginning of the component.

Typedef Documentation

The typedef declaration for register ALT_SYSMGR_TSMC_TSEL_1.