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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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The MAC Address55 High register holds the upper 16 bits of the 56th 6-byte MAC address of the station. Because the MAC address registers are configured to be double-synchronized to the (G)MII clock domains, the synchronization is triggered only when bits[31:24] (in little-endian mode) or Bits[7:0] (in big- endian mode) of the MAC Address55 Low Register are written. For proper synchronization updates, the consecutive writes to this Address Low Register should be performed after at least four clock cycles in the destination clock domain.
Note that all MAC Address High registers (except MAC Address0 High) have the same format.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[15:0] | RW | 0xffff | MAC Address55 [47:32] |
[23:16] | ??? | 0x0 | UNDEFINED |
[24] | RW | 0x0 | Mask Byte Control |
[25] | RW | 0x0 | Mask Byte Control |
[26] | RW | 0x0 | Mask Byte Control |
[27] | RW | 0x0 | Mask Byte Control |
[28] | RW | 0x0 | Mask Byte Control |
[29] | RW | 0x0 | Mask Byte Control |
[30] | RW | 0x0 | Source Address |
[31] | RW | 0x0 | Address Enable |
Field : MAC Address55 [47:32] - addrhi | |
This field contains the upper 16 bits (47:32) of the 56th 6-byte MAC address. Field Access Macros: | |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_LSB 0 |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_MSB 15 |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_WIDTH 16 |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_SET_MSK 0x0000ffff |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_CLR_MSK 0xffff0000 |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_RESET 0xffff |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_GET(value) (((value) & 0x0000ffff) >> 0) |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_SET(value) (((value) << 0) & 0x0000ffff) |
Field : Mask Byte Control - mbc_0 | ||||||||||
This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address55 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_E_UNMSKED 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_E_MSKED 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_LSB 24 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_MSB 24 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_SET_MSK 0x01000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_CLR_MSK 0xfeffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_GET(value) (((value) & 0x01000000) >> 24) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_SET(value) (((value) << 24) & 0x01000000) | |||||||||
Field : Mask Byte Control - mbc_1 | ||||||||||
This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address55 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_E_UNMSKED 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_E_MSKED 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_LSB 25 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_MSB 25 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_SET_MSK 0x02000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_CLR_MSK 0xfdffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_GET(value) (((value) & 0x02000000) >> 25) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_SET(value) (((value) << 25) & 0x02000000) | |||||||||
Field : Mask Byte Control - mbc_2 | ||||||||||
This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address55 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_E_UNMSKED 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_E_MSKED 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_LSB 26 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_MSB 26 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_SET_MSK 0x04000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_CLR_MSK 0xfbffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_GET(value) (((value) & 0x04000000) >> 26) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_SET(value) (((value) << 26) & 0x04000000) | |||||||||
Field : Mask Byte Control - mbc_3 | ||||||||||
This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address55 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_E_UNMSKED 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_E_MSKED 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_LSB 27 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_MSB 27 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_SET_MSK 0x08000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_CLR_MSK 0xf7ffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_GET(value) (((value) & 0x08000000) >> 27) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_SET(value) (((value) << 27) & 0x08000000) | |||||||||
Field : Mask Byte Control - mbc_4 | ||||||||||
This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address55 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_E_UNMSKED 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_E_MSKED 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_LSB 28 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_MSB 28 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_SET_MSK 0x10000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_CLR_MSK 0xefffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_GET(value) (((value) & 0x10000000) >> 28) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_SET(value) (((value) << 28) & 0x10000000) | |||||||||
Field : Mask Byte Control - mbc_5 | ||||||||||
This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address55 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0). Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_E_UNMSKED 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_E_MSKED 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_LSB 29 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_MSB 29 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_SET_MSK 0x20000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_CLR_MSK 0xdfffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_GET(value) (((value) & 0x20000000) >> 29) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_SET(value) (((value) << 29) & 0x20000000) | |||||||||
Field : Source Address - sa | ||||||||||
When this bit is enabled, the MAC Address55[47:0] is used to compare with the SA fields of the received frame. When this bit is disabled, the MAC Address55[47:0] is used to compare with the DA fields of the received frame. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_E_DISD 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_E_END 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_LSB 30 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_MSB 30 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_SET_MSK 0x40000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_CLR_MSK 0xbfffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_GET(value) (((value) & 0x40000000) >> 30) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_SET(value) (((value) << 30) & 0x40000000) | |||||||||
Field : Address Enable - ae | ||||||||||
When this bit is enabled, the address filter block uses the 56th MAC address for perfect filtering. When this bit is disabled, the address filter block ignores the address for filtering. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_E_DISD 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_E_END 0x1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_LSB 31 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_MSB 31 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_WIDTH 1 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_SET_MSK 0x80000000 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_CLR_MSK 0x7fffffff | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_RESET 0x0 | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_GET(value) (((value) & 0x80000000) >> 31) | |||||||||
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_SET(value) (((value) << 31) & 0x80000000) | |||||||||
Data Structures | |
struct | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_s |
Macros | |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_OFST 0x938 |
#define | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_MAC_ADDR55_HIGH_OFST)) |
Typedefs | |
typedef struct ALT_EMAC_GMAC_MAC_ADDR55_HIGH_s | ALT_EMAC_GMAC_MAC_ADDR55_HIGH_t |
struct ALT_EMAC_GMAC_MAC_ADDR55_HIGH_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_EMAC_GMAC_MAC_ADDR55_HIGH.
Data Fields | ||
---|---|---|
uint32_t | addrhi: 16 | MAC Address55 [47:32] |
uint32_t | __pad0__: 8 | UNDEFINED |
uint32_t | mbc_0: 1 | Mask Byte Control |
uint32_t | mbc_1: 1 | Mask Byte Control |
uint32_t | mbc_2: 1 | Mask Byte Control |
uint32_t | mbc_3: 1 | Mask Byte Control |
uint32_t | mbc_4: 1 | Mask Byte Control |
uint32_t | mbc_5: 1 | Mask Byte Control |
uint32_t | sa: 1 | Source Address |
uint32_t | ae: 1 | Address Enable |
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_WIDTH 16 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_SET_MSK 0x0000ffff |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_CLR_MSK 0xffff0000 |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_RESET 0xffff |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_GET | ( | value | ) | (((value) & 0x0000ffff) >> 0) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI_SET | ( | value | ) | (((value) << 0) & 0x0000ffff) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDRHI register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_E_UNMSKED 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0
Byte is unmasked (i.e. is compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_E_MSKED 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0
Byte is masked (i.e. not compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_LSB 24 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_MSB 24 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_SET_MSK 0x01000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_CLR_MSK 0xfeffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_GET | ( | value | ) | (((value) & 0x01000000) >> 24) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0_SET | ( | value | ) | (((value) << 24) & 0x01000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_0 register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_E_UNMSKED 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1
Byte is unmasked (i.e. is compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_E_MSKED 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1
Byte is masked (i.e. not compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_LSB 25 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_MSB 25 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_SET_MSK 0x02000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_CLR_MSK 0xfdffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_GET | ( | value | ) | (((value) & 0x02000000) >> 25) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1_SET | ( | value | ) | (((value) << 25) & 0x02000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_1 register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_E_UNMSKED 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2
Byte is unmasked (i.e. is compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_E_MSKED 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2
Byte is masked (i.e. not compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_LSB 26 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_MSB 26 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_SET_MSK 0x04000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_CLR_MSK 0xfbffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_GET | ( | value | ) | (((value) & 0x04000000) >> 26) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2_SET | ( | value | ) | (((value) << 26) & 0x04000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_2 register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_E_UNMSKED 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3
Byte is unmasked (i.e. is compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_E_MSKED 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3
Byte is masked (i.e. not compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_LSB 27 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_MSB 27 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_SET_MSK 0x08000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_CLR_MSK 0xf7ffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_GET | ( | value | ) | (((value) & 0x08000000) >> 27) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3_SET | ( | value | ) | (((value) << 27) & 0x08000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_3 register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_E_UNMSKED 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4
Byte is unmasked (i.e. is compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_E_MSKED 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4
Byte is masked (i.e. not compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_LSB 28 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_MSB 28 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_SET_MSK 0x10000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_CLR_MSK 0xefffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_GET | ( | value | ) | (((value) & 0x10000000) >> 28) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4_SET | ( | value | ) | (((value) << 28) & 0x10000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_4 register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_E_UNMSKED 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5
Byte is unmasked (i.e. is compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_E_MSKED 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5
Byte is masked (i.e. not compared)
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_LSB 29 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_MSB 29 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_SET_MSK 0x20000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_CLR_MSK 0xdfffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_GET | ( | value | ) | (((value) & 0x20000000) >> 29) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5_SET | ( | value | ) | (((value) << 29) & 0x20000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_MBC_5 register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_E_DISD 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA
MAC address compare disabled
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_E_END 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA
MAC address compare enabled
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_LSB 30 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_MSB 30 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_SET_MSK 0x40000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_CLR_MSK 0xbfffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_GET | ( | value | ) | (((value) & 0x40000000) >> 30) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA_SET | ( | value | ) | (((value) << 30) & 0x40000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_SA register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_E_DISD 0x0 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE
Second MAC address filtering disabled
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_E_END 0x1 |
Enumerated value for register field ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE
Second MAC address filtering enabled
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_LSB 31 |
The Least Significant Bit (LSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_MSB 31 |
The Most Significant Bit (MSB) position of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_WIDTH 1 |
The width in bits of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_SET_MSK 0x80000000 |
The mask used to set the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_CLR_MSK 0x7fffffff |
The mask used to clear the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field value.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_RESET 0x0 |
The reset value of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_GET | ( | value | ) | (((value) & 0x80000000) >> 31) |
Extracts the ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE field value from a register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE_SET | ( | value | ) | (((value) << 31) & 0x80000000) |
Produces a ALT_EMAC_GMAC_MAC_ADDR55_HIGH_AE register field value suitable for setting the register.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_OFST 0x938 |
The byte offset of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH register from the beginning of the component.
#define ALT_EMAC_GMAC_MAC_ADDR55_HIGH_ADDR | ( | base | ) | ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_EMAC_GMAC_MAC_ADDR55_HIGH_OFST)) |
The address of the ALT_EMAC_GMAC_MAC_ADDR55_HIGH register.
typedef struct ALT_EMAC_GMAC_MAC_ADDR55_HIGH_s ALT_EMAC_GMAC_MAC_ADDR55_HIGH_t |
The typedef declaration for register ALT_EMAC_GMAC_MAC_ADDR55_HIGH.