Altera HWLIB  16.0
The Altera HW Manager API Reference Manual
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alt_int_device.h
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32 
33 /*
34  * $Id: //depot/embedded/rel/15.0/ip/hps/altera_hps/hwlib/include/soc_cv_av/alt_int_device.h#1 $
35  */
36 
37 #ifndef __ALT_INT_DEVICE_H__
38 #define __ALT_INT_DEVICE_H__
39 
40 #ifdef __cplusplus
41 extern "C"
42 {
43 #endif
44 
52 typedef enum ALT_INT_INTERRUPT_e
53 {
54  ALT_INT_INTERRUPT_SGI0 = 0,
55  ALT_INT_INTERRUPT_SGI1 = 1,
56  ALT_INT_INTERRUPT_SGI2 = 2,
57  ALT_INT_INTERRUPT_SGI3 = 3,
58  ALT_INT_INTERRUPT_SGI4 = 4,
59  ALT_INT_INTERRUPT_SGI5 = 5,
60  ALT_INT_INTERRUPT_SGI6 = 6,
61  ALT_INT_INTERRUPT_SGI7 = 7,
62  ALT_INT_INTERRUPT_SGI8 = 8,
63  ALT_INT_INTERRUPT_SGI9 = 9,
64  ALT_INT_INTERRUPT_SGI10 = 10,
65  ALT_INT_INTERRUPT_SGI11 = 11,
66  ALT_INT_INTERRUPT_SGI12 = 12,
67  ALT_INT_INTERRUPT_SGI13 = 13,
68  ALT_INT_INTERRUPT_SGI14 = 14,
69  ALT_INT_INTERRUPT_SGI15 = 15,
75  ALT_INT_INTERRUPT_PPI_TIMER_GLOBAL = 27,
76  ALT_INT_INTERRUPT_PPI_TIMER_PRIVATE = 29,
77  ALT_INT_INTERRUPT_PPI_TIMER_WATCHDOG = 30,
84  ALT_INT_INTERRUPT_CPU0_PARITYFAIL = 32,
85  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_BTAC = 33,
86  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_GHB = 34,
87  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_I_TAG = 35,
88  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_I_DATA = 36,
89  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_TLB = 37,
90  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_D_OUTER = 38,
91  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_D_TAG = 39,
92  ALT_INT_INTERRUPT_CPU0_PARITYFAIL_D_DATA = 40,
93  ALT_INT_INTERRUPT_CPU0_DEFLAGS0 = 41,
94  ALT_INT_INTERRUPT_CPU0_DEFLAGS1 = 42,
95  ALT_INT_INTERRUPT_CPU0_DEFLAGS2 = 43,
96  ALT_INT_INTERRUPT_CPU0_DEFLAGS3 = 44,
97  ALT_INT_INTERRUPT_CPU0_DEFLAGS4 = 45,
98  ALT_INT_INTERRUPT_CPU0_DEFLAGS5 = 46,
99  ALT_INT_INTERRUPT_CPU0_DEFLAGS6 = 47,
111  ALT_INT_INTERRUPT_CPU1_PARITYFAIL = 48,
112  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_BTAC = 49,
113  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_GHB = 50,
114  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_I_TAG = 51,
115  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_I_DATA = 52,
116  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_TLB = 53,
117  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_D_OUTER = 54,
118  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_D_TAG = 55,
119  ALT_INT_INTERRUPT_CPU1_PARITYFAIL_D_DATA = 56,
120  ALT_INT_INTERRUPT_CPU1_DEFLAGS0 = 57,
121  ALT_INT_INTERRUPT_CPU1_DEFLAGS1 = 58,
122  ALT_INT_INTERRUPT_CPU1_DEFLAGS2 = 59,
123  ALT_INT_INTERRUPT_CPU1_DEFLAGS3 = 60,
124  ALT_INT_INTERRUPT_CPU1_DEFLAGS4 = 61,
125  ALT_INT_INTERRUPT_CPU1_DEFLAGS5 = 62,
126  ALT_INT_INTERRUPT_CPU1_DEFLAGS6 = 63,
138  ALT_INT_INTERRUPT_SCU_PARITYFAIL0 = 64,
139  ALT_INT_INTERRUPT_SCU_PARITYFAIL1 = 65,
140  ALT_INT_INTERRUPT_SCU_EV_ABORT = 66,
146  ALT_INT_INTERRUPT_L2_ECC_BYTE_WR_IRQ = 67,
147  ALT_INT_INTERRUPT_L2_ECC_CORRECTED_IRQ = 68,
148  ALT_INT_INTERRUPT_L2_ECC_UNCORRECTED_IRQ = 69,
149  ALT_INT_INTERRUPT_L2_COMBINED_IRQ = 70,
162  ALT_INT_INTERRUPT_DDR_ECC_ERROR_IRQ = 71,
168  ALT_INT_INTERRUPT_F2S_FPGA_IRQ0 = 72,
169  ALT_INT_INTERRUPT_F2S_FPGA_IRQ1 = 73,
170  ALT_INT_INTERRUPT_F2S_FPGA_IRQ2 = 74,
171  ALT_INT_INTERRUPT_F2S_FPGA_IRQ3 = 75,
172  ALT_INT_INTERRUPT_F2S_FPGA_IRQ4 = 76,
173  ALT_INT_INTERRUPT_F2S_FPGA_IRQ5 = 77,
174  ALT_INT_INTERRUPT_F2S_FPGA_IRQ6 = 78,
175  ALT_INT_INTERRUPT_F2S_FPGA_IRQ7 = 79,
176  ALT_INT_INTERRUPT_F2S_FPGA_IRQ8 = 80,
177  ALT_INT_INTERRUPT_F2S_FPGA_IRQ9 = 81,
178  ALT_INT_INTERRUPT_F2S_FPGA_IRQ10 = 82,
179  ALT_INT_INTERRUPT_F2S_FPGA_IRQ11 = 83,
180  ALT_INT_INTERRUPT_F2S_FPGA_IRQ12 = 84,
181  ALT_INT_INTERRUPT_F2S_FPGA_IRQ13 = 85,
182  ALT_INT_INTERRUPT_F2S_FPGA_IRQ14 = 86,
183  ALT_INT_INTERRUPT_F2S_FPGA_IRQ15 = 87,
184  ALT_INT_INTERRUPT_F2S_FPGA_IRQ16 = 88,
185  ALT_INT_INTERRUPT_F2S_FPGA_IRQ17 = 89,
186  ALT_INT_INTERRUPT_F2S_FPGA_IRQ18 = 90,
187  ALT_INT_INTERRUPT_F2S_FPGA_IRQ19 = 91,
188  ALT_INT_INTERRUPT_F2S_FPGA_IRQ20 = 92,
189  ALT_INT_INTERRUPT_F2S_FPGA_IRQ21 = 93,
190  ALT_INT_INTERRUPT_F2S_FPGA_IRQ22 = 94,
191  ALT_INT_INTERRUPT_F2S_FPGA_IRQ23 = 95,
192  ALT_INT_INTERRUPT_F2S_FPGA_IRQ24 = 96,
193  ALT_INT_INTERRUPT_F2S_FPGA_IRQ25 = 97,
194  ALT_INT_INTERRUPT_F2S_FPGA_IRQ26 = 98,
195  ALT_INT_INTERRUPT_F2S_FPGA_IRQ27 = 99,
196  ALT_INT_INTERRUPT_F2S_FPGA_IRQ28 = 100,
197  ALT_INT_INTERRUPT_F2S_FPGA_IRQ29 = 101,
198  ALT_INT_INTERRUPT_F2S_FPGA_IRQ30 = 102,
199  ALT_INT_INTERRUPT_F2S_FPGA_IRQ31 = 103,
200  ALT_INT_INTERRUPT_F2S_FPGA_IRQ32 = 104,
201  ALT_INT_INTERRUPT_F2S_FPGA_IRQ33 = 105,
202  ALT_INT_INTERRUPT_F2S_FPGA_IRQ34 = 106,
203  ALT_INT_INTERRUPT_F2S_FPGA_IRQ35 = 107,
204  ALT_INT_INTERRUPT_F2S_FPGA_IRQ36 = 108,
205  ALT_INT_INTERRUPT_F2S_FPGA_IRQ37 = 109,
206  ALT_INT_INTERRUPT_F2S_FPGA_IRQ38 = 110,
207  ALT_INT_INTERRUPT_F2S_FPGA_IRQ39 = 111,
208  ALT_INT_INTERRUPT_F2S_FPGA_IRQ40 = 112,
209  ALT_INT_INTERRUPT_F2S_FPGA_IRQ41 = 113,
210  ALT_INT_INTERRUPT_F2S_FPGA_IRQ42 = 114,
211  ALT_INT_INTERRUPT_F2S_FPGA_IRQ43 = 115,
212  ALT_INT_INTERRUPT_F2S_FPGA_IRQ44 = 116,
213  ALT_INT_INTERRUPT_F2S_FPGA_IRQ45 = 117,
214  ALT_INT_INTERRUPT_F2S_FPGA_IRQ46 = 118,
215  ALT_INT_INTERRUPT_F2S_FPGA_IRQ47 = 119,
216  ALT_INT_INTERRUPT_F2S_FPGA_IRQ48 = 120,
217  ALT_INT_INTERRUPT_F2S_FPGA_IRQ49 = 121,
218  ALT_INT_INTERRUPT_F2S_FPGA_IRQ50 = 122,
219  ALT_INT_INTERRUPT_F2S_FPGA_IRQ51 = 123,
220  ALT_INT_INTERRUPT_F2S_FPGA_IRQ52 = 124,
221  ALT_INT_INTERRUPT_F2S_FPGA_IRQ53 = 125,
222  ALT_INT_INTERRUPT_F2S_FPGA_IRQ54 = 126,
223  ALT_INT_INTERRUPT_F2S_FPGA_IRQ55 = 127,
224  ALT_INT_INTERRUPT_F2S_FPGA_IRQ56 = 128,
225  ALT_INT_INTERRUPT_F2S_FPGA_IRQ57 = 129,
226  ALT_INT_INTERRUPT_F2S_FPGA_IRQ58 = 130,
227  ALT_INT_INTERRUPT_F2S_FPGA_IRQ59 = 131,
228  ALT_INT_INTERRUPT_F2S_FPGA_IRQ60 = 132,
229  ALT_INT_INTERRUPT_F2S_FPGA_IRQ61 = 133,
230  ALT_INT_INTERRUPT_F2S_FPGA_IRQ62 = 134,
231  ALT_INT_INTERRUPT_F2S_FPGA_IRQ63 = 135,
237  ALT_INT_INTERRUPT_DMA_IRQ0 = 136,
238  ALT_INT_INTERRUPT_DMA_IRQ1 = 137,
239  ALT_INT_INTERRUPT_DMA_IRQ2 = 138,
240  ALT_INT_INTERRUPT_DMA_IRQ3 = 139,
241  ALT_INT_INTERRUPT_DMA_IRQ4 = 140,
242  ALT_INT_INTERRUPT_DMA_IRQ5 = 141,
243  ALT_INT_INTERRUPT_DMA_IRQ6 = 142,
244  ALT_INT_INTERRUPT_DMA_IRQ7 = 143,
245  ALT_INT_INTERRUPT_DMA_IRQ_ABORT = 144,
246  ALT_INT_INTERRUPT_DMA_ECC_CORRECTED_IRQ = 145,
247  ALT_INT_INTERRUPT_DMA_ECC_UNCORRECTED_IRQ = 146,
253  ALT_INT_INTERRUPT_EMAC0_IRQ = 147,
254  ALT_INT_INTERRUPT_EMAC0_TX_ECC_CORRECTED_IRQ = 148,
255  ALT_INT_INTERRUPT_EMAC0_TX_ECC_UNCORRECTED_IRQ = 149,
256  ALT_INT_INTERRUPT_EMAC0_RX_ECC_CORRECTED_IRQ = 150,
257  ALT_INT_INTERRUPT_EMAC0_RX_ECC_UNCORRECTED_IRQ = 151,
263  ALT_INT_INTERRUPT_EMAC1_IRQ = 152,
264  ALT_INT_INTERRUPT_EMAC1_TX_ECC_CORRECTED_IRQ = 153,
265  ALT_INT_INTERRUPT_EMAC1_TX_ECC_UNCORRECTED_IRQ = 154,
266  ALT_INT_INTERRUPT_EMAC1_RX_ECC_CORRECTED_IRQ = 155,
267  ALT_INT_INTERRUPT_EMAC1_RX_ECC_UNCORRECTED_IRQ = 156,
273  ALT_INT_INTERRUPT_USB0_IRQ = 157,
274  ALT_INT_INTERRUPT_USB0_ECC_CORRECTED = 158,
275  ALT_INT_INTERRUPT_USB0_ECC_UNCORRECTED = 159,
281  ALT_INT_INTERRUPT_USB1_IRQ = 160,
282  ALT_INT_INTERRUPT_USB1_ECC_CORRECTED = 161,
283  ALT_INT_INTERRUPT_USB1_ECC_UNCORRECTED = 162,
289  ALT_INT_INTERRUPT_CAN0_STS_IRQ = 163,
290  ALT_INT_INTERRUPT_CAN0_MO_IRQ = 164,
291  ALT_INT_INTERRUPT_CAN0_ECC_CORRECTED_IRQ = 165,
292  ALT_INT_INTERRUPT_CAN0_ECC_UNCORRECTED_IRQ = 166,
298  ALT_INT_INTERRUPT_CAN1_STS_IRQ = 167,
299  ALT_INT_INTERRUPT_CAN1_MO_IRQ = 168,
300  ALT_INT_INTERRUPT_CAN1_ECC_CORRECTED_IRQ = 169,
301  ALT_INT_INTERRUPT_CAN1_ECC_UNCORRECTED_IRQ = 170,
307  ALT_INT_INTERRUPT_SDMMC_IRQ = 171,
308  ALT_INT_INTERRUPT_SDMMC_PORTA_ECC_CORRECTED = 172,
309  ALT_INT_INTERRUPT_SDMMC_PORTA_ECC_UNCORRECTED = 173,
310  ALT_INT_INTERRUPT_SDMMC_PORTB_ECC_CORRECTED = 174,
311  ALT_INT_INTERRUPT_SDMMC_PORTB_ECC_UNCORRECTED = 175,
317  ALT_INT_INTERRUPT_NAND_IRQ = 176,
318  ALT_INT_INTERRUPT_NANDR_ECC_CORRECTED_IRQ = 177,
319  ALT_INT_INTERRUPT_NANDR_ECC_UNCORRECTED_IRQ = 178,
320  ALT_INT_INTERRUPT_NANDW_ECC_CORRECTED_IRQ = 179,
321  ALT_INT_INTERRUPT_NANDW_ECC_UNCORRECTED_IRQ = 180,
322  ALT_INT_INTERRUPT_NANDE_ECC_CORRECTED_IRQ = 181,
323  ALT_INT_INTERRUPT_NANDE_ECC_UNCORRECTED_IRQ = 182,
329  ALT_INT_INTERRUPT_QSPI_IRQ = 183,
330  ALT_INT_INTERRUPT_QSPI_ECC_CORRECTED_IRQ = 184,
331  ALT_INT_INTERRUPT_QSPI_ECC_UNCORRECTED_IRQ = 185,
337  ALT_INT_INTERRUPT_SPI0_IRQ = 186,
338  ALT_INT_INTERRUPT_SPI1_IRQ = 187,
339  ALT_INT_INTERRUPT_SPI2_IRQ = 188,
340  ALT_INT_INTERRUPT_SPI3_IRQ = 189,
348  ALT_INT_INTERRUPT_I2C0_IRQ = 190,
349  ALT_INT_INTERRUPT_I2C1_IRQ = 191,
350  ALT_INT_INTERRUPT_I2C2_IRQ = 192,
351  ALT_INT_INTERRUPT_I2C3_IRQ = 193,
357  ALT_INT_INTERRUPT_UART0 = 194,
358  ALT_INT_INTERRUPT_UART1 = 195,
364  ALT_INT_INTERRUPT_GPIO0 = 196,
365  ALT_INT_INTERRUPT_GPIO1 = 197,
366  ALT_INT_INTERRUPT_GPIO2 = 198,
372  ALT_INT_INTERRUPT_TIMER_L4SP_0_IRQ = 199,
373  ALT_INT_INTERRUPT_TIMER_L4SP_1_IRQ = 200,
374  ALT_INT_INTERRUPT_TIMER_OSC1_0_IRQ = 201,
375  ALT_INT_INTERRUPT_TIMER_OSC1_1_IRQ = 202,
381  ALT_INT_INTERRUPT_WDOG0_IRQ = 203,
382  ALT_INT_INTERRUPT_WDOG1_IRQ = 204,
388  ALT_INT_INTERRUPT_CLKMGR_IRQ = 205,
394  ALT_INT_INTERRUPT_MPUWAKEUP_IRQ = 206,
400  ALT_INT_INTERRUPT_FPGA_MAN_IRQ = 207,
406  ALT_INT_INTERRUPT_NCTIIRQ0 = 208,
407  ALT_INT_INTERRUPT_NCTIIRQ1 = 209,
413  ALT_INT_INTERRUPT_RAM_ECC_CORRECTED_IRQ = 210,
414  ALT_INT_INTERRUPT_RAM_ECC_UNCORRECTED_IRQ = 211
420 } ALT_INT_INTERRUPT_t;
421 
422 #ifdef __cplusplus
423 }
424 #endif
425 
426 #endif /* __ALT_INT_DEVICE_H__ */