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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Interrupt Status Before Masking.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | 0x0 | Card Detect |
[1] | RW | 0x0 | Response Error |
[2] | RW | 0x0 | Command Done |
[3] | RW | 0x0 | Data Transfer Over |
[4] | RW | 0x0 | Transmit FIFO Data Request |
[5] | RW | 0x0 | Receive FIFO Data Request |
[6] | RW | 0x0 | Response CRC Error |
[7] | RW | 0x0 | Data CRC Error |
[8] | RW | 0x0 | Response Timeout Boot Ack Received |
[9] | RW | 0x0 | Data Read Timeout Boot Data Start |
[10] | RW | 0x0 | Data Starvation Host Timeout Volt Switch_int |
[11] | RW | 0x0 | FIFO Underrun Overrun Error |
[12] | RW | 0x0 | Hardware Locked Write Error |
[13] | RW | 0x0 | Start-bit error (SBE) |
[14] | RW | 0x0 | Auto Cmommand Done |
[15] | RW | 0x0 | End-bit Error |
[16] | RW | 0x0 | SDIO Interrupt |
[31:17] | ??? | 0x0 | UNDEFINED |
Field : Card Detect - cd | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_CD_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_LSB 0 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_MSB 0 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_SET_MSK 0x00000001 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_CLR_MSK 0xfffffffe | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_GET(value) (((value) & 0x00000001) >> 0) | |||||||||
#define | ALT_SDMMC_RINTSTS_CD_SET(value) (((value) << 0) & 0x00000001) | |||||||||
Field : Response Error - re | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_RE_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_LSB 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_MSB 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_SET_MSK 0x00000002 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_CLR_MSK 0xfffffffd | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_GET(value) (((value) & 0x00000002) >> 1) | |||||||||
#define | ALT_SDMMC_RINTSTS_RE_SET(value) (((value) << 1) & 0x00000002) | |||||||||
Field : Command Done - cmd | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_CMD_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_LSB 2 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_MSB 2 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_SET_MSK 0x00000004 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_CLR_MSK 0xfffffffb | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_GET(value) (((value) & 0x00000004) >> 2) | |||||||||
#define | ALT_SDMMC_RINTSTS_CMD_SET(value) (((value) << 2) & 0x00000004) | |||||||||
Field : Data Transfer Over - dto | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_DTO_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_LSB 3 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_MSB 3 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_SET_MSK 0x00000008 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_CLR_MSK 0xfffffff7 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_GET(value) (((value) & 0x00000008) >> 3) | |||||||||
#define | ALT_SDMMC_RINTSTS_DTO_SET(value) (((value) << 3) & 0x00000008) | |||||||||
Field : Transmit FIFO Data Request - txdr | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_LSB 4 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_MSB 4 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_SET_MSK 0x00000010 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_CLR_MSK 0xffffffef | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_GET(value) (((value) & 0x00000010) >> 4) | |||||||||
#define | ALT_SDMMC_RINTSTS_TXDR_SET(value) (((value) << 4) & 0x00000010) | |||||||||
Field : Receive FIFO Data Request - rxdr | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_LSB 5 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_MSB 5 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_SET_MSK 0x00000020 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_CLR_MSK 0xffffffdf | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_GET(value) (((value) & 0x00000020) >> 5) | |||||||||
#define | ALT_SDMMC_RINTSTS_RXDR_SET(value) (((value) << 5) & 0x00000020) | |||||||||
Field : Response CRC Error - rcrc | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_LSB 6 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_MSB 6 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_SET_MSK 0x00000040 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_CLR_MSK 0xffffffbf | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_GET(value) (((value) & 0x00000040) >> 6) | |||||||||
#define | ALT_SDMMC_RINTSTS_RCRC_SET(value) (((value) << 6) & 0x00000040) | |||||||||
Field : Data CRC Error - dcrc | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_LSB 7 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_MSB 7 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_SET_MSK 0x00000080 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_CLR_MSK 0xffffff7f | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_GET(value) (((value) & 0x00000080) >> 7) | |||||||||
#define | ALT_SDMMC_RINTSTS_DCRC_SET(value) (((value) << 7) & 0x00000080) | |||||||||
Field : Response Timeout Boot Ack Received - bar | |||||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_E_INACT 0x0 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_E_ACT 0x1 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_LSB 8 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_MSB 8 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_WIDTH 1 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_SET_MSK 0x00000100 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_CLR_MSK 0xfffffeff | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_RESET 0x0 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_GET(value) (((value) & 0x00000100) >> 8) | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BAR_SET(value) (((value) << 8) & 0x00000100) | ||||||||||||
Field : Data Read Timeout Boot Data Start - bds | |||||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | |||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_E_INACT 0x0 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_E_ACT 0x1 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_LSB 9 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_MSB 9 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_WIDTH 1 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_SET_MSK 0x00000200 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_CLR_MSK 0xfffffdff | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_RESET 0x0 | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_GET(value) (((value) & 0x00000200) >> 9) | ||||||||||||
#define | ALT_SDMMC_RINTSTS_BDS_SET(value) (((value) << 9) & 0x00000200) | ||||||||||||
Field : Data Starvation Host Timeout Volt Switch_int - hto | ||||||||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_E_INACT 0x0 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_E_ACT 0x1 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_LSB 10 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_MSB 10 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_WIDTH 1 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_SET_MSK 0x00000400 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_CLR_MSK 0xfffffbff | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_RESET 0x0 | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_GET(value) (((value) & 0x00000400) >> 10) | |||||||||||||||
#define | ALT_SDMMC_RINTSTS_HTO_SET(value) (((value) << 10) & 0x00000400) | |||||||||||||||
Field : FIFO Underrun Overrun Error - frun | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_LSB 11 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_MSB 11 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_SET_MSK 0x00000800 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_CLR_MSK 0xfffff7ff | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_GET(value) (((value) & 0x00000800) >> 11) | |||||||||
#define | ALT_SDMMC_RINTSTS_FRUN_SET(value) (((value) << 11) & 0x00000800) | |||||||||
Field : Hardware Locked Write Error - hle | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_HLE_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_LSB 12 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_MSB 12 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_SET_MSK 0x00001000 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_CLR_MSK 0xffffefff | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_GET(value) (((value) & 0x00001000) >> 12) | |||||||||
#define | ALT_SDMMC_RINTSTS_HLE_SET(value) (((value) << 12) & 0x00001000) | |||||||||
Field : Start-bit error (SBE) - sbe | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_SBE_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_LSB 13 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_MSB 13 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_SET_MSK 0x00002000 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_CLR_MSK 0xffffdfff | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_GET(value) (((value) & 0x00002000) >> 13) | |||||||||
#define | ALT_SDMMC_RINTSTS_SBE_SET(value) (((value) << 13) & 0x00002000) | |||||||||
Field : Auto Cmommand Done - acd | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_ACD_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_LSB 14 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_MSB 14 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_SET_MSK 0x00004000 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_CLR_MSK 0xffffbfff | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_GET(value) (((value) & 0x00004000) >> 14) | |||||||||
#define | ALT_SDMMC_RINTSTS_ACD_SET(value) (((value) << 14) & 0x00004000) | |||||||||
Field : End-bit Error - ebe | ||||||||||
Writes to bits clear status bit. Value of 1 clears status bit, and value of 0 leaves bit intact. Bits are logged regardless of interrupt mask status. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_EBE_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_LSB 15 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_MSB 15 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_SET_MSK 0x00008000 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_CLR_MSK 0xffff7fff | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_GET(value) (((value) & 0x00008000) >> 15) | |||||||||
#define | ALT_SDMMC_RINTSTS_EBE_SET(value) (((value) << 15) & 0x00008000) | |||||||||
Field : SDIO Interrupt - sdio_interrupt | ||||||||||
Interrupt from SDIO card. Field Enumeration Values:
Field Access Macros: | ||||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_E_ACT 0x1 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_E_INACT 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_LSB 16 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_MSB 16 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_WIDTH 1 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_SET_MSK 0x00010000 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_CLR_MSK 0xfffeffff | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_RESET 0x0 | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_GET(value) (((value) & 0x00010000) >> 16) | |||||||||
#define | ALT_SDMMC_RINTSTS_SDIO_INT_SET(value) (((value) << 16) & 0x00010000) | |||||||||
Data Structures | |
struct | ALT_SDMMC_RINTSTS_s |
Macros | |
#define | ALT_SDMMC_RINTSTS_OFST 0x44 |
Typedefs | |
typedef struct ALT_SDMMC_RINTSTS_s | ALT_SDMMC_RINTSTS_t |
struct ALT_SDMMC_RINTSTS_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SDMMC_RINTSTS.
Data Fields | ||
---|---|---|
uint32_t | cd: 1 | Card Detect |
uint32_t | re: 1 | Response Error |
uint32_t | cmd: 1 | Command Done |
uint32_t | dto: 1 | Data Transfer Over |
uint32_t | txdr: 1 | Transmit FIFO Data Request |
uint32_t | rxdr: 1 | Receive FIFO Data Request |
uint32_t | rcrc: 1 | Response CRC Error |
uint32_t | dcrc: 1 | Data CRC Error |
uint32_t | bar: 1 | Response Timeout Boot Ack Received |
uint32_t | bds: 1 | Data Read Timeout Boot Data Start |
uint32_t | hto: 1 | Data Starvation Host Timeout Volt Switch_int |
uint32_t | frun: 1 | FIFO Underrun Overrun Error |
uint32_t | hle: 1 | Hardware Locked Write Error |
uint32_t | sbe: 1 | Start-bit error (SBE) |
uint32_t | acd: 1 | Auto Cmommand Done |
uint32_t | ebe: 1 | End-bit Error |
uint32_t | sdio_interrupt: 1 | SDIO Interrupt |
uint32_t | __pad0__: 15 | UNDEFINED |
#define ALT_SDMMC_RINTSTS_CD_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_CD
Card detect (CD)
#define ALT_SDMMC_RINTSTS_CD_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_CD
Clears Card detect (CD)
#define ALT_SDMMC_RINTSTS_CD_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_CD register field.
#define ALT_SDMMC_RINTSTS_CD_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_CD register field.
#define ALT_SDMMC_RINTSTS_CD_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_CD register field.
#define ALT_SDMMC_RINTSTS_CD_SET_MSK 0x00000001 |
The mask used to set the ALT_SDMMC_RINTSTS_CD register field value.
#define ALT_SDMMC_RINTSTS_CD_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SDMMC_RINTSTS_CD register field value.
#define ALT_SDMMC_RINTSTS_CD_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_CD register field.
#define ALT_SDMMC_RINTSTS_CD_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SDMMC_RINTSTS_CD field value from a register.
#define ALT_SDMMC_RINTSTS_CD_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SDMMC_RINTSTS_CD register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_RE_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_RE
Response error (RE)
#define ALT_SDMMC_RINTSTS_RE_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_RE
Clears Response error (RE)
#define ALT_SDMMC_RINTSTS_RE_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_RE register field.
#define ALT_SDMMC_RINTSTS_RE_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_RE register field.
#define ALT_SDMMC_RINTSTS_RE_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_RE register field.
#define ALT_SDMMC_RINTSTS_RE_SET_MSK 0x00000002 |
The mask used to set the ALT_SDMMC_RINTSTS_RE register field value.
#define ALT_SDMMC_RINTSTS_RE_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_SDMMC_RINTSTS_RE register field value.
#define ALT_SDMMC_RINTSTS_RE_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_RE register field.
#define ALT_SDMMC_RINTSTS_RE_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_SDMMC_RINTSTS_RE field value from a register.
#define ALT_SDMMC_RINTSTS_RE_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_SDMMC_RINTSTS_RE register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_CMD_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_CMD
Command done (CD)
#define ALT_SDMMC_RINTSTS_CMD_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_CMD
Clears Command done (CD)
#define ALT_SDMMC_RINTSTS_CMD_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_CMD register field.
#define ALT_SDMMC_RINTSTS_CMD_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_CMD register field.
#define ALT_SDMMC_RINTSTS_CMD_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_CMD register field.
#define ALT_SDMMC_RINTSTS_CMD_SET_MSK 0x00000004 |
The mask used to set the ALT_SDMMC_RINTSTS_CMD register field value.
#define ALT_SDMMC_RINTSTS_CMD_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_SDMMC_RINTSTS_CMD register field value.
#define ALT_SDMMC_RINTSTS_CMD_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_CMD register field.
#define ALT_SDMMC_RINTSTS_CMD_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_SDMMC_RINTSTS_CMD field value from a register.
#define ALT_SDMMC_RINTSTS_CMD_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_SDMMC_RINTSTS_CMD register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_DTO_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_DTO
Data transfer over (DTO)
#define ALT_SDMMC_RINTSTS_DTO_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_DTO
Clears Data transfer over (DTO)
#define ALT_SDMMC_RINTSTS_DTO_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_DTO register field.
#define ALT_SDMMC_RINTSTS_DTO_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_DTO register field.
#define ALT_SDMMC_RINTSTS_DTO_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_DTO register field.
#define ALT_SDMMC_RINTSTS_DTO_SET_MSK 0x00000008 |
The mask used to set the ALT_SDMMC_RINTSTS_DTO register field value.
#define ALT_SDMMC_RINTSTS_DTO_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_SDMMC_RINTSTS_DTO register field value.
#define ALT_SDMMC_RINTSTS_DTO_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_DTO register field.
#define ALT_SDMMC_RINTSTS_DTO_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_SDMMC_RINTSTS_DTO field value from a register.
#define ALT_SDMMC_RINTSTS_DTO_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_SDMMC_RINTSTS_DTO register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_TXDR_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_TXDR
Transmit FIFO data request (TXDR)
#define ALT_SDMMC_RINTSTS_TXDR_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_TXDR
Clears Transmit FIFO data request (TXDR)
#define ALT_SDMMC_RINTSTS_TXDR_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_TXDR register field.
#define ALT_SDMMC_RINTSTS_TXDR_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_TXDR register field.
#define ALT_SDMMC_RINTSTS_TXDR_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_TXDR register field.
#define ALT_SDMMC_RINTSTS_TXDR_SET_MSK 0x00000010 |
The mask used to set the ALT_SDMMC_RINTSTS_TXDR register field value.
#define ALT_SDMMC_RINTSTS_TXDR_CLR_MSK 0xffffffef |
The mask used to clear the ALT_SDMMC_RINTSTS_TXDR register field value.
#define ALT_SDMMC_RINTSTS_TXDR_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_TXDR register field.
#define ALT_SDMMC_RINTSTS_TXDR_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_SDMMC_RINTSTS_TXDR field value from a register.
#define ALT_SDMMC_RINTSTS_TXDR_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_SDMMC_RINTSTS_TXDR register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_RXDR_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_RXDR
Receive FIFO data request (RXDR)
#define ALT_SDMMC_RINTSTS_RXDR_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_RXDR
Clears Receive FIFO data request (RXDR)
#define ALT_SDMMC_RINTSTS_RXDR_LSB 5 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_RXDR register field.
#define ALT_SDMMC_RINTSTS_RXDR_MSB 5 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_RXDR register field.
#define ALT_SDMMC_RINTSTS_RXDR_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_RXDR register field.
#define ALT_SDMMC_RINTSTS_RXDR_SET_MSK 0x00000020 |
The mask used to set the ALT_SDMMC_RINTSTS_RXDR register field value.
#define ALT_SDMMC_RINTSTS_RXDR_CLR_MSK 0xffffffdf |
The mask used to clear the ALT_SDMMC_RINTSTS_RXDR register field value.
#define ALT_SDMMC_RINTSTS_RXDR_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_RXDR register field.
#define ALT_SDMMC_RINTSTS_RXDR_GET | ( | value | ) | (((value) & 0x00000020) >> 5) |
Extracts the ALT_SDMMC_RINTSTS_RXDR field value from a register.
#define ALT_SDMMC_RINTSTS_RXDR_SET | ( | value | ) | (((value) << 5) & 0x00000020) |
Produces a ALT_SDMMC_RINTSTS_RXDR register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_RCRC_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_RCRC
Response CRC error (RCRC)
#define ALT_SDMMC_RINTSTS_RCRC_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_RCRC
Clears Response CRC error (RCRC)
#define ALT_SDMMC_RINTSTS_RCRC_LSB 6 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_RCRC register field.
#define ALT_SDMMC_RINTSTS_RCRC_MSB 6 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_RCRC register field.
#define ALT_SDMMC_RINTSTS_RCRC_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_RCRC register field.
#define ALT_SDMMC_RINTSTS_RCRC_SET_MSK 0x00000040 |
The mask used to set the ALT_SDMMC_RINTSTS_RCRC register field value.
#define ALT_SDMMC_RINTSTS_RCRC_CLR_MSK 0xffffffbf |
The mask used to clear the ALT_SDMMC_RINTSTS_RCRC register field value.
#define ALT_SDMMC_RINTSTS_RCRC_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_RCRC register field.
#define ALT_SDMMC_RINTSTS_RCRC_GET | ( | value | ) | (((value) & 0x00000040) >> 6) |
Extracts the ALT_SDMMC_RINTSTS_RCRC field value from a register.
#define ALT_SDMMC_RINTSTS_RCRC_SET | ( | value | ) | (((value) << 6) & 0x00000040) |
Produces a ALT_SDMMC_RINTSTS_RCRC register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_DCRC_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_DCRC
Data CRC error (DCRC)
#define ALT_SDMMC_RINTSTS_DCRC_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_DCRC
Clears Data CRC error (DCRC)
#define ALT_SDMMC_RINTSTS_DCRC_LSB 7 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_DCRC register field.
#define ALT_SDMMC_RINTSTS_DCRC_MSB 7 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_DCRC register field.
#define ALT_SDMMC_RINTSTS_DCRC_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_DCRC register field.
#define ALT_SDMMC_RINTSTS_DCRC_SET_MSK 0x00000080 |
The mask used to set the ALT_SDMMC_RINTSTS_DCRC register field value.
#define ALT_SDMMC_RINTSTS_DCRC_CLR_MSK 0xffffff7f |
The mask used to clear the ALT_SDMMC_RINTSTS_DCRC register field value.
#define ALT_SDMMC_RINTSTS_DCRC_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_DCRC register field.
#define ALT_SDMMC_RINTSTS_DCRC_GET | ( | value | ) | (((value) & 0x00000080) >> 7) |
Extracts the ALT_SDMMC_RINTSTS_DCRC field value from a register.
#define ALT_SDMMC_RINTSTS_DCRC_SET | ( | value | ) | (((value) << 7) & 0x00000080) |
Produces a ALT_SDMMC_RINTSTS_DCRC register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_BAR_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_BAR
Response timeout (RTO)/Boot Ack Received (BAR)
#define ALT_SDMMC_RINTSTS_BAR_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_BAR
Clears Response timeout (RTO)/Boot Ack Received (BAR)
#define ALT_SDMMC_RINTSTS_BAR_LSB 8 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_BAR register field.
#define ALT_SDMMC_RINTSTS_BAR_MSB 8 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_BAR register field.
#define ALT_SDMMC_RINTSTS_BAR_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_BAR register field.
#define ALT_SDMMC_RINTSTS_BAR_SET_MSK 0x00000100 |
The mask used to set the ALT_SDMMC_RINTSTS_BAR register field value.
#define ALT_SDMMC_RINTSTS_BAR_CLR_MSK 0xfffffeff |
The mask used to clear the ALT_SDMMC_RINTSTS_BAR register field value.
#define ALT_SDMMC_RINTSTS_BAR_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_BAR register field.
#define ALT_SDMMC_RINTSTS_BAR_GET | ( | value | ) | (((value) & 0x00000100) >> 8) |
Extracts the ALT_SDMMC_RINTSTS_BAR field value from a register.
#define ALT_SDMMC_RINTSTS_BAR_SET | ( | value | ) | (((value) << 8) & 0x00000100) |
Produces a ALT_SDMMC_RINTSTS_BAR register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_BDS_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_BDS
Data read timeout (DRTO)/Boot Data Start (BDS)
#define ALT_SDMMC_RINTSTS_BDS_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_BDS
Clears Data read timeout (DRTO)/Boot Data Start (BDS)
#define ALT_SDMMC_RINTSTS_BDS_LSB 9 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_BDS register field.
#define ALT_SDMMC_RINTSTS_BDS_MSB 9 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_BDS register field.
#define ALT_SDMMC_RINTSTS_BDS_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_BDS register field.
#define ALT_SDMMC_RINTSTS_BDS_SET_MSK 0x00000200 |
The mask used to set the ALT_SDMMC_RINTSTS_BDS register field value.
#define ALT_SDMMC_RINTSTS_BDS_CLR_MSK 0xfffffdff |
The mask used to clear the ALT_SDMMC_RINTSTS_BDS register field value.
#define ALT_SDMMC_RINTSTS_BDS_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_BDS register field.
#define ALT_SDMMC_RINTSTS_BDS_GET | ( | value | ) | (((value) & 0x00000200) >> 9) |
Extracts the ALT_SDMMC_RINTSTS_BDS field value from a register.
#define ALT_SDMMC_RINTSTS_BDS_SET | ( | value | ) | (((value) << 9) & 0x00000200) |
Produces a ALT_SDMMC_RINTSTS_BDS register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_HTO_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_HTO
Data starvation-by-host timeout (HTO) /Volt_switch_int
#define ALT_SDMMC_RINTSTS_HTO_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_HTO
Clears Data starvation-by-host timeout (HTO) /Volt_switch_int
#define ALT_SDMMC_RINTSTS_HTO_LSB 10 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_HTO register field.
#define ALT_SDMMC_RINTSTS_HTO_MSB 10 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_HTO register field.
#define ALT_SDMMC_RINTSTS_HTO_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_HTO register field.
#define ALT_SDMMC_RINTSTS_HTO_SET_MSK 0x00000400 |
The mask used to set the ALT_SDMMC_RINTSTS_HTO register field value.
#define ALT_SDMMC_RINTSTS_HTO_CLR_MSK 0xfffffbff |
The mask used to clear the ALT_SDMMC_RINTSTS_HTO register field value.
#define ALT_SDMMC_RINTSTS_HTO_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_HTO register field.
#define ALT_SDMMC_RINTSTS_HTO_GET | ( | value | ) | (((value) & 0x00000400) >> 10) |
Extracts the ALT_SDMMC_RINTSTS_HTO field value from a register.
#define ALT_SDMMC_RINTSTS_HTO_SET | ( | value | ) | (((value) << 10) & 0x00000400) |
Produces a ALT_SDMMC_RINTSTS_HTO register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_FRUN_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_FRUN
FIFO underrun/overrun error (FRUN)
#define ALT_SDMMC_RINTSTS_FRUN_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_FRUN
Clear FIFO underrun/overrun error (FRUN)
#define ALT_SDMMC_RINTSTS_FRUN_LSB 11 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_FRUN register field.
#define ALT_SDMMC_RINTSTS_FRUN_MSB 11 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_FRUN register field.
#define ALT_SDMMC_RINTSTS_FRUN_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_FRUN register field.
#define ALT_SDMMC_RINTSTS_FRUN_SET_MSK 0x00000800 |
The mask used to set the ALT_SDMMC_RINTSTS_FRUN register field value.
#define ALT_SDMMC_RINTSTS_FRUN_CLR_MSK 0xfffff7ff |
The mask used to clear the ALT_SDMMC_RINTSTS_FRUN register field value.
#define ALT_SDMMC_RINTSTS_FRUN_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_FRUN register field.
#define ALT_SDMMC_RINTSTS_FRUN_GET | ( | value | ) | (((value) & 0x00000800) >> 11) |
Extracts the ALT_SDMMC_RINTSTS_FRUN field value from a register.
#define ALT_SDMMC_RINTSTS_FRUN_SET | ( | value | ) | (((value) << 11) & 0x00000800) |
Produces a ALT_SDMMC_RINTSTS_FRUN register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_HLE_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_HLE
Hardware locked write error (HLE)
#define ALT_SDMMC_RINTSTS_HLE_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_HLE
Clears Hardware locked write error (HLE)
#define ALT_SDMMC_RINTSTS_HLE_LSB 12 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_HLE register field.
#define ALT_SDMMC_RINTSTS_HLE_MSB 12 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_HLE register field.
#define ALT_SDMMC_RINTSTS_HLE_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_HLE register field.
#define ALT_SDMMC_RINTSTS_HLE_SET_MSK 0x00001000 |
The mask used to set the ALT_SDMMC_RINTSTS_HLE register field value.
#define ALT_SDMMC_RINTSTS_HLE_CLR_MSK 0xffffefff |
The mask used to clear the ALT_SDMMC_RINTSTS_HLE register field value.
#define ALT_SDMMC_RINTSTS_HLE_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_HLE register field.
#define ALT_SDMMC_RINTSTS_HLE_GET | ( | value | ) | (((value) & 0x00001000) >> 12) |
Extracts the ALT_SDMMC_RINTSTS_HLE field value from a register.
#define ALT_SDMMC_RINTSTS_HLE_SET | ( | value | ) | (((value) << 12) & 0x00001000) |
Produces a ALT_SDMMC_RINTSTS_HLE register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_SBE_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_SBE
Start-bit error (SBE)
#define ALT_SDMMC_RINTSTS_SBE_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_SBE
Clears Start-bit error (SBE)
#define ALT_SDMMC_RINTSTS_SBE_LSB 13 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_SBE register field.
#define ALT_SDMMC_RINTSTS_SBE_MSB 13 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_SBE register field.
#define ALT_SDMMC_RINTSTS_SBE_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_SBE register field.
#define ALT_SDMMC_RINTSTS_SBE_SET_MSK 0x00002000 |
The mask used to set the ALT_SDMMC_RINTSTS_SBE register field value.
#define ALT_SDMMC_RINTSTS_SBE_CLR_MSK 0xffffdfff |
The mask used to clear the ALT_SDMMC_RINTSTS_SBE register field value.
#define ALT_SDMMC_RINTSTS_SBE_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_SBE register field.
#define ALT_SDMMC_RINTSTS_SBE_GET | ( | value | ) | (((value) & 0x00002000) >> 13) |
Extracts the ALT_SDMMC_RINTSTS_SBE field value from a register.
#define ALT_SDMMC_RINTSTS_SBE_SET | ( | value | ) | (((value) << 13) & 0x00002000) |
Produces a ALT_SDMMC_RINTSTS_SBE register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_ACD_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_ACD
Auto command done (ACD)
#define ALT_SDMMC_RINTSTS_ACD_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_ACD
Clear Auto command done (ACD
#define ALT_SDMMC_RINTSTS_ACD_LSB 14 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_ACD register field.
#define ALT_SDMMC_RINTSTS_ACD_MSB 14 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_ACD register field.
#define ALT_SDMMC_RINTSTS_ACD_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_ACD register field.
#define ALT_SDMMC_RINTSTS_ACD_SET_MSK 0x00004000 |
The mask used to set the ALT_SDMMC_RINTSTS_ACD register field value.
#define ALT_SDMMC_RINTSTS_ACD_CLR_MSK 0xffffbfff |
The mask used to clear the ALT_SDMMC_RINTSTS_ACD register field value.
#define ALT_SDMMC_RINTSTS_ACD_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_ACD register field.
#define ALT_SDMMC_RINTSTS_ACD_GET | ( | value | ) | (((value) & 0x00004000) >> 14) |
Extracts the ALT_SDMMC_RINTSTS_ACD field value from a register.
#define ALT_SDMMC_RINTSTS_ACD_SET | ( | value | ) | (((value) << 14) & 0x00004000) |
Produces a ALT_SDMMC_RINTSTS_ACD register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_EBE_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_EBE
End-bit error (read)/write no CRC (EBE)
#define ALT_SDMMC_RINTSTS_EBE_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_EBE
Clears End-bit error (read)/write no CRC (EBE)
#define ALT_SDMMC_RINTSTS_EBE_LSB 15 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_EBE register field.
#define ALT_SDMMC_RINTSTS_EBE_MSB 15 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_EBE register field.
#define ALT_SDMMC_RINTSTS_EBE_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_EBE register field.
#define ALT_SDMMC_RINTSTS_EBE_SET_MSK 0x00008000 |
The mask used to set the ALT_SDMMC_RINTSTS_EBE register field value.
#define ALT_SDMMC_RINTSTS_EBE_CLR_MSK 0xffff7fff |
The mask used to clear the ALT_SDMMC_RINTSTS_EBE register field value.
#define ALT_SDMMC_RINTSTS_EBE_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_EBE register field.
#define ALT_SDMMC_RINTSTS_EBE_GET | ( | value | ) | (((value) & 0x00008000) >> 15) |
Extracts the ALT_SDMMC_RINTSTS_EBE field value from a register.
#define ALT_SDMMC_RINTSTS_EBE_SET | ( | value | ) | (((value) << 15) & 0x00008000) |
Produces a ALT_SDMMC_RINTSTS_EBE register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_SDIO_INT_E_ACT 0x1 |
Enumerated value for register field ALT_SDMMC_RINTSTS_SDIO_INT
SDIO interrupt from card bit
#define ALT_SDMMC_RINTSTS_SDIO_INT_E_INACT 0x0 |
Enumerated value for register field ALT_SDMMC_RINTSTS_SDIO_INT
No SDIO interrupt from card bi
#define ALT_SDMMC_RINTSTS_SDIO_INT_LSB 16 |
The Least Significant Bit (LSB) position of the ALT_SDMMC_RINTSTS_SDIO_INT register field.
#define ALT_SDMMC_RINTSTS_SDIO_INT_MSB 16 |
The Most Significant Bit (MSB) position of the ALT_SDMMC_RINTSTS_SDIO_INT register field.
#define ALT_SDMMC_RINTSTS_SDIO_INT_WIDTH 1 |
The width in bits of the ALT_SDMMC_RINTSTS_SDIO_INT register field.
#define ALT_SDMMC_RINTSTS_SDIO_INT_SET_MSK 0x00010000 |
The mask used to set the ALT_SDMMC_RINTSTS_SDIO_INT register field value.
#define ALT_SDMMC_RINTSTS_SDIO_INT_CLR_MSK 0xfffeffff |
The mask used to clear the ALT_SDMMC_RINTSTS_SDIO_INT register field value.
#define ALT_SDMMC_RINTSTS_SDIO_INT_RESET 0x0 |
The reset value of the ALT_SDMMC_RINTSTS_SDIO_INT register field.
#define ALT_SDMMC_RINTSTS_SDIO_INT_GET | ( | value | ) | (((value) & 0x00010000) >> 16) |
Extracts the ALT_SDMMC_RINTSTS_SDIO_INT field value from a register.
#define ALT_SDMMC_RINTSTS_SDIO_INT_SET | ( | value | ) | (((value) << 16) & 0x00010000) |
Produces a ALT_SDMMC_RINTSTS_SDIO_INT register field value suitable for setting the register.
#define ALT_SDMMC_RINTSTS_OFST 0x44 |
The byte offset of the ALT_SDMMC_RINTSTS register from the beginning of the component.
typedef struct ALT_SDMMC_RINTSTS_s ALT_SDMMC_RINTSTS_t |
The typedef declaration for register ALT_SDMMC_RINTSTS.