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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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This register provides the status of the calibration and ECC logic.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[0] | RW | Unknown | PHY Calibration Successful |
[1] | RW | Unknown | PHY Calibration Failed |
[2] | RW | Unknown | Single Bit Error Seen |
[3] | RW | Unknown | Double Bit Error Seen |
[4] | RW | Unknown | ECC Auto-Correction Dropped |
[31:5] | ??? | 0x0 | UNDEFINED |
Field : PHY Calibration Successful - calsuccess | |
This bit will be set to 1 if the PHY was able to successfully calibrate. Field Access Macros: | |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_LSB 0 |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_MSB 0 |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_WIDTH 1 |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_SET_MSK 0x00000001 |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_CLR_MSK 0xfffffffe |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_RESET 0x0 |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_GET(value) (((value) & 0x00000001) >> 0) |
#define | ALT_SDR_CTL_DRAMSTS_CALSUCCESS_SET(value) (((value) << 0) & 0x00000001) |
Field : PHY Calibration Failed - calfail | |
This bit will be set to 1 if the PHY was unable to calibrate. Field Access Macros: | |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_LSB 1 |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_MSB 1 |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_WIDTH 1 |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_SET_MSK 0x00000002 |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_CLR_MSK 0xfffffffd |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_RESET 0x0 |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_GET(value) (((value) & 0x00000002) >> 1) |
#define | ALT_SDR_CTL_DRAMSTS_CALFAIL_SET(value) (((value) << 1) & 0x00000002) |
Field : Single Bit Error Seen - sbeerr | |
This bit will be set to 1 if there have been any ECC single bit errors detected. Field Access Macros: | |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_LSB 2 |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_MSB 2 |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_WIDTH 1 |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_SET_MSK 0x00000004 |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_CLR_MSK 0xfffffffb |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_RESET 0x0 |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_GET(value) (((value) & 0x00000004) >> 2) |
#define | ALT_SDR_CTL_DRAMSTS_SBEERR_SET(value) (((value) << 2) & 0x00000004) |
Field : Double Bit Error Seen - dbeerr | |
This bit will be set to 1 if there have been any ECC double bit errors detected. Field Access Macros: | |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_LSB 3 |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_MSB 3 |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_WIDTH 1 |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_SET_MSK 0x00000008 |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_CLR_MSK 0xfffffff7 |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_RESET 0x0 |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_GET(value) (((value) & 0x00000008) >> 3) |
#define | ALT_SDR_CTL_DRAMSTS_DBEERR_SET(value) (((value) << 3) & 0x00000008) |
Field : ECC Auto-Correction Dropped - corrdrop | |
This bit will be set to 1 if there any auto-corrections have been dropped. Field Access Macros: | |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_LSB 4 |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_MSB 4 |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_WIDTH 1 |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_SET_MSK 0x00000010 |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_CLR_MSK 0xffffffef |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_RESET 0x0 |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_GET(value) (((value) & 0x00000010) >> 4) |
#define | ALT_SDR_CTL_DRAMSTS_CORRDROP_SET(value) (((value) << 4) & 0x00000010) |
Data Structures | |
struct | ALT_SDR_CTL_DRAMSTS_s |
Macros | |
#define | ALT_SDR_CTL_DRAMSTS_OFST 0x38 |
Typedefs | |
typedef struct ALT_SDR_CTL_DRAMSTS_s | ALT_SDR_CTL_DRAMSTS_t |
struct ALT_SDR_CTL_DRAMSTS_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_SDR_CTL_DRAMSTS.
Data Fields | ||
---|---|---|
uint32_t | calsuccess: 1 | PHY Calibration Successful |
uint32_t | calfail: 1 | PHY Calibration Failed |
uint32_t | sbeerr: 1 | Single Bit Error Seen |
uint32_t | dbeerr: 1 | Double Bit Error Seen |
uint32_t | corrdrop: 1 | ECC Auto-Correction Dropped |
uint32_t | __pad0__: 27 | UNDEFINED |
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_MSB 0 |
The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_WIDTH 1 |
The width in bits of the ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_SET_MSK 0x00000001 |
The mask used to set the ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field value.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_CLR_MSK 0xfffffffe |
The mask used to clear the ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field value.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_RESET 0x0 |
The reset value of the ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field is UNKNOWN.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_GET | ( | value | ) | (((value) & 0x00000001) >> 0) |
Extracts the ALT_SDR_CTL_DRAMSTS_CALSUCCESS field value from a register.
#define ALT_SDR_CTL_DRAMSTS_CALSUCCESS_SET | ( | value | ) | (((value) << 0) & 0x00000001) |
Produces a ALT_SDR_CTL_DRAMSTS_CALSUCCESS register field value suitable for setting the register.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_LSB 1 |
The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMSTS_CALFAIL register field.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_MSB 1 |
The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMSTS_CALFAIL register field.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_WIDTH 1 |
The width in bits of the ALT_SDR_CTL_DRAMSTS_CALFAIL register field.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_SET_MSK 0x00000002 |
The mask used to set the ALT_SDR_CTL_DRAMSTS_CALFAIL register field value.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_CLR_MSK 0xfffffffd |
The mask used to clear the ALT_SDR_CTL_DRAMSTS_CALFAIL register field value.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_RESET 0x0 |
The reset value of the ALT_SDR_CTL_DRAMSTS_CALFAIL register field is UNKNOWN.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_GET | ( | value | ) | (((value) & 0x00000002) >> 1) |
Extracts the ALT_SDR_CTL_DRAMSTS_CALFAIL field value from a register.
#define ALT_SDR_CTL_DRAMSTS_CALFAIL_SET | ( | value | ) | (((value) << 1) & 0x00000002) |
Produces a ALT_SDR_CTL_DRAMSTS_CALFAIL register field value suitable for setting the register.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_LSB 2 |
The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMSTS_SBEERR register field.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_MSB 2 |
The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMSTS_SBEERR register field.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_WIDTH 1 |
The width in bits of the ALT_SDR_CTL_DRAMSTS_SBEERR register field.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_SET_MSK 0x00000004 |
The mask used to set the ALT_SDR_CTL_DRAMSTS_SBEERR register field value.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_CLR_MSK 0xfffffffb |
The mask used to clear the ALT_SDR_CTL_DRAMSTS_SBEERR register field value.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_RESET 0x0 |
The reset value of the ALT_SDR_CTL_DRAMSTS_SBEERR register field is UNKNOWN.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_GET | ( | value | ) | (((value) & 0x00000004) >> 2) |
Extracts the ALT_SDR_CTL_DRAMSTS_SBEERR field value from a register.
#define ALT_SDR_CTL_DRAMSTS_SBEERR_SET | ( | value | ) | (((value) << 2) & 0x00000004) |
Produces a ALT_SDR_CTL_DRAMSTS_SBEERR register field value suitable for setting the register.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_LSB 3 |
The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMSTS_DBEERR register field.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_MSB 3 |
The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMSTS_DBEERR register field.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_WIDTH 1 |
The width in bits of the ALT_SDR_CTL_DRAMSTS_DBEERR register field.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_SET_MSK 0x00000008 |
The mask used to set the ALT_SDR_CTL_DRAMSTS_DBEERR register field value.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_CLR_MSK 0xfffffff7 |
The mask used to clear the ALT_SDR_CTL_DRAMSTS_DBEERR register field value.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_RESET 0x0 |
The reset value of the ALT_SDR_CTL_DRAMSTS_DBEERR register field is UNKNOWN.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_GET | ( | value | ) | (((value) & 0x00000008) >> 3) |
Extracts the ALT_SDR_CTL_DRAMSTS_DBEERR field value from a register.
#define ALT_SDR_CTL_DRAMSTS_DBEERR_SET | ( | value | ) | (((value) << 3) & 0x00000008) |
Produces a ALT_SDR_CTL_DRAMSTS_DBEERR register field value suitable for setting the register.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_LSB 4 |
The Least Significant Bit (LSB) position of the ALT_SDR_CTL_DRAMSTS_CORRDROP register field.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_SDR_CTL_DRAMSTS_CORRDROP register field.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_WIDTH 1 |
The width in bits of the ALT_SDR_CTL_DRAMSTS_CORRDROP register field.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_SET_MSK 0x00000010 |
The mask used to set the ALT_SDR_CTL_DRAMSTS_CORRDROP register field value.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_CLR_MSK 0xffffffef |
The mask used to clear the ALT_SDR_CTL_DRAMSTS_CORRDROP register field value.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_RESET 0x0 |
The reset value of the ALT_SDR_CTL_DRAMSTS_CORRDROP register field is UNKNOWN.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_GET | ( | value | ) | (((value) & 0x00000010) >> 4) |
Extracts the ALT_SDR_CTL_DRAMSTS_CORRDROP field value from a register.
#define ALT_SDR_CTL_DRAMSTS_CORRDROP_SET | ( | value | ) | (((value) << 4) & 0x00000010) |
Produces a ALT_SDR_CTL_DRAMSTS_CORRDROP register field value suitable for setting the register.
#define ALT_SDR_CTL_DRAMSTS_OFST 0x38 |
The byte offset of the ALT_SDR_CTL_DRAMSTS register from the beginning of the component.
typedef struct ALT_SDR_CTL_DRAMSTS_s ALT_SDR_CTL_DRAMSTS_t |
The typedef declaration for register ALT_SDR_CTL_DRAMSTS.