Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register Group : Master Register Group - ALT_L3_MSTGRP

Description

Master Register Group

Registers associated with master interfaces in the L3 Interconnect. Note that a master in the L3 Interconnect connects to a slave in a module.

Members

 Register Group : L4 MAIN - ALT_L3_MST_L4MAIN
 
 Register Group : L4 SP - ALT_L3_MST_L4SP
 
 Register Group : L4 MP - ALT_L3_MST_L4MP
 
 Register Group : L4 OSC1 - ALT_L3_MST_L4OSC1
 
 Register Group : L4 SPIM - ALT_L3_MST_L4SPIM
 
 Register Group : STM - ALT_L3_MST_STM
 
 Register Group : LWHPS2FPGA - ALT_L3_MST_LWH2F
 
 Register Group : USB1 - ALT_L3_MST_USB1
 
 Register Group : NANDDATA - ALT_L3_MST_NANDDATA
 
 Register Group : USB0 - ALT_L3_MST_USB0
 
 Register Group : NANDREGS - ALT_L3_MST_NAND
 
 Register Group : QSPIDATA - ALT_L3_MST_QSPIDATA
 
 Register Group : FPGAMGRDATA - ALT_L3_MST_FPGAMGRDATA
 
 Register Group : HPS2FPGA - ALT_L3_MST_H2F
 
 Register Group : ACP - ALT_L3_MST_ACP
 
 Register Group : Boot ROM - ALT_L3_MST_ROM
 
 Register Group : On-chip RAM - ALT_L3_MST_OCRAM
 

Data Structures

struct  ALT_L3_MSTGRP_s
 
struct  ALT_L3_MSTGRP_raw_s
 

Typedefs

typedef struct ALT_L3_MSTGRP_s ALT_L3_MSTGRP_t
 
typedef struct ALT_L3_MSTGRP_raw_s ALT_L3_MSTGRP_raw_t
 

Data Structure Documentation

struct ALT_L3_MSTGRP_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register group ALT_L3_MSTGRP.

Data Fields
volatile ALT_L3_MST_L4MAIN_t mastergrp_l4main ALT_L3_MST_L4MAIN
volatile uint32_t _pad_0xc_0xfff UNDEFINED
volatile ALT_L3_MST_L4SP_t mastergrp_l4sp ALT_L3_MST_L4SP
volatile uint32_t _pad_0x100c_0x1fff UNDEFINED
volatile ALT_L3_MST_L4MP_t mastergrp_l4mp ALT_L3_MST_L4MP
volatile uint32_t _pad_0x200c_0x2fff UNDEFINED
volatile ALT_L3_MST_L4OSC1_t mastergrp_l4osc1 ALT_L3_MST_L4OSC1
volatile uint32_t _pad_0x300c_0x3fff UNDEFINED
volatile ALT_L3_MST_L4SPIM_t mastergrp_l4spim ALT_L3_MST_L4SPIM
volatile uint32_t _pad_0x400c_0x4fff UNDEFINED
volatile ALT_L3_MST_STM_t mastergrp_stm ALT_L3_MST_STM
volatile uint32_t _pad_0x510c_0x5fff UNDEFINED
volatile ALT_L3_MST_LWH2F_t mastergrp_lwhps2fpga ALT_L3_MST_LWH2F
volatile uint32_t _pad_0x610c_0x7fff UNDEFINED
volatile ALT_L3_MST_USB1_t mastergrp_usb1 ALT_L3_MST_USB1
volatile uint32_t _pad_0x8048_0x8fff UNDEFINED
volatile ALT_L3_MST_NANDDATA_t mastergrp_nanddata ALT_L3_MST_NANDDATA
volatile uint32_t _pad_0x910c_0x1dfff UNDEFINED
volatile ALT_L3_MST_USB0_t mastergrp_usb0 ALT_L3_MST_USB0
volatile uint32_t _pad_0x1e048_0x1efff UNDEFINED
volatile ALT_L3_MST_NAND_t mastergrp_nandregs ALT_L3_MST_NAND
volatile uint32_t _pad_0x1f10c_0x1ffff UNDEFINED
volatile ALT_L3_MST_QSPIDATA_t mastergrp_qspidata ALT_L3_MST_QSPIDATA
volatile uint32_t _pad_0x20048_0x20fff UNDEFINED
volatile ALT_L3_MST_FPGAMGRDATA_t mastergrp_fpgamgrdata ALT_L3_MST_FPGAMGRDATA
volatile uint32_t _pad_0x2110c_0x21fff UNDEFINED
volatile ALT_L3_MST_H2F_t mastergrp_hps2fpga ALT_L3_MST_H2F
volatile uint32_t _pad_0x2210c_0x22fff UNDEFINED
volatile ALT_L3_MST_ACP_t mastergrp_acp ALT_L3_MST_ACP
volatile uint32_t _pad_0x2310c_0x23fff UNDEFINED
volatile ALT_L3_MST_ROM_t mastergrp_rom ALT_L3_MST_ROM
volatile uint32_t _pad_0x2410c_0x24fff UNDEFINED
volatile ALT_L3_MST_OCRAM_t mastergrp_ocram ALT_L3_MST_OCRAM
struct ALT_L3_MSTGRP_raw_s

The struct declaration for the raw register contents of register group ALT_L3_MSTGRP.

Data Fields
volatile ALT_L3_MST_L4MAIN_raw_t mastergrp_l4main ALT_L3_MST_L4MAIN
volatile uint32_t _pad_0xc_0xfff UNDEFINED
volatile ALT_L3_MST_L4SP_raw_t mastergrp_l4sp ALT_L3_MST_L4SP
volatile uint32_t _pad_0x100c_0x1fff UNDEFINED
volatile ALT_L3_MST_L4MP_raw_t mastergrp_l4mp ALT_L3_MST_L4MP
volatile uint32_t _pad_0x200c_0x2fff UNDEFINED
volatile ALT_L3_MST_L4OSC1_raw_t mastergrp_l4osc1 ALT_L3_MST_L4OSC1
volatile uint32_t _pad_0x300c_0x3fff UNDEFINED
volatile ALT_L3_MST_L4SPIM_raw_t mastergrp_l4spim ALT_L3_MST_L4SPIM
volatile uint32_t _pad_0x400c_0x4fff UNDEFINED
volatile ALT_L3_MST_STM_raw_t mastergrp_stm ALT_L3_MST_STM
volatile uint32_t _pad_0x510c_0x5fff UNDEFINED
volatile ALT_L3_MST_LWH2F_raw_t mastergrp_lwhps2fpga ALT_L3_MST_LWH2F
volatile uint32_t _pad_0x610c_0x7fff UNDEFINED
volatile ALT_L3_MST_USB1_raw_t mastergrp_usb1 ALT_L3_MST_USB1
volatile uint32_t _pad_0x8048_0x8fff UNDEFINED
volatile ALT_L3_MST_NANDDATA_raw_t mastergrp_nanddata ALT_L3_MST_NANDDATA
volatile uint32_t _pad_0x910c_0x1dfff UNDEFINED
volatile ALT_L3_MST_USB0_raw_t mastergrp_usb0 ALT_L3_MST_USB0
volatile uint32_t _pad_0x1e048_0x1efff UNDEFINED
volatile ALT_L3_MST_NAND_raw_t mastergrp_nandregs ALT_L3_MST_NAND
volatile uint32_t _pad_0x1f10c_0x1ffff UNDEFINED
volatile ALT_L3_MST_QSPIDATA_raw_t mastergrp_qspidata ALT_L3_MST_QSPIDATA
volatile uint32_t _pad_0x20048_0x20fff UNDEFINED
volatile
ALT_L3_MST_FPGAMGRDATA_raw_t
mastergrp_fpgamgrdata ALT_L3_MST_FPGAMGRDATA
volatile uint32_t _pad_0x2110c_0x21fff UNDEFINED
volatile ALT_L3_MST_H2F_raw_t mastergrp_hps2fpga ALT_L3_MST_H2F
volatile uint32_t _pad_0x2210c_0x22fff UNDEFINED
volatile ALT_L3_MST_ACP_raw_t mastergrp_acp ALT_L3_MST_ACP
volatile uint32_t _pad_0x2310c_0x23fff UNDEFINED
volatile ALT_L3_MST_ROM_raw_t mastergrp_rom ALT_L3_MST_ROM
volatile uint32_t _pad_0x2410c_0x24fff UNDEFINED
volatile ALT_L3_MST_OCRAM_raw_t mastergrp_ocram ALT_L3_MST_OCRAM

Typedef Documentation

The typedef declaration for register group ALT_L3_MSTGRP.

The typedef declaration for the raw register contents of register group ALT_L3_MSTGRP.