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Altera SoCAL
16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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ddr configuration definition.
Register Layout
Bits | Access | Reset | Description |
---|---|---|---|
[4:0] | RW | 0x0 | ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF |
[31:5] | ??? | Unknown | UNDEFINED |
Data Structures | |
struct | ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_s |
Macros | |
#define | ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_RESET 0x00000000 |
#define | ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_OFST 0x8 |
Typedefs | |
typedef struct ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_s | ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_t |
struct ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_s |
WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.
The struct declaration for register ALT_NOC_MPU_DDR_T_SCHED_DDRCONF.
Data Fields | ||
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uint32_t | DDRCONF: 5 | ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF |
uint32_t | __pad0__: 27 | UNDEFINED |
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R12_B3_C10 0x00 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
All types
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R13_B3_C10 0x01 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
All types
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R14_B3_C10 0x02 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
All types
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R15_B3_C10 0x03 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
All types
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R16_B3_C10 0x04 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
All types
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R17_B3_C10 0x05 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
All types
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R14_B3_C11 0x06 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
LPDDR x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R15_B3_C11 0x07 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
LPDDR x16/x32
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R16_B3_C11 0x08 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR3 8Gb
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R15_B3_C12 0x09 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
LPDDR3 16Gb x16 only
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R14_B4_C10 0x0A |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 only
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R15_B4_C10 0x0B |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 only
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R16_B4_C10 0x0C |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 only
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_R17_B4_C10 0x0D |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 only
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R12_C10 0x0E |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
Min DDR3 512Mbit x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R13_C10 0x0F |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR3 512Mb x8 or 1Gb x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R14_C10 0x10 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
Min DDR4 1Gb x8 or DDR3 1Gb x8 or 2Gb x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R15_C10 0x11 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR3 2Gb x8 & 4Gb x16 or LPDDR3 8Gb x32
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R16_C10 0x12 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR3 4Gb x8 & 8Gb x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R17_C10 0x13 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 16Gb x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R14_C11 0x14 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
LPDDR3 4Gb x16
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R15_C11 0x15 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
LPDDR3 8Gb x16 or 16Gb x32
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R16_C11 0x16 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR3 8Gb x8
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B3_R15_C12 0x17 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
LPDDR3 16Gb x16 only
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B4_R14_C10 0x18 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 2Gb x8
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B4_R15_C10 0x19 |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 4Gb x8
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B4_R16_C10 0x1A |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 8Gb x8
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_E_B4_R17_C10 0x1B |
Enumerated value for register field ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF
DDR4 16Gb x8
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_LSB 0 |
The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_MSB 4 |
The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_WIDTH 5 |
The width in bits of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_SET_MSK 0x0000001f |
The mask used to set the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_CLR_MSK 0xffffffe0 |
The mask used to clear the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field value.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_RESET 0x0 |
The reset value of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_GET | ( | value | ) | (((value) & 0x0000001f) >> 0) |
Extracts the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF field value from a register.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF_SET | ( | value | ) | (((value) << 0) & 0x0000001f) |
Produces a ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_DDRCONF register field value suitable for setting the register.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_RESET 0x00000000 |
The reset value of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF register.
#define ALT_NOC_MPU_DDR_T_SCHED_DDRCONF_OFST 0x8 |
The byte offset of the ALT_NOC_MPU_DDR_T_SCHED_DDRCONF register from the beginning of the component.
The typedef declaration for register ALT_NOC_MPU_DDR_T_SCHED_DDRCONF.