Altera SoCAL  16.0
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alt_l3.h
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32 
35 #ifndef __ALTERA_ALT_L3_H__
36 #define __ALTERA_ALT_L3_H__
37 
38 #ifdef __cplusplus
39 extern "C"
40 {
41 #endif /* __cplusplus */
42 
101 #define ALT_L3_REMAP_MPUZERO_E_BOOTROM 0x0
102 
109 #define ALT_L3_REMAP_MPUZERO_E_OCRAM 0x1
110 
112 #define ALT_L3_REMAP_MPUZERO_LSB 0
113 
114 #define ALT_L3_REMAP_MPUZERO_MSB 0
115 
116 #define ALT_L3_REMAP_MPUZERO_WIDTH 1
117 
118 #define ALT_L3_REMAP_MPUZERO_SET_MSK 0x00000001
119 
120 #define ALT_L3_REMAP_MPUZERO_CLR_MSK 0xfffffffe
121 
122 #define ALT_L3_REMAP_MPUZERO_RESET 0x0
123 
124 #define ALT_L3_REMAP_MPUZERO_GET(value) (((value) & 0x00000001) >> 0)
125 
126 #define ALT_L3_REMAP_MPUZERO_SET(value) (((value) << 0) & 0x00000001)
127 
156 #define ALT_L3_REMAP_NONMPUZERO_E_SDRAM 0x0
157 
164 #define ALT_L3_REMAP_NONMPUZERO_E_OCRAM 0x1
165 
167 #define ALT_L3_REMAP_NONMPUZERO_LSB 1
168 
169 #define ALT_L3_REMAP_NONMPUZERO_MSB 1
170 
171 #define ALT_L3_REMAP_NONMPUZERO_WIDTH 1
172 
173 #define ALT_L3_REMAP_NONMPUZERO_SET_MSK 0x00000002
174 
175 #define ALT_L3_REMAP_NONMPUZERO_CLR_MSK 0xfffffffd
176 
177 #define ALT_L3_REMAP_NONMPUZERO_RESET 0x0
178 
179 #define ALT_L3_REMAP_NONMPUZERO_GET(value) (((value) & 0x00000002) >> 1)
180 
181 #define ALT_L3_REMAP_NONMPUZERO_SET(value) (((value) << 1) & 0x00000002)
182 
207 #define ALT_L3_REMAP_H2F_E_INVISIBLE 0x0
208 
213 #define ALT_L3_REMAP_H2F_E_VISIBLE 0x1
214 
216 #define ALT_L3_REMAP_H2F_LSB 3
217 
218 #define ALT_L3_REMAP_H2F_MSB 3
219 
220 #define ALT_L3_REMAP_H2F_WIDTH 1
221 
222 #define ALT_L3_REMAP_H2F_SET_MSK 0x00000008
223 
224 #define ALT_L3_REMAP_H2F_CLR_MSK 0xfffffff7
225 
226 #define ALT_L3_REMAP_H2F_RESET 0x0
227 
228 #define ALT_L3_REMAP_H2F_GET(value) (((value) & 0x00000008) >> 3)
229 
230 #define ALT_L3_REMAP_H2F_SET(value) (((value) << 3) & 0x00000008)
231 
257 #define ALT_L3_REMAP_LWH2F_E_INVISIBLE 0x0
258 
263 #define ALT_L3_REMAP_LWH2F_E_VISIBLE 0x1
264 
266 #define ALT_L3_REMAP_LWH2F_LSB 4
267 
268 #define ALT_L3_REMAP_LWH2F_MSB 4
269 
270 #define ALT_L3_REMAP_LWH2F_WIDTH 1
271 
272 #define ALT_L3_REMAP_LWH2F_SET_MSK 0x00000010
273 
274 #define ALT_L3_REMAP_LWH2F_CLR_MSK 0xffffffef
275 
276 #define ALT_L3_REMAP_LWH2F_RESET 0x0
277 
278 #define ALT_L3_REMAP_LWH2F_GET(value) (((value) & 0x00000010) >> 4)
279 
280 #define ALT_L3_REMAP_LWH2F_SET(value) (((value) << 4) & 0x00000010)
281 
282 #ifndef __ASSEMBLY__
283 
294 {
295  uint32_t mpuzero : 1;
296  uint32_t nonmpuzero : 1;
297  uint32_t : 1;
298  uint32_t hps2fpga : 1;
299  uint32_t lwhps2fpga : 1;
300  uint32_t : 27;
301 };
302 
304 typedef volatile struct ALT_L3_REMAP_s ALT_L3_REMAP_t;
305 #endif /* __ASSEMBLY__ */
306 
308 #define ALT_L3_REMAP_OFST 0x0
309 
355 #define ALT_L3_SEC_L4MAIN_SPIS0_E_SECURE 0x0
356 
361 #define ALT_L3_SEC_L4MAIN_SPIS0_E_NONSECURE 0x1
362 
364 #define ALT_L3_SEC_L4MAIN_SPIS0_LSB 0
365 
366 #define ALT_L3_SEC_L4MAIN_SPIS0_MSB 0
367 
368 #define ALT_L3_SEC_L4MAIN_SPIS0_WIDTH 1
369 
370 #define ALT_L3_SEC_L4MAIN_SPIS0_SET_MSK 0x00000001
371 
372 #define ALT_L3_SEC_L4MAIN_SPIS0_CLR_MSK 0xfffffffe
373 
374 #define ALT_L3_SEC_L4MAIN_SPIS0_RESET 0x0
375 
376 #define ALT_L3_SEC_L4MAIN_SPIS0_GET(value) (((value) & 0x00000001) >> 0)
377 
378 #define ALT_L3_SEC_L4MAIN_SPIS0_SET(value) (((value) << 0) & 0x00000001)
379 
402 #define ALT_L3_SEC_L4MAIN_SPIS1_E_SECURE 0x0
403 
408 #define ALT_L3_SEC_L4MAIN_SPIS1_E_NONSECURE 0x1
409 
411 #define ALT_L3_SEC_L4MAIN_SPIS1_LSB 1
412 
413 #define ALT_L3_SEC_L4MAIN_SPIS1_MSB 1
414 
415 #define ALT_L3_SEC_L4MAIN_SPIS1_WIDTH 1
416 
417 #define ALT_L3_SEC_L4MAIN_SPIS1_SET_MSK 0x00000002
418 
419 #define ALT_L3_SEC_L4MAIN_SPIS1_CLR_MSK 0xfffffffd
420 
421 #define ALT_L3_SEC_L4MAIN_SPIS1_RESET 0x0
422 
423 #define ALT_L3_SEC_L4MAIN_SPIS1_GET(value) (((value) & 0x00000002) >> 1)
424 
425 #define ALT_L3_SEC_L4MAIN_SPIS1_SET(value) (((value) << 1) & 0x00000002)
426 
449 #define ALT_L3_SEC_L4MAIN_DMASECURE_E_SECURE 0x0
450 
455 #define ALT_L3_SEC_L4MAIN_DMASECURE_E_NONSECURE 0x1
456 
458 #define ALT_L3_SEC_L4MAIN_DMASECURE_LSB 2
459 
460 #define ALT_L3_SEC_L4MAIN_DMASECURE_MSB 2
461 
462 #define ALT_L3_SEC_L4MAIN_DMASECURE_WIDTH 1
463 
464 #define ALT_L3_SEC_L4MAIN_DMASECURE_SET_MSK 0x00000004
465 
466 #define ALT_L3_SEC_L4MAIN_DMASECURE_CLR_MSK 0xfffffffb
467 
468 #define ALT_L3_SEC_L4MAIN_DMASECURE_RESET 0x0
469 
470 #define ALT_L3_SEC_L4MAIN_DMASECURE_GET(value) (((value) & 0x00000004) >> 2)
471 
472 #define ALT_L3_SEC_L4MAIN_DMASECURE_SET(value) (((value) << 2) & 0x00000004)
473 
497 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_E_SECURE 0x0
498 
503 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_E_NONSECURE 0x1
504 
506 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_LSB 3
507 
508 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_MSB 3
509 
510 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_WIDTH 1
511 
512 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_SET_MSK 0x00000008
513 
514 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_CLR_MSK 0xfffffff7
515 
516 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_RESET 0x0
517 
518 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_GET(value) (((value) & 0x00000008) >> 3)
519 
520 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_SET(value) (((value) << 3) & 0x00000008)
521 
522 #ifndef __ASSEMBLY__
523 
534 {
535  uint32_t spis0 : 1;
536  uint32_t spis1 : 1;
537  uint32_t dmasecure : 1;
538  uint32_t dmanonsecure : 1;
539  uint32_t : 28;
540 };
541 
543 typedef volatile struct ALT_L3_SEC_L4MAIN_s ALT_L3_SEC_L4MAIN_t;
544 #endif /* __ASSEMBLY__ */
545 
547 #define ALT_L3_SEC_L4MAIN_OFST 0x0
548 
595 #define ALT_L3_SEC_L4SP_SDRREGS_E_SECURE 0x0
596 
601 #define ALT_L3_SEC_L4SP_SDRREGS_E_NONSECURE 0x1
602 
604 #define ALT_L3_SEC_L4SP_SDRREGS_LSB 0
605 
606 #define ALT_L3_SEC_L4SP_SDRREGS_MSB 0
607 
608 #define ALT_L3_SEC_L4SP_SDRREGS_WIDTH 1
609 
610 #define ALT_L3_SEC_L4SP_SDRREGS_SET_MSK 0x00000001
611 
612 #define ALT_L3_SEC_L4SP_SDRREGS_CLR_MSK 0xfffffffe
613 
614 #define ALT_L3_SEC_L4SP_SDRREGS_RESET 0x0
615 
616 #define ALT_L3_SEC_L4SP_SDRREGS_GET(value) (((value) & 0x00000001) >> 0)
617 
618 #define ALT_L3_SEC_L4SP_SDRREGS_SET(value) (((value) << 0) & 0x00000001)
619 
642 #define ALT_L3_SEC_L4SP_SPTMR0_E_SECURE 0x0
643 
648 #define ALT_L3_SEC_L4SP_SPTMR0_E_NONSECURE 0x1
649 
651 #define ALT_L3_SEC_L4SP_SPTMR0_LSB 1
652 
653 #define ALT_L3_SEC_L4SP_SPTMR0_MSB 1
654 
655 #define ALT_L3_SEC_L4SP_SPTMR0_WIDTH 1
656 
657 #define ALT_L3_SEC_L4SP_SPTMR0_SET_MSK 0x00000002
658 
659 #define ALT_L3_SEC_L4SP_SPTMR0_CLR_MSK 0xfffffffd
660 
661 #define ALT_L3_SEC_L4SP_SPTMR0_RESET 0x0
662 
663 #define ALT_L3_SEC_L4SP_SPTMR0_GET(value) (((value) & 0x00000002) >> 1)
664 
665 #define ALT_L3_SEC_L4SP_SPTMR0_SET(value) (((value) << 1) & 0x00000002)
666 
689 #define ALT_L3_SEC_L4SP_I2C0_E_SECURE 0x0
690 
695 #define ALT_L3_SEC_L4SP_I2C0_E_NONSECURE 0x1
696 
698 #define ALT_L3_SEC_L4SP_I2C0_LSB 2
699 
700 #define ALT_L3_SEC_L4SP_I2C0_MSB 2
701 
702 #define ALT_L3_SEC_L4SP_I2C0_WIDTH 1
703 
704 #define ALT_L3_SEC_L4SP_I2C0_SET_MSK 0x00000004
705 
706 #define ALT_L3_SEC_L4SP_I2C0_CLR_MSK 0xfffffffb
707 
708 #define ALT_L3_SEC_L4SP_I2C0_RESET 0x0
709 
710 #define ALT_L3_SEC_L4SP_I2C0_GET(value) (((value) & 0x00000004) >> 2)
711 
712 #define ALT_L3_SEC_L4SP_I2C0_SET(value) (((value) << 2) & 0x00000004)
713 
736 #define ALT_L3_SEC_L4SP_I2C1_E_SECURE 0x0
737 
742 #define ALT_L3_SEC_L4SP_I2C1_E_NONSECURE 0x1
743 
745 #define ALT_L3_SEC_L4SP_I2C1_LSB 3
746 
747 #define ALT_L3_SEC_L4SP_I2C1_MSB 3
748 
749 #define ALT_L3_SEC_L4SP_I2C1_WIDTH 1
750 
751 #define ALT_L3_SEC_L4SP_I2C1_SET_MSK 0x00000008
752 
753 #define ALT_L3_SEC_L4SP_I2C1_CLR_MSK 0xfffffff7
754 
755 #define ALT_L3_SEC_L4SP_I2C1_RESET 0x0
756 
757 #define ALT_L3_SEC_L4SP_I2C1_GET(value) (((value) & 0x00000008) >> 3)
758 
759 #define ALT_L3_SEC_L4SP_I2C1_SET(value) (((value) << 3) & 0x00000008)
760 
784 #define ALT_L3_SEC_L4SP_I2C2_E_SECURE 0x0
785 
790 #define ALT_L3_SEC_L4SP_I2C2_E_NONSECURE 0x1
791 
793 #define ALT_L3_SEC_L4SP_I2C2_LSB 4
794 
795 #define ALT_L3_SEC_L4SP_I2C2_MSB 4
796 
797 #define ALT_L3_SEC_L4SP_I2C2_WIDTH 1
798 
799 #define ALT_L3_SEC_L4SP_I2C2_SET_MSK 0x00000010
800 
801 #define ALT_L3_SEC_L4SP_I2C2_CLR_MSK 0xffffffef
802 
803 #define ALT_L3_SEC_L4SP_I2C2_RESET 0x0
804 
805 #define ALT_L3_SEC_L4SP_I2C2_GET(value) (((value) & 0x00000010) >> 4)
806 
807 #define ALT_L3_SEC_L4SP_I2C2_SET(value) (((value) << 4) & 0x00000010)
808 
832 #define ALT_L3_SEC_L4SP_I2C3_E_SECURE 0x0
833 
838 #define ALT_L3_SEC_L4SP_I2C3_E_NONSECURE 0x1
839 
841 #define ALT_L3_SEC_L4SP_I2C3_LSB 5
842 
843 #define ALT_L3_SEC_L4SP_I2C3_MSB 5
844 
845 #define ALT_L3_SEC_L4SP_I2C3_WIDTH 1
846 
847 #define ALT_L3_SEC_L4SP_I2C3_SET_MSK 0x00000020
848 
849 #define ALT_L3_SEC_L4SP_I2C3_CLR_MSK 0xffffffdf
850 
851 #define ALT_L3_SEC_L4SP_I2C3_RESET 0x0
852 
853 #define ALT_L3_SEC_L4SP_I2C3_GET(value) (((value) & 0x00000020) >> 5)
854 
855 #define ALT_L3_SEC_L4SP_I2C3_SET(value) (((value) << 5) & 0x00000020)
856 
879 #define ALT_L3_SEC_L4SP_UART0_E_SECURE 0x0
880 
885 #define ALT_L3_SEC_L4SP_UART0_E_NONSECURE 0x1
886 
888 #define ALT_L3_SEC_L4SP_UART0_LSB 6
889 
890 #define ALT_L3_SEC_L4SP_UART0_MSB 6
891 
892 #define ALT_L3_SEC_L4SP_UART0_WIDTH 1
893 
894 #define ALT_L3_SEC_L4SP_UART0_SET_MSK 0x00000040
895 
896 #define ALT_L3_SEC_L4SP_UART0_CLR_MSK 0xffffffbf
897 
898 #define ALT_L3_SEC_L4SP_UART0_RESET 0x0
899 
900 #define ALT_L3_SEC_L4SP_UART0_GET(value) (((value) & 0x00000040) >> 6)
901 
902 #define ALT_L3_SEC_L4SP_UART0_SET(value) (((value) << 6) & 0x00000040)
903 
926 #define ALT_L3_SEC_L4SP_UART1_E_SECURE 0x0
927 
932 #define ALT_L3_SEC_L4SP_UART1_E_NONSECURE 0x1
933 
935 #define ALT_L3_SEC_L4SP_UART1_LSB 7
936 
937 #define ALT_L3_SEC_L4SP_UART1_MSB 7
938 
939 #define ALT_L3_SEC_L4SP_UART1_WIDTH 1
940 
941 #define ALT_L3_SEC_L4SP_UART1_SET_MSK 0x00000080
942 
943 #define ALT_L3_SEC_L4SP_UART1_CLR_MSK 0xffffff7f
944 
945 #define ALT_L3_SEC_L4SP_UART1_RESET 0x0
946 
947 #define ALT_L3_SEC_L4SP_UART1_GET(value) (((value) & 0x00000080) >> 7)
948 
949 #define ALT_L3_SEC_L4SP_UART1_SET(value) (((value) << 7) & 0x00000080)
950 
973 #define ALT_L3_SEC_L4SP_CAN0_E_SECURE 0x0
974 
979 #define ALT_L3_SEC_L4SP_CAN0_E_NONSECURE 0x1
980 
982 #define ALT_L3_SEC_L4SP_CAN0_LSB 8
983 
984 #define ALT_L3_SEC_L4SP_CAN0_MSB 8
985 
986 #define ALT_L3_SEC_L4SP_CAN0_WIDTH 1
987 
988 #define ALT_L3_SEC_L4SP_CAN0_SET_MSK 0x00000100
989 
990 #define ALT_L3_SEC_L4SP_CAN0_CLR_MSK 0xfffffeff
991 
992 #define ALT_L3_SEC_L4SP_CAN0_RESET 0x0
993 
994 #define ALT_L3_SEC_L4SP_CAN0_GET(value) (((value) & 0x00000100) >> 8)
995 
996 #define ALT_L3_SEC_L4SP_CAN0_SET(value) (((value) << 8) & 0x00000100)
997 
1020 #define ALT_L3_SEC_L4SP_CAN1_E_SECURE 0x0
1021 
1026 #define ALT_L3_SEC_L4SP_CAN1_E_NONSECURE 0x1
1027 
1029 #define ALT_L3_SEC_L4SP_CAN1_LSB 9
1030 
1031 #define ALT_L3_SEC_L4SP_CAN1_MSB 9
1032 
1033 #define ALT_L3_SEC_L4SP_CAN1_WIDTH 1
1034 
1035 #define ALT_L3_SEC_L4SP_CAN1_SET_MSK 0x00000200
1036 
1037 #define ALT_L3_SEC_L4SP_CAN1_CLR_MSK 0xfffffdff
1038 
1039 #define ALT_L3_SEC_L4SP_CAN1_RESET 0x0
1040 
1041 #define ALT_L3_SEC_L4SP_CAN1_GET(value) (((value) & 0x00000200) >> 9)
1042 
1043 #define ALT_L3_SEC_L4SP_CAN1_SET(value) (((value) << 9) & 0x00000200)
1044 
1067 #define ALT_L3_SEC_L4SP_SPTMR1_E_SECURE 0x0
1068 
1073 #define ALT_L3_SEC_L4SP_SPTMR1_E_NONSECURE 0x1
1074 
1076 #define ALT_L3_SEC_L4SP_SPTMR1_LSB 10
1077 
1078 #define ALT_L3_SEC_L4SP_SPTMR1_MSB 10
1079 
1080 #define ALT_L3_SEC_L4SP_SPTMR1_WIDTH 1
1081 
1082 #define ALT_L3_SEC_L4SP_SPTMR1_SET_MSK 0x00000400
1083 
1084 #define ALT_L3_SEC_L4SP_SPTMR1_CLR_MSK 0xfffffbff
1085 
1086 #define ALT_L3_SEC_L4SP_SPTMR1_RESET 0x0
1087 
1088 #define ALT_L3_SEC_L4SP_SPTMR1_GET(value) (((value) & 0x00000400) >> 10)
1089 
1090 #define ALT_L3_SEC_L4SP_SPTMR1_SET(value) (((value) << 10) & 0x00000400)
1091 
1092 #ifndef __ASSEMBLY__
1093 
1104 {
1105  uint32_t sdrregs : 1;
1106  uint32_t sptimer0 : 1;
1107  uint32_t i2c0 : 1;
1108  uint32_t i2c1 : 1;
1109  uint32_t i2c2 : 1;
1110  uint32_t i2c3 : 1;
1111  uint32_t uart0 : 1;
1112  uint32_t uart1 : 1;
1113  uint32_t can0 : 1;
1114  uint32_t can1 : 1;
1115  uint32_t sptimer1 : 1;
1116  uint32_t : 21;
1117 };
1118 
1120 typedef volatile struct ALT_L3_SEC_L4SP_s ALT_L3_SEC_L4SP_t;
1121 #endif /* __ASSEMBLY__ */
1122 
1124 #define ALT_L3_SEC_L4SP_OFST 0x4
1125 
1171 #define ALT_L3_SEC_L4MP_FPGAMGR_E_SECURE 0x0
1172 
1177 #define ALT_L3_SEC_L4MP_FPGAMGR_E_NONSECURE 0x1
1178 
1180 #define ALT_L3_SEC_L4MP_FPGAMGR_LSB 0
1181 
1182 #define ALT_L3_SEC_L4MP_FPGAMGR_MSB 0
1183 
1184 #define ALT_L3_SEC_L4MP_FPGAMGR_WIDTH 1
1185 
1186 #define ALT_L3_SEC_L4MP_FPGAMGR_SET_MSK 0x00000001
1187 
1188 #define ALT_L3_SEC_L4MP_FPGAMGR_CLR_MSK 0xfffffffe
1189 
1190 #define ALT_L3_SEC_L4MP_FPGAMGR_RESET 0x0
1191 
1192 #define ALT_L3_SEC_L4MP_FPGAMGR_GET(value) (((value) & 0x00000001) >> 0)
1193 
1194 #define ALT_L3_SEC_L4MP_FPGAMGR_SET(value) (((value) << 0) & 0x00000001)
1195 
1218 #define ALT_L3_SEC_L4MP_DAP_E_SECURE 0x0
1219 
1224 #define ALT_L3_SEC_L4MP_DAP_E_NONSECURE 0x1
1225 
1227 #define ALT_L3_SEC_L4MP_DAP_LSB 1
1228 
1229 #define ALT_L3_SEC_L4MP_DAP_MSB 1
1230 
1231 #define ALT_L3_SEC_L4MP_DAP_WIDTH 1
1232 
1233 #define ALT_L3_SEC_L4MP_DAP_SET_MSK 0x00000002
1234 
1235 #define ALT_L3_SEC_L4MP_DAP_CLR_MSK 0xfffffffd
1236 
1237 #define ALT_L3_SEC_L4MP_DAP_RESET 0x0
1238 
1239 #define ALT_L3_SEC_L4MP_DAP_GET(value) (((value) & 0x00000002) >> 1)
1240 
1241 #define ALT_L3_SEC_L4MP_DAP_SET(value) (((value) << 1) & 0x00000002)
1242 
1266 #define ALT_L3_SEC_L4MP_QSPI_E_SECURE 0x0
1267 
1272 #define ALT_L3_SEC_L4MP_QSPI_E_NONSECURE 0x1
1273 
1275 #define ALT_L3_SEC_L4MP_QSPI_LSB 2
1276 
1277 #define ALT_L3_SEC_L4MP_QSPI_MSB 2
1278 
1279 #define ALT_L3_SEC_L4MP_QSPI_WIDTH 1
1280 
1281 #define ALT_L3_SEC_L4MP_QSPI_SET_MSK 0x00000004
1282 
1283 #define ALT_L3_SEC_L4MP_QSPI_CLR_MSK 0xfffffffb
1284 
1285 #define ALT_L3_SEC_L4MP_QSPI_RESET 0x0
1286 
1287 #define ALT_L3_SEC_L4MP_QSPI_GET(value) (((value) & 0x00000004) >> 2)
1288 
1289 #define ALT_L3_SEC_L4MP_QSPI_SET(value) (((value) << 2) & 0x00000004)
1290 
1313 #define ALT_L3_SEC_L4MP_SDMMC_E_SECURE 0x0
1314 
1319 #define ALT_L3_SEC_L4MP_SDMMC_E_NONSECURE 0x1
1320 
1322 #define ALT_L3_SEC_L4MP_SDMMC_LSB 3
1323 
1324 #define ALT_L3_SEC_L4MP_SDMMC_MSB 3
1325 
1326 #define ALT_L3_SEC_L4MP_SDMMC_WIDTH 1
1327 
1328 #define ALT_L3_SEC_L4MP_SDMMC_SET_MSK 0x00000008
1329 
1330 #define ALT_L3_SEC_L4MP_SDMMC_CLR_MSK 0xfffffff7
1331 
1332 #define ALT_L3_SEC_L4MP_SDMMC_RESET 0x0
1333 
1334 #define ALT_L3_SEC_L4MP_SDMMC_GET(value) (((value) & 0x00000008) >> 3)
1335 
1336 #define ALT_L3_SEC_L4MP_SDMMC_SET(value) (((value) << 3) & 0x00000008)
1337 
1360 #define ALT_L3_SEC_L4MP_EMAC0_E_SECURE 0x0
1361 
1366 #define ALT_L3_SEC_L4MP_EMAC0_E_NONSECURE 0x1
1367 
1369 #define ALT_L3_SEC_L4MP_EMAC0_LSB 4
1370 
1371 #define ALT_L3_SEC_L4MP_EMAC0_MSB 4
1372 
1373 #define ALT_L3_SEC_L4MP_EMAC0_WIDTH 1
1374 
1375 #define ALT_L3_SEC_L4MP_EMAC0_SET_MSK 0x00000010
1376 
1377 #define ALT_L3_SEC_L4MP_EMAC0_CLR_MSK 0xffffffef
1378 
1379 #define ALT_L3_SEC_L4MP_EMAC0_RESET 0x0
1380 
1381 #define ALT_L3_SEC_L4MP_EMAC0_GET(value) (((value) & 0x00000010) >> 4)
1382 
1383 #define ALT_L3_SEC_L4MP_EMAC0_SET(value) (((value) << 4) & 0x00000010)
1384 
1407 #define ALT_L3_SEC_L4MP_EMAC1_E_SECURE 0x0
1408 
1413 #define ALT_L3_SEC_L4MP_EMAC1_E_NONSECURE 0x1
1414 
1416 #define ALT_L3_SEC_L4MP_EMAC1_LSB 5
1417 
1418 #define ALT_L3_SEC_L4MP_EMAC1_MSB 5
1419 
1420 #define ALT_L3_SEC_L4MP_EMAC1_WIDTH 1
1421 
1422 #define ALT_L3_SEC_L4MP_EMAC1_SET_MSK 0x00000020
1423 
1424 #define ALT_L3_SEC_L4MP_EMAC1_CLR_MSK 0xffffffdf
1425 
1426 #define ALT_L3_SEC_L4MP_EMAC1_RESET 0x0
1427 
1428 #define ALT_L3_SEC_L4MP_EMAC1_GET(value) (((value) & 0x00000020) >> 5)
1429 
1430 #define ALT_L3_SEC_L4MP_EMAC1_SET(value) (((value) << 5) & 0x00000020)
1431 
1455 #define ALT_L3_SEC_L4MP_ACPIDMAP_E_SECURE 0x0
1456 
1461 #define ALT_L3_SEC_L4MP_ACPIDMAP_E_NONSECURE 0x1
1462 
1464 #define ALT_L3_SEC_L4MP_ACPIDMAP_LSB 6
1465 
1466 #define ALT_L3_SEC_L4MP_ACPIDMAP_MSB 6
1467 
1468 #define ALT_L3_SEC_L4MP_ACPIDMAP_WIDTH 1
1469 
1470 #define ALT_L3_SEC_L4MP_ACPIDMAP_SET_MSK 0x00000040
1471 
1472 #define ALT_L3_SEC_L4MP_ACPIDMAP_CLR_MSK 0xffffffbf
1473 
1474 #define ALT_L3_SEC_L4MP_ACPIDMAP_RESET 0x0
1475 
1476 #define ALT_L3_SEC_L4MP_ACPIDMAP_GET(value) (((value) & 0x00000040) >> 6)
1477 
1478 #define ALT_L3_SEC_L4MP_ACPIDMAP_SET(value) (((value) << 6) & 0x00000040)
1479 
1502 #define ALT_L3_SEC_L4MP_GPIO0_E_SECURE 0x0
1503 
1508 #define ALT_L3_SEC_L4MP_GPIO0_E_NONSECURE 0x1
1509 
1511 #define ALT_L3_SEC_L4MP_GPIO0_LSB 7
1512 
1513 #define ALT_L3_SEC_L4MP_GPIO0_MSB 7
1514 
1515 #define ALT_L3_SEC_L4MP_GPIO0_WIDTH 1
1516 
1517 #define ALT_L3_SEC_L4MP_GPIO0_SET_MSK 0x00000080
1518 
1519 #define ALT_L3_SEC_L4MP_GPIO0_CLR_MSK 0xffffff7f
1520 
1521 #define ALT_L3_SEC_L4MP_GPIO0_RESET 0x0
1522 
1523 #define ALT_L3_SEC_L4MP_GPIO0_GET(value) (((value) & 0x00000080) >> 7)
1524 
1525 #define ALT_L3_SEC_L4MP_GPIO0_SET(value) (((value) << 7) & 0x00000080)
1526 
1549 #define ALT_L3_SEC_L4MP_GPIO1_E_SECURE 0x0
1550 
1555 #define ALT_L3_SEC_L4MP_GPIO1_E_NONSECURE 0x1
1556 
1558 #define ALT_L3_SEC_L4MP_GPIO1_LSB 8
1559 
1560 #define ALT_L3_SEC_L4MP_GPIO1_MSB 8
1561 
1562 #define ALT_L3_SEC_L4MP_GPIO1_WIDTH 1
1563 
1564 #define ALT_L3_SEC_L4MP_GPIO1_SET_MSK 0x00000100
1565 
1566 #define ALT_L3_SEC_L4MP_GPIO1_CLR_MSK 0xfffffeff
1567 
1568 #define ALT_L3_SEC_L4MP_GPIO1_RESET 0x0
1569 
1570 #define ALT_L3_SEC_L4MP_GPIO1_GET(value) (((value) & 0x00000100) >> 8)
1571 
1572 #define ALT_L3_SEC_L4MP_GPIO1_SET(value) (((value) << 8) & 0x00000100)
1573 
1596 #define ALT_L3_SEC_L4MP_GPIO2_E_SECURE 0x0
1597 
1602 #define ALT_L3_SEC_L4MP_GPIO2_E_NONSECURE 0x1
1603 
1605 #define ALT_L3_SEC_L4MP_GPIO2_LSB 9
1606 
1607 #define ALT_L3_SEC_L4MP_GPIO2_MSB 9
1608 
1609 #define ALT_L3_SEC_L4MP_GPIO2_WIDTH 1
1610 
1611 #define ALT_L3_SEC_L4MP_GPIO2_SET_MSK 0x00000200
1612 
1613 #define ALT_L3_SEC_L4MP_GPIO2_CLR_MSK 0xfffffdff
1614 
1615 #define ALT_L3_SEC_L4MP_GPIO2_RESET 0x0
1616 
1617 #define ALT_L3_SEC_L4MP_GPIO2_GET(value) (((value) & 0x00000200) >> 9)
1618 
1619 #define ALT_L3_SEC_L4MP_GPIO2_SET(value) (((value) << 9) & 0x00000200)
1620 
1621 #ifndef __ASSEMBLY__
1622 
1633 {
1634  uint32_t fpgamgrregs : 1;
1635  uint32_t dap : 1;
1636  uint32_t qspiregs : 1;
1637  uint32_t sdmmc : 1;
1638  uint32_t emac0 : 1;
1639  uint32_t emac1 : 1;
1640  uint32_t acpidmap : 1;
1641  uint32_t gpio0 : 1;
1642  uint32_t gpio1 : 1;
1643  uint32_t gpio2 : 1;
1644  uint32_t : 22;
1645 };
1646 
1648 typedef volatile struct ALT_L3_SEC_L4MP_s ALT_L3_SEC_L4MP_t;
1649 #endif /* __ASSEMBLY__ */
1650 
1652 #define ALT_L3_SEC_L4MP_OFST 0x8
1653 
1696 #define ALT_L3_SEC_L4OSC1_L4WD0_E_SECURE 0x0
1697 
1702 #define ALT_L3_SEC_L4OSC1_L4WD0_E_NONSECURE 0x1
1703 
1705 #define ALT_L3_SEC_L4OSC1_L4WD0_LSB 0
1706 
1707 #define ALT_L3_SEC_L4OSC1_L4WD0_MSB 0
1708 
1709 #define ALT_L3_SEC_L4OSC1_L4WD0_WIDTH 1
1710 
1711 #define ALT_L3_SEC_L4OSC1_L4WD0_SET_MSK 0x00000001
1712 
1713 #define ALT_L3_SEC_L4OSC1_L4WD0_CLR_MSK 0xfffffffe
1714 
1715 #define ALT_L3_SEC_L4OSC1_L4WD0_RESET 0x0
1716 
1717 #define ALT_L3_SEC_L4OSC1_L4WD0_GET(value) (((value) & 0x00000001) >> 0)
1718 
1719 #define ALT_L3_SEC_L4OSC1_L4WD0_SET(value) (((value) << 0) & 0x00000001)
1720 
1744 #define ALT_L3_SEC_L4OSC1_L4WD1_E_SECURE 0x0
1745 
1750 #define ALT_L3_SEC_L4OSC1_L4WD1_E_NONSECURE 0x1
1751 
1753 #define ALT_L3_SEC_L4OSC1_L4WD1_LSB 1
1754 
1755 #define ALT_L3_SEC_L4OSC1_L4WD1_MSB 1
1756 
1757 #define ALT_L3_SEC_L4OSC1_L4WD1_WIDTH 1
1758 
1759 #define ALT_L3_SEC_L4OSC1_L4WD1_SET_MSK 0x00000002
1760 
1761 #define ALT_L3_SEC_L4OSC1_L4WD1_CLR_MSK 0xfffffffd
1762 
1763 #define ALT_L3_SEC_L4OSC1_L4WD1_RESET 0x0
1764 
1765 #define ALT_L3_SEC_L4OSC1_L4WD1_GET(value) (((value) & 0x00000002) >> 1)
1766 
1767 #define ALT_L3_SEC_L4OSC1_L4WD1_SET(value) (((value) << 1) & 0x00000002)
1768 
1792 #define ALT_L3_SEC_L4OSC1_CLKMGR_E_SECURE 0x0
1793 
1798 #define ALT_L3_SEC_L4OSC1_CLKMGR_E_NONSECURE 0x1
1799 
1801 #define ALT_L3_SEC_L4OSC1_CLKMGR_LSB 2
1802 
1803 #define ALT_L3_SEC_L4OSC1_CLKMGR_MSB 2
1804 
1805 #define ALT_L3_SEC_L4OSC1_CLKMGR_WIDTH 1
1806 
1807 #define ALT_L3_SEC_L4OSC1_CLKMGR_SET_MSK 0x00000004
1808 
1809 #define ALT_L3_SEC_L4OSC1_CLKMGR_CLR_MSK 0xfffffffb
1810 
1811 #define ALT_L3_SEC_L4OSC1_CLKMGR_RESET 0x0
1812 
1813 #define ALT_L3_SEC_L4OSC1_CLKMGR_GET(value) (((value) & 0x00000004) >> 2)
1814 
1815 #define ALT_L3_SEC_L4OSC1_CLKMGR_SET(value) (((value) << 2) & 0x00000004)
1816 
1840 #define ALT_L3_SEC_L4OSC1_RSTMGR_E_SECURE 0x0
1841 
1846 #define ALT_L3_SEC_L4OSC1_RSTMGR_E_NONSECURE 0x1
1847 
1849 #define ALT_L3_SEC_L4OSC1_RSTMGR_LSB 3
1850 
1851 #define ALT_L3_SEC_L4OSC1_RSTMGR_MSB 3
1852 
1853 #define ALT_L3_SEC_L4OSC1_RSTMGR_WIDTH 1
1854 
1855 #define ALT_L3_SEC_L4OSC1_RSTMGR_SET_MSK 0x00000008
1856 
1857 #define ALT_L3_SEC_L4OSC1_RSTMGR_CLR_MSK 0xfffffff7
1858 
1859 #define ALT_L3_SEC_L4OSC1_RSTMGR_RESET 0x0
1860 
1861 #define ALT_L3_SEC_L4OSC1_RSTMGR_GET(value) (((value) & 0x00000008) >> 3)
1862 
1863 #define ALT_L3_SEC_L4OSC1_RSTMGR_SET(value) (((value) << 3) & 0x00000008)
1864 
1888 #define ALT_L3_SEC_L4OSC1_SYSMGR_E_SECURE 0x0
1889 
1894 #define ALT_L3_SEC_L4OSC1_SYSMGR_E_NONSECURE 0x1
1895 
1897 #define ALT_L3_SEC_L4OSC1_SYSMGR_LSB 4
1898 
1899 #define ALT_L3_SEC_L4OSC1_SYSMGR_MSB 4
1900 
1901 #define ALT_L3_SEC_L4OSC1_SYSMGR_WIDTH 1
1902 
1903 #define ALT_L3_SEC_L4OSC1_SYSMGR_SET_MSK 0x00000010
1904 
1905 #define ALT_L3_SEC_L4OSC1_SYSMGR_CLR_MSK 0xffffffef
1906 
1907 #define ALT_L3_SEC_L4OSC1_SYSMGR_RESET 0x0
1908 
1909 #define ALT_L3_SEC_L4OSC1_SYSMGR_GET(value) (((value) & 0x00000010) >> 4)
1910 
1911 #define ALT_L3_SEC_L4OSC1_SYSMGR_SET(value) (((value) << 4) & 0x00000010)
1912 
1935 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_E_SECURE 0x0
1936 
1941 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_E_NONSECURE 0x1
1942 
1944 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_LSB 5
1945 
1946 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_MSB 5
1947 
1948 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_WIDTH 1
1949 
1950 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_SET_MSK 0x00000020
1951 
1952 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_CLR_MSK 0xffffffdf
1953 
1954 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_RESET 0x0
1955 
1956 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_GET(value) (((value) & 0x00000020) >> 5)
1957 
1958 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_SET(value) (((value) << 5) & 0x00000020)
1959 
1982 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_E_SECURE 0x0
1983 
1988 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_E_NONSECURE 0x1
1989 
1991 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_LSB 6
1992 
1993 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_MSB 6
1994 
1995 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_WIDTH 1
1996 
1997 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_SET_MSK 0x00000040
1998 
1999 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_CLR_MSK 0xffffffbf
2000 
2001 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_RESET 0x0
2002 
2003 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_GET(value) (((value) & 0x00000040) >> 6)
2004 
2005 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_SET(value) (((value) << 6) & 0x00000040)
2006 
2007 #ifndef __ASSEMBLY__
2008 
2019 {
2020  uint32_t l4wd0 : 1;
2021  uint32_t l4wd1 : 1;
2022  uint32_t clkmgr : 1;
2023  uint32_t rstmgr : 1;
2024  uint32_t sysmgr : 1;
2025  uint32_t osc1timer0 : 1;
2026  uint32_t osc1timer1 : 1;
2027  uint32_t : 25;
2028 };
2029 
2032 #endif /* __ASSEMBLY__ */
2033 
2035 #define ALT_L3_SEC_L4OSC1_OFST 0xc
2036 
2074 #define ALT_L3_SEC_L4SPIM_SPIM0_E_SECURE 0x0
2075 
2080 #define ALT_L3_SEC_L4SPIM_SPIM0_E_NONSECURE 0x1
2081 
2083 #define ALT_L3_SEC_L4SPIM_SPIM0_LSB 0
2084 
2085 #define ALT_L3_SEC_L4SPIM_SPIM0_MSB 0
2086 
2087 #define ALT_L3_SEC_L4SPIM_SPIM0_WIDTH 1
2088 
2089 #define ALT_L3_SEC_L4SPIM_SPIM0_SET_MSK 0x00000001
2090 
2091 #define ALT_L3_SEC_L4SPIM_SPIM0_CLR_MSK 0xfffffffe
2092 
2093 #define ALT_L3_SEC_L4SPIM_SPIM0_RESET 0x0
2094 
2095 #define ALT_L3_SEC_L4SPIM_SPIM0_GET(value) (((value) & 0x00000001) >> 0)
2096 
2097 #define ALT_L3_SEC_L4SPIM_SPIM0_SET(value) (((value) << 0) & 0x00000001)
2098 
2121 #define ALT_L3_SEC_L4SPIM_SPIM1_E_SECURE 0x0
2122 
2127 #define ALT_L3_SEC_L4SPIM_SPIM1_E_NONSECURE 0x1
2128 
2130 #define ALT_L3_SEC_L4SPIM_SPIM1_LSB 1
2131 
2132 #define ALT_L3_SEC_L4SPIM_SPIM1_MSB 1
2133 
2134 #define ALT_L3_SEC_L4SPIM_SPIM1_WIDTH 1
2135 
2136 #define ALT_L3_SEC_L4SPIM_SPIM1_SET_MSK 0x00000002
2137 
2138 #define ALT_L3_SEC_L4SPIM_SPIM1_CLR_MSK 0xfffffffd
2139 
2140 #define ALT_L3_SEC_L4SPIM_SPIM1_RESET 0x0
2141 
2142 #define ALT_L3_SEC_L4SPIM_SPIM1_GET(value) (((value) & 0x00000002) >> 1)
2143 
2144 #define ALT_L3_SEC_L4SPIM_SPIM1_SET(value) (((value) << 1) & 0x00000002)
2145 
2168 #define ALT_L3_SEC_L4SPIM_SCANMGR_E_SECURE 0x0
2169 
2174 #define ALT_L3_SEC_L4SPIM_SCANMGR_E_NONSECURE 0x1
2175 
2177 #define ALT_L3_SEC_L4SPIM_SCANMGR_LSB 2
2178 
2179 #define ALT_L3_SEC_L4SPIM_SCANMGR_MSB 2
2180 
2181 #define ALT_L3_SEC_L4SPIM_SCANMGR_WIDTH 1
2182 
2183 #define ALT_L3_SEC_L4SPIM_SCANMGR_SET_MSK 0x00000004
2184 
2185 #define ALT_L3_SEC_L4SPIM_SCANMGR_CLR_MSK 0xfffffffb
2186 
2187 #define ALT_L3_SEC_L4SPIM_SCANMGR_RESET 0x0
2188 
2189 #define ALT_L3_SEC_L4SPIM_SCANMGR_GET(value) (((value) & 0x00000004) >> 2)
2190 
2191 #define ALT_L3_SEC_L4SPIM_SCANMGR_SET(value) (((value) << 2) & 0x00000004)
2192 
2193 #ifndef __ASSEMBLY__
2194 
2205 {
2206  uint32_t spim0 : 1;
2207  uint32_t spim1 : 1;
2208  uint32_t scanmgr : 1;
2209  uint32_t : 29;
2210 };
2211 
2214 #endif /* __ASSEMBLY__ */
2215 
2217 #define ALT_L3_SEC_L4SPIM_OFST 0x10
2218 
2254 #define ALT_L3_SEC_STM_S_E_SECURE 0x0
2255 
2260 #define ALT_L3_SEC_STM_S_E_NONSECURE 0x1
2261 
2263 #define ALT_L3_SEC_STM_S_LSB 0
2264 
2265 #define ALT_L3_SEC_STM_S_MSB 0
2266 
2267 #define ALT_L3_SEC_STM_S_WIDTH 1
2268 
2269 #define ALT_L3_SEC_STM_S_SET_MSK 0x00000001
2270 
2271 #define ALT_L3_SEC_STM_S_CLR_MSK 0xfffffffe
2272 
2273 #define ALT_L3_SEC_STM_S_RESET 0x0
2274 
2275 #define ALT_L3_SEC_STM_S_GET(value) (((value) & 0x00000001) >> 0)
2276 
2277 #define ALT_L3_SEC_STM_S_SET(value) (((value) << 0) & 0x00000001)
2278 
2279 #ifndef __ASSEMBLY__
2280 
2291 {
2292  uint32_t s : 1;
2293  uint32_t : 31;
2294 };
2295 
2297 typedef volatile struct ALT_L3_SEC_STM_s ALT_L3_SEC_STM_t;
2298 #endif /* __ASSEMBLY__ */
2299 
2301 #define ALT_L3_SEC_STM_OFST 0x14
2302 
2339 #define ALT_L3_SEC_LWH2F_S_E_SECURE 0x0
2340 
2345 #define ALT_L3_SEC_LWH2F_S_E_NONSECURE 0x1
2346 
2348 #define ALT_L3_SEC_LWH2F_S_LSB 0
2349 
2350 #define ALT_L3_SEC_LWH2F_S_MSB 0
2351 
2352 #define ALT_L3_SEC_LWH2F_S_WIDTH 1
2353 
2354 #define ALT_L3_SEC_LWH2F_S_SET_MSK 0x00000001
2355 
2356 #define ALT_L3_SEC_LWH2F_S_CLR_MSK 0xfffffffe
2357 
2358 #define ALT_L3_SEC_LWH2F_S_RESET 0x0
2359 
2360 #define ALT_L3_SEC_LWH2F_S_GET(value) (((value) & 0x00000001) >> 0)
2361 
2362 #define ALT_L3_SEC_LWH2F_S_SET(value) (((value) << 0) & 0x00000001)
2363 
2364 #ifndef __ASSEMBLY__
2365 
2376 {
2377  uint32_t s : 1;
2378  uint32_t : 31;
2379 };
2380 
2382 typedef volatile struct ALT_L3_SEC_LWH2F_s ALT_L3_SEC_LWH2F_t;
2383 #endif /* __ASSEMBLY__ */
2384 
2386 #define ALT_L3_SEC_LWH2F_OFST 0x18
2387 
2424 #define ALT_L3_SEC_USB1_S_E_SECURE 0x0
2425 
2430 #define ALT_L3_SEC_USB1_S_E_NONSECURE 0x1
2431 
2433 #define ALT_L3_SEC_USB1_S_LSB 0
2434 
2435 #define ALT_L3_SEC_USB1_S_MSB 0
2436 
2437 #define ALT_L3_SEC_USB1_S_WIDTH 1
2438 
2439 #define ALT_L3_SEC_USB1_S_SET_MSK 0x00000001
2440 
2441 #define ALT_L3_SEC_USB1_S_CLR_MSK 0xfffffffe
2442 
2443 #define ALT_L3_SEC_USB1_S_RESET 0x0
2444 
2445 #define ALT_L3_SEC_USB1_S_GET(value) (((value) & 0x00000001) >> 0)
2446 
2447 #define ALT_L3_SEC_USB1_S_SET(value) (((value) << 0) & 0x00000001)
2448 
2449 #ifndef __ASSEMBLY__
2450 
2461 {
2462  uint32_t s : 1;
2463  uint32_t : 31;
2464 };
2465 
2467 typedef volatile struct ALT_L3_SEC_USB1_s ALT_L3_SEC_USB1_t;
2468 #endif /* __ASSEMBLY__ */
2469 
2471 #define ALT_L3_SEC_USB1_OFST 0x20
2472 
2509 #define ALT_L3_SEC_NANDDATA_S_E_SECURE 0x0
2510 
2515 #define ALT_L3_SEC_NANDDATA_S_E_NONSECURE 0x1
2516 
2518 #define ALT_L3_SEC_NANDDATA_S_LSB 0
2519 
2520 #define ALT_L3_SEC_NANDDATA_S_MSB 0
2521 
2522 #define ALT_L3_SEC_NANDDATA_S_WIDTH 1
2523 
2524 #define ALT_L3_SEC_NANDDATA_S_SET_MSK 0x00000001
2525 
2526 #define ALT_L3_SEC_NANDDATA_S_CLR_MSK 0xfffffffe
2527 
2528 #define ALT_L3_SEC_NANDDATA_S_RESET 0x0
2529 
2530 #define ALT_L3_SEC_NANDDATA_S_GET(value) (((value) & 0x00000001) >> 0)
2531 
2532 #define ALT_L3_SEC_NANDDATA_S_SET(value) (((value) << 0) & 0x00000001)
2533 
2534 #ifndef __ASSEMBLY__
2535 
2546 {
2547  uint32_t s : 1;
2548  uint32_t : 31;
2549 };
2550 
2553 #endif /* __ASSEMBLY__ */
2554 
2556 #define ALT_L3_SEC_NANDDATA_OFST 0x24
2557 
2594 #define ALT_L3_SEC_USB0_S_E_SECURE 0x0
2595 
2600 #define ALT_L3_SEC_USB0_S_E_NONSECURE 0x1
2601 
2603 #define ALT_L3_SEC_USB0_S_LSB 0
2604 
2605 #define ALT_L3_SEC_USB0_S_MSB 0
2606 
2607 #define ALT_L3_SEC_USB0_S_WIDTH 1
2608 
2609 #define ALT_L3_SEC_USB0_S_SET_MSK 0x00000001
2610 
2611 #define ALT_L3_SEC_USB0_S_CLR_MSK 0xfffffffe
2612 
2613 #define ALT_L3_SEC_USB0_S_RESET 0x0
2614 
2615 #define ALT_L3_SEC_USB0_S_GET(value) (((value) & 0x00000001) >> 0)
2616 
2617 #define ALT_L3_SEC_USB0_S_SET(value) (((value) << 0) & 0x00000001)
2618 
2619 #ifndef __ASSEMBLY__
2620 
2631 {
2632  uint32_t s : 1;
2633  uint32_t : 31;
2634 };
2635 
2637 typedef volatile struct ALT_L3_SEC_USB0_s ALT_L3_SEC_USB0_t;
2638 #endif /* __ASSEMBLY__ */
2639 
2641 #define ALT_L3_SEC_USB0_OFST 0x78
2642 
2679 #define ALT_L3_SEC_NAND_S_E_SECURE 0x0
2680 
2685 #define ALT_L3_SEC_NAND_S_E_NONSECURE 0x1
2686 
2688 #define ALT_L3_SEC_NAND_S_LSB 0
2689 
2690 #define ALT_L3_SEC_NAND_S_MSB 0
2691 
2692 #define ALT_L3_SEC_NAND_S_WIDTH 1
2693 
2694 #define ALT_L3_SEC_NAND_S_SET_MSK 0x00000001
2695 
2696 #define ALT_L3_SEC_NAND_S_CLR_MSK 0xfffffffe
2697 
2698 #define ALT_L3_SEC_NAND_S_RESET 0x0
2699 
2700 #define ALT_L3_SEC_NAND_S_GET(value) (((value) & 0x00000001) >> 0)
2701 
2702 #define ALT_L3_SEC_NAND_S_SET(value) (((value) << 0) & 0x00000001)
2703 
2704 #ifndef __ASSEMBLY__
2705 
2716 {
2717  uint32_t s : 1;
2718  uint32_t : 31;
2719 };
2720 
2722 typedef volatile struct ALT_L3_SEC_NAND_s ALT_L3_SEC_NAND_t;
2723 #endif /* __ASSEMBLY__ */
2724 
2726 #define ALT_L3_SEC_NAND_OFST 0x7c
2727 
2764 #define ALT_L3_SEC_QSPIDATA_S_E_SECURE 0x0
2765 
2770 #define ALT_L3_SEC_QSPIDATA_S_E_NONSECURE 0x1
2771 
2773 #define ALT_L3_SEC_QSPIDATA_S_LSB 0
2774 
2775 #define ALT_L3_SEC_QSPIDATA_S_MSB 0
2776 
2777 #define ALT_L3_SEC_QSPIDATA_S_WIDTH 1
2778 
2779 #define ALT_L3_SEC_QSPIDATA_S_SET_MSK 0x00000001
2780 
2781 #define ALT_L3_SEC_QSPIDATA_S_CLR_MSK 0xfffffffe
2782 
2783 #define ALT_L3_SEC_QSPIDATA_S_RESET 0x0
2784 
2785 #define ALT_L3_SEC_QSPIDATA_S_GET(value) (((value) & 0x00000001) >> 0)
2786 
2787 #define ALT_L3_SEC_QSPIDATA_S_SET(value) (((value) << 0) & 0x00000001)
2788 
2789 #ifndef __ASSEMBLY__
2790 
2801 {
2802  uint32_t s : 1;
2803  uint32_t : 31;
2804 };
2805 
2808 #endif /* __ASSEMBLY__ */
2809 
2811 #define ALT_L3_SEC_QSPIDATA_OFST 0x80
2812 
2849 #define ALT_L3_SEC_FPGAMGRDATA_S_E_SECURE 0x0
2850 
2855 #define ALT_L3_SEC_FPGAMGRDATA_S_E_NONSECURE 0x1
2856 
2858 #define ALT_L3_SEC_FPGAMGRDATA_S_LSB 0
2859 
2860 #define ALT_L3_SEC_FPGAMGRDATA_S_MSB 0
2861 
2862 #define ALT_L3_SEC_FPGAMGRDATA_S_WIDTH 1
2863 
2864 #define ALT_L3_SEC_FPGAMGRDATA_S_SET_MSK 0x00000001
2865 
2866 #define ALT_L3_SEC_FPGAMGRDATA_S_CLR_MSK 0xfffffffe
2867 
2868 #define ALT_L3_SEC_FPGAMGRDATA_S_RESET 0x0
2869 
2870 #define ALT_L3_SEC_FPGAMGRDATA_S_GET(value) (((value) & 0x00000001) >> 0)
2871 
2872 #define ALT_L3_SEC_FPGAMGRDATA_S_SET(value) (((value) << 0) & 0x00000001)
2873 
2874 #ifndef __ASSEMBLY__
2875 
2886 {
2887  uint32_t s : 1;
2888  uint32_t : 31;
2889 };
2890 
2893 #endif /* __ASSEMBLY__ */
2894 
2896 #define ALT_L3_SEC_FPGAMGRDATA_OFST 0x84
2897 
2934 #define ALT_L3_SEC_H2F_S_E_SECURE 0x0
2935 
2940 #define ALT_L3_SEC_H2F_S_E_NONSECURE 0x1
2941 
2943 #define ALT_L3_SEC_H2F_S_LSB 0
2944 
2945 #define ALT_L3_SEC_H2F_S_MSB 0
2946 
2947 #define ALT_L3_SEC_H2F_S_WIDTH 1
2948 
2949 #define ALT_L3_SEC_H2F_S_SET_MSK 0x00000001
2950 
2951 #define ALT_L3_SEC_H2F_S_CLR_MSK 0xfffffffe
2952 
2953 #define ALT_L3_SEC_H2F_S_RESET 0x0
2954 
2955 #define ALT_L3_SEC_H2F_S_GET(value) (((value) & 0x00000001) >> 0)
2956 
2957 #define ALT_L3_SEC_H2F_S_SET(value) (((value) << 0) & 0x00000001)
2958 
2959 #ifndef __ASSEMBLY__
2960 
2971 {
2972  uint32_t s : 1;
2973  uint32_t : 31;
2974 };
2975 
2977 typedef volatile struct ALT_L3_SEC_H2F_s ALT_L3_SEC_H2F_t;
2978 #endif /* __ASSEMBLY__ */
2979 
2981 #define ALT_L3_SEC_H2F_OFST 0x88
2982 
3018 #define ALT_L3_SEC_ACP_S_E_SECURE 0x0
3019 
3024 #define ALT_L3_SEC_ACP_S_E_NONSECURE 0x1
3025 
3027 #define ALT_L3_SEC_ACP_S_LSB 0
3028 
3029 #define ALT_L3_SEC_ACP_S_MSB 0
3030 
3031 #define ALT_L3_SEC_ACP_S_WIDTH 1
3032 
3033 #define ALT_L3_SEC_ACP_S_SET_MSK 0x00000001
3034 
3035 #define ALT_L3_SEC_ACP_S_CLR_MSK 0xfffffffe
3036 
3037 #define ALT_L3_SEC_ACP_S_RESET 0x0
3038 
3039 #define ALT_L3_SEC_ACP_S_GET(value) (((value) & 0x00000001) >> 0)
3040 
3041 #define ALT_L3_SEC_ACP_S_SET(value) (((value) << 0) & 0x00000001)
3042 
3043 #ifndef __ASSEMBLY__
3044 
3055 {
3056  uint32_t s : 1;
3057  uint32_t : 31;
3058 };
3059 
3061 typedef volatile struct ALT_L3_SEC_ACP_s ALT_L3_SEC_ACP_t;
3062 #endif /* __ASSEMBLY__ */
3063 
3065 #define ALT_L3_SEC_ACP_OFST 0x8c
3066 
3102 #define ALT_L3_SEC_ROM_S_E_SECURE 0x0
3103 
3108 #define ALT_L3_SEC_ROM_S_E_NONSECURE 0x1
3109 
3111 #define ALT_L3_SEC_ROM_S_LSB 0
3112 
3113 #define ALT_L3_SEC_ROM_S_MSB 0
3114 
3115 #define ALT_L3_SEC_ROM_S_WIDTH 1
3116 
3117 #define ALT_L3_SEC_ROM_S_SET_MSK 0x00000001
3118 
3119 #define ALT_L3_SEC_ROM_S_CLR_MSK 0xfffffffe
3120 
3121 #define ALT_L3_SEC_ROM_S_RESET 0x0
3122 
3123 #define ALT_L3_SEC_ROM_S_GET(value) (((value) & 0x00000001) >> 0)
3124 
3125 #define ALT_L3_SEC_ROM_S_SET(value) (((value) << 0) & 0x00000001)
3126 
3127 #ifndef __ASSEMBLY__
3128 
3139 {
3140  uint32_t s : 1;
3141  uint32_t : 31;
3142 };
3143 
3145 typedef volatile struct ALT_L3_SEC_ROM_s ALT_L3_SEC_ROM_t;
3146 #endif /* __ASSEMBLY__ */
3147 
3149 #define ALT_L3_SEC_ROM_OFST 0x90
3150 
3186 #define ALT_L3_SEC_OCRAM_S_E_SECURE 0x0
3187 
3192 #define ALT_L3_SEC_OCRAM_S_E_NONSECURE 0x1
3193 
3195 #define ALT_L3_SEC_OCRAM_S_LSB 0
3196 
3197 #define ALT_L3_SEC_OCRAM_S_MSB 0
3198 
3199 #define ALT_L3_SEC_OCRAM_S_WIDTH 1
3200 
3201 #define ALT_L3_SEC_OCRAM_S_SET_MSK 0x00000001
3202 
3203 #define ALT_L3_SEC_OCRAM_S_CLR_MSK 0xfffffffe
3204 
3205 #define ALT_L3_SEC_OCRAM_S_RESET 0x0
3206 
3207 #define ALT_L3_SEC_OCRAM_S_GET(value) (((value) & 0x00000001) >> 0)
3208 
3209 #define ALT_L3_SEC_OCRAM_S_SET(value) (((value) << 0) & 0x00000001)
3210 
3211 #ifndef __ASSEMBLY__
3212 
3223 {
3224  uint32_t s : 1;
3225  uint32_t : 31;
3226 };
3227 
3229 typedef volatile struct ALT_L3_SEC_OCRAM_s ALT_L3_SEC_OCRAM_t;
3230 #endif /* __ASSEMBLY__ */
3231 
3233 #define ALT_L3_SEC_OCRAM_OFST 0x94
3234 
3270 #define ALT_L3_SEC_SDRDATA_S_E_SECURE 0x0
3271 
3276 #define ALT_L3_SEC_SDRDATA_S_E_NONSECURE 0x1
3277 
3279 #define ALT_L3_SEC_SDRDATA_S_LSB 0
3280 
3281 #define ALT_L3_SEC_SDRDATA_S_MSB 0
3282 
3283 #define ALT_L3_SEC_SDRDATA_S_WIDTH 1
3284 
3285 #define ALT_L3_SEC_SDRDATA_S_SET_MSK 0x00000001
3286 
3287 #define ALT_L3_SEC_SDRDATA_S_CLR_MSK 0xfffffffe
3288 
3289 #define ALT_L3_SEC_SDRDATA_S_RESET 0x0
3290 
3291 #define ALT_L3_SEC_SDRDATA_S_GET(value) (((value) & 0x00000001) >> 0)
3292 
3293 #define ALT_L3_SEC_SDRDATA_S_SET(value) (((value) << 0) & 0x00000001)
3294 
3295 #ifndef __ASSEMBLY__
3296 
3307 {
3308  uint32_t s : 1;
3309  uint32_t : 31;
3310 };
3311 
3314 #endif /* __ASSEMBLY__ */
3315 
3317 #define ALT_L3_SEC_SDRDATA_OFST 0x98
3318 
3319 #ifndef __ASSEMBLY__
3320 
3331 {
3339  volatile uint32_t _pad_0x1c_0x1f;
3342  volatile uint32_t _pad_0x28_0x77[20];
3352 };
3353 
3355 typedef volatile struct ALT_L3_SECGRP_s ALT_L3_SECGRP_t;
3358 {
3359  volatile uint32_t l4main;
3360  volatile uint32_t l4sp;
3361  volatile uint32_t l4mp;
3362  volatile uint32_t l4osc1;
3363  volatile uint32_t l4spim;
3364  volatile uint32_t stm;
3365  volatile uint32_t lwhps2fpgaregs;
3366  volatile uint32_t _pad_0x1c_0x1f;
3367  volatile uint32_t usb1;
3368  volatile uint32_t nanddata;
3369  volatile uint32_t _pad_0x28_0x77[20];
3370  volatile uint32_t usb0;
3371  volatile uint32_t nandregs;
3372  volatile uint32_t qspidata;
3373  volatile uint32_t fpgamgrdata;
3374  volatile uint32_t hps2fpgaregs;
3375  volatile uint32_t acp;
3376  volatile uint32_t rom;
3377  volatile uint32_t ocram;
3378  volatile uint32_t sdrdata;
3379 };
3380 
3383 #endif /* __ASSEMBLY__ */
3384 
3415 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_LSB 0
3416 
3417 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_MSB 7
3418 
3419 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_WIDTH 8
3420 
3421 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_SET_MSK 0x000000ff
3422 
3423 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_CLR_MSK 0xffffff00
3424 
3425 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_RESET 0x4
3426 
3427 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_GET(value) (((value) & 0x000000ff) >> 0)
3428 
3429 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_SET(value) (((value) << 0) & 0x000000ff)
3430 
3431 #ifndef __ASSEMBLY__
3432 
3443 {
3444  const uint32_t periph_id_4 : 8;
3445  uint32_t : 24;
3446 };
3447 
3450 #endif /* __ASSEMBLY__ */
3451 
3453 #define ALT_L3_ID_PERIPH_ID_4_OFST 0xfd0
3454 
3477 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_LSB 0
3478 
3479 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_MSB 7
3480 
3481 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_WIDTH 8
3482 
3483 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET_MSK 0x000000ff
3484 
3485 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_CLR_MSK 0xffffff00
3486 
3487 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_RESET 0x1
3488 
3489 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_GET(value) (((value) & 0x000000ff) >> 0)
3490 
3491 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET(value) (((value) << 0) & 0x000000ff)
3492 
3493 #ifndef __ASSEMBLY__
3494 
3505 {
3506  const uint32_t pn7to0 : 8;
3507  uint32_t : 24;
3508 };
3509 
3512 #endif /* __ASSEMBLY__ */
3513 
3515 #define ALT_L3_ID_PERIPH_ID_0_OFST 0xfe0
3516 
3539 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_LSB 0
3540 
3541 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_MSB 7
3542 
3543 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_WIDTH 8
3544 
3545 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET_MSK 0x000000ff
3546 
3547 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_CLR_MSK 0xffffff00
3548 
3549 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_RESET 0xb3
3550 
3551 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_GET(value) (((value) & 0x000000ff) >> 0)
3552 
3553 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET(value) (((value) << 0) & 0x000000ff)
3554 
3555 #ifndef __ASSEMBLY__
3556 
3567 {
3568  const uint32_t jep3to0_pn11to8 : 8;
3569  uint32_t : 24;
3570 };
3571 
3574 #endif /* __ASSEMBLY__ */
3575 
3577 #define ALT_L3_ID_PERIPH_ID_1_OFST 0xfe4
3578 
3601 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_LSB 0
3602 
3603 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_MSB 7
3604 
3605 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_WIDTH 8
3606 
3607 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET_MSK 0x000000ff
3608 
3609 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_CLR_MSK 0xffffff00
3610 
3611 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_RESET 0x6b
3612 
3613 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_GET(value) (((value) & 0x000000ff) >> 0)
3614 
3615 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET(value) (((value) << 0) & 0x000000ff)
3616 
3617 #ifndef __ASSEMBLY__
3618 
3629 {
3630  const uint32_t rev_jepcode_jep6to4 : 8;
3631  uint32_t : 24;
3632 };
3633 
3636 #endif /* __ASSEMBLY__ */
3637 
3639 #define ALT_L3_ID_PERIPH_ID_2_OFST 0xfe8
3640 
3664 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_LSB 0
3665 
3666 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_MSB 3
3667 
3668 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_WIDTH 4
3669 
3670 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_SET_MSK 0x0000000f
3671 
3672 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_CLR_MSK 0xfffffff0
3673 
3674 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_RESET 0x0
3675 
3676 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_GET(value) (((value) & 0x0000000f) >> 0)
3677 
3678 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_SET(value) (((value) << 0) & 0x0000000f)
3679 
3689 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_LSB 4
3690 
3691 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_MSB 7
3692 
3693 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_WIDTH 4
3694 
3695 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_SET_MSK 0x000000f0
3696 
3697 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_CLR_MSK 0xffffff0f
3698 
3699 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_RESET 0x0
3700 
3701 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_GET(value) (((value) & 0x000000f0) >> 4)
3702 
3703 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_SET(value) (((value) << 4) & 0x000000f0)
3704 
3705 #ifndef __ASSEMBLY__
3706 
3717 {
3718  const uint32_t cust_mod_num : 4;
3719  const uint32_t rev_and : 4;
3720  uint32_t : 24;
3721 };
3722 
3725 #endif /* __ASSEMBLY__ */
3726 
3728 #define ALT_L3_ID_PERIPH_ID_3_OFST 0xfec
3729 
3752 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_LSB 0
3753 
3754 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_MSB 7
3755 
3756 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_WIDTH 8
3757 
3758 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_SET_MSK 0x000000ff
3759 
3760 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_CLR_MSK 0xffffff00
3761 
3762 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_RESET 0xd
3763 
3764 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3765 
3766 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3767 
3768 #ifndef __ASSEMBLY__
3769 
3780 {
3781  const uint32_t preamble : 8;
3782  uint32_t : 24;
3783 };
3784 
3787 #endif /* __ASSEMBLY__ */
3788 
3790 #define ALT_L3_ID_COMP_ID_0_OFST 0xff0
3791 
3814 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_LSB 0
3815 
3816 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_MSB 7
3817 
3818 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_WIDTH 8
3819 
3820 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET_MSK 0x000000ff
3821 
3822 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_CLR_MSK 0xffffff00
3823 
3824 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_RESET 0xf0
3825 
3826 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3827 
3828 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3829 
3830 #ifndef __ASSEMBLY__
3831 
3842 {
3843  const uint32_t genipcompcls_preamble : 8;
3844  uint32_t : 24;
3845 };
3846 
3849 #endif /* __ASSEMBLY__ */
3850 
3852 #define ALT_L3_ID_COMP_ID_1_OFST 0xff4
3853 
3876 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_LSB 0
3877 
3878 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_MSB 7
3879 
3880 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_WIDTH 8
3881 
3882 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_SET_MSK 0x000000ff
3883 
3884 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_CLR_MSK 0xffffff00
3885 
3886 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_RESET 0x5
3887 
3888 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3889 
3890 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3891 
3892 #ifndef __ASSEMBLY__
3893 
3904 {
3905  const uint32_t preamble : 8;
3906  uint32_t : 24;
3907 };
3908 
3911 #endif /* __ASSEMBLY__ */
3912 
3914 #define ALT_L3_ID_COMP_ID_2_OFST 0xff8
3915 
3938 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_LSB 0
3939 
3940 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_MSB 7
3941 
3942 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_WIDTH 8
3943 
3944 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_SET_MSK 0x000000ff
3945 
3946 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_CLR_MSK 0xffffff00
3947 
3948 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_RESET 0xb1
3949 
3950 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3951 
3952 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3953 
3954 #ifndef __ASSEMBLY__
3955 
3966 {
3967  const uint32_t preamble : 8;
3968  uint32_t : 24;
3969 };
3970 
3973 #endif /* __ASSEMBLY__ */
3974 
3976 #define ALT_L3_ID_COMP_ID_3_OFST 0xffc
3977 
3978 #ifndef __ASSEMBLY__
3979 
3990 {
3991  volatile uint32_t _pad_0x0_0xfcf[1012];
3993  volatile uint32_t _pad_0xfd4_0xfdf[3];
4002 };
4003 
4005 typedef volatile struct ALT_L3_IDGRP_s ALT_L3_IDGRP_t;
4008 {
4009  volatile uint32_t _pad_0x0_0xfcf[1012];
4010  volatile uint32_t periph_id_4;
4011  volatile uint32_t _pad_0xfd4_0xfdf[3];
4012  volatile uint32_t periph_id_0;
4013  volatile uint32_t periph_id_1;
4014  volatile uint32_t periph_id_2;
4015  volatile uint32_t periph_id_3;
4016  volatile uint32_t comp_id_0;
4017  volatile uint32_t comp_id_1;
4018  volatile uint32_t comp_id_2;
4019  volatile uint32_t comp_id_3;
4020 };
4021 
4023 typedef volatile struct ALT_L3_IDGRP_raw_s ALT_L3_IDGRP_raw_t;
4024 #endif /* __ASSEMBLY__ */
4025 
4076 #define ALT_L3_FN_MOD_BM_ISS_RD_E_MULT 0x0
4077 
4082 #define ALT_L3_FN_MOD_BM_ISS_RD_E_SINGLE 0x1
4083 
4085 #define ALT_L3_FN_MOD_BM_ISS_RD_LSB 0
4086 
4087 #define ALT_L3_FN_MOD_BM_ISS_RD_MSB 0
4088 
4089 #define ALT_L3_FN_MOD_BM_ISS_RD_WIDTH 1
4090 
4091 #define ALT_L3_FN_MOD_BM_ISS_RD_SET_MSK 0x00000001
4092 
4093 #define ALT_L3_FN_MOD_BM_ISS_RD_CLR_MSK 0xfffffffe
4094 
4095 #define ALT_L3_FN_MOD_BM_ISS_RD_RESET 0x0
4096 
4097 #define ALT_L3_FN_MOD_BM_ISS_RD_GET(value) (((value) & 0x00000001) >> 0)
4098 
4099 #define ALT_L3_FN_MOD_BM_ISS_RD_SET(value) (((value) << 0) & 0x00000001)
4100 
4119 #define ALT_L3_FN_MOD_BM_ISS_WR_E_MULT 0x0
4120 
4125 #define ALT_L3_FN_MOD_BM_ISS_WR_E_SINGLE 0x1
4126 
4128 #define ALT_L3_FN_MOD_BM_ISS_WR_LSB 1
4129 
4130 #define ALT_L3_FN_MOD_BM_ISS_WR_MSB 1
4131 
4132 #define ALT_L3_FN_MOD_BM_ISS_WR_WIDTH 1
4133 
4134 #define ALT_L3_FN_MOD_BM_ISS_WR_SET_MSK 0x00000002
4135 
4136 #define ALT_L3_FN_MOD_BM_ISS_WR_CLR_MSK 0xfffffffd
4137 
4138 #define ALT_L3_FN_MOD_BM_ISS_WR_RESET 0x0
4139 
4140 #define ALT_L3_FN_MOD_BM_ISS_WR_GET(value) (((value) & 0x00000002) >> 1)
4141 
4142 #define ALT_L3_FN_MOD_BM_ISS_WR_SET(value) (((value) << 1) & 0x00000002)
4143 
4144 #ifndef __ASSEMBLY__
4145 
4156 {
4157  uint32_t rd : 1;
4158  uint32_t wr : 1;
4159  uint32_t : 30;
4160 };
4161 
4164 #endif /* __ASSEMBLY__ */
4165 
4167 #define ALT_L3_FN_MOD_BM_ISS_OFST 0x8
4168 
4169 #define ALT_L3_FN_MOD_BM_ISS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_BM_ISS_OFST))
4170 
4171 #ifndef __ASSEMBLY__
4172 
4183 {
4184  volatile uint32_t _pad_0x0_0x7[2];
4186 };
4187 
4192 {
4193  volatile uint32_t _pad_0x0_0x7[2];
4194  volatile uint32_t fn_mod_bm_iss;
4195 };
4196 
4199 #endif /* __ASSEMBLY__ */
4200 
4210 #ifndef __ASSEMBLY__
4211 
4222 {
4223  volatile uint32_t _pad_0x0_0x7[2];
4225 };
4226 
4228 typedef volatile struct ALT_L3_MST_L4SP_s ALT_L3_MST_L4SP_t;
4231 {
4232  volatile uint32_t _pad_0x0_0x7[2];
4233  volatile uint32_t fn_mod_bm_iss;
4234 };
4235 
4238 #endif /* __ASSEMBLY__ */
4239 
4249 #ifndef __ASSEMBLY__
4250 
4261 {
4262  volatile uint32_t _pad_0x0_0x7[2];
4264 };
4265 
4267 typedef volatile struct ALT_L3_MST_L4MP_s ALT_L3_MST_L4MP_t;
4270 {
4271  volatile uint32_t _pad_0x0_0x7[2];
4272  volatile uint32_t fn_mod_bm_iss;
4273 };
4274 
4277 #endif /* __ASSEMBLY__ */
4278 
4288 #ifndef __ASSEMBLY__
4289 
4300 {
4301  volatile uint32_t _pad_0x0_0x7[2];
4303 };
4304 
4309 {
4310  volatile uint32_t _pad_0x0_0x7[2];
4311  volatile uint32_t fn_mod_bm_iss;
4312 };
4313 
4316 #endif /* __ASSEMBLY__ */
4317 
4327 #ifndef __ASSEMBLY__
4328 
4339 {
4340  volatile uint32_t _pad_0x0_0x7[2];
4342 };
4343 
4348 {
4349  volatile uint32_t _pad_0x0_0x7[2];
4350  volatile uint32_t fn_mod_bm_iss;
4351 };
4352 
4355 #endif /* __ASSEMBLY__ */
4356 
4399 #define ALT_L3_FN_MOD_RD_E_MULT 0x0
4400 
4405 #define ALT_L3_FN_MOD_RD_E_SINGLE 0x1
4406 
4408 #define ALT_L3_FN_MOD_RD_LSB 0
4409 
4410 #define ALT_L3_FN_MOD_RD_MSB 0
4411 
4412 #define ALT_L3_FN_MOD_RD_WIDTH 1
4413 
4414 #define ALT_L3_FN_MOD_RD_SET_MSK 0x00000001
4415 
4416 #define ALT_L3_FN_MOD_RD_CLR_MSK 0xfffffffe
4417 
4418 #define ALT_L3_FN_MOD_RD_RESET 0x0
4419 
4420 #define ALT_L3_FN_MOD_RD_GET(value) (((value) & 0x00000001) >> 0)
4421 
4422 #define ALT_L3_FN_MOD_RD_SET(value) (((value) << 0) & 0x00000001)
4423 
4442 #define ALT_L3_FN_MOD_WR_E_MULT 0x0
4443 
4448 #define ALT_L3_FN_MOD_WR_E_SINGLE 0x1
4449 
4451 #define ALT_L3_FN_MOD_WR_LSB 1
4452 
4453 #define ALT_L3_FN_MOD_WR_MSB 1
4454 
4455 #define ALT_L3_FN_MOD_WR_WIDTH 1
4456 
4457 #define ALT_L3_FN_MOD_WR_SET_MSK 0x00000002
4458 
4459 #define ALT_L3_FN_MOD_WR_CLR_MSK 0xfffffffd
4460 
4461 #define ALT_L3_FN_MOD_WR_RESET 0x0
4462 
4463 #define ALT_L3_FN_MOD_WR_GET(value) (((value) & 0x00000002) >> 1)
4464 
4465 #define ALT_L3_FN_MOD_WR_SET(value) (((value) << 1) & 0x00000002)
4466 
4467 #ifndef __ASSEMBLY__
4468 
4479 {
4480  uint32_t rd : 1;
4481  uint32_t wr : 1;
4482  uint32_t : 30;
4483 };
4484 
4486 typedef volatile struct ALT_L3_FN_MOD_s ALT_L3_FN_MOD_t;
4487 #endif /* __ASSEMBLY__ */
4488 
4490 #define ALT_L3_FN_MOD_OFST 0x108
4491 
4492 #define ALT_L3_FN_MOD_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_OFST))
4493 
4494 #ifndef __ASSEMBLY__
4495 
4506 {
4507  volatile uint32_t _pad_0x0_0x7[2];
4509  volatile uint32_t _pad_0xc_0x107[63];
4511 };
4512 
4514 typedef volatile struct ALT_L3_MST_STM_s ALT_L3_MST_STM_t;
4517 {
4518  volatile uint32_t _pad_0x0_0x7[2];
4519  volatile uint32_t fn_mod_bm_iss;
4520  volatile uint32_t _pad_0xc_0x107[63];
4521  volatile uint32_t fn_mod;
4522 };
4523 
4526 #endif /* __ASSEMBLY__ */
4527 
4539 #ifndef __ASSEMBLY__
4540 
4551 {
4552  volatile uint32_t _pad_0x0_0x7[2];
4554  volatile uint32_t _pad_0xc_0x107[63];
4556 };
4557 
4559 typedef volatile struct ALT_L3_MST_LWH2F_s ALT_L3_MST_LWH2F_t;
4562 {
4563  volatile uint32_t _pad_0x0_0x7[2];
4564  volatile uint32_t fn_mod_bm_iss;
4565  volatile uint32_t _pad_0xc_0x107[63];
4566  volatile uint32_t fn_mod;
4567 };
4568 
4571 #endif /* __ASSEMBLY__ */
4572 
4617 #define ALT_L3_AHB_CNTL_DECERR_EN_E_DIS 0x0
4618 
4624 #define ALT_L3_AHB_CNTL_DECERR_EN_E_EN 0x1
4625 
4627 #define ALT_L3_AHB_CNTL_DECERR_EN_LSB 0
4628 
4629 #define ALT_L3_AHB_CNTL_DECERR_EN_MSB 0
4630 
4631 #define ALT_L3_AHB_CNTL_DECERR_EN_WIDTH 1
4632 
4633 #define ALT_L3_AHB_CNTL_DECERR_EN_SET_MSK 0x00000001
4634 
4635 #define ALT_L3_AHB_CNTL_DECERR_EN_CLR_MSK 0xfffffffe
4636 
4637 #define ALT_L3_AHB_CNTL_DECERR_EN_RESET 0x0
4638 
4639 #define ALT_L3_AHB_CNTL_DECERR_EN_GET(value) (((value) & 0x00000001) >> 0)
4640 
4641 #define ALT_L3_AHB_CNTL_DECERR_EN_SET(value) (((value) << 0) & 0x00000001)
4642 
4665 #define ALT_L3_AHB_CNTL_FORCE_INCR_E_DIS 0x0
4666 
4673 #define ALT_L3_AHB_CNTL_FORCE_INCR_E_EN 0x1
4674 
4676 #define ALT_L3_AHB_CNTL_FORCE_INCR_LSB 1
4677 
4678 #define ALT_L3_AHB_CNTL_FORCE_INCR_MSB 1
4679 
4680 #define ALT_L3_AHB_CNTL_FORCE_INCR_WIDTH 1
4681 
4682 #define ALT_L3_AHB_CNTL_FORCE_INCR_SET_MSK 0x00000002
4683 
4684 #define ALT_L3_AHB_CNTL_FORCE_INCR_CLR_MSK 0xfffffffd
4685 
4686 #define ALT_L3_AHB_CNTL_FORCE_INCR_RESET 0x0
4687 
4688 #define ALT_L3_AHB_CNTL_FORCE_INCR_GET(value) (((value) & 0x00000002) >> 1)
4689 
4690 #define ALT_L3_AHB_CNTL_FORCE_INCR_SET(value) (((value) << 1) & 0x00000002)
4691 
4692 #ifndef __ASSEMBLY__
4693 
4704 {
4705  uint32_t decerr_en : 1;
4706  uint32_t force_incr : 1;
4707  uint32_t : 30;
4708 };
4709 
4711 typedef volatile struct ALT_L3_AHB_CNTL_s ALT_L3_AHB_CNTL_t;
4712 #endif /* __ASSEMBLY__ */
4713 
4715 #define ALT_L3_AHB_CNTL_OFST 0x44
4716 
4717 #define ALT_L3_AHB_CNTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_AHB_CNTL_OFST))
4718 
4719 #ifndef __ASSEMBLY__
4720 
4731 {
4732  volatile uint32_t _pad_0x0_0x7[2];
4734  volatile uint32_t _pad_0xc_0x43[14];
4736 };
4737 
4739 typedef volatile struct ALT_L3_MST_USB1_s ALT_L3_MST_USB1_t;
4742 {
4743  volatile uint32_t _pad_0x0_0x7[2];
4744  volatile uint32_t fn_mod_bm_iss;
4745  volatile uint32_t _pad_0xc_0x43[14];
4746  volatile uint32_t ahb_cntl;
4747 };
4748 
4751 #endif /* __ASSEMBLY__ */
4752 
4762 #ifndef __ASSEMBLY__
4763 
4774 {
4775  volatile uint32_t _pad_0x0_0x7[2];
4777  volatile uint32_t _pad_0xc_0x107[63];
4779 };
4780 
4785 {
4786  volatile uint32_t _pad_0x0_0x7[2];
4787  volatile uint32_t fn_mod_bm_iss;
4788  volatile uint32_t _pad_0xc_0x107[63];
4789  volatile uint32_t fn_mod;
4790 };
4791 
4794 #endif /* __ASSEMBLY__ */
4795 
4805 #ifndef __ASSEMBLY__
4806 
4817 {
4818  volatile uint32_t _pad_0x0_0x7[2];
4820  volatile uint32_t _pad_0xc_0x43[14];
4822 };
4823 
4825 typedef volatile struct ALT_L3_MST_USB0_s ALT_L3_MST_USB0_t;
4828 {
4829  volatile uint32_t _pad_0x0_0x7[2];
4830  volatile uint32_t fn_mod_bm_iss;
4831  volatile uint32_t _pad_0xc_0x43[14];
4832  volatile uint32_t ahb_cntl;
4833 };
4834 
4837 #endif /* __ASSEMBLY__ */
4838 
4848 #ifndef __ASSEMBLY__
4849 
4860 {
4861  volatile uint32_t _pad_0x0_0x7[2];
4863  volatile uint32_t _pad_0xc_0x107[63];
4865 };
4866 
4868 typedef volatile struct ALT_L3_MST_NAND_s ALT_L3_MST_NAND_t;
4871 {
4872  volatile uint32_t _pad_0x0_0x7[2];
4873  volatile uint32_t fn_mod_bm_iss;
4874  volatile uint32_t _pad_0xc_0x107[63];
4875  volatile uint32_t fn_mod;
4876 };
4877 
4880 #endif /* __ASSEMBLY__ */
4881 
4891 #ifndef __ASSEMBLY__
4892 
4903 {
4904  volatile uint32_t _pad_0x0_0x7[2];
4906  volatile uint32_t _pad_0xc_0x43[14];
4908 };
4909 
4914 {
4915  volatile uint32_t _pad_0x0_0x7[2];
4916  volatile uint32_t fn_mod_bm_iss;
4917  volatile uint32_t _pad_0xc_0x43[14];
4918  volatile uint32_t ahb_cntl;
4919 };
4920 
4923 #endif /* __ASSEMBLY__ */
4924 
4959 #define ALT_L3_WR_TIDEMARK_LEVEL_LSB 0
4960 
4961 #define ALT_L3_WR_TIDEMARK_LEVEL_MSB 3
4962 
4963 #define ALT_L3_WR_TIDEMARK_LEVEL_WIDTH 4
4964 
4965 #define ALT_L3_WR_TIDEMARK_LEVEL_SET_MSK 0x0000000f
4966 
4967 #define ALT_L3_WR_TIDEMARK_LEVEL_CLR_MSK 0xfffffff0
4968 
4969 #define ALT_L3_WR_TIDEMARK_LEVEL_RESET 0x4
4970 
4971 #define ALT_L3_WR_TIDEMARK_LEVEL_GET(value) (((value) & 0x0000000f) >> 0)
4972 
4973 #define ALT_L3_WR_TIDEMARK_LEVEL_SET(value) (((value) << 0) & 0x0000000f)
4974 
4975 #ifndef __ASSEMBLY__
4976 
4987 {
4988  uint32_t level : 4;
4989  uint32_t : 28;
4990 };
4991 
4994 #endif /* __ASSEMBLY__ */
4995 
4997 #define ALT_L3_WR_TIDEMARK_OFST 0x40
4998 
4999 #define ALT_L3_WR_TIDEMARK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_TIDEMARK_OFST))
5000 
5001 #ifndef __ASSEMBLY__
5002 
5013 {
5014  volatile uint32_t _pad_0x0_0x7[2];
5016  volatile uint32_t _pad_0xc_0x3f[13];
5018  volatile uint32_t _pad_0x44_0x107[49];
5020 };
5021 
5026 {
5027  volatile uint32_t _pad_0x0_0x7[2];
5028  volatile uint32_t fn_mod_bm_iss;
5029  volatile uint32_t _pad_0xc_0x3f[13];
5030  volatile uint32_t wr_tidemark;
5031  volatile uint32_t _pad_0x44_0x107[49];
5032  volatile uint32_t fn_mod;
5033 };
5034 
5037 #endif /* __ASSEMBLY__ */
5038 
5049 #ifndef __ASSEMBLY__
5050 
5061 {
5062  volatile uint32_t _pad_0x0_0x7[2];
5064  volatile uint32_t _pad_0xc_0x3f[13];
5066  volatile uint32_t _pad_0x44_0x107[49];
5068 };
5069 
5071 typedef volatile struct ALT_L3_MST_H2F_s ALT_L3_MST_H2F_t;
5074 {
5075  volatile uint32_t _pad_0x0_0x7[2];
5076  volatile uint32_t fn_mod_bm_iss;
5077  volatile uint32_t _pad_0xc_0x3f[13];
5078  volatile uint32_t wr_tidemark;
5079  volatile uint32_t _pad_0x44_0x107[49];
5080  volatile uint32_t fn_mod;
5081 };
5082 
5085 #endif /* __ASSEMBLY__ */
5086 
5096 #ifndef __ASSEMBLY__
5097 
5108 {
5109  volatile uint32_t _pad_0x0_0x7[2];
5111  volatile uint32_t _pad_0xc_0x107[63];
5113 };
5114 
5116 typedef volatile struct ALT_L3_MST_ACP_s ALT_L3_MST_ACP_t;
5119 {
5120  volatile uint32_t _pad_0x0_0x7[2];
5121  volatile uint32_t fn_mod_bm_iss;
5122  volatile uint32_t _pad_0xc_0x107[63];
5123  volatile uint32_t fn_mod;
5124 };
5125 
5128 #endif /* __ASSEMBLY__ */
5129 
5139 #ifndef __ASSEMBLY__
5140 
5151 {
5152  volatile uint32_t _pad_0x0_0x7[2];
5154  volatile uint32_t _pad_0xc_0x107[63];
5156 };
5157 
5159 typedef volatile struct ALT_L3_MST_ROM_s ALT_L3_MST_ROM_t;
5162 {
5163  volatile uint32_t _pad_0x0_0x7[2];
5164  volatile uint32_t fn_mod_bm_iss;
5165  volatile uint32_t _pad_0xc_0x107[63];
5166  volatile uint32_t fn_mod;
5167 };
5168 
5171 #endif /* __ASSEMBLY__ */
5172 
5182 #ifndef __ASSEMBLY__
5183 
5194 {
5195  volatile uint32_t _pad_0x0_0x7[2];
5197  volatile uint32_t _pad_0xc_0x3f[13];
5199  volatile uint32_t _pad_0x44_0x107[49];
5201 };
5202 
5204 typedef volatile struct ALT_L3_MST_OCRAM_s ALT_L3_MST_OCRAM_t;
5207 {
5208  volatile uint32_t _pad_0x0_0x7[2];
5209  volatile uint32_t fn_mod_bm_iss;
5210  volatile uint32_t _pad_0xc_0x3f[13];
5211  volatile uint32_t wr_tidemark;
5212  volatile uint32_t _pad_0x44_0x107[49];
5213  volatile uint32_t fn_mod;
5214 };
5215 
5218 #endif /* __ASSEMBLY__ */
5219 
5221 #ifndef __ASSEMBLY__
5222 
5233 {
5235  volatile uint32_t _pad_0xc_0xfff[1021];
5237  volatile uint32_t _pad_0x100c_0x1fff[1021];
5239  volatile uint32_t _pad_0x200c_0x2fff[1021];
5241  volatile uint32_t _pad_0x300c_0x3fff[1021];
5243  volatile uint32_t _pad_0x400c_0x4fff[1021];
5245  volatile uint32_t _pad_0x510c_0x5fff[957];
5247  volatile uint32_t _pad_0x610c_0x7fff[1981];
5249  volatile uint32_t _pad_0x8048_0x8fff[1006];
5251  volatile uint32_t _pad_0x910c_0x1dfff[21437];
5253  volatile uint32_t _pad_0x1e048_0x1efff[1006];
5255  volatile uint32_t _pad_0x1f10c_0x1ffff[957];
5257  volatile uint32_t _pad_0x20048_0x20fff[1006];
5259  volatile uint32_t _pad_0x2110c_0x21fff[957];
5261  volatile uint32_t _pad_0x2210c_0x22fff[957];
5263  volatile uint32_t _pad_0x2310c_0x23fff[957];
5265  volatile uint32_t _pad_0x2410c_0x24fff[957];
5267 };
5268 
5270 typedef volatile struct ALT_L3_MSTGRP_s ALT_L3_MSTGRP_t;
5273 {
5275  volatile uint32_t _pad_0xc_0xfff[1021];
5277  volatile uint32_t _pad_0x100c_0x1fff[1021];
5279  volatile uint32_t _pad_0x200c_0x2fff[1021];
5281  volatile uint32_t _pad_0x300c_0x3fff[1021];
5283  volatile uint32_t _pad_0x400c_0x4fff[1021];
5285  volatile uint32_t _pad_0x510c_0x5fff[957];
5287  volatile uint32_t _pad_0x610c_0x7fff[1981];
5289  volatile uint32_t _pad_0x8048_0x8fff[1006];
5291  volatile uint32_t _pad_0x910c_0x1dfff[21437];
5293  volatile uint32_t _pad_0x1e048_0x1efff[1006];
5295  volatile uint32_t _pad_0x1f10c_0x1ffff[957];
5297  volatile uint32_t _pad_0x20048_0x20fff[1006];
5299  volatile uint32_t _pad_0x2110c_0x21fff[957];
5301  volatile uint32_t _pad_0x2210c_0x22fff[957];
5303  volatile uint32_t _pad_0x2310c_0x23fff[957];
5305  volatile uint32_t _pad_0x2410c_0x24fff[957];
5307 };
5308 
5311 #endif /* __ASSEMBLY__ */
5312 
5364 #define ALT_L3_FN_MOD2_BYPASS_MERGE_E_ALTER 0x0
5365 
5371 #define ALT_L3_FN_MOD2_BYPASS_MERGE_E_NOALTER 0x1
5372 
5374 #define ALT_L3_FN_MOD2_BYPASS_MERGE_LSB 0
5375 
5376 #define ALT_L3_FN_MOD2_BYPASS_MERGE_MSB 0
5377 
5378 #define ALT_L3_FN_MOD2_BYPASS_MERGE_WIDTH 1
5379 
5380 #define ALT_L3_FN_MOD2_BYPASS_MERGE_SET_MSK 0x00000001
5381 
5382 #define ALT_L3_FN_MOD2_BYPASS_MERGE_CLR_MSK 0xfffffffe
5383 
5384 #define ALT_L3_FN_MOD2_BYPASS_MERGE_RESET 0x0
5385 
5386 #define ALT_L3_FN_MOD2_BYPASS_MERGE_GET(value) (((value) & 0x00000001) >> 0)
5387 
5388 #define ALT_L3_FN_MOD2_BYPASS_MERGE_SET(value) (((value) << 0) & 0x00000001)
5389 
5390 #ifndef __ASSEMBLY__
5391 
5402 {
5403  uint32_t bypass_merge : 1;
5404  uint32_t : 31;
5405 };
5406 
5408 typedef volatile struct ALT_L3_FN_MOD2_s ALT_L3_FN_MOD2_t;
5409 #endif /* __ASSEMBLY__ */
5410 
5412 #define ALT_L3_FN_MOD2_OFST 0x24
5413 
5414 #define ALT_L3_FN_MOD2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD2_OFST))
5415 
5456 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_E_DEFAULT 0x0
5457 
5462 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_E_SINGLES 0x1
5463 
5465 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_LSB 0
5466 
5467 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_MSB 0
5468 
5469 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_WIDTH 1
5470 
5471 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_SET_MSK 0x00000001
5472 
5473 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_CLR_MSK 0xfffffffe
5474 
5475 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_RESET 0x0
5476 
5477 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_GET(value) (((value) & 0x00000001) >> 0)
5478 
5479 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_SET(value) (((value) << 0) & 0x00000001)
5480 
5507 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_E_DEFAULT 0x0
5508 
5513 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_E_SINGLES 0x1
5514 
5516 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_LSB 1
5517 
5518 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_MSB 1
5519 
5520 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_WIDTH 1
5521 
5522 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_SET_MSK 0x00000002
5523 
5524 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_CLR_MSK 0xfffffffd
5525 
5526 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_RESET 0x0
5527 
5528 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_GET(value) (((value) & 0x00000002) >> 1)
5529 
5530 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_SET(value) (((value) << 1) & 0x00000002)
5531 
5532 #ifndef __ASSEMBLY__
5533 
5544 {
5545  uint32_t rd_incr_override : 1;
5546  uint32_t wr_incr_override : 1;
5547  uint32_t : 30;
5548 };
5549 
5552 #endif /* __ASSEMBLY__ */
5553 
5555 #define ALT_L3_FN_MOD_AHB_OFST 0x28
5556 
5557 #define ALT_L3_FN_MOD_AHB_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_AHB_OFST))
5558 
5582 #define ALT_L3_RD_QOS_PRI_LSB 0
5583 
5584 #define ALT_L3_RD_QOS_PRI_MSB 3
5585 
5586 #define ALT_L3_RD_QOS_PRI_WIDTH 4
5587 
5588 #define ALT_L3_RD_QOS_PRI_SET_MSK 0x0000000f
5589 
5590 #define ALT_L3_RD_QOS_PRI_CLR_MSK 0xfffffff0
5591 
5592 #define ALT_L3_RD_QOS_PRI_RESET 0x0
5593 
5594 #define ALT_L3_RD_QOS_PRI_GET(value) (((value) & 0x0000000f) >> 0)
5595 
5596 #define ALT_L3_RD_QOS_PRI_SET(value) (((value) << 0) & 0x0000000f)
5597 
5598 #ifndef __ASSEMBLY__
5599 
5610 {
5611  uint32_t pri : 4;
5612  uint32_t : 28;
5613 };
5614 
5616 typedef volatile struct ALT_L3_RD_QOS_s ALT_L3_RD_QOS_t;
5617 #endif /* __ASSEMBLY__ */
5618 
5620 #define ALT_L3_RD_QOS_OFST 0x100
5621 
5622 #define ALT_L3_RD_QOS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_RD_QOS_OFST))
5623 
5647 #define ALT_L3_WR_QOS_PRI_LSB 0
5648 
5649 #define ALT_L3_WR_QOS_PRI_MSB 3
5650 
5651 #define ALT_L3_WR_QOS_PRI_WIDTH 4
5652 
5653 #define ALT_L3_WR_QOS_PRI_SET_MSK 0x0000000f
5654 
5655 #define ALT_L3_WR_QOS_PRI_CLR_MSK 0xfffffff0
5656 
5657 #define ALT_L3_WR_QOS_PRI_RESET 0x0
5658 
5659 #define ALT_L3_WR_QOS_PRI_GET(value) (((value) & 0x0000000f) >> 0)
5660 
5661 #define ALT_L3_WR_QOS_PRI_SET(value) (((value) << 0) & 0x0000000f)
5662 
5663 #ifndef __ASSEMBLY__
5664 
5675 {
5676  uint32_t pri : 4;
5677  uint32_t : 28;
5678 };
5679 
5681 typedef volatile struct ALT_L3_WR_QOS_s ALT_L3_WR_QOS_t;
5682 #endif /* __ASSEMBLY__ */
5683 
5685 #define ALT_L3_WR_QOS_OFST 0x104
5686 
5687 #define ALT_L3_WR_QOS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_QOS_OFST))
5688 
5689 #ifndef __ASSEMBLY__
5690 
5701 {
5702  volatile uint32_t _pad_0x0_0x23[9];
5705  volatile uint32_t _pad_0x2c_0xff[53];
5709 };
5710 
5712 typedef volatile struct ALT_L3_SLV_DAP_s ALT_L3_SLV_DAP_t;
5715 {
5716  volatile uint32_t _pad_0x0_0x23[9];
5717  volatile uint32_t fn_mod2;
5718  volatile uint32_t fn_mod_ahb;
5719  volatile uint32_t _pad_0x2c_0xff[53];
5720  volatile uint32_t read_qos;
5721  volatile uint32_t write_qos;
5722  volatile uint32_t fn_mod;
5723 };
5724 
5727 #endif /* __ASSEMBLY__ */
5728 
5738 #ifndef __ASSEMBLY__
5739 
5750 {
5751  volatile uint32_t _pad_0x0_0xff[64];
5755 };
5756 
5758 typedef volatile struct ALT_L3_SLV_MPU_s ALT_L3_SLV_MPU_t;
5761 {
5762  volatile uint32_t _pad_0x0_0xff[64];
5763  volatile uint32_t read_qos;
5764  volatile uint32_t write_qos;
5765  volatile uint32_t fn_mod;
5766 };
5767 
5770 #endif /* __ASSEMBLY__ */
5771 
5782 #ifndef __ASSEMBLY__
5783 
5794 {
5795  volatile uint32_t _pad_0x0_0x27[10];
5797  volatile uint32_t _pad_0x2c_0xff[53];
5801 };
5802 
5804 typedef volatile struct ALT_L3_SLV_SDMMC_s ALT_L3_SLV_SDMMC_t;
5807 {
5808  volatile uint32_t _pad_0x0_0x27[10];
5809  volatile uint32_t fn_mod_ahb;
5810  volatile uint32_t _pad_0x2c_0xff[53];
5811  volatile uint32_t read_qos;
5812  volatile uint32_t write_qos;
5813  volatile uint32_t fn_mod;
5814 };
5815 
5818 #endif /* __ASSEMBLY__ */
5819 
5829 #ifndef __ASSEMBLY__
5830 
5841 {
5842  volatile uint32_t _pad_0x0_0xff[64];
5846 };
5847 
5849 typedef volatile struct ALT_L3_SLV_DMA_s ALT_L3_SLV_DMA_t;
5852 {
5853  volatile uint32_t _pad_0x0_0xff[64];
5854  volatile uint32_t read_qos;
5855  volatile uint32_t write_qos;
5856  volatile uint32_t fn_mod;
5857 };
5858 
5861 #endif /* __ASSEMBLY__ */
5862 
5873 #ifndef __ASSEMBLY__
5874 
5885 {
5886  volatile uint32_t _pad_0x0_0x3f[16];
5888  volatile uint32_t _pad_0x44_0xff[47];
5892 };
5893 
5895 typedef volatile struct ALT_L3_SLV_F2H_s ALT_L3_SLV_F2H_t;
5898 {
5899  volatile uint32_t _pad_0x0_0x3f[16];
5900  volatile uint32_t wr_tidemark;
5901  volatile uint32_t _pad_0x44_0xff[47];
5902  volatile uint32_t read_qos;
5903  volatile uint32_t write_qos;
5904  volatile uint32_t fn_mod;
5905 };
5906 
5909 #endif /* __ASSEMBLY__ */
5910 
5920 #ifndef __ASSEMBLY__
5921 
5932 {
5933  volatile uint32_t _pad_0x0_0xff[64];
5937 };
5938 
5940 typedef volatile struct ALT_L3_SLV_ETR_s ALT_L3_SLV_ETR_t;
5943 {
5944  volatile uint32_t _pad_0x0_0xff[64];
5945  volatile uint32_t read_qos;
5946  volatile uint32_t write_qos;
5947  volatile uint32_t fn_mod;
5948 };
5949 
5952 #endif /* __ASSEMBLY__ */
5953 
5964 #ifndef __ASSEMBLY__
5965 
5976 {
5977  volatile uint32_t _pad_0x0_0xff[64];
5981 };
5982 
5984 typedef volatile struct ALT_L3_SLV_EMAC0_s ALT_L3_SLV_EMAC0_t;
5987 {
5988  volatile uint32_t _pad_0x0_0xff[64];
5989  volatile uint32_t read_qos;
5990  volatile uint32_t write_qos;
5991  volatile uint32_t fn_mod;
5992 };
5993 
5996 #endif /* __ASSEMBLY__ */
5997 
6008 #ifndef __ASSEMBLY__
6009 
6020 {
6021  volatile uint32_t _pad_0x0_0xff[64];
6025 };
6026 
6028 typedef volatile struct ALT_L3_SLV_EMAC1_s ALT_L3_SLV_EMAC1_t;
6031 {
6032  volatile uint32_t _pad_0x0_0xff[64];
6033  volatile uint32_t read_qos;
6034  volatile uint32_t write_qos;
6035  volatile uint32_t fn_mod;
6036 };
6037 
6040 #endif /* __ASSEMBLY__ */
6041 
6052 #ifndef __ASSEMBLY__
6053 
6064 {
6065  volatile uint32_t _pad_0x0_0x27[10];
6067  volatile uint32_t _pad_0x2c_0xff[53];
6071 };
6072 
6074 typedef volatile struct ALT_L3_SLV_USB0_s ALT_L3_SLV_USB0_t;
6077 {
6078  volatile uint32_t _pad_0x0_0x27[10];
6079  volatile uint32_t fn_mod_ahb;
6080  volatile uint32_t _pad_0x2c_0xff[53];
6081  volatile uint32_t read_qos;
6082  volatile uint32_t write_qos;
6083  volatile uint32_t fn_mod;
6084 };
6085 
6088 #endif /* __ASSEMBLY__ */
6089 
6100 #ifndef __ASSEMBLY__
6101 
6112 {
6113  volatile uint32_t _pad_0x0_0xff[64];
6117 };
6118 
6120 typedef volatile struct ALT_L3_SLV_NAND_s ALT_L3_SLV_NAND_t;
6123 {
6124  volatile uint32_t _pad_0x0_0xff[64];
6125  volatile uint32_t read_qos;
6126  volatile uint32_t write_qos;
6127  volatile uint32_t fn_mod;
6128 };
6129 
6132 #endif /* __ASSEMBLY__ */
6133 
6144 #ifndef __ASSEMBLY__
6145 
6156 {
6157  volatile uint32_t _pad_0x0_0x27[10];
6159  volatile uint32_t _pad_0x2c_0xff[53];
6163 };
6164 
6166 typedef volatile struct ALT_L3_SLV_USB1_s ALT_L3_SLV_USB1_t;
6169 {
6170  volatile uint32_t _pad_0x0_0x27[10];
6171  volatile uint32_t fn_mod_ahb;
6172  volatile uint32_t _pad_0x2c_0xff[53];
6173  volatile uint32_t read_qos;
6174  volatile uint32_t write_qos;
6175  volatile uint32_t fn_mod;
6176 };
6177 
6180 #endif /* __ASSEMBLY__ */
6181 
6183 #ifndef __ASSEMBLY__
6184 
6195 {
6197  volatile uint32_t _pad_0x10c_0xfff[957];
6199  volatile uint32_t _pad_0x110c_0x1fff[957];
6201  volatile uint32_t _pad_0x210c_0x2fff[957];
6203  volatile uint32_t _pad_0x310c_0x3fff[957];
6205  volatile uint32_t _pad_0x410c_0x4fff[957];
6207  volatile uint32_t _pad_0x510c_0x5fff[957];
6209  volatile uint32_t _pad_0x610c_0x6fff[957];
6211  volatile uint32_t _pad_0x710c_0x7fff[957];
6213  volatile uint32_t _pad_0x810c_0x8fff[957];
6215  volatile uint32_t _pad_0x910c_0x9fff[957];
6217 };
6218 
6220 typedef volatile struct ALT_L3_SLVGRP_s ALT_L3_SLVGRP_t;
6223 {
6225  volatile uint32_t _pad_0x10c_0xfff[957];
6227  volatile uint32_t _pad_0x110c_0x1fff[957];
6229  volatile uint32_t _pad_0x210c_0x2fff[957];
6231  volatile uint32_t _pad_0x310c_0x3fff[957];
6233  volatile uint32_t _pad_0x410c_0x4fff[957];
6235  volatile uint32_t _pad_0x510c_0x5fff[957];
6237  volatile uint32_t _pad_0x610c_0x6fff[957];
6239  volatile uint32_t _pad_0x710c_0x7fff[957];
6241  volatile uint32_t _pad_0x810c_0x8fff[957];
6243  volatile uint32_t _pad_0x910c_0x9fff[957];
6245 };
6246 
6249 #endif /* __ASSEMBLY__ */
6250 
6252 #ifndef __ASSEMBLY__
6253 
6263 struct ALT_L3_s
6264 {
6266  volatile uint32_t _pad_0x4_0x7;
6268  volatile uint32_t _pad_0xa4_0xfff[983];
6271  volatile uint32_t _pad_0x2710c_0x41fff[27581];
6273  volatile uint32_t _pad_0x4c10c_0x80000[53181];
6274 };
6275 
6277 typedef volatile struct ALT_L3_s ALT_L3_t;
6280 {
6281  volatile uint32_t remap;
6282  volatile uint32_t _pad_0x4_0x7;
6284  volatile uint32_t _pad_0xa4_0xfff[983];
6287  volatile uint32_t _pad_0x2710c_0x41fff[27581];
6289  volatile uint32_t _pad_0x4c10c_0x80000[53181];
6290 };
6291 
6293 typedef volatile struct ALT_L3_raw_s ALT_L3_raw_t;
6294 #endif /* __ASSEMBLY__ */
6295 
6297 #ifdef __cplusplus
6298 }
6299 #endif /* __cplusplus */
6300 #endif /* __ALTERA_ALT_L3_H__ */
6301