Altera SoCAL  16.0
The Altera SoC Abstraction Layer (SoCAL) API Reference Manual
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Register : ddr_T_main_Scheduler_Id_RevisionId

Description

Register Layout

Bits Access Reset Description
[7:0] R 0x0 ALT_NOC_MPU_DDR_T_SCHED_REVID_UID
[31:8] R 0x129ff ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID

Field : USERID

Field containing a user defined value, not used anywhere inside the IP itself.

Field Access Macros:

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_LSB   0
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_MSB   7
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_WIDTH   8
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_SET_MSK   0x000000ff
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_CLR_MSK   0xffffff00
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_RESET   0x0
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_GET(value)   (((value) & 0x000000ff) >> 0)
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_SET(value)   (((value) << 0) & 0x000000ff)
 

Field : FLEXNOCID

Field containing the build revision of the software used to generate the IP HDL code.

Field Access Macros:

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_LSB   8
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_MSB   31
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_WIDTH   24
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_SET_MSK   0xffffff00
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_CLR_MSK   0x000000ff
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_RESET   0x129ff
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_GET(value)   (((value) & 0xffffff00) >> 8)
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_SET(value)   (((value) << 8) & 0xffffff00)
 

Data Structures

struct  ALT_NOC_MPU_DDR_T_SCHED_REVID_s
 

Macros

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_RESET   0x0129ff00
 
#define ALT_NOC_MPU_DDR_T_SCHED_REVID_OFST   0x4
 

Typedefs

typedef struct
ALT_NOC_MPU_DDR_T_SCHED_REVID_s 
ALT_NOC_MPU_DDR_T_SCHED_REVID_t
 

Data Structure Documentation

struct ALT_NOC_MPU_DDR_T_SCHED_REVID_s

WARNING: The C register and register group struct declarations are provided for convenience and illustrative purposes. They should, however, be used with caution as the C language standard provides no guarantees about the alignment or atomicity of device memory accesses. The recommended practice for writing hardware drivers is to use the SoCAL access macros and alt_read_word() and alt_write_word() functions.

The struct declaration for register ALT_NOC_MPU_DDR_T_SCHED_REVID.

Data Fields
const uint32_t USERID: 8 ALT_NOC_MPU_DDR_T_SCHED_REVID_UID
const uint32_t FLEXNOCID: 24 ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID

Macro Definitions

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_LSB   0

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_MSB   7

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_WIDTH   8

The width in bits of the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_SET_MSK   0x000000ff

The mask used to set the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field value.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_CLR_MSK   0xffffff00

The mask used to clear the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field value.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_RESET   0x0

The reset value of the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_GET (   value)    (((value) & 0x000000ff) >> 0)

Extracts the ALT_NOC_MPU_DDR_T_SCHED_REVID_UID field value from a register.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_UID_SET (   value)    (((value) << 0) & 0x000000ff)

Produces a ALT_NOC_MPU_DDR_T_SCHED_REVID_UID register field value suitable for setting the register.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_LSB   8

The Least Significant Bit (LSB) position of the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_MSB   31

The Most Significant Bit (MSB) position of the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_WIDTH   24

The width in bits of the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_SET_MSK   0xffffff00

The mask used to set the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field value.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_CLR_MSK   0x000000ff

The mask used to clear the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field value.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_RESET   0x129ff

The reset value of the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_GET (   value)    (((value) & 0xffffff00) >> 8)

Extracts the ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID field value from a register.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID_SET (   value)    (((value) << 8) & 0xffffff00)

Produces a ALT_NOC_MPU_DDR_T_SCHED_REVID_FLEXNOCID register field value suitable for setting the register.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_RESET   0x0129ff00

The reset value of the ALT_NOC_MPU_DDR_T_SCHED_REVID register.

#define ALT_NOC_MPU_DDR_T_SCHED_REVID_OFST   0x4

The byte offset of the ALT_NOC_MPU_DDR_T_SCHED_REVID register from the beginning of the component.

Typedef Documentation