Altera SoCAL  16.0
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alt_uart.h
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32 
35 #ifndef __ALT_SOCAL_UART_H__
36 #define __ALT_SOCAL_UART_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
113 #define ALT_UART_RBR_THR_DLL_VALUE_LSB 0
114 
115 #define ALT_UART_RBR_THR_DLL_VALUE_MSB 7
116 
117 #define ALT_UART_RBR_THR_DLL_VALUE_WIDTH 8
118 
119 #define ALT_UART_RBR_THR_DLL_VALUE_SET_MSK 0x000000ff
120 
121 #define ALT_UART_RBR_THR_DLL_VALUE_CLR_MSK 0xffffff00
122 
123 #define ALT_UART_RBR_THR_DLL_VALUE_RESET 0x0
124 
125 #define ALT_UART_RBR_THR_DLL_VALUE_GET(value) (((value) & 0x000000ff) >> 0)
126 
127 #define ALT_UART_RBR_THR_DLL_VALUE_SET(value) (((value) << 0) & 0x000000ff)
128 
138 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_LSB 8
139 
140 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_MSB 31
141 
142 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_WIDTH 24
143 
144 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_SET_MSK 0xffffff00
145 
146 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_CLR_MSK 0x000000ff
147 
148 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_RESET 0x0
149 
150 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
151 
152 #define ALT_UART_RBR_THR_DLL_RSVD_RBR_THR_DLL_31TO8_SET(value) (((value) << 8) & 0xffffff00)
153 
154 #ifndef __ASSEMBLY__
155 
166 {
167  uint32_t value : 8;
168  const uint32_t rsvd_rbr_thr_dll_31to8 : 24;
169 };
170 
173 #endif /* __ASSEMBLY__ */
174 
176 #define ALT_UART_RBR_THR_DLL_RESET 0x00000000
177 
178 #define ALT_UART_RBR_THR_DLL_OFST 0x0
179 
180 #define ALT_UART_RBR_THR_DLL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RBR_THR_DLL_OFST))
181 
252 #define ALT_UART_IER_DLH_ERBFI_DLH0_E_DISD 0x0
253 
258 #define ALT_UART_IER_DLH_ERBFI_DLH0_E_END 0x1
259 
261 #define ALT_UART_IER_DLH_ERBFI_DLH0_LSB 0
262 
263 #define ALT_UART_IER_DLH_ERBFI_DLH0_MSB 0
264 
265 #define ALT_UART_IER_DLH_ERBFI_DLH0_WIDTH 1
266 
267 #define ALT_UART_IER_DLH_ERBFI_DLH0_SET_MSK 0x00000001
268 
269 #define ALT_UART_IER_DLH_ERBFI_DLH0_CLR_MSK 0xfffffffe
270 
271 #define ALT_UART_IER_DLH_ERBFI_DLH0_RESET 0x0
272 
273 #define ALT_UART_IER_DLH_ERBFI_DLH0_GET(value) (((value) & 0x00000001) >> 0)
274 
275 #define ALT_UART_IER_DLH_ERBFI_DLH0_SET(value) (((value) << 0) & 0x00000001)
276 
305 #define ALT_UART_IER_DLH_ETBEI_DLHL_E_DISD 0x0
306 
311 #define ALT_UART_IER_DLH_ETBEI_DLHL_E_END 0x1
312 
314 #define ALT_UART_IER_DLH_ETBEI_DLHL_LSB 1
315 
316 #define ALT_UART_IER_DLH_ETBEI_DLHL_MSB 1
317 
318 #define ALT_UART_IER_DLH_ETBEI_DLHL_WIDTH 1
319 
320 #define ALT_UART_IER_DLH_ETBEI_DLHL_SET_MSK 0x00000002
321 
322 #define ALT_UART_IER_DLH_ETBEI_DLHL_CLR_MSK 0xfffffffd
323 
324 #define ALT_UART_IER_DLH_ETBEI_DLHL_RESET 0x0
325 
326 #define ALT_UART_IER_DLH_ETBEI_DLHL_GET(value) (((value) & 0x00000002) >> 1)
327 
328 #define ALT_UART_IER_DLH_ETBEI_DLHL_SET(value) (((value) << 1) & 0x00000002)
329 
357 #define ALT_UART_IER_DLH_ELSI_DHL2_E_DISD 0x0
358 
363 #define ALT_UART_IER_DLH_ELSI_DHL2_E_END 0x1
364 
366 #define ALT_UART_IER_DLH_ELSI_DHL2_LSB 2
367 
368 #define ALT_UART_IER_DLH_ELSI_DHL2_MSB 2
369 
370 #define ALT_UART_IER_DLH_ELSI_DHL2_WIDTH 1
371 
372 #define ALT_UART_IER_DLH_ELSI_DHL2_SET_MSK 0x00000004
373 
374 #define ALT_UART_IER_DLH_ELSI_DHL2_CLR_MSK 0xfffffffb
375 
376 #define ALT_UART_IER_DLH_ELSI_DHL2_RESET 0x0
377 
378 #define ALT_UART_IER_DLH_ELSI_DHL2_GET(value) (((value) & 0x00000004) >> 2)
379 
380 #define ALT_UART_IER_DLH_ELSI_DHL2_SET(value) (((value) << 2) & 0x00000004)
381 
409 #define ALT_UART_IER_DLH_EDSSI_DHL3_E_DISD 0x0
410 
415 #define ALT_UART_IER_DLH_EDSSI_DHL3_E_END 0x1
416 
418 #define ALT_UART_IER_DLH_EDSSI_DHL3_LSB 3
419 
420 #define ALT_UART_IER_DLH_EDSSI_DHL3_MSB 3
421 
422 #define ALT_UART_IER_DLH_EDSSI_DHL3_WIDTH 1
423 
424 #define ALT_UART_IER_DLH_EDSSI_DHL3_SET_MSK 0x00000008
425 
426 #define ALT_UART_IER_DLH_EDSSI_DHL3_CLR_MSK 0xfffffff7
427 
428 #define ALT_UART_IER_DLH_EDSSI_DHL3_RESET 0x0
429 
430 #define ALT_UART_IER_DLH_EDSSI_DHL3_GET(value) (((value) & 0x00000008) >> 3)
431 
432 #define ALT_UART_IER_DLH_EDSSI_DHL3_SET(value) (((value) << 3) & 0x00000008)
433 
443 #define ALT_UART_IER_DLH_DLH4_LSB 4
444 
445 #define ALT_UART_IER_DLH_DLH4_MSB 4
446 
447 #define ALT_UART_IER_DLH_DLH4_WIDTH 1
448 
449 #define ALT_UART_IER_DLH_DLH4_SET_MSK 0x00000010
450 
451 #define ALT_UART_IER_DLH_DLH4_CLR_MSK 0xffffffef
452 
453 #define ALT_UART_IER_DLH_DLH4_RESET 0x0
454 
455 #define ALT_UART_IER_DLH_DLH4_GET(value) (((value) & 0x00000010) >> 4)
456 
457 #define ALT_UART_IER_DLH_DLH4_SET(value) (((value) << 4) & 0x00000010)
458 
468 #define ALT_UART_IER_DLH_DLH5_LSB 5
469 
470 #define ALT_UART_IER_DLH_DLH5_MSB 5
471 
472 #define ALT_UART_IER_DLH_DLH5_WIDTH 1
473 
474 #define ALT_UART_IER_DLH_DLH5_SET_MSK 0x00000020
475 
476 #define ALT_UART_IER_DLH_DLH5_CLR_MSK 0xffffffdf
477 
478 #define ALT_UART_IER_DLH_DLH5_RESET 0x0
479 
480 #define ALT_UART_IER_DLH_DLH5_GET(value) (((value) & 0x00000020) >> 5)
481 
482 #define ALT_UART_IER_DLH_DLH5_SET(value) (((value) << 5) & 0x00000020)
483 
493 #define ALT_UART_IER_DLH_DLH6_LSB 6
494 
495 #define ALT_UART_IER_DLH_DLH6_MSB 6
496 
497 #define ALT_UART_IER_DLH_DLH6_WIDTH 1
498 
499 #define ALT_UART_IER_DLH_DLH6_SET_MSK 0x00000040
500 
501 #define ALT_UART_IER_DLH_DLH6_CLR_MSK 0xffffffbf
502 
503 #define ALT_UART_IER_DLH_DLH6_RESET 0x0
504 
505 #define ALT_UART_IER_DLH_DLH6_GET(value) (((value) & 0x00000040) >> 6)
506 
507 #define ALT_UART_IER_DLH_DLH6_SET(value) (((value) << 6) & 0x00000040)
508 
535 #define ALT_UART_IER_DLH_PTIME_DLH7_E_DISD 0x0
536 
541 #define ALT_UART_IER_DLH_PTIME_DLH7_E_END 0x1
542 
544 #define ALT_UART_IER_DLH_PTIME_DLH7_LSB 7
545 
546 #define ALT_UART_IER_DLH_PTIME_DLH7_MSB 7
547 
548 #define ALT_UART_IER_DLH_PTIME_DLH7_WIDTH 1
549 
550 #define ALT_UART_IER_DLH_PTIME_DLH7_SET_MSK 0x00000080
551 
552 #define ALT_UART_IER_DLH_PTIME_DLH7_CLR_MSK 0xffffff7f
553 
554 #define ALT_UART_IER_DLH_PTIME_DLH7_RESET 0x0
555 
556 #define ALT_UART_IER_DLH_PTIME_DLH7_GET(value) (((value) & 0x00000080) >> 7)
557 
558 #define ALT_UART_IER_DLH_PTIME_DLH7_SET(value) (((value) << 7) & 0x00000080)
559 
569 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_LSB 8
570 
571 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_MSB 31
572 
573 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_WIDTH 24
574 
575 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_SET_MSK 0xffffff00
576 
577 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_CLR_MSK 0x000000ff
578 
579 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_RESET 0x0
580 
581 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
582 
583 #define ALT_UART_IER_DLH_RSVD_IER_DLH_31TO8_SET(value) (((value) << 8) & 0xffffff00)
584 
585 #ifndef __ASSEMBLY__
586 
597 {
598  uint32_t erbfi_dlh0 : 1;
599  uint32_t etbei_dlhl : 1;
600  uint32_t elsi_dhl2 : 1;
601  uint32_t edssi_dhl3 : 1;
602  uint32_t dlh4 : 1;
603  uint32_t dlh5 : 1;
604  uint32_t dlh6 : 1;
605  uint32_t ptime_dlh7 : 1;
606  const uint32_t rsvd_ier_dlh_31to8 : 24;
607 };
608 
610 typedef volatile struct ALT_UART_IER_DLH_s ALT_UART_IER_DLH_t;
611 #endif /* __ASSEMBLY__ */
612 
614 #define ALT_UART_IER_DLH_RESET 0x00000000
615 
616 #define ALT_UART_IER_DLH_OFST 0x4
617 
618 #define ALT_UART_IER_DLH_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_IER_DLH_OFST))
619 
682 #define ALT_UART_IIR_ID_E_MODMSTAT 0x0
683 
688 #define ALT_UART_IIR_ID_E_NOINTRPENDING 0x1
689 
694 #define ALT_UART_IIR_ID_E_THREMPTY 0x2
695 
700 #define ALT_UART_IIR_ID_E_RXDATAVAILABLE 0x4
701 
706 #define ALT_UART_IIR_ID_E_RXLINESTAT 0x6
707 
712 #define ALT_UART_IIR_ID_E_BUSYDETECT 0x7
713 
718 #define ALT_UART_IIR_ID_E_CHARTMO 0xc
719 
721 #define ALT_UART_IIR_ID_LSB 0
722 
723 #define ALT_UART_IIR_ID_MSB 3
724 
725 #define ALT_UART_IIR_ID_WIDTH 4
726 
727 #define ALT_UART_IIR_ID_SET_MSK 0x0000000f
728 
729 #define ALT_UART_IIR_ID_CLR_MSK 0xfffffff0
730 
731 #define ALT_UART_IIR_ID_RESET 0x1
732 
733 #define ALT_UART_IIR_ID_GET(value) (((value) & 0x0000000f) >> 0)
734 
735 #define ALT_UART_IIR_ID_SET(value) (((value) << 0) & 0x0000000f)
736 
746 #define ALT_UART_IIR_RSVD_IIR_5TO4_LSB 4
747 
748 #define ALT_UART_IIR_RSVD_IIR_5TO4_MSB 5
749 
750 #define ALT_UART_IIR_RSVD_IIR_5TO4_WIDTH 2
751 
752 #define ALT_UART_IIR_RSVD_IIR_5TO4_SET_MSK 0x00000030
753 
754 #define ALT_UART_IIR_RSVD_IIR_5TO4_CLR_MSK 0xffffffcf
755 
756 #define ALT_UART_IIR_RSVD_IIR_5TO4_RESET 0x0
757 
758 #define ALT_UART_IIR_RSVD_IIR_5TO4_GET(value) (((value) & 0x00000030) >> 4)
759 
760 #define ALT_UART_IIR_RSVD_IIR_5TO4_SET(value) (((value) << 4) & 0x00000030)
761 
788 #define ALT_UART_IIR_FIFOEN_E_DISD 0x0
789 
794 #define ALT_UART_IIR_FIFOEN_E_END 0x3
795 
797 #define ALT_UART_IIR_FIFOEN_LSB 6
798 
799 #define ALT_UART_IIR_FIFOEN_MSB 7
800 
801 #define ALT_UART_IIR_FIFOEN_WIDTH 2
802 
803 #define ALT_UART_IIR_FIFOEN_SET_MSK 0x000000c0
804 
805 #define ALT_UART_IIR_FIFOEN_CLR_MSK 0xffffff3f
806 
807 #define ALT_UART_IIR_FIFOEN_RESET 0x0
808 
809 #define ALT_UART_IIR_FIFOEN_GET(value) (((value) & 0x000000c0) >> 6)
810 
811 #define ALT_UART_IIR_FIFOEN_SET(value) (((value) << 6) & 0x000000c0)
812 
822 #define ALT_UART_IIR_RSVD_IIR_31TO8_LSB 8
823 
824 #define ALT_UART_IIR_RSVD_IIR_31TO8_MSB 31
825 
826 #define ALT_UART_IIR_RSVD_IIR_31TO8_WIDTH 24
827 
828 #define ALT_UART_IIR_RSVD_IIR_31TO8_SET_MSK 0xffffff00
829 
830 #define ALT_UART_IIR_RSVD_IIR_31TO8_CLR_MSK 0x000000ff
831 
832 #define ALT_UART_IIR_RSVD_IIR_31TO8_RESET 0x0
833 
834 #define ALT_UART_IIR_RSVD_IIR_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
835 
836 #define ALT_UART_IIR_RSVD_IIR_31TO8_SET(value) (((value) << 8) & 0xffffff00)
837 
838 #ifndef __ASSEMBLY__
839 
850 {
851  const uint32_t id : 4;
852  const uint32_t rsvd_iir_5to4 : 2;
853  const uint32_t fifoen : 2;
854  const uint32_t rsvd_iir_31to8 : 24;
855 };
856 
858 typedef volatile struct ALT_UART_IIR_s ALT_UART_IIR_t;
859 #endif /* __ASSEMBLY__ */
860 
862 #define ALT_UART_IIR_RESET 0x00000001
863 
864 #define ALT_UART_IIR_OFST 0x8
865 
866 #define ALT_UART_IIR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_IIR_OFST))
867 
913 #define ALT_UART_FCR_FIFOE_E_DISD 0x0
914 
919 #define ALT_UART_FCR_FIFOE_E_END 0x1
920 
922 #define ALT_UART_FCR_FIFOE_LSB 0
923 
924 #define ALT_UART_FCR_FIFOE_MSB 0
925 
926 #define ALT_UART_FCR_FIFOE_WIDTH 1
927 
928 #define ALT_UART_FCR_FIFOE_SET_MSK 0x00000001
929 
930 #define ALT_UART_FCR_FIFOE_CLR_MSK 0xfffffffe
931 
932 #define ALT_UART_FCR_FIFOE_RESET 0x0
933 
934 #define ALT_UART_FCR_FIFOE_GET(value) (((value) & 0x00000001) >> 0)
935 
936 #define ALT_UART_FCR_FIFOE_SET(value) (((value) << 0) & 0x00000001)
937 
966 #define ALT_UART_FCR_RFIFOR_E_RST 0x1
967 
969 #define ALT_UART_FCR_RFIFOR_LSB 1
970 
971 #define ALT_UART_FCR_RFIFOR_MSB 1
972 
973 #define ALT_UART_FCR_RFIFOR_WIDTH 1
974 
975 #define ALT_UART_FCR_RFIFOR_SET_MSK 0x00000002
976 
977 #define ALT_UART_FCR_RFIFOR_CLR_MSK 0xfffffffd
978 
979 #define ALT_UART_FCR_RFIFOR_RESET 0x0
980 
981 #define ALT_UART_FCR_RFIFOR_GET(value) (((value) & 0x00000002) >> 1)
982 
983 #define ALT_UART_FCR_RFIFOR_SET(value) (((value) << 1) & 0x00000002)
984 
1013 #define ALT_UART_FCR_XFIFOR_E_RST 0x1
1014 
1016 #define ALT_UART_FCR_XFIFOR_LSB 2
1017 
1018 #define ALT_UART_FCR_XFIFOR_MSB 2
1019 
1020 #define ALT_UART_FCR_XFIFOR_WIDTH 1
1021 
1022 #define ALT_UART_FCR_XFIFOR_SET_MSK 0x00000004
1023 
1024 #define ALT_UART_FCR_XFIFOR_CLR_MSK 0xfffffffb
1025 
1026 #define ALT_UART_FCR_XFIFOR_RESET 0x0
1027 
1028 #define ALT_UART_FCR_XFIFOR_GET(value) (((value) & 0x00000004) >> 2)
1029 
1030 #define ALT_UART_FCR_XFIFOR_SET(value) (((value) << 2) & 0x00000004)
1031 
1063 #define ALT_UART_FCR_DMAM_E_MOD0 0x0
1064 
1069 #define ALT_UART_FCR_DMAM_E_MOD1 0x1
1070 
1072 #define ALT_UART_FCR_DMAM_LSB 3
1073 
1074 #define ALT_UART_FCR_DMAM_MSB 3
1075 
1076 #define ALT_UART_FCR_DMAM_WIDTH 1
1077 
1078 #define ALT_UART_FCR_DMAM_SET_MSK 0x00000008
1079 
1080 #define ALT_UART_FCR_DMAM_CLR_MSK 0xfffffff7
1081 
1082 #define ALT_UART_FCR_DMAM_RESET 0x0
1083 
1084 #define ALT_UART_FCR_DMAM_GET(value) (((value) & 0x00000008) >> 3)
1085 
1086 #define ALT_UART_FCR_DMAM_SET(value) (((value) << 3) & 0x00000008)
1087 
1132 #define ALT_UART_FCR_TET_E_FIFO_EMPTY 0x0
1133 
1138 #define ALT_UART_FCR_TET_E_FIFO_CHAR_2 0x1
1139 
1144 #define ALT_UART_FCR_TET_E_FIFO_QUARTER_FULL 0x2
1145 
1150 #define ALT_UART_FCR_TET_E_FIFO_HALF_FULL 0x3
1151 
1153 #define ALT_UART_FCR_TET_LSB 4
1154 
1155 #define ALT_UART_FCR_TET_MSB 5
1156 
1157 #define ALT_UART_FCR_TET_WIDTH 2
1158 
1159 #define ALT_UART_FCR_TET_SET_MSK 0x00000030
1160 
1161 #define ALT_UART_FCR_TET_CLR_MSK 0xffffffcf
1162 
1163 #define ALT_UART_FCR_TET_RESET 0x0
1164 
1165 #define ALT_UART_FCR_TET_GET(value) (((value) & 0x00000030) >> 4)
1166 
1167 #define ALT_UART_FCR_TET_SET(value) (((value) << 4) & 0x00000030)
1168 
1211 #define ALT_UART_FCR_RT_E_FIFO_CHAR_1 0x0
1212 
1217 #define ALT_UART_FCR_RT_E_FIFO_QUARTER_FULL 0x1
1218 
1223 #define ALT_UART_FCR_RT_E_FIFO_HALF_FULL 0x2
1224 
1229 #define ALT_UART_FCR_RT_E_FIFO_FULL_2 0x3
1230 
1232 #define ALT_UART_FCR_RT_LSB 6
1233 
1234 #define ALT_UART_FCR_RT_MSB 7
1235 
1236 #define ALT_UART_FCR_RT_WIDTH 2
1237 
1238 #define ALT_UART_FCR_RT_SET_MSK 0x000000c0
1239 
1240 #define ALT_UART_FCR_RT_CLR_MSK 0xffffff3f
1241 
1242 #define ALT_UART_FCR_RT_RESET 0x0
1243 
1244 #define ALT_UART_FCR_RT_GET(value) (((value) & 0x000000c0) >> 6)
1245 
1246 #define ALT_UART_FCR_RT_SET(value) (((value) << 6) & 0x000000c0)
1247 
1248 #ifndef __ASSEMBLY__
1249 
1260 {
1261  uint32_t fifoe : 1;
1262  uint32_t rfifor : 1;
1263  uint32_t xfifor : 1;
1264  uint32_t dmam : 1;
1265  uint32_t tet : 2;
1266  uint32_t rt : 2;
1267  uint32_t : 24;
1268 };
1269 
1271 typedef volatile struct ALT_UART_FCR_s ALT_UART_FCR_t;
1272 #endif /* __ASSEMBLY__ */
1273 
1275 #define ALT_UART_FCR_RESET 0x00000000
1276 
1277 #define ALT_UART_FCR_OFST 0x8
1278 
1279 #define ALT_UART_FCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_FCR_OFST))
1280 
1339 #define ALT_UART_LCR_DLS_E_LEN5 0x0
1340 
1345 #define ALT_UART_LCR_DLS_E_LEN6 0x1
1346 
1351 #define ALT_UART_LCR_DLS_E_LEN7 0x2
1352 
1357 #define ALT_UART_LCR_DLS_E_LEN8 0x3
1358 
1360 #define ALT_UART_LCR_DLS_LSB 0
1361 
1362 #define ALT_UART_LCR_DLS_MSB 1
1363 
1364 #define ALT_UART_LCR_DLS_WIDTH 2
1365 
1366 #define ALT_UART_LCR_DLS_SET_MSK 0x00000003
1367 
1368 #define ALT_UART_LCR_DLS_CLR_MSK 0xfffffffc
1369 
1370 #define ALT_UART_LCR_DLS_RESET 0x0
1371 
1372 #define ALT_UART_LCR_DLS_GET(value) (((value) & 0x00000003) >> 0)
1373 
1374 #define ALT_UART_LCR_DLS_SET(value) (((value) << 0) & 0x00000003)
1375 
1422 #define ALT_UART_LCR_STOP_E_ONESTOP 0x0
1423 
1428 #define ALT_UART_LCR_STOP_E_ONEPOINT5STOP 0x1
1429 
1431 #define ALT_UART_LCR_STOP_LSB 2
1432 
1433 #define ALT_UART_LCR_STOP_MSB 2
1434 
1435 #define ALT_UART_LCR_STOP_WIDTH 1
1436 
1437 #define ALT_UART_LCR_STOP_SET_MSK 0x00000004
1438 
1439 #define ALT_UART_LCR_STOP_CLR_MSK 0xfffffffb
1440 
1441 #define ALT_UART_LCR_STOP_RESET 0x0
1442 
1443 #define ALT_UART_LCR_STOP_GET(value) (((value) & 0x00000004) >> 2)
1444 
1445 #define ALT_UART_LCR_STOP_SET(value) (((value) << 2) & 0x00000004)
1446 
1480 #define ALT_UART_LCR_PEN_E_DISD 0x0
1481 
1486 #define ALT_UART_LCR_PEN_E_END 0x1
1487 
1489 #define ALT_UART_LCR_PEN_LSB 3
1490 
1491 #define ALT_UART_LCR_PEN_MSB 3
1492 
1493 #define ALT_UART_LCR_PEN_WIDTH 1
1494 
1495 #define ALT_UART_LCR_PEN_SET_MSK 0x00000008
1496 
1497 #define ALT_UART_LCR_PEN_CLR_MSK 0xfffffff7
1498 
1499 #define ALT_UART_LCR_PEN_RESET 0x0
1500 
1501 #define ALT_UART_LCR_PEN_GET(value) (((value) & 0x00000008) >> 3)
1502 
1503 #define ALT_UART_LCR_PEN_SET(value) (((value) << 3) & 0x00000008)
1504 
1536 #define ALT_UART_LCR_EPS_E_ODDPAR 0x0
1537 
1542 #define ALT_UART_LCR_EPS_E_EVENPAR 0x1
1543 
1545 #define ALT_UART_LCR_EPS_LSB 4
1546 
1547 #define ALT_UART_LCR_EPS_MSB 4
1548 
1549 #define ALT_UART_LCR_EPS_WIDTH 1
1550 
1551 #define ALT_UART_LCR_EPS_SET_MSK 0x00000010
1552 
1553 #define ALT_UART_LCR_EPS_CLR_MSK 0xffffffef
1554 
1555 #define ALT_UART_LCR_EPS_RESET 0x0
1556 
1557 #define ALT_UART_LCR_EPS_GET(value) (((value) & 0x00000010) >> 4)
1558 
1559 #define ALT_UART_LCR_EPS_SET(value) (((value) << 4) & 0x00000010)
1560 
1587 #define ALT_UART_LCR_SP_E_DISD 0x0
1588 
1593 #define ALT_UART_LCR_SP_E_END 0x1
1594 
1596 #define ALT_UART_LCR_SP_LSB 5
1597 
1598 #define ALT_UART_LCR_SP_MSB 5
1599 
1600 #define ALT_UART_LCR_SP_WIDTH 1
1601 
1602 #define ALT_UART_LCR_SP_SET_MSK 0x00000020
1603 
1604 #define ALT_UART_LCR_SP_CLR_MSK 0xffffffdf
1605 
1606 #define ALT_UART_LCR_SP_RESET 0x0
1607 
1608 #define ALT_UART_LCR_SP_GET(value) (((value) & 0x00000020) >> 5)
1609 
1610 #define ALT_UART_LCR_SP_SET(value) (((value) << 5) & 0x00000020)
1611 
1636 #define ALT_UART_LCR_BREAK_LSB 6
1637 
1638 #define ALT_UART_LCR_BREAK_MSB 6
1639 
1640 #define ALT_UART_LCR_BREAK_WIDTH 1
1641 
1642 #define ALT_UART_LCR_BREAK_SET_MSK 0x00000040
1643 
1644 #define ALT_UART_LCR_BREAK_CLR_MSK 0xffffffbf
1645 
1646 #define ALT_UART_LCR_BREAK_RESET 0x0
1647 
1648 #define ALT_UART_LCR_BREAK_GET(value) (((value) & 0x00000040) >> 6)
1649 
1650 #define ALT_UART_LCR_BREAK_SET(value) (((value) << 6) & 0x00000040)
1651 
1673 #define ALT_UART_LCR_DLAB_LSB 7
1674 
1675 #define ALT_UART_LCR_DLAB_MSB 7
1676 
1677 #define ALT_UART_LCR_DLAB_WIDTH 1
1678 
1679 #define ALT_UART_LCR_DLAB_SET_MSK 0x00000080
1680 
1681 #define ALT_UART_LCR_DLAB_CLR_MSK 0xffffff7f
1682 
1683 #define ALT_UART_LCR_DLAB_RESET 0x0
1684 
1685 #define ALT_UART_LCR_DLAB_GET(value) (((value) & 0x00000080) >> 7)
1686 
1687 #define ALT_UART_LCR_DLAB_SET(value) (((value) << 7) & 0x00000080)
1688 
1698 #define ALT_UART_LCR_RSVD_LCR_31TO8_LSB 8
1699 
1700 #define ALT_UART_LCR_RSVD_LCR_31TO8_MSB 31
1701 
1702 #define ALT_UART_LCR_RSVD_LCR_31TO8_WIDTH 24
1703 
1704 #define ALT_UART_LCR_RSVD_LCR_31TO8_SET_MSK 0xffffff00
1705 
1706 #define ALT_UART_LCR_RSVD_LCR_31TO8_CLR_MSK 0x000000ff
1707 
1708 #define ALT_UART_LCR_RSVD_LCR_31TO8_RESET 0x0
1709 
1710 #define ALT_UART_LCR_RSVD_LCR_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
1711 
1712 #define ALT_UART_LCR_RSVD_LCR_31TO8_SET(value) (((value) << 8) & 0xffffff00)
1713 
1714 #ifndef __ASSEMBLY__
1715 
1726 {
1727  uint32_t dls : 2;
1728  uint32_t stop : 1;
1729  uint32_t pen : 1;
1730  uint32_t eps : 1;
1731  uint32_t sp : 1;
1732  uint32_t break_ : 1;
1733  uint32_t dlab : 1;
1734  const uint32_t rsvd_lcr_31to8 : 24;
1735 };
1736 
1738 typedef volatile struct ALT_UART_LCR_s ALT_UART_LCR_t;
1739 #endif /* __ASSEMBLY__ */
1740 
1742 #define ALT_UART_LCR_RESET 0x00000000
1743 
1744 #define ALT_UART_LCR_OFST 0xc
1745 
1746 #define ALT_UART_LCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LCR_OFST))
1747 
1804 #define ALT_UART_MCR_DTR_E_LOGIC1 0x0
1805 
1810 #define ALT_UART_MCR_DTR_E_LOGIC0 0x1
1811 
1813 #define ALT_UART_MCR_DTR_LSB 0
1814 
1815 #define ALT_UART_MCR_DTR_MSB 0
1816 
1817 #define ALT_UART_MCR_DTR_WIDTH 1
1818 
1819 #define ALT_UART_MCR_DTR_SET_MSK 0x00000001
1820 
1821 #define ALT_UART_MCR_DTR_CLR_MSK 0xfffffffe
1822 
1823 #define ALT_UART_MCR_DTR_RESET 0x0
1824 
1825 #define ALT_UART_MCR_DTR_GET(value) (((value) & 0x00000001) >> 0)
1826 
1827 #define ALT_UART_MCR_DTR_SET(value) (((value) << 0) & 0x00000001)
1828 
1876 #define ALT_UART_MCR_RTS_E_LOGIC1 0x0
1877 
1882 #define ALT_UART_MCR_RTS_E_LOGIC0 0x1
1883 
1885 #define ALT_UART_MCR_RTS_LSB 1
1886 
1887 #define ALT_UART_MCR_RTS_MSB 1
1888 
1889 #define ALT_UART_MCR_RTS_WIDTH 1
1890 
1891 #define ALT_UART_MCR_RTS_SET_MSK 0x00000002
1892 
1893 #define ALT_UART_MCR_RTS_CLR_MSK 0xfffffffd
1894 
1895 #define ALT_UART_MCR_RTS_RESET 0x0
1896 
1897 #define ALT_UART_MCR_RTS_GET(value) (((value) & 0x00000002) >> 1)
1898 
1899 #define ALT_UART_MCR_RTS_SET(value) (((value) << 1) & 0x00000002)
1900 
1935 #define ALT_UART_MCR_OUT1_E_LOGIC1 0x0
1936 
1941 #define ALT_UART_MCR_OUT1_E_LOGIC0 0x1
1942 
1944 #define ALT_UART_MCR_OUT1_LSB 2
1945 
1946 #define ALT_UART_MCR_OUT1_MSB 2
1947 
1948 #define ALT_UART_MCR_OUT1_WIDTH 1
1949 
1950 #define ALT_UART_MCR_OUT1_SET_MSK 0x00000004
1951 
1952 #define ALT_UART_MCR_OUT1_CLR_MSK 0xfffffffb
1953 
1954 #define ALT_UART_MCR_OUT1_RESET 0x0
1955 
1956 #define ALT_UART_MCR_OUT1_GET(value) (((value) & 0x00000004) >> 2)
1957 
1958 #define ALT_UART_MCR_OUT1_SET(value) (((value) << 2) & 0x00000004)
1959 
1994 #define ALT_UART_MCR_OUT2_E_LOGIC1 0x0
1995 
2000 #define ALT_UART_MCR_OUT2_E_LOGIC0 0x1
2001 
2003 #define ALT_UART_MCR_OUT2_LSB 3
2004 
2005 #define ALT_UART_MCR_OUT2_MSB 3
2006 
2007 #define ALT_UART_MCR_OUT2_WIDTH 1
2008 
2009 #define ALT_UART_MCR_OUT2_SET_MSK 0x00000008
2010 
2011 #define ALT_UART_MCR_OUT2_CLR_MSK 0xfffffff7
2012 
2013 #define ALT_UART_MCR_OUT2_RESET 0x0
2014 
2015 #define ALT_UART_MCR_OUT2_GET(value) (((value) & 0x00000008) >> 3)
2016 
2017 #define ALT_UART_MCR_OUT2_SET(value) (((value) << 3) & 0x00000008)
2018 
2053 #define ALT_UART_MCR_LOOPBACK_LSB 4
2054 
2055 #define ALT_UART_MCR_LOOPBACK_MSB 4
2056 
2057 #define ALT_UART_MCR_LOOPBACK_WIDTH 1
2058 
2059 #define ALT_UART_MCR_LOOPBACK_SET_MSK 0x00000010
2060 
2061 #define ALT_UART_MCR_LOOPBACK_CLR_MSK 0xffffffef
2062 
2063 #define ALT_UART_MCR_LOOPBACK_RESET 0x0
2064 
2065 #define ALT_UART_MCR_LOOPBACK_GET(value) (((value) & 0x00000010) >> 4)
2066 
2067 #define ALT_UART_MCR_LOOPBACK_SET(value) (((value) << 4) & 0x00000010)
2068 
2101 #define ALT_UART_MCR_AFCE_E_DISD 0x0
2102 
2107 #define ALT_UART_MCR_AFCE_E_END 0x1
2108 
2110 #define ALT_UART_MCR_AFCE_LSB 5
2111 
2112 #define ALT_UART_MCR_AFCE_MSB 5
2113 
2114 #define ALT_UART_MCR_AFCE_WIDTH 1
2115 
2116 #define ALT_UART_MCR_AFCE_SET_MSK 0x00000020
2117 
2118 #define ALT_UART_MCR_AFCE_CLR_MSK 0xffffffdf
2119 
2120 #define ALT_UART_MCR_AFCE_RESET 0x0
2121 
2122 #define ALT_UART_MCR_AFCE_GET(value) (((value) & 0x00000020) >> 5)
2123 
2124 #define ALT_UART_MCR_AFCE_SET(value) (((value) << 5) & 0x00000020)
2125 
2144 #define ALT_UART_MCR_SIRE_LSB 6
2145 
2146 #define ALT_UART_MCR_SIRE_MSB 6
2147 
2148 #define ALT_UART_MCR_SIRE_WIDTH 1
2149 
2150 #define ALT_UART_MCR_SIRE_SET_MSK 0x00000040
2151 
2152 #define ALT_UART_MCR_SIRE_CLR_MSK 0xffffffbf
2153 
2154 #define ALT_UART_MCR_SIRE_RESET 0x0
2155 
2156 #define ALT_UART_MCR_SIRE_GET(value) (((value) & 0x00000040) >> 6)
2157 
2158 #define ALT_UART_MCR_SIRE_SET(value) (((value) << 6) & 0x00000040)
2159 
2169 #define ALT_UART_MCR_RSVD_MCR_31TO7_LSB 7
2170 
2171 #define ALT_UART_MCR_RSVD_MCR_31TO7_MSB 31
2172 
2173 #define ALT_UART_MCR_RSVD_MCR_31TO7_WIDTH 25
2174 
2175 #define ALT_UART_MCR_RSVD_MCR_31TO7_SET_MSK 0xffffff80
2176 
2177 #define ALT_UART_MCR_RSVD_MCR_31TO7_CLR_MSK 0x0000007f
2178 
2179 #define ALT_UART_MCR_RSVD_MCR_31TO7_RESET 0x0
2180 
2181 #define ALT_UART_MCR_RSVD_MCR_31TO7_GET(value) (((value) & 0xffffff80) >> 7)
2182 
2183 #define ALT_UART_MCR_RSVD_MCR_31TO7_SET(value) (((value) << 7) & 0xffffff80)
2184 
2185 #ifndef __ASSEMBLY__
2186 
2197 {
2198  uint32_t dtr : 1;
2199  uint32_t rts : 1;
2200  uint32_t out1 : 1;
2201  uint32_t out2 : 1;
2202  uint32_t loopback : 1;
2203  uint32_t afce : 1;
2204  const uint32_t sire : 1;
2205  const uint32_t rsvd_mcr_31to7 : 25;
2206 };
2207 
2209 typedef volatile struct ALT_UART_MCR_s ALT_UART_MCR_t;
2210 #endif /* __ASSEMBLY__ */
2211 
2213 #define ALT_UART_MCR_RESET 0x00000000
2214 
2215 #define ALT_UART_MCR_OFST 0x10
2216 
2217 #define ALT_UART_MCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MCR_OFST))
2218 
2273 #define ALT_UART_LSR_DR_E_NODATARDY 0x0
2274 
2279 #define ALT_UART_LSR_DR_E_DATARDY 0x1
2280 
2282 #define ALT_UART_LSR_DR_LSB 0
2283 
2284 #define ALT_UART_LSR_DR_MSB 0
2285 
2286 #define ALT_UART_LSR_DR_WIDTH 1
2287 
2288 #define ALT_UART_LSR_DR_SET_MSK 0x00000001
2289 
2290 #define ALT_UART_LSR_DR_CLR_MSK 0xfffffffe
2291 
2292 #define ALT_UART_LSR_DR_RESET 0x0
2293 
2294 #define ALT_UART_LSR_DR_GET(value) (((value) & 0x00000001) >> 0)
2295 
2296 #define ALT_UART_LSR_DR_SET(value) (((value) << 0) & 0x00000001)
2297 
2344 #define ALT_UART_LSR_OE_E_NOOVERRUN 0x0
2345 
2350 #define ALT_UART_LSR_OE_E_OVERRUN 0x1
2351 
2353 #define ALT_UART_LSR_OE_LSB 1
2354 
2355 #define ALT_UART_LSR_OE_MSB 1
2356 
2357 #define ALT_UART_LSR_OE_WIDTH 1
2358 
2359 #define ALT_UART_LSR_OE_SET_MSK 0x00000002
2360 
2361 #define ALT_UART_LSR_OE_CLR_MSK 0xfffffffd
2362 
2363 #define ALT_UART_LSR_OE_RESET 0x0
2364 
2365 #define ALT_UART_LSR_OE_GET(value) (((value) & 0x00000002) >> 1)
2366 
2367 #define ALT_UART_LSR_OE_SET(value) (((value) << 1) & 0x00000002)
2368 
2410 #define ALT_UART_LSR_PE_E_NOPARITYERR 0x0
2411 
2416 #define ALT_UART_LSR_PE_E_PARITYERR 0x1
2417 
2419 #define ALT_UART_LSR_PE_LSB 2
2420 
2421 #define ALT_UART_LSR_PE_MSB 2
2422 
2423 #define ALT_UART_LSR_PE_WIDTH 1
2424 
2425 #define ALT_UART_LSR_PE_SET_MSK 0x00000004
2426 
2427 #define ALT_UART_LSR_PE_CLR_MSK 0xfffffffb
2428 
2429 #define ALT_UART_LSR_PE_RESET 0x0
2430 
2431 #define ALT_UART_LSR_PE_GET(value) (((value) & 0x00000004) >> 2)
2432 
2433 #define ALT_UART_LSR_PE_SET(value) (((value) << 2) & 0x00000004)
2434 
2486 #define ALT_UART_LSR_FE_E_NOFRMERR 0x0
2487 
2492 #define ALT_UART_LSR_FE_E_FRMERR 0x1
2493 
2495 #define ALT_UART_LSR_FE_LSB 3
2496 
2497 #define ALT_UART_LSR_FE_MSB 3
2498 
2499 #define ALT_UART_LSR_FE_WIDTH 1
2500 
2501 #define ALT_UART_LSR_FE_SET_MSK 0x00000008
2502 
2503 #define ALT_UART_LSR_FE_CLR_MSK 0xfffffff7
2504 
2505 #define ALT_UART_LSR_FE_RESET 0x0
2506 
2507 #define ALT_UART_LSR_FE_GET(value) (((value) & 0x00000008) >> 3)
2508 
2509 #define ALT_UART_LSR_FE_SET(value) (((value) << 3) & 0x00000008)
2510 
2551 #define ALT_UART_LSR_BI_LSB 4
2552 
2553 #define ALT_UART_LSR_BI_MSB 4
2554 
2555 #define ALT_UART_LSR_BI_WIDTH 1
2556 
2557 #define ALT_UART_LSR_BI_SET_MSK 0x00000010
2558 
2559 #define ALT_UART_LSR_BI_CLR_MSK 0xffffffef
2560 
2561 #define ALT_UART_LSR_BI_RESET 0x0
2562 
2563 #define ALT_UART_LSR_BI_GET(value) (((value) & 0x00000010) >> 4)
2564 
2565 #define ALT_UART_LSR_BI_SET(value) (((value) << 4) & 0x00000010)
2566 
2601 #define ALT_UART_LSR_THRE_LSB 5
2602 
2603 #define ALT_UART_LSR_THRE_MSB 5
2604 
2605 #define ALT_UART_LSR_THRE_WIDTH 1
2606 
2607 #define ALT_UART_LSR_THRE_SET_MSK 0x00000020
2608 
2609 #define ALT_UART_LSR_THRE_CLR_MSK 0xffffffdf
2610 
2611 #define ALT_UART_LSR_THRE_RESET 0x1
2612 
2613 #define ALT_UART_LSR_THRE_GET(value) (((value) & 0x00000020) >> 5)
2614 
2615 #define ALT_UART_LSR_THRE_SET(value) (((value) << 5) & 0x00000020)
2616 
2645 #define ALT_UART_LSR_TEMT_E_NOTEMPTY 0x0
2646 
2651 #define ALT_UART_LSR_TEMT_E_EMPTY 0x1
2652 
2654 #define ALT_UART_LSR_TEMT_LSB 6
2655 
2656 #define ALT_UART_LSR_TEMT_MSB 6
2657 
2658 #define ALT_UART_LSR_TEMT_WIDTH 1
2659 
2660 #define ALT_UART_LSR_TEMT_SET_MSK 0x00000040
2661 
2662 #define ALT_UART_LSR_TEMT_CLR_MSK 0xffffffbf
2663 
2664 #define ALT_UART_LSR_TEMT_RESET 0x1
2665 
2666 #define ALT_UART_LSR_TEMT_GET(value) (((value) & 0x00000040) >> 6)
2667 
2668 #define ALT_UART_LSR_TEMT_SET(value) (((value) << 6) & 0x00000040)
2669 
2706 #define ALT_UART_LSR_RFE_E_NOERR 0x0
2707 
2712 #define ALT_UART_LSR_RFE_E_ERR 0x1
2713 
2715 #define ALT_UART_LSR_RFE_LSB 7
2716 
2717 #define ALT_UART_LSR_RFE_MSB 7
2718 
2719 #define ALT_UART_LSR_RFE_WIDTH 1
2720 
2721 #define ALT_UART_LSR_RFE_SET_MSK 0x00000080
2722 
2723 #define ALT_UART_LSR_RFE_CLR_MSK 0xffffff7f
2724 
2725 #define ALT_UART_LSR_RFE_RESET 0x0
2726 
2727 #define ALT_UART_LSR_RFE_GET(value) (((value) & 0x00000080) >> 7)
2728 
2729 #define ALT_UART_LSR_RFE_SET(value) (((value) << 7) & 0x00000080)
2730 
2740 #define ALT_UART_LSR_RSVD_LSR_31TO8_LSB 8
2741 
2742 #define ALT_UART_LSR_RSVD_LSR_31TO8_MSB 31
2743 
2744 #define ALT_UART_LSR_RSVD_LSR_31TO8_WIDTH 24
2745 
2746 #define ALT_UART_LSR_RSVD_LSR_31TO8_SET_MSK 0xffffff00
2747 
2748 #define ALT_UART_LSR_RSVD_LSR_31TO8_CLR_MSK 0x000000ff
2749 
2750 #define ALT_UART_LSR_RSVD_LSR_31TO8_RESET 0x0
2751 
2752 #define ALT_UART_LSR_RSVD_LSR_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
2753 
2754 #define ALT_UART_LSR_RSVD_LSR_31TO8_SET(value) (((value) << 8) & 0xffffff00)
2755 
2756 #ifndef __ASSEMBLY__
2757 
2768 {
2769  const uint32_t dr : 1;
2770  const uint32_t oe : 1;
2771  const uint32_t pe : 1;
2772  const uint32_t fe : 1;
2773  const uint32_t bi : 1;
2774  const uint32_t thre : 1;
2775  const uint32_t temt : 1;
2776  const uint32_t rfe : 1;
2777  const uint32_t rsvd_lsr_31to8 : 24;
2778 };
2779 
2781 typedef volatile struct ALT_UART_LSR_s ALT_UART_LSR_t;
2782 #endif /* __ASSEMBLY__ */
2783 
2785 #define ALT_UART_LSR_RESET 0x00000060
2786 
2787 #define ALT_UART_LSR_OFST 0x14
2788 
2789 #define ALT_UART_LSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LSR_OFST))
2790 
2864 #define ALT_UART_MSR_DCTS_E_NOCHG 0x0
2865 
2870 #define ALT_UART_MSR_DCTS_E_CHG 0x1
2871 
2873 #define ALT_UART_MSR_DCTS_LSB 0
2874 
2875 #define ALT_UART_MSR_DCTS_MSB 0
2876 
2877 #define ALT_UART_MSR_DCTS_WIDTH 1
2878 
2879 #define ALT_UART_MSR_DCTS_SET_MSK 0x00000001
2880 
2881 #define ALT_UART_MSR_DCTS_CLR_MSK 0xfffffffe
2882 
2883 #define ALT_UART_MSR_DCTS_RESET 0x0
2884 
2885 #define ALT_UART_MSR_DCTS_GET(value) (((value) & 0x00000001) >> 0)
2886 
2887 #define ALT_UART_MSR_DCTS_SET(value) (((value) << 0) & 0x00000001)
2888 
2928 #define ALT_UART_MSR_DDSR_E_NOCHG 0x0
2929 
2934 #define ALT_UART_MSR_DDSR_E_CHG 0x1
2935 
2937 #define ALT_UART_MSR_DDSR_LSB 1
2938 
2939 #define ALT_UART_MSR_DDSR_MSB 1
2940 
2941 #define ALT_UART_MSR_DDSR_WIDTH 1
2942 
2943 #define ALT_UART_MSR_DDSR_SET_MSK 0x00000002
2944 
2945 #define ALT_UART_MSR_DDSR_CLR_MSK 0xfffffffd
2946 
2947 #define ALT_UART_MSR_DDSR_RESET 0x0
2948 
2949 #define ALT_UART_MSR_DDSR_GET(value) (((value) & 0x00000002) >> 1)
2950 
2951 #define ALT_UART_MSR_DDSR_SET(value) (((value) << 1) & 0x00000002)
2952 
2989 #define ALT_UART_MSR_TERI_E_NOCHG 0x0
2990 
2995 #define ALT_UART_MSR_TERI_E_CHG 0x1
2996 
2998 #define ALT_UART_MSR_TERI_LSB 2
2999 
3000 #define ALT_UART_MSR_TERI_MSB 2
3001 
3002 #define ALT_UART_MSR_TERI_WIDTH 1
3003 
3004 #define ALT_UART_MSR_TERI_SET_MSK 0x00000004
3005 
3006 #define ALT_UART_MSR_TERI_CLR_MSK 0xfffffffb
3007 
3008 #define ALT_UART_MSR_TERI_RESET 0x0
3009 
3010 #define ALT_UART_MSR_TERI_GET(value) (((value) & 0x00000004) >> 2)
3011 
3012 #define ALT_UART_MSR_TERI_SET(value) (((value) << 2) & 0x00000004)
3013 
3054 #define ALT_UART_MSR_DDCD_E_NOCHG 0x0
3055 
3060 #define ALT_UART_MSR_DDCD_E_CHG 0x1
3061 
3063 #define ALT_UART_MSR_DDCD_LSB 3
3064 
3065 #define ALT_UART_MSR_DDCD_MSB 3
3066 
3067 #define ALT_UART_MSR_DDCD_WIDTH 1
3068 
3069 #define ALT_UART_MSR_DDCD_SET_MSK 0x00000008
3070 
3071 #define ALT_UART_MSR_DDCD_CLR_MSK 0xfffffff7
3072 
3073 #define ALT_UART_MSR_DDCD_RESET 0x0
3074 
3075 #define ALT_UART_MSR_DDCD_GET(value) (((value) & 0x00000008) >> 3)
3076 
3077 #define ALT_UART_MSR_DDCD_SET(value) (((value) << 3) & 0x00000008)
3078 
3116 #define ALT_UART_MSR_CTS_E_LOGIC1 0x0
3117 
3122 #define ALT_UART_MSR_CTS_E_LOGIC0 0x1
3123 
3125 #define ALT_UART_MSR_CTS_LSB 4
3126 
3127 #define ALT_UART_MSR_CTS_MSB 4
3128 
3129 #define ALT_UART_MSR_CTS_WIDTH 1
3130 
3131 #define ALT_UART_MSR_CTS_SET_MSK 0x00000010
3132 
3133 #define ALT_UART_MSR_CTS_CLR_MSK 0xffffffef
3134 
3135 #define ALT_UART_MSR_CTS_RESET 0x0
3136 
3137 #define ALT_UART_MSR_CTS_GET(value) (((value) & 0x00000010) >> 4)
3138 
3139 #define ALT_UART_MSR_CTS_SET(value) (((value) << 4) & 0x00000010)
3140 
3178 #define ALT_UART_MSR_DSR_E_LOGIC1 0x0
3179 
3184 #define ALT_UART_MSR_DSR_E_LOGIC0 0x1
3185 
3187 #define ALT_UART_MSR_DSR_LSB 5
3188 
3189 #define ALT_UART_MSR_DSR_MSB 5
3190 
3191 #define ALT_UART_MSR_DSR_WIDTH 1
3192 
3193 #define ALT_UART_MSR_DSR_SET_MSK 0x00000020
3194 
3195 #define ALT_UART_MSR_DSR_CLR_MSK 0xffffffdf
3196 
3197 #define ALT_UART_MSR_DSR_RESET 0x0
3198 
3199 #define ALT_UART_MSR_DSR_GET(value) (((value) & 0x00000020) >> 5)
3200 
3201 #define ALT_UART_MSR_DSR_SET(value) (((value) << 5) & 0x00000020)
3202 
3240 #define ALT_UART_MSR_RI_E_LOGIC1 0x0
3241 
3246 #define ALT_UART_MSR_RI_E_LOGIC0 0x1
3247 
3249 #define ALT_UART_MSR_RI_LSB 6
3250 
3251 #define ALT_UART_MSR_RI_MSB 6
3252 
3253 #define ALT_UART_MSR_RI_WIDTH 1
3254 
3255 #define ALT_UART_MSR_RI_SET_MSK 0x00000040
3256 
3257 #define ALT_UART_MSR_RI_CLR_MSK 0xffffffbf
3258 
3259 #define ALT_UART_MSR_RI_RESET 0x0
3260 
3261 #define ALT_UART_MSR_RI_GET(value) (((value) & 0x00000040) >> 6)
3262 
3263 #define ALT_UART_MSR_RI_SET(value) (((value) << 6) & 0x00000040)
3264 
3300 #define ALT_UART_MSR_DCD_E_LOGIC1 0x0
3301 
3306 #define ALT_UART_MSR_DCD_E_LOGIC0 0x1
3307 
3309 #define ALT_UART_MSR_DCD_LSB 7
3310 
3311 #define ALT_UART_MSR_DCD_MSB 7
3312 
3313 #define ALT_UART_MSR_DCD_WIDTH 1
3314 
3315 #define ALT_UART_MSR_DCD_SET_MSK 0x00000080
3316 
3317 #define ALT_UART_MSR_DCD_CLR_MSK 0xffffff7f
3318 
3319 #define ALT_UART_MSR_DCD_RESET 0x0
3320 
3321 #define ALT_UART_MSR_DCD_GET(value) (((value) & 0x00000080) >> 7)
3322 
3323 #define ALT_UART_MSR_DCD_SET(value) (((value) << 7) & 0x00000080)
3324 
3334 #define ALT_UART_MSR_RSVD_MSC_31TO8_LSB 8
3335 
3336 #define ALT_UART_MSR_RSVD_MSC_31TO8_MSB 31
3337 
3338 #define ALT_UART_MSR_RSVD_MSC_31TO8_WIDTH 24
3339 
3340 #define ALT_UART_MSR_RSVD_MSC_31TO8_SET_MSK 0xffffff00
3341 
3342 #define ALT_UART_MSR_RSVD_MSC_31TO8_CLR_MSK 0x000000ff
3343 
3344 #define ALT_UART_MSR_RSVD_MSC_31TO8_RESET 0x0
3345 
3346 #define ALT_UART_MSR_RSVD_MSC_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3347 
3348 #define ALT_UART_MSR_RSVD_MSC_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3349 
3350 #ifndef __ASSEMBLY__
3351 
3362 {
3363  const uint32_t dcts : 1;
3364  const uint32_t ddsr : 1;
3365  const uint32_t teri : 1;
3366  const uint32_t ddcd : 1;
3367  const uint32_t cts : 1;
3368  const uint32_t dsr : 1;
3369  const uint32_t ri : 1;
3370  const uint32_t dcd : 1;
3371  const uint32_t rsvd_msc_31to8 : 24;
3372 };
3373 
3375 typedef volatile struct ALT_UART_MSR_s ALT_UART_MSR_t;
3376 #endif /* __ASSEMBLY__ */
3377 
3379 #define ALT_UART_MSR_RESET 0x00000000
3380 
3381 #define ALT_UART_MSR_OFST 0x18
3382 
3383 #define ALT_UART_MSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MSR_OFST))
3384 
3409 #define ALT_UART_SCR_SCR_LSB 0
3410 
3411 #define ALT_UART_SCR_SCR_MSB 7
3412 
3413 #define ALT_UART_SCR_SCR_WIDTH 8
3414 
3415 #define ALT_UART_SCR_SCR_SET_MSK 0x000000ff
3416 
3417 #define ALT_UART_SCR_SCR_CLR_MSK 0xffffff00
3418 
3419 #define ALT_UART_SCR_SCR_RESET 0x0
3420 
3421 #define ALT_UART_SCR_SCR_GET(value) (((value) & 0x000000ff) >> 0)
3422 
3423 #define ALT_UART_SCR_SCR_SET(value) (((value) << 0) & 0x000000ff)
3424 
3434 #define ALT_UART_SCR_RSVD_SCR_31TO8_LSB 8
3435 
3436 #define ALT_UART_SCR_RSVD_SCR_31TO8_MSB 31
3437 
3438 #define ALT_UART_SCR_RSVD_SCR_31TO8_WIDTH 24
3439 
3440 #define ALT_UART_SCR_RSVD_SCR_31TO8_SET_MSK 0xffffff00
3441 
3442 #define ALT_UART_SCR_RSVD_SCR_31TO8_CLR_MSK 0x000000ff
3443 
3444 #define ALT_UART_SCR_RSVD_SCR_31TO8_RESET 0x0
3445 
3446 #define ALT_UART_SCR_RSVD_SCR_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3447 
3448 #define ALT_UART_SCR_RSVD_SCR_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3449 
3450 #ifndef __ASSEMBLY__
3451 
3462 {
3463  uint32_t scr : 8;
3464  const uint32_t rsvd_scr_31to8 : 24;
3465 };
3466 
3468 typedef volatile struct ALT_UART_SCR_s ALT_UART_SCR_t;
3469 #endif /* __ASSEMBLY__ */
3470 
3472 #define ALT_UART_SCR_RESET 0x00000000
3473 
3474 #define ALT_UART_SCR_OFST 0x1c
3475 
3476 #define ALT_UART_SCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SCR_OFST))
3477 
3530 #define ALT_UART_SRBR_SRBR_STHR_0_LSB 0
3531 
3532 #define ALT_UART_SRBR_SRBR_STHR_0_MSB 7
3533 
3534 #define ALT_UART_SRBR_SRBR_STHR_0_WIDTH 8
3535 
3536 #define ALT_UART_SRBR_SRBR_STHR_0_SET_MSK 0x000000ff
3537 
3538 #define ALT_UART_SRBR_SRBR_STHR_0_CLR_MSK 0xffffff00
3539 
3540 #define ALT_UART_SRBR_SRBR_STHR_0_RESET 0x0
3541 
3542 #define ALT_UART_SRBR_SRBR_STHR_0_GET(value) (((value) & 0x000000ff) >> 0)
3543 
3544 #define ALT_UART_SRBR_SRBR_STHR_0_SET(value) (((value) << 0) & 0x000000ff)
3545 
3555 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_LSB 8
3556 
3557 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_MSB 31
3558 
3559 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_WIDTH 24
3560 
3561 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_SET_MSK 0xffffff00
3562 
3563 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_CLR_MSK 0x000000ff
3564 
3565 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_RESET 0x0
3566 
3567 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3568 
3569 #define ALT_UART_SRBR_RSVD_SRBR_STHR_0_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3570 
3571 #ifndef __ASSEMBLY__
3572 
3583 {
3584  const uint32_t srbr_sthr_0 : 8;
3585  const uint32_t rsvd_srbr_sthr_0_31to8 : 24;
3586 };
3587 
3589 typedef volatile struct ALT_UART_SRBR_s ALT_UART_SRBR_t;
3590 #endif /* __ASSEMBLY__ */
3591 
3593 #define ALT_UART_SRBR_RESET 0x00000000
3594 
3595 #define ALT_UART_SRBR_OFST 0x30
3596 
3597 #define ALT_UART_SRBR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_OFST))
3598 
3622 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_LSB 0
3623 
3624 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_MSB 7
3625 
3626 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_WIDTH 8
3627 
3628 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_SET_MSK 0x000000ff
3629 
3630 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_CLR_MSK 0xffffff00
3631 
3632 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_RESET 0x0
3633 
3634 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_GET(value) (((value) & 0x000000ff) >> 0)
3635 
3636 #define ALT_UART_SRBR_STHR_1_SRBR_STHR_1_SET(value) (((value) << 0) & 0x000000ff)
3637 
3647 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_LSB 8
3648 
3649 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_MSB 31
3650 
3651 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_WIDTH 24
3652 
3653 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_SET_MSK 0xffffff00
3654 
3655 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_CLR_MSK 0x000000ff
3656 
3657 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_RESET 0x0
3658 
3659 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3660 
3661 #define ALT_UART_SRBR_STHR_1_RSVD_SRBR_STHR_1_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3662 
3663 #ifndef __ASSEMBLY__
3664 
3675 {
3676  const uint32_t srbr_sthr_1 : 8;
3677  const uint32_t rsvd_srbr_sthr_1_31to8 : 24;
3678 };
3679 
3682 #endif /* __ASSEMBLY__ */
3683 
3685 #define ALT_UART_SRBR_STHR_1_RESET 0x00000000
3686 
3687 #define ALT_UART_SRBR_STHR_1_OFST 0x34
3688 
3689 #define ALT_UART_SRBR_STHR_1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_1_OFST))
3690 
3714 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_LSB 0
3715 
3716 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_MSB 7
3717 
3718 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_WIDTH 8
3719 
3720 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_SET_MSK 0x000000ff
3721 
3722 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_CLR_MSK 0xffffff00
3723 
3724 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_RESET 0x0
3725 
3726 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_GET(value) (((value) & 0x000000ff) >> 0)
3727 
3728 #define ALT_UART_SRBR_STHR_2_SRBR_STHR_2_SET(value) (((value) << 0) & 0x000000ff)
3729 
3739 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_LSB 8
3740 
3741 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_MSB 31
3742 
3743 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_WIDTH 24
3744 
3745 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_SET_MSK 0xffffff00
3746 
3747 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_CLR_MSK 0x000000ff
3748 
3749 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_RESET 0x0
3750 
3751 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3752 
3753 #define ALT_UART_SRBR_STHR_2_RSVD_SRBR_STHR_2_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3754 
3755 #ifndef __ASSEMBLY__
3756 
3767 {
3768  const uint32_t srbr_sthr_2 : 8;
3769  const uint32_t rsvd_srbr_sthr_2_31to8 : 24;
3770 };
3771 
3774 #endif /* __ASSEMBLY__ */
3775 
3777 #define ALT_UART_SRBR_STHR_2_RESET 0x00000000
3778 
3779 #define ALT_UART_SRBR_STHR_2_OFST 0x38
3780 
3781 #define ALT_UART_SRBR_STHR_2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_2_OFST))
3782 
3806 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_LSB 0
3807 
3808 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_MSB 7
3809 
3810 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_WIDTH 8
3811 
3812 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_SET_MSK 0x000000ff
3813 
3814 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_CLR_MSK 0xffffff00
3815 
3816 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_RESET 0x0
3817 
3818 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_GET(value) (((value) & 0x000000ff) >> 0)
3819 
3820 #define ALT_UART_SRBR_STHR_3_SRBR_STHR_3_SET(value) (((value) << 0) & 0x000000ff)
3821 
3831 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_LSB 8
3832 
3833 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_MSB 31
3834 
3835 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_WIDTH 24
3836 
3837 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_SET_MSK 0xffffff00
3838 
3839 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_CLR_MSK 0x000000ff
3840 
3841 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_RESET 0x0
3842 
3843 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3844 
3845 #define ALT_UART_SRBR_STHR_3_RSVD_SRBR_STHR_3_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3846 
3847 #ifndef __ASSEMBLY__
3848 
3859 {
3860  const uint32_t srbr_sthr_3 : 8;
3861  const uint32_t rsvd_srbr_sthr_3_31to8 : 24;
3862 };
3863 
3866 #endif /* __ASSEMBLY__ */
3867 
3869 #define ALT_UART_SRBR_STHR_3_RESET 0x00000000
3870 
3871 #define ALT_UART_SRBR_STHR_3_OFST 0x3c
3872 
3873 #define ALT_UART_SRBR_STHR_3_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_3_OFST))
3874 
3898 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_LSB 0
3899 
3900 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_MSB 7
3901 
3902 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_WIDTH 8
3903 
3904 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_SET_MSK 0x000000ff
3905 
3906 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_CLR_MSK 0xffffff00
3907 
3908 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_RESET 0x0
3909 
3910 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_GET(value) (((value) & 0x000000ff) >> 0)
3911 
3912 #define ALT_UART_SRBR_STHR_4_SRBR_STHR_4_SET(value) (((value) << 0) & 0x000000ff)
3913 
3923 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_LSB 8
3924 
3925 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_MSB 31
3926 
3927 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_WIDTH 24
3928 
3929 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_SET_MSK 0xffffff00
3930 
3931 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_CLR_MSK 0x000000ff
3932 
3933 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_RESET 0x0
3934 
3935 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
3936 
3937 #define ALT_UART_SRBR_STHR_4_RSVD_SRBR_STHR_4_31TO8_SET(value) (((value) << 8) & 0xffffff00)
3938 
3939 #ifndef __ASSEMBLY__
3940 
3951 {
3952  const uint32_t srbr_sthr_4 : 8;
3953  const uint32_t rsvd_srbr_sthr_4_31to8 : 24;
3954 };
3955 
3958 #endif /* __ASSEMBLY__ */
3959 
3961 #define ALT_UART_SRBR_STHR_4_RESET 0x00000000
3962 
3963 #define ALT_UART_SRBR_STHR_4_OFST 0x40
3964 
3965 #define ALT_UART_SRBR_STHR_4_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_4_OFST))
3966 
3990 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_LSB 0
3991 
3992 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_MSB 7
3993 
3994 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_WIDTH 8
3995 
3996 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_SET_MSK 0x000000ff
3997 
3998 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_CLR_MSK 0xffffff00
3999 
4000 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_RESET 0x0
4001 
4002 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_GET(value) (((value) & 0x000000ff) >> 0)
4003 
4004 #define ALT_UART_SRBR_STHR_5_SRBR_STHR_5_SET(value) (((value) << 0) & 0x000000ff)
4005 
4015 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_LSB 8
4016 
4017 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_MSB 31
4018 
4019 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_WIDTH 24
4020 
4021 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_SET_MSK 0xffffff00
4022 
4023 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_CLR_MSK 0x000000ff
4024 
4025 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_RESET 0x0
4026 
4027 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4028 
4029 #define ALT_UART_SRBR_STHR_5_RSVD_SRBR_STHR_5_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4030 
4031 #ifndef __ASSEMBLY__
4032 
4043 {
4044  const uint32_t srbr_sthr_5 : 8;
4045  const uint32_t rsvd_srbr_sthr_5_31to8 : 24;
4046 };
4047 
4050 #endif /* __ASSEMBLY__ */
4051 
4053 #define ALT_UART_SRBR_STHR_5_RESET 0x00000000
4054 
4055 #define ALT_UART_SRBR_STHR_5_OFST 0x44
4056 
4057 #define ALT_UART_SRBR_STHR_5_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_5_OFST))
4058 
4082 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_LSB 0
4083 
4084 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_MSB 7
4085 
4086 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_WIDTH 8
4087 
4088 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_SET_MSK 0x000000ff
4089 
4090 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_CLR_MSK 0xffffff00
4091 
4092 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_RESET 0x0
4093 
4094 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_GET(value) (((value) & 0x000000ff) >> 0)
4095 
4096 #define ALT_UART_SRBR_STHR_6_SRBR_STHR_6_SET(value) (((value) << 0) & 0x000000ff)
4097 
4107 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_LSB 8
4108 
4109 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_MSB 31
4110 
4111 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_WIDTH 24
4112 
4113 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_SET_MSK 0xffffff00
4114 
4115 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_CLR_MSK 0x000000ff
4116 
4117 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_RESET 0x0
4118 
4119 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4120 
4121 #define ALT_UART_SRBR_STHR_6_RSVD_SRBR_STHR_6_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4122 
4123 #ifndef __ASSEMBLY__
4124 
4135 {
4136  const uint32_t srbr_sthr_6 : 8;
4137  const uint32_t rsvd_srbr_sthr_6_31to8 : 24;
4138 };
4139 
4142 #endif /* __ASSEMBLY__ */
4143 
4145 #define ALT_UART_SRBR_STHR_6_RESET 0x00000000
4146 
4147 #define ALT_UART_SRBR_STHR_6_OFST 0x48
4148 
4149 #define ALT_UART_SRBR_STHR_6_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_6_OFST))
4150 
4174 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_LSB 0
4175 
4176 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_MSB 7
4177 
4178 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_WIDTH 8
4179 
4180 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_SET_MSK 0x000000ff
4181 
4182 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_CLR_MSK 0xffffff00
4183 
4184 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_RESET 0x0
4185 
4186 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_GET(value) (((value) & 0x000000ff) >> 0)
4187 
4188 #define ALT_UART_SRBR_STHR_7_SRBR_STHR_7_SET(value) (((value) << 0) & 0x000000ff)
4189 
4199 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_LSB 8
4200 
4201 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_MSB 31
4202 
4203 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_WIDTH 24
4204 
4205 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_SET_MSK 0xffffff00
4206 
4207 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_CLR_MSK 0x000000ff
4208 
4209 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_RESET 0x0
4210 
4211 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4212 
4213 #define ALT_UART_SRBR_STHR_7_RSVD_SRBR_STHR_7_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4214 
4215 #ifndef __ASSEMBLY__
4216 
4227 {
4228  const uint32_t srbr_sthr_7 : 8;
4229  const uint32_t rsvd_srbr_sthr_7_31to8 : 24;
4230 };
4231 
4234 #endif /* __ASSEMBLY__ */
4235 
4237 #define ALT_UART_SRBR_STHR_7_RESET 0x00000000
4238 
4239 #define ALT_UART_SRBR_STHR_7_OFST 0x4c
4240 
4241 #define ALT_UART_SRBR_STHR_7_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_7_OFST))
4242 
4266 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_LSB 0
4267 
4268 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_MSB 7
4269 
4270 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_WIDTH 8
4271 
4272 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_SET_MSK 0x000000ff
4273 
4274 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_CLR_MSK 0xffffff00
4275 
4276 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_RESET 0x0
4277 
4278 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_GET(value) (((value) & 0x000000ff) >> 0)
4279 
4280 #define ALT_UART_SRBR_STHR_8_SRBR_STHR_8_SET(value) (((value) << 0) & 0x000000ff)
4281 
4291 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_LSB 8
4292 
4293 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_MSB 31
4294 
4295 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_WIDTH 24
4296 
4297 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_SET_MSK 0xffffff00
4298 
4299 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_CLR_MSK 0x000000ff
4300 
4301 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_RESET 0x0
4302 
4303 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4304 
4305 #define ALT_UART_SRBR_STHR_8_RSVD_SRBR_STHR_8_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4306 
4307 #ifndef __ASSEMBLY__
4308 
4319 {
4320  const uint32_t srbr_sthr_8 : 8;
4321  const uint32_t rsvd_srbr_sthr_8_31to8 : 24;
4322 };
4323 
4326 #endif /* __ASSEMBLY__ */
4327 
4329 #define ALT_UART_SRBR_STHR_8_RESET 0x00000000
4330 
4331 #define ALT_UART_SRBR_STHR_8_OFST 0x50
4332 
4333 #define ALT_UART_SRBR_STHR_8_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_8_OFST))
4334 
4358 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_LSB 0
4359 
4360 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_MSB 7
4361 
4362 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_WIDTH 8
4363 
4364 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_SET_MSK 0x000000ff
4365 
4366 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_CLR_MSK 0xffffff00
4367 
4368 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_RESET 0x0
4369 
4370 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_GET(value) (((value) & 0x000000ff) >> 0)
4371 
4372 #define ALT_UART_SRBR_STHR_9_SRBR_STHR_9_SET(value) (((value) << 0) & 0x000000ff)
4373 
4383 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_LSB 8
4384 
4385 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_MSB 31
4386 
4387 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_WIDTH 24
4388 
4389 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_SET_MSK 0xffffff00
4390 
4391 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_CLR_MSK 0x000000ff
4392 
4393 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_RESET 0x0
4394 
4395 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4396 
4397 #define ALT_UART_SRBR_STHR_9_RSVD_SRBR_STHR_9_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4398 
4399 #ifndef __ASSEMBLY__
4400 
4411 {
4412  const uint32_t srbr_sthr_9 : 8;
4413  const uint32_t rsvd_srbr_sthr_9_31to8 : 24;
4414 };
4415 
4418 #endif /* __ASSEMBLY__ */
4419 
4421 #define ALT_UART_SRBR_STHR_9_RESET 0x00000000
4422 
4423 #define ALT_UART_SRBR_STHR_9_OFST 0x54
4424 
4425 #define ALT_UART_SRBR_STHR_9_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_9_OFST))
4426 
4450 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_LSB 0
4451 
4452 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_MSB 7
4453 
4454 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_WIDTH 8
4455 
4456 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_SET_MSK 0x000000ff
4457 
4458 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_CLR_MSK 0xffffff00
4459 
4460 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_RESET 0x0
4461 
4462 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_GET(value) (((value) & 0x000000ff) >> 0)
4463 
4464 #define ALT_UART_SRBR_STHR_10_SRBR_STHR_10_SET(value) (((value) << 0) & 0x000000ff)
4465 
4475 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_LSB 8
4476 
4477 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_MSB 31
4478 
4479 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_WIDTH 24
4480 
4481 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_SET_MSK 0xffffff00
4482 
4483 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_CLR_MSK 0x000000ff
4484 
4485 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_RESET 0x0
4486 
4487 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4488 
4489 #define ALT_UART_SRBR_STHR_10_RSVD_SRBR_STHR_10_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4490 
4491 #ifndef __ASSEMBLY__
4492 
4503 {
4504  const uint32_t srbr_sthr_10 : 8;
4505  const uint32_t rsvd_srbr_sthr_10_31to8 : 24;
4506 };
4507 
4510 #endif /* __ASSEMBLY__ */
4511 
4513 #define ALT_UART_SRBR_STHR_10_RESET 0x00000000
4514 
4515 #define ALT_UART_SRBR_STHR_10_OFST 0x58
4516 
4517 #define ALT_UART_SRBR_STHR_10_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_10_OFST))
4518 
4542 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_LSB 0
4543 
4544 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_MSB 7
4545 
4546 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_WIDTH 8
4547 
4548 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_SET_MSK 0x000000ff
4549 
4550 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_CLR_MSK 0xffffff00
4551 
4552 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_RESET 0x0
4553 
4554 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_GET(value) (((value) & 0x000000ff) >> 0)
4555 
4556 #define ALT_UART_SRBR_STHR_11_SRBR_STHR_11_SET(value) (((value) << 0) & 0x000000ff)
4557 
4567 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_LSB 8
4568 
4569 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_MSB 31
4570 
4571 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_WIDTH 24
4572 
4573 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_SET_MSK 0xffffff00
4574 
4575 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_CLR_MSK 0x000000ff
4576 
4577 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_RESET 0x0
4578 
4579 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4580 
4581 #define ALT_UART_SRBR_STHR_11_RSVD_SRBR_STHR_11_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4582 
4583 #ifndef __ASSEMBLY__
4584 
4595 {
4596  const uint32_t srbr_sthr_11 : 8;
4597  const uint32_t rsvd_srbr_sthr_11_31to8 : 24;
4598 };
4599 
4602 #endif /* __ASSEMBLY__ */
4603 
4605 #define ALT_UART_SRBR_STHR_11_RESET 0x00000000
4606 
4607 #define ALT_UART_SRBR_STHR_11_OFST 0x5c
4608 
4609 #define ALT_UART_SRBR_STHR_11_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_11_OFST))
4610 
4634 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_LSB 0
4635 
4636 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_MSB 7
4637 
4638 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_WIDTH 8
4639 
4640 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_SET_MSK 0x000000ff
4641 
4642 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_CLR_MSK 0xffffff00
4643 
4644 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_RESET 0x0
4645 
4646 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_GET(value) (((value) & 0x000000ff) >> 0)
4647 
4648 #define ALT_UART_SRBR_STHR_12_SRBR_STHR_12_SET(value) (((value) << 0) & 0x000000ff)
4649 
4659 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_LSB 8
4660 
4661 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_MSB 31
4662 
4663 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_WIDTH 24
4664 
4665 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_SET_MSK 0xffffff00
4666 
4667 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_CLR_MSK 0x000000ff
4668 
4669 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_RESET 0x0
4670 
4671 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4672 
4673 #define ALT_UART_SRBR_STHR_12_RSVD_SRBR_STHR_12_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4674 
4675 #ifndef __ASSEMBLY__
4676 
4687 {
4688  const uint32_t srbr_sthr_12 : 8;
4689  const uint32_t rsvd_srbr_sthr_12_31to8 : 24;
4690 };
4691 
4694 #endif /* __ASSEMBLY__ */
4695 
4697 #define ALT_UART_SRBR_STHR_12_RESET 0x00000000
4698 
4699 #define ALT_UART_SRBR_STHR_12_OFST 0x60
4700 
4701 #define ALT_UART_SRBR_STHR_12_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_12_OFST))
4702 
4726 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_LSB 0
4727 
4728 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_MSB 7
4729 
4730 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_WIDTH 8
4731 
4732 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_SET_MSK 0x000000ff
4733 
4734 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_CLR_MSK 0xffffff00
4735 
4736 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_RESET 0x0
4737 
4738 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_GET(value) (((value) & 0x000000ff) >> 0)
4739 
4740 #define ALT_UART_SRBR_STHR_13_SRBR_STHR_13_SET(value) (((value) << 0) & 0x000000ff)
4741 
4751 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_LSB 8
4752 
4753 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_MSB 31
4754 
4755 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_WIDTH 24
4756 
4757 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_SET_MSK 0xffffff00
4758 
4759 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_CLR_MSK 0x000000ff
4760 
4761 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_RESET 0x0
4762 
4763 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4764 
4765 #define ALT_UART_SRBR_STHR_13_RSVD_SRBR_STHR_13_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4766 
4767 #ifndef __ASSEMBLY__
4768 
4779 {
4780  const uint32_t srbr_sthr_13 : 8;
4781  const uint32_t rsvd_srbr_sthr_13_31to8 : 24;
4782 };
4783 
4786 #endif /* __ASSEMBLY__ */
4787 
4789 #define ALT_UART_SRBR_STHR_13_RESET 0x00000000
4790 
4791 #define ALT_UART_SRBR_STHR_13_OFST 0x64
4792 
4793 #define ALT_UART_SRBR_STHR_13_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_13_OFST))
4794 
4818 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_LSB 0
4819 
4820 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_MSB 7
4821 
4822 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_WIDTH 8
4823 
4824 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_SET_MSK 0x000000ff
4825 
4826 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_CLR_MSK 0xffffff00
4827 
4828 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_RESET 0x0
4829 
4830 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_GET(value) (((value) & 0x000000ff) >> 0)
4831 
4832 #define ALT_UART_SRBR_STHR_14_SRBR_STHR_14_SET(value) (((value) << 0) & 0x000000ff)
4833 
4843 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_LSB 8
4844 
4845 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_MSB 31
4846 
4847 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_WIDTH 24
4848 
4849 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_SET_MSK 0xffffff00
4850 
4851 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_CLR_MSK 0x000000ff
4852 
4853 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_RESET 0x0
4854 
4855 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4856 
4857 #define ALT_UART_SRBR_STHR_14_RSVD_SRBR_STHR_14_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4858 
4859 #ifndef __ASSEMBLY__
4860 
4871 {
4872  const uint32_t srbr_sthr_14 : 8;
4873  const uint32_t rsvd_srbr_sthr_14_31to8 : 24;
4874 };
4875 
4878 #endif /* __ASSEMBLY__ */
4879 
4881 #define ALT_UART_SRBR_STHR_14_RESET 0x00000000
4882 
4883 #define ALT_UART_SRBR_STHR_14_OFST 0x68
4884 
4885 #define ALT_UART_SRBR_STHR_14_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_14_OFST))
4886 
4910 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_LSB 0
4911 
4912 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_MSB 7
4913 
4914 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_WIDTH 8
4915 
4916 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_SET_MSK 0x000000ff
4917 
4918 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_CLR_MSK 0xffffff00
4919 
4920 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_RESET 0x0
4921 
4922 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_GET(value) (((value) & 0x000000ff) >> 0)
4923 
4924 #define ALT_UART_SRBR_STHR_15_SRBR_STHR_15_SET(value) (((value) << 0) & 0x000000ff)
4925 
4935 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_LSB 8
4936 
4937 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_MSB 31
4938 
4939 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_WIDTH 24
4940 
4941 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_SET_MSK 0xffffff00
4942 
4943 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_CLR_MSK 0x000000ff
4944 
4945 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_RESET 0x0
4946 
4947 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
4948 
4949 #define ALT_UART_SRBR_STHR_15_RSVD_SRBR_STHR_15_31TO8_SET(value) (((value) << 8) & 0xffffff00)
4950 
4951 #ifndef __ASSEMBLY__
4952 
4963 {
4964  const uint32_t srbr_sthr_15 : 8;
4965  const uint32_t rsvd_srbr_sthr_15_31to8 : 24;
4966 };
4967 
4970 #endif /* __ASSEMBLY__ */
4971 
4973 #define ALT_UART_SRBR_STHR_15_RESET 0x00000000
4974 
4975 #define ALT_UART_SRBR_STHR_15_OFST 0x6c
4976 
4977 #define ALT_UART_SRBR_STHR_15_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_STHR_15_OFST))
4978 
5030 #define ALT_UART_FAR_SRBR_STHR_E_DISD 0x0
5031 
5036 #define ALT_UART_FAR_SRBR_STHR_E_END 0x1
5037 
5039 #define ALT_UART_FAR_SRBR_STHR_LSB 0
5040 
5041 #define ALT_UART_FAR_SRBR_STHR_MSB 0
5042 
5043 #define ALT_UART_FAR_SRBR_STHR_WIDTH 1
5044 
5045 #define ALT_UART_FAR_SRBR_STHR_SET_MSK 0x00000001
5046 
5047 #define ALT_UART_FAR_SRBR_STHR_CLR_MSK 0xfffffffe
5048 
5049 #define ALT_UART_FAR_SRBR_STHR_RESET 0x0
5050 
5051 #define ALT_UART_FAR_SRBR_STHR_GET(value) (((value) & 0x00000001) >> 0)
5052 
5053 #define ALT_UART_FAR_SRBR_STHR_SET(value) (((value) << 0) & 0x00000001)
5054 
5064 #define ALT_UART_FAR_RSVD_FAR_31TO1_LSB 1
5065 
5066 #define ALT_UART_FAR_RSVD_FAR_31TO1_MSB 31
5067 
5068 #define ALT_UART_FAR_RSVD_FAR_31TO1_WIDTH 31
5069 
5070 #define ALT_UART_FAR_RSVD_FAR_31TO1_SET_MSK 0xfffffffe
5071 
5072 #define ALT_UART_FAR_RSVD_FAR_31TO1_CLR_MSK 0x00000001
5073 
5074 #define ALT_UART_FAR_RSVD_FAR_31TO1_RESET 0x0
5075 
5076 #define ALT_UART_FAR_RSVD_FAR_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
5077 
5078 #define ALT_UART_FAR_RSVD_FAR_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
5079 
5080 #ifndef __ASSEMBLY__
5081 
5092 {
5093  uint32_t srbr_sthr : 1;
5094  const uint32_t rsvd_far_31to1 : 31;
5095 };
5096 
5098 typedef volatile struct ALT_UART_FAR_s ALT_UART_FAR_t;
5099 #endif /* __ASSEMBLY__ */
5100 
5102 #define ALT_UART_FAR_RESET 0x00000000
5103 
5104 #define ALT_UART_FAR_OFST 0x70
5105 
5106 #define ALT_UART_FAR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_FAR_OFST))
5107 
5146 #define ALT_UART_TFR_TFR_LSB 0
5147 
5148 #define ALT_UART_TFR_TFR_MSB 7
5149 
5150 #define ALT_UART_TFR_TFR_WIDTH 8
5151 
5152 #define ALT_UART_TFR_TFR_SET_MSK 0x000000ff
5153 
5154 #define ALT_UART_TFR_TFR_CLR_MSK 0xffffff00
5155 
5156 #define ALT_UART_TFR_TFR_RESET 0x0
5157 
5158 #define ALT_UART_TFR_TFR_GET(value) (((value) & 0x000000ff) >> 0)
5159 
5160 #define ALT_UART_TFR_TFR_SET(value) (((value) << 0) & 0x000000ff)
5161 
5171 #define ALT_UART_TFR_RSVD_TFR_31TO8_LSB 8
5172 
5173 #define ALT_UART_TFR_RSVD_TFR_31TO8_MSB 31
5174 
5175 #define ALT_UART_TFR_RSVD_TFR_31TO8_WIDTH 24
5176 
5177 #define ALT_UART_TFR_RSVD_TFR_31TO8_SET_MSK 0xffffff00
5178 
5179 #define ALT_UART_TFR_RSVD_TFR_31TO8_CLR_MSK 0x000000ff
5180 
5181 #define ALT_UART_TFR_RSVD_TFR_31TO8_RESET 0x0
5182 
5183 #define ALT_UART_TFR_RSVD_TFR_31TO8_GET(value) (((value) & 0xffffff00) >> 8)
5184 
5185 #define ALT_UART_TFR_RSVD_TFR_31TO8_SET(value) (((value) << 8) & 0xffffff00)
5186 
5187 #ifndef __ASSEMBLY__
5188 
5199 {
5200  const uint32_t tfr : 8;
5201  const uint32_t rsvd_tfr_31to8 : 24;
5202 };
5203 
5205 typedef volatile struct ALT_UART_TFR_s ALT_UART_TFR_t;
5206 #endif /* __ASSEMBLY__ */
5207 
5209 #define ALT_UART_TFR_RESET 0x00000000
5210 
5211 #define ALT_UART_TFR_OFST 0x74
5212 
5213 #define ALT_UART_TFR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_TFR_OFST))
5214 
5255 #define ALT_UART_RFW_RFWD_LSB 0
5256 
5257 #define ALT_UART_RFW_RFWD_MSB 7
5258 
5259 #define ALT_UART_RFW_RFWD_WIDTH 8
5260 
5261 #define ALT_UART_RFW_RFWD_SET_MSK 0x000000ff
5262 
5263 #define ALT_UART_RFW_RFWD_CLR_MSK 0xffffff00
5264 
5265 #define ALT_UART_RFW_RFWD_RESET 0x0
5266 
5267 #define ALT_UART_RFW_RFWD_GET(value) (((value) & 0x000000ff) >> 0)
5268 
5269 #define ALT_UART_RFW_RFWD_SET(value) (((value) << 0) & 0x000000ff)
5270 
5291 #define ALT_UART_RFW_RFPE_LSB 8
5292 
5293 #define ALT_UART_RFW_RFPE_MSB 8
5294 
5295 #define ALT_UART_RFW_RFPE_WIDTH 1
5296 
5297 #define ALT_UART_RFW_RFPE_SET_MSK 0x00000100
5298 
5299 #define ALT_UART_RFW_RFPE_CLR_MSK 0xfffffeff
5300 
5301 #define ALT_UART_RFW_RFPE_RESET 0x0
5302 
5303 #define ALT_UART_RFW_RFPE_GET(value) (((value) & 0x00000100) >> 8)
5304 
5305 #define ALT_UART_RFW_RFPE_SET(value) (((value) << 8) & 0x00000100)
5306 
5328 #define ALT_UART_RFW_RFFE_LSB 9
5329 
5330 #define ALT_UART_RFW_RFFE_MSB 9
5331 
5332 #define ALT_UART_RFW_RFFE_WIDTH 1
5333 
5334 #define ALT_UART_RFW_RFFE_SET_MSK 0x00000200
5335 
5336 #define ALT_UART_RFW_RFFE_CLR_MSK 0xfffffdff
5337 
5338 #define ALT_UART_RFW_RFFE_RESET 0x0
5339 
5340 #define ALT_UART_RFW_RFFE_GET(value) (((value) & 0x00000200) >> 9)
5341 
5342 #define ALT_UART_RFW_RFFE_SET(value) (((value) << 9) & 0x00000200)
5343 
5353 #define ALT_UART_RFW_RSVD_RFW_31TO10_LSB 10
5354 
5355 #define ALT_UART_RFW_RSVD_RFW_31TO10_MSB 31
5356 
5357 #define ALT_UART_RFW_RSVD_RFW_31TO10_WIDTH 22
5358 
5359 #define ALT_UART_RFW_RSVD_RFW_31TO10_SET_MSK 0xfffffc00
5360 
5361 #define ALT_UART_RFW_RSVD_RFW_31TO10_CLR_MSK 0x000003ff
5362 
5363 #define ALT_UART_RFW_RSVD_RFW_31TO10_RESET 0x0
5364 
5365 #define ALT_UART_RFW_RSVD_RFW_31TO10_GET(value) (((value) & 0xfffffc00) >> 10)
5366 
5367 #define ALT_UART_RFW_RSVD_RFW_31TO10_SET(value) (((value) << 10) & 0xfffffc00)
5368 
5369 #ifndef __ASSEMBLY__
5370 
5381 {
5382  uint32_t rfwd : 8;
5383  uint32_t rfpe : 1;
5384  uint32_t rffe : 1;
5385  const uint32_t rsvd_rfw_31to10 : 22;
5386 };
5387 
5389 typedef volatile struct ALT_UART_RFW_s ALT_UART_RFW_t;
5390 #endif /* __ASSEMBLY__ */
5391 
5393 #define ALT_UART_RFW_RESET 0x00000000
5394 
5395 #define ALT_UART_RFW_OFST 0x78
5396 
5397 #define ALT_UART_RFW_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RFW_OFST))
5398 
5455 #define ALT_UART_USR_RSVD_BUSY_LSB 0
5456 
5457 #define ALT_UART_USR_RSVD_BUSY_MSB 0
5458 
5459 #define ALT_UART_USR_RSVD_BUSY_WIDTH 1
5460 
5461 #define ALT_UART_USR_RSVD_BUSY_SET_MSK 0x00000001
5462 
5463 #define ALT_UART_USR_RSVD_BUSY_CLR_MSK 0xfffffffe
5464 
5465 #define ALT_UART_USR_RSVD_BUSY_RESET 0x0
5466 
5467 #define ALT_UART_USR_RSVD_BUSY_GET(value) (((value) & 0x00000001) >> 0)
5468 
5469 #define ALT_UART_USR_RSVD_BUSY_SET(value) (((value) << 0) & 0x00000001)
5470 
5501 #define ALT_UART_USR_TFNF_E_FULL 0x0
5502 
5507 #define ALT_UART_USR_TFNF_E_NOTFULL 0x1
5508 
5510 #define ALT_UART_USR_TFNF_LSB 1
5511 
5512 #define ALT_UART_USR_TFNF_MSB 1
5513 
5514 #define ALT_UART_USR_TFNF_WIDTH 1
5515 
5516 #define ALT_UART_USR_TFNF_SET_MSK 0x00000002
5517 
5518 #define ALT_UART_USR_TFNF_CLR_MSK 0xfffffffd
5519 
5520 #define ALT_UART_USR_TFNF_RESET 0x1
5521 
5522 #define ALT_UART_USR_TFNF_GET(value) (((value) & 0x00000002) >> 1)
5523 
5524 #define ALT_UART_USR_TFNF_SET(value) (((value) << 1) & 0x00000002)
5525 
5556 #define ALT_UART_USR_TFE_E_NOTEMPTY 0x0
5557 
5562 #define ALT_UART_USR_TFE_E_EMPTY 0x1
5563 
5565 #define ALT_UART_USR_TFE_LSB 2
5566 
5567 #define ALT_UART_USR_TFE_MSB 2
5568 
5569 #define ALT_UART_USR_TFE_WIDTH 1
5570 
5571 #define ALT_UART_USR_TFE_SET_MSK 0x00000004
5572 
5573 #define ALT_UART_USR_TFE_CLR_MSK 0xfffffffb
5574 
5575 #define ALT_UART_USR_TFE_RESET 0x1
5576 
5577 #define ALT_UART_USR_TFE_GET(value) (((value) & 0x00000004) >> 2)
5578 
5579 #define ALT_UART_USR_TFE_SET(value) (((value) << 2) & 0x00000004)
5580 
5611 #define ALT_UART_USR_RFNE_E_EMPTY 0x0
5612 
5617 #define ALT_UART_USR_RFNE_E_NOTEMPTY 0x1
5618 
5620 #define ALT_UART_USR_RFNE_LSB 3
5621 
5622 #define ALT_UART_USR_RFNE_MSB 3
5623 
5624 #define ALT_UART_USR_RFNE_WIDTH 1
5625 
5626 #define ALT_UART_USR_RFNE_SET_MSK 0x00000008
5627 
5628 #define ALT_UART_USR_RFNE_CLR_MSK 0xfffffff7
5629 
5630 #define ALT_UART_USR_RFNE_RESET 0x0
5631 
5632 #define ALT_UART_USR_RFNE_GET(value) (((value) & 0x00000008) >> 3)
5633 
5634 #define ALT_UART_USR_RFNE_SET(value) (((value) << 3) & 0x00000008)
5635 
5666 #define ALT_UART_USR_RFF_E_NOTFULL 0x0
5667 
5672 #define ALT_UART_USR_RFF_E_FULL 0x1
5673 
5675 #define ALT_UART_USR_RFF_LSB 4
5676 
5677 #define ALT_UART_USR_RFF_MSB 4
5678 
5679 #define ALT_UART_USR_RFF_WIDTH 1
5680 
5681 #define ALT_UART_USR_RFF_SET_MSK 0x00000010
5682 
5683 #define ALT_UART_USR_RFF_CLR_MSK 0xffffffef
5684 
5685 #define ALT_UART_USR_RFF_RESET 0x0
5686 
5687 #define ALT_UART_USR_RFF_GET(value) (((value) & 0x00000010) >> 4)
5688 
5689 #define ALT_UART_USR_RFF_SET(value) (((value) << 4) & 0x00000010)
5690 
5700 #define ALT_UART_USR_RSVD_USR_31TO5_LSB 5
5701 
5702 #define ALT_UART_USR_RSVD_USR_31TO5_MSB 31
5703 
5704 #define ALT_UART_USR_RSVD_USR_31TO5_WIDTH 27
5705 
5706 #define ALT_UART_USR_RSVD_USR_31TO5_SET_MSK 0xffffffe0
5707 
5708 #define ALT_UART_USR_RSVD_USR_31TO5_CLR_MSK 0x0000001f
5709 
5710 #define ALT_UART_USR_RSVD_USR_31TO5_RESET 0x0
5711 
5712 #define ALT_UART_USR_RSVD_USR_31TO5_GET(value) (((value) & 0xffffffe0) >> 5)
5713 
5714 #define ALT_UART_USR_RSVD_USR_31TO5_SET(value) (((value) << 5) & 0xffffffe0)
5715 
5716 #ifndef __ASSEMBLY__
5717 
5728 {
5729  const uint32_t rsvd_busy : 1;
5730  const uint32_t tfnf : 1;
5731  const uint32_t tfe : 1;
5732  const uint32_t rfne : 1;
5733  const uint32_t rff : 1;
5734  const uint32_t rsvd_usr_31to5 : 27;
5735 };
5736 
5738 typedef volatile struct ALT_UART_USR_s ALT_UART_USR_t;
5739 #endif /* __ASSEMBLY__ */
5740 
5742 #define ALT_UART_USR_RESET 0x00000006
5743 
5744 #define ALT_UART_USR_OFST 0x7c
5745 
5746 #define ALT_UART_USR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_USR_OFST))
5747 
5770 #define ALT_UART_TFL_TFL_LSB 0
5771 
5772 #define ALT_UART_TFL_TFL_MSB 7
5773 
5774 #define ALT_UART_TFL_TFL_WIDTH 8
5775 
5776 #define ALT_UART_TFL_TFL_SET_MSK 0x000000ff
5777 
5778 #define ALT_UART_TFL_TFL_CLR_MSK 0xffffff00
5779 
5780 #define ALT_UART_TFL_TFL_RESET 0x0
5781 
5782 #define ALT_UART_TFL_TFL_GET(value) (((value) & 0x000000ff) >> 0)
5783 
5784 #define ALT_UART_TFL_TFL_SET(value) (((value) << 0) & 0x000000ff)
5785 
5795 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_LSB 8
5796 
5797 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_MSB 31
5798 
5799 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_WIDTH 24
5800 
5801 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_SET_MSK 0xffffff00
5802 
5803 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_CLR_MSK 0x000000ff
5804 
5805 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_RESET 0x0
5806 
5807 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_GET(value) (((value) & 0xffffff00) >> 8)
5808 
5809 #define ALT_UART_TFL_RSVD_TFL_31TOADDR_WIDTH_SET(value) (((value) << 8) & 0xffffff00)
5810 
5811 #ifndef __ASSEMBLY__
5812 
5823 {
5824  const uint32_t tfl : 8;
5825  const uint32_t rsvd_tfl_31toaddr_width : 24;
5826 };
5827 
5829 typedef volatile struct ALT_UART_TFL_s ALT_UART_TFL_t;
5830 #endif /* __ASSEMBLY__ */
5831 
5833 #define ALT_UART_TFL_RESET 0x00000000
5834 
5835 #define ALT_UART_TFL_OFST 0x80
5836 
5837 #define ALT_UART_TFL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_TFL_OFST))
5838 
5863 #define ALT_UART_RFL_RFL_LSB 0
5864 
5865 #define ALT_UART_RFL_RFL_MSB 7
5866 
5867 #define ALT_UART_RFL_RFL_WIDTH 8
5868 
5869 #define ALT_UART_RFL_RFL_SET_MSK 0x000000ff
5870 
5871 #define ALT_UART_RFL_RFL_CLR_MSK 0xffffff00
5872 
5873 #define ALT_UART_RFL_RFL_RESET 0x0
5874 
5875 #define ALT_UART_RFL_RFL_GET(value) (((value) & 0x000000ff) >> 0)
5876 
5877 #define ALT_UART_RFL_RFL_SET(value) (((value) << 0) & 0x000000ff)
5878 
5888 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_LSB 8
5889 
5890 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_MSB 31
5891 
5892 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_WIDTH 24
5893 
5894 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_SET_MSK 0xffffff00
5895 
5896 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_CLR_MSK 0x000000ff
5897 
5898 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_RESET 0x0
5899 
5900 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_GET(value) (((value) & 0xffffff00) >> 8)
5901 
5902 #define ALT_UART_RFL_RSVD_RFL_31TOADDR_WIDTH_SET(value) (((value) << 8) & 0xffffff00)
5903 
5904 #ifndef __ASSEMBLY__
5905 
5916 {
5917  const uint32_t rfl : 8;
5918  const uint32_t rsvd_rfl_31toaddr_width : 24;
5919 };
5920 
5922 typedef volatile struct ALT_UART_RFL_s ALT_UART_RFL_t;
5923 #endif /* __ASSEMBLY__ */
5924 
5926 #define ALT_UART_RFL_RESET 0x00000000
5927 
5928 #define ALT_UART_RFL_OFST 0x84
5929 
5930 #define ALT_UART_RFL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RFL_OFST))
5931 
5972 #define ALT_UART_SRR_UR_E_NORST 0x0
5973 
5978 #define ALT_UART_SRR_UR_E_RST 0x1
5979 
5981 #define ALT_UART_SRR_UR_LSB 0
5982 
5983 #define ALT_UART_SRR_UR_MSB 0
5984 
5985 #define ALT_UART_SRR_UR_WIDTH 1
5986 
5987 #define ALT_UART_SRR_UR_SET_MSK 0x00000001
5988 
5989 #define ALT_UART_SRR_UR_CLR_MSK 0xfffffffe
5990 
5991 #define ALT_UART_SRR_UR_RESET 0x0
5992 
5993 #define ALT_UART_SRR_UR_GET(value) (((value) & 0x00000001) >> 0)
5994 
5995 #define ALT_UART_SRR_UR_SET(value) (((value) << 0) & 0x00000001)
5996 
6036 #define ALT_UART_SRR_RFR_E_NORST 0x0
6037 
6042 #define ALT_UART_SRR_RFR_E_RST 0x1
6043 
6045 #define ALT_UART_SRR_RFR_LSB 1
6046 
6047 #define ALT_UART_SRR_RFR_MSB 1
6048 
6049 #define ALT_UART_SRR_RFR_WIDTH 1
6050 
6051 #define ALT_UART_SRR_RFR_SET_MSK 0x00000002
6052 
6053 #define ALT_UART_SRR_RFR_CLR_MSK 0xfffffffd
6054 
6055 #define ALT_UART_SRR_RFR_RESET 0x0
6056 
6057 #define ALT_UART_SRR_RFR_GET(value) (((value) & 0x00000002) >> 1)
6058 
6059 #define ALT_UART_SRR_RFR_SET(value) (((value) << 1) & 0x00000002)
6060 
6098 #define ALT_UART_SRR_XFR_E_NORST 0x0
6099 
6104 #define ALT_UART_SRR_XFR_E_RST 0x1
6105 
6107 #define ALT_UART_SRR_XFR_LSB 2
6108 
6109 #define ALT_UART_SRR_XFR_MSB 2
6110 
6111 #define ALT_UART_SRR_XFR_WIDTH 1
6112 
6113 #define ALT_UART_SRR_XFR_SET_MSK 0x00000004
6114 
6115 #define ALT_UART_SRR_XFR_CLR_MSK 0xfffffffb
6116 
6117 #define ALT_UART_SRR_XFR_RESET 0x0
6118 
6119 #define ALT_UART_SRR_XFR_GET(value) (((value) & 0x00000004) >> 2)
6120 
6121 #define ALT_UART_SRR_XFR_SET(value) (((value) << 2) & 0x00000004)
6122 
6132 #define ALT_UART_SRR_RSVD_SRR_31TO3_LSB 3
6133 
6134 #define ALT_UART_SRR_RSVD_SRR_31TO3_MSB 31
6135 
6136 #define ALT_UART_SRR_RSVD_SRR_31TO3_WIDTH 29
6137 
6138 #define ALT_UART_SRR_RSVD_SRR_31TO3_SET_MSK 0xfffffff8
6139 
6140 #define ALT_UART_SRR_RSVD_SRR_31TO3_CLR_MSK 0x00000007
6141 
6142 #define ALT_UART_SRR_RSVD_SRR_31TO3_RESET 0x0
6143 
6144 #define ALT_UART_SRR_RSVD_SRR_31TO3_GET(value) (((value) & 0xfffffff8) >> 3)
6145 
6146 #define ALT_UART_SRR_RSVD_SRR_31TO3_SET(value) (((value) << 3) & 0xfffffff8)
6147 
6148 #ifndef __ASSEMBLY__
6149 
6160 {
6161  uint32_t ur : 1;
6162  uint32_t rfr : 1;
6163  uint32_t xfr : 1;
6164  const uint32_t rsvd_srr_31to3 : 29;
6165 };
6166 
6168 typedef volatile struct ALT_UART_SRR_s ALT_UART_SRR_t;
6169 #endif /* __ASSEMBLY__ */
6170 
6172 #define ALT_UART_SRR_RESET 0x00000000
6173 
6174 #define ALT_UART_SRR_OFST 0x88
6175 
6176 #define ALT_UART_SRR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRR_OFST))
6177 
6249 #define ALT_UART_SRTS_SRTS_E_LOGIC1 0x0
6250 
6255 #define ALT_UART_SRTS_SRTS_E_LOGIC0 0x1
6256 
6258 #define ALT_UART_SRTS_SRTS_LSB 0
6259 
6260 #define ALT_UART_SRTS_SRTS_MSB 0
6261 
6262 #define ALT_UART_SRTS_SRTS_WIDTH 1
6263 
6264 #define ALT_UART_SRTS_SRTS_SET_MSK 0x00000001
6265 
6266 #define ALT_UART_SRTS_SRTS_CLR_MSK 0xfffffffe
6267 
6268 #define ALT_UART_SRTS_SRTS_RESET 0x0
6269 
6270 #define ALT_UART_SRTS_SRTS_GET(value) (((value) & 0x00000001) >> 0)
6271 
6272 #define ALT_UART_SRTS_SRTS_SET(value) (((value) << 0) & 0x00000001)
6273 
6283 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_LSB 1
6284 
6285 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_MSB 31
6286 
6287 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_WIDTH 31
6288 
6289 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_SET_MSK 0xfffffffe
6290 
6291 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_CLR_MSK 0x00000001
6292 
6293 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_RESET 0x0
6294 
6295 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
6296 
6297 #define ALT_UART_SRTS_RSVD_SRTS_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
6298 
6299 #ifndef __ASSEMBLY__
6300 
6311 {
6312  uint32_t srts : 1;
6313  const uint32_t rsvd_srts_31to1 : 31;
6314 };
6315 
6317 typedef volatile struct ALT_UART_SRTS_s ALT_UART_SRTS_t;
6318 #endif /* __ASSEMBLY__ */
6319 
6321 #define ALT_UART_SRTS_RESET 0x00000000
6322 
6323 #define ALT_UART_SRTS_OFST 0x8c
6324 
6325 #define ALT_UART_SRTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRTS_OFST))
6326 
6379 #define ALT_UART_SBCR_SBCR_E_DISD 0x0
6380 
6385 #define ALT_UART_SBCR_SBCR_E_END 0x1
6386 
6388 #define ALT_UART_SBCR_SBCR_LSB 0
6389 
6390 #define ALT_UART_SBCR_SBCR_MSB 0
6391 
6392 #define ALT_UART_SBCR_SBCR_WIDTH 1
6393 
6394 #define ALT_UART_SBCR_SBCR_SET_MSK 0x00000001
6395 
6396 #define ALT_UART_SBCR_SBCR_CLR_MSK 0xfffffffe
6397 
6398 #define ALT_UART_SBCR_SBCR_RESET 0x0
6399 
6400 #define ALT_UART_SBCR_SBCR_GET(value) (((value) & 0x00000001) >> 0)
6401 
6402 #define ALT_UART_SBCR_SBCR_SET(value) (((value) << 0) & 0x00000001)
6403 
6413 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_LSB 1
6414 
6415 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_MSB 31
6416 
6417 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_WIDTH 31
6418 
6419 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_SET_MSK 0xfffffffe
6420 
6421 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_CLR_MSK 0x00000001
6422 
6423 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_RESET 0x0
6424 
6425 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
6426 
6427 #define ALT_UART_SBCR_RSVD_SBCR_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
6428 
6429 #ifndef __ASSEMBLY__
6430 
6441 {
6442  uint32_t sbcr : 1;
6443  const uint32_t rsvd_sbcr_31to1 : 31;
6444 };
6445 
6447 typedef volatile struct ALT_UART_SBCR_s ALT_UART_SBCR_t;
6448 #endif /* __ASSEMBLY__ */
6449 
6451 #define ALT_UART_SBCR_RESET 0x00000000
6452 
6453 #define ALT_UART_SBCR_OFST 0x90
6454 
6455 #define ALT_UART_SBCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SBCR_OFST))
6456 
6509 #define ALT_UART_SDMAM_SDMAM_E_SINGLE 0x0
6510 
6515 #define ALT_UART_SDMAM_SDMAM_E_MULT 0x1
6516 
6518 #define ALT_UART_SDMAM_SDMAM_LSB 0
6519 
6520 #define ALT_UART_SDMAM_SDMAM_MSB 0
6521 
6522 #define ALT_UART_SDMAM_SDMAM_WIDTH 1
6523 
6524 #define ALT_UART_SDMAM_SDMAM_SET_MSK 0x00000001
6525 
6526 #define ALT_UART_SDMAM_SDMAM_CLR_MSK 0xfffffffe
6527 
6528 #define ALT_UART_SDMAM_SDMAM_RESET 0x0
6529 
6530 #define ALT_UART_SDMAM_SDMAM_GET(value) (((value) & 0x00000001) >> 0)
6531 
6532 #define ALT_UART_SDMAM_SDMAM_SET(value) (((value) << 0) & 0x00000001)
6533 
6543 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_LSB 1
6544 
6545 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_MSB 31
6546 
6547 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_WIDTH 31
6548 
6549 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_SET_MSK 0xfffffffe
6550 
6551 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_CLR_MSK 0x00000001
6552 
6553 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_RESET 0x0
6554 
6555 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
6556 
6557 #define ALT_UART_SDMAM_RSVD_SDMAM_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
6558 
6559 #ifndef __ASSEMBLY__
6560 
6571 {
6572  uint32_t sdmam : 1;
6573  const uint32_t rsvd_sdmam_31to1 : 31;
6574 };
6575 
6577 typedef volatile struct ALT_UART_SDMAM_s ALT_UART_SDMAM_t;
6578 #endif /* __ASSEMBLY__ */
6579 
6581 #define ALT_UART_SDMAM_RESET 0x00000000
6582 
6583 #define ALT_UART_SDMAM_OFST 0x94
6584 
6585 #define ALT_UART_SDMAM_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SDMAM_OFST))
6586 
6633 #define ALT_UART_SFE_SFE_E_DISD 0x0
6634 
6639 #define ALT_UART_SFE_SFE_E_END 0x1
6640 
6642 #define ALT_UART_SFE_SFE_LSB 0
6643 
6644 #define ALT_UART_SFE_SFE_MSB 0
6645 
6646 #define ALT_UART_SFE_SFE_WIDTH 1
6647 
6648 #define ALT_UART_SFE_SFE_SET_MSK 0x00000001
6649 
6650 #define ALT_UART_SFE_SFE_CLR_MSK 0xfffffffe
6651 
6652 #define ALT_UART_SFE_SFE_RESET 0x0
6653 
6654 #define ALT_UART_SFE_SFE_GET(value) (((value) & 0x00000001) >> 0)
6655 
6656 #define ALT_UART_SFE_SFE_SET(value) (((value) << 0) & 0x00000001)
6657 
6667 #define ALT_UART_SFE_RSVD_SFE_31TO1_LSB 1
6668 
6669 #define ALT_UART_SFE_RSVD_SFE_31TO1_MSB 31
6670 
6671 #define ALT_UART_SFE_RSVD_SFE_31TO1_WIDTH 31
6672 
6673 #define ALT_UART_SFE_RSVD_SFE_31TO1_SET_MSK 0xfffffffe
6674 
6675 #define ALT_UART_SFE_RSVD_SFE_31TO1_CLR_MSK 0x00000001
6676 
6677 #define ALT_UART_SFE_RSVD_SFE_31TO1_RESET 0x0
6678 
6679 #define ALT_UART_SFE_RSVD_SFE_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
6680 
6681 #define ALT_UART_SFE_RSVD_SFE_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
6682 
6683 #ifndef __ASSEMBLY__
6684 
6695 {
6696  uint32_t sfe : 1;
6697  const uint32_t rsvd_sfe_31to1 : 31;
6698 };
6699 
6701 typedef volatile struct ALT_UART_SFE_s ALT_UART_SFE_t;
6702 #endif /* __ASSEMBLY__ */
6703 
6705 #define ALT_UART_SFE_RESET 0x00000000
6706 
6707 #define ALT_UART_SFE_OFST 0x98
6708 
6709 #define ALT_UART_SFE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SFE_OFST))
6710 
6773 #define ALT_UART_SRT_SRT_E_ONECHAR 0x0
6774 
6779 #define ALT_UART_SRT_SRT_E_QUARTERFULL 0x1
6780 
6785 #define ALT_UART_SRT_SRT_E_HALFFULL 0x2
6786 
6791 #define ALT_UART_SRT_SRT_E_FULLLESS2 0x3
6792 
6794 #define ALT_UART_SRT_SRT_LSB 0
6795 
6796 #define ALT_UART_SRT_SRT_MSB 1
6797 
6798 #define ALT_UART_SRT_SRT_WIDTH 2
6799 
6800 #define ALT_UART_SRT_SRT_SET_MSK 0x00000003
6801 
6802 #define ALT_UART_SRT_SRT_CLR_MSK 0xfffffffc
6803 
6804 #define ALT_UART_SRT_SRT_RESET 0x0
6805 
6806 #define ALT_UART_SRT_SRT_GET(value) (((value) & 0x00000003) >> 0)
6807 
6808 #define ALT_UART_SRT_SRT_SET(value) (((value) << 0) & 0x00000003)
6809 
6819 #define ALT_UART_SRT_RSVD_SRT_31TO2_LSB 2
6820 
6821 #define ALT_UART_SRT_RSVD_SRT_31TO2_MSB 31
6822 
6823 #define ALT_UART_SRT_RSVD_SRT_31TO2_WIDTH 30
6824 
6825 #define ALT_UART_SRT_RSVD_SRT_31TO2_SET_MSK 0xfffffffc
6826 
6827 #define ALT_UART_SRT_RSVD_SRT_31TO2_CLR_MSK 0x00000003
6828 
6829 #define ALT_UART_SRT_RSVD_SRT_31TO2_RESET 0x0
6830 
6831 #define ALT_UART_SRT_RSVD_SRT_31TO2_GET(value) (((value) & 0xfffffffc) >> 2)
6832 
6833 #define ALT_UART_SRT_RSVD_SRT_31TO2_SET(value) (((value) << 2) & 0xfffffffc)
6834 
6835 #ifndef __ASSEMBLY__
6836 
6847 {
6848  uint32_t srt : 2;
6849  const uint32_t rsvd_srt_31to2 : 30;
6850 };
6851 
6853 typedef volatile struct ALT_UART_SRT_s ALT_UART_SRT_t;
6854 #endif /* __ASSEMBLY__ */
6855 
6857 #define ALT_UART_SRT_RESET 0x00000000
6858 
6859 #define ALT_UART_SRT_OFST 0x9c
6860 
6861 #define ALT_UART_SRT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRT_OFST))
6862 
6926 #define ALT_UART_STET_STET_E_FIFOEMPTY 0x0
6927 
6932 #define ALT_UART_STET_STET_E_TWOCHARS 0x1
6933 
6938 #define ALT_UART_STET_STET_E_QUARTERFULL 0x2
6939 
6944 #define ALT_UART_STET_STET_E_HALFFULL 0x3
6945 
6947 #define ALT_UART_STET_STET_LSB 0
6948 
6949 #define ALT_UART_STET_STET_MSB 1
6950 
6951 #define ALT_UART_STET_STET_WIDTH 2
6952 
6953 #define ALT_UART_STET_STET_SET_MSK 0x00000003
6954 
6955 #define ALT_UART_STET_STET_CLR_MSK 0xfffffffc
6956 
6957 #define ALT_UART_STET_STET_RESET 0x0
6958 
6959 #define ALT_UART_STET_STET_GET(value) (((value) & 0x00000003) >> 0)
6960 
6961 #define ALT_UART_STET_STET_SET(value) (((value) << 0) & 0x00000003)
6962 
6972 #define ALT_UART_STET_RSVD_STET_31TO2_LSB 2
6973 
6974 #define ALT_UART_STET_RSVD_STET_31TO2_MSB 31
6975 
6976 #define ALT_UART_STET_RSVD_STET_31TO2_WIDTH 30
6977 
6978 #define ALT_UART_STET_RSVD_STET_31TO2_SET_MSK 0xfffffffc
6979 
6980 #define ALT_UART_STET_RSVD_STET_31TO2_CLR_MSK 0x00000003
6981 
6982 #define ALT_UART_STET_RSVD_STET_31TO2_RESET 0x0
6983 
6984 #define ALT_UART_STET_RSVD_STET_31TO2_GET(value) (((value) & 0xfffffffc) >> 2)
6985 
6986 #define ALT_UART_STET_RSVD_STET_31TO2_SET(value) (((value) << 2) & 0xfffffffc)
6987 
6988 #ifndef __ASSEMBLY__
6989 
7000 {
7001  uint32_t stet : 2;
7002  const uint32_t rsvd_stet_31to2 : 30;
7003 };
7004 
7006 typedef volatile struct ALT_UART_STET_s ALT_UART_STET_t;
7007 #endif /* __ASSEMBLY__ */
7008 
7010 #define ALT_UART_STET_RESET 0x00000000
7011 
7012 #define ALT_UART_STET_OFST 0xa0
7013 
7014 #define ALT_UART_STET_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_STET_OFST))
7015 
7066 #define ALT_UART_HTX_HTX_E_DISD 0x0
7067 
7072 #define ALT_UART_HTX_HTX_E_END 0x1
7073 
7075 #define ALT_UART_HTX_HTX_LSB 0
7076 
7077 #define ALT_UART_HTX_HTX_MSB 0
7078 
7079 #define ALT_UART_HTX_HTX_WIDTH 1
7080 
7081 #define ALT_UART_HTX_HTX_SET_MSK 0x00000001
7082 
7083 #define ALT_UART_HTX_HTX_CLR_MSK 0xfffffffe
7084 
7085 #define ALT_UART_HTX_HTX_RESET 0x0
7086 
7087 #define ALT_UART_HTX_HTX_GET(value) (((value) & 0x00000001) >> 0)
7088 
7089 #define ALT_UART_HTX_HTX_SET(value) (((value) << 0) & 0x00000001)
7090 
7100 #define ALT_UART_HTX_RSVD_HTX_31TO1_LSB 1
7101 
7102 #define ALT_UART_HTX_RSVD_HTX_31TO1_MSB 31
7103 
7104 #define ALT_UART_HTX_RSVD_HTX_31TO1_WIDTH 31
7105 
7106 #define ALT_UART_HTX_RSVD_HTX_31TO1_SET_MSK 0xfffffffe
7107 
7108 #define ALT_UART_HTX_RSVD_HTX_31TO1_CLR_MSK 0x00000001
7109 
7110 #define ALT_UART_HTX_RSVD_HTX_31TO1_RESET 0x0
7111 
7112 #define ALT_UART_HTX_RSVD_HTX_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
7113 
7114 #define ALT_UART_HTX_RSVD_HTX_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
7115 
7116 #ifndef __ASSEMBLY__
7117 
7128 {
7129  uint32_t htx : 1;
7130  const uint32_t rsvd_htx_31to1 : 31;
7131 };
7132 
7134 typedef volatile struct ALT_UART_HTX_s ALT_UART_HTX_t;
7135 #endif /* __ASSEMBLY__ */
7136 
7138 #define ALT_UART_HTX_RESET 0x00000000
7139 
7140 #define ALT_UART_HTX_OFST 0xa4
7141 
7142 #define ALT_UART_HTX_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_HTX_OFST))
7143 
7180 #define ALT_UART_DMASA_DMASA_LSB 0
7181 
7182 #define ALT_UART_DMASA_DMASA_MSB 0
7183 
7184 #define ALT_UART_DMASA_DMASA_WIDTH 1
7185 
7186 #define ALT_UART_DMASA_DMASA_SET_MSK 0x00000001
7187 
7188 #define ALT_UART_DMASA_DMASA_CLR_MSK 0xfffffffe
7189 
7190 #define ALT_UART_DMASA_DMASA_RESET 0x0
7191 
7192 #define ALT_UART_DMASA_DMASA_GET(value) (((value) & 0x00000001) >> 0)
7193 
7194 #define ALT_UART_DMASA_DMASA_SET(value) (((value) << 0) & 0x00000001)
7195 
7205 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_LSB 1
7206 
7207 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_MSB 31
7208 
7209 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_WIDTH 31
7210 
7211 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_SET_MSK 0xfffffffe
7212 
7213 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_CLR_MSK 0x00000001
7214 
7215 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_RESET 0x0
7216 
7217 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_GET(value) (((value) & 0xfffffffe) >> 1)
7218 
7219 #define ALT_UART_DMASA_RSVD_DMASA_31TO1_SET(value) (((value) << 1) & 0xfffffffe)
7220 
7221 #ifndef __ASSEMBLY__
7222 
7233 {
7234  uint32_t dmasa : 1;
7235  const uint32_t rsvd_dmasa_31to1 : 31;
7236 };
7237 
7239 typedef volatile struct ALT_UART_DMASA_s ALT_UART_DMASA_t;
7240 #endif /* __ASSEMBLY__ */
7241 
7243 #define ALT_UART_DMASA_RESET 0x00000000
7244 
7245 #define ALT_UART_DMASA_OFST 0xa8
7246 
7247 #define ALT_UART_DMASA_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_DMASA_OFST))
7248 
7302 #define ALT_UART_CPR_APBDATAWIDTH_E_WIDTH32BITS 0x2
7303 
7305 #define ALT_UART_CPR_APBDATAWIDTH_LSB 0
7306 
7307 #define ALT_UART_CPR_APBDATAWIDTH_MSB 1
7308 
7309 #define ALT_UART_CPR_APBDATAWIDTH_WIDTH 2
7310 
7311 #define ALT_UART_CPR_APBDATAWIDTH_SET_MSK 0x00000003
7312 
7313 #define ALT_UART_CPR_APBDATAWIDTH_CLR_MSK 0xfffffffc
7314 
7315 #define ALT_UART_CPR_APBDATAWIDTH_RESET 0x2
7316 
7317 #define ALT_UART_CPR_APBDATAWIDTH_GET(value) (((value) & 0x00000003) >> 0)
7318 
7319 #define ALT_UART_CPR_APBDATAWIDTH_SET(value) (((value) << 0) & 0x00000003)
7320 
7330 #define ALT_UART_CPR_RSVD_CPR_3TO2_LSB 2
7331 
7332 #define ALT_UART_CPR_RSVD_CPR_3TO2_MSB 3
7333 
7334 #define ALT_UART_CPR_RSVD_CPR_3TO2_WIDTH 2
7335 
7336 #define ALT_UART_CPR_RSVD_CPR_3TO2_SET_MSK 0x0000000c
7337 
7338 #define ALT_UART_CPR_RSVD_CPR_3TO2_CLR_MSK 0xfffffff3
7339 
7340 #define ALT_UART_CPR_RSVD_CPR_3TO2_RESET 0x0
7341 
7342 #define ALT_UART_CPR_RSVD_CPR_3TO2_GET(value) (((value) & 0x0000000c) >> 2)
7343 
7344 #define ALT_UART_CPR_RSVD_CPR_3TO2_SET(value) (((value) << 2) & 0x0000000c)
7345 
7369 #define ALT_UART_CPR_AFCE_MOD_E_END 0x1
7370 
7372 #define ALT_UART_CPR_AFCE_MOD_LSB 4
7373 
7374 #define ALT_UART_CPR_AFCE_MOD_MSB 4
7375 
7376 #define ALT_UART_CPR_AFCE_MOD_WIDTH 1
7377 
7378 #define ALT_UART_CPR_AFCE_MOD_SET_MSK 0x00000010
7379 
7380 #define ALT_UART_CPR_AFCE_MOD_CLR_MSK 0xffffffef
7381 
7382 #define ALT_UART_CPR_AFCE_MOD_RESET 0x1
7383 
7384 #define ALT_UART_CPR_AFCE_MOD_GET(value) (((value) & 0x00000010) >> 4)
7385 
7386 #define ALT_UART_CPR_AFCE_MOD_SET(value) (((value) << 4) & 0x00000010)
7387 
7412 #define ALT_UART_CPR_THRE_MOD_E_END 0x1
7413 
7415 #define ALT_UART_CPR_THRE_MOD_LSB 5
7416 
7417 #define ALT_UART_CPR_THRE_MOD_MSB 5
7418 
7419 #define ALT_UART_CPR_THRE_MOD_WIDTH 1
7420 
7421 #define ALT_UART_CPR_THRE_MOD_SET_MSK 0x00000020
7422 
7423 #define ALT_UART_CPR_THRE_MOD_CLR_MSK 0xffffffdf
7424 
7425 #define ALT_UART_CPR_THRE_MOD_RESET 0x1
7426 
7427 #define ALT_UART_CPR_THRE_MOD_GET(value) (((value) & 0x00000020) >> 5)
7428 
7429 #define ALT_UART_CPR_THRE_MOD_SET(value) (((value) << 5) & 0x00000020)
7430 
7454 #define ALT_UART_CPR_SIR_MOD_E_DISD 0x0
7455 
7457 #define ALT_UART_CPR_SIR_MOD_LSB 6
7458 
7459 #define ALT_UART_CPR_SIR_MOD_MSB 6
7460 
7461 #define ALT_UART_CPR_SIR_MOD_WIDTH 1
7462 
7463 #define ALT_UART_CPR_SIR_MOD_SET_MSK 0x00000040
7464 
7465 #define ALT_UART_CPR_SIR_MOD_CLR_MSK 0xffffffbf
7466 
7467 #define ALT_UART_CPR_SIR_MOD_RESET 0x0
7468 
7469 #define ALT_UART_CPR_SIR_MOD_GET(value) (((value) & 0x00000040) >> 6)
7470 
7471 #define ALT_UART_CPR_SIR_MOD_SET(value) (((value) << 6) & 0x00000040)
7472 
7496 #define ALT_UART_CPR_SIR_LP_MOD_E_DISD 0x0
7497 
7499 #define ALT_UART_CPR_SIR_LP_MOD_LSB 7
7500 
7501 #define ALT_UART_CPR_SIR_LP_MOD_MSB 7
7502 
7503 #define ALT_UART_CPR_SIR_LP_MOD_WIDTH 1
7504 
7505 #define ALT_UART_CPR_SIR_LP_MOD_SET_MSK 0x00000080
7506 
7507 #define ALT_UART_CPR_SIR_LP_MOD_CLR_MSK 0xffffff7f
7508 
7509 #define ALT_UART_CPR_SIR_LP_MOD_RESET 0x0
7510 
7511 #define ALT_UART_CPR_SIR_LP_MOD_GET(value) (((value) & 0x00000080) >> 7)
7512 
7513 #define ALT_UART_CPR_SIR_LP_MOD_SET(value) (((value) << 7) & 0x00000080)
7514 
7538 #define ALT_UART_CPR_ADDITIONAL_FEAT_E_END 0x1
7539 
7541 #define ALT_UART_CPR_ADDITIONAL_FEAT_LSB 8
7542 
7543 #define ALT_UART_CPR_ADDITIONAL_FEAT_MSB 8
7544 
7545 #define ALT_UART_CPR_ADDITIONAL_FEAT_WIDTH 1
7546 
7547 #define ALT_UART_CPR_ADDITIONAL_FEAT_SET_MSK 0x00000100
7548 
7549 #define ALT_UART_CPR_ADDITIONAL_FEAT_CLR_MSK 0xfffffeff
7550 
7551 #define ALT_UART_CPR_ADDITIONAL_FEAT_RESET 0x1
7552 
7553 #define ALT_UART_CPR_ADDITIONAL_FEAT_GET(value) (((value) & 0x00000100) >> 8)
7554 
7555 #define ALT_UART_CPR_ADDITIONAL_FEAT_SET(value) (((value) << 8) & 0x00000100)
7556 
7580 #define ALT_UART_CPR_FIFO_ACCESS_E_END 0x1
7581 
7583 #define ALT_UART_CPR_FIFO_ACCESS_LSB 9
7584 
7585 #define ALT_UART_CPR_FIFO_ACCESS_MSB 9
7586 
7587 #define ALT_UART_CPR_FIFO_ACCESS_WIDTH 1
7588 
7589 #define ALT_UART_CPR_FIFO_ACCESS_SET_MSK 0x00000200
7590 
7591 #define ALT_UART_CPR_FIFO_ACCESS_CLR_MSK 0xfffffdff
7592 
7593 #define ALT_UART_CPR_FIFO_ACCESS_RESET 0x1
7594 
7595 #define ALT_UART_CPR_FIFO_ACCESS_GET(value) (((value) & 0x00000200) >> 9)
7596 
7597 #define ALT_UART_CPR_FIFO_ACCESS_SET(value) (((value) << 9) & 0x00000200)
7598 
7622 #define ALT_UART_CPR_FIFO_STAT_E_END 0x1
7623 
7625 #define ALT_UART_CPR_FIFO_STAT_LSB 10
7626 
7627 #define ALT_UART_CPR_FIFO_STAT_MSB 10
7628 
7629 #define ALT_UART_CPR_FIFO_STAT_WIDTH 1
7630 
7631 #define ALT_UART_CPR_FIFO_STAT_SET_MSK 0x00000400
7632 
7633 #define ALT_UART_CPR_FIFO_STAT_CLR_MSK 0xfffffbff
7634 
7635 #define ALT_UART_CPR_FIFO_STAT_RESET 0x1
7636 
7637 #define ALT_UART_CPR_FIFO_STAT_GET(value) (((value) & 0x00000400) >> 10)
7638 
7639 #define ALT_UART_CPR_FIFO_STAT_SET(value) (((value) << 10) & 0x00000400)
7640 
7664 #define ALT_UART_CPR_SHADOW_E_END 0x1
7665 
7667 #define ALT_UART_CPR_SHADOW_LSB 11
7668 
7669 #define ALT_UART_CPR_SHADOW_MSB 11
7670 
7671 #define ALT_UART_CPR_SHADOW_WIDTH 1
7672 
7673 #define ALT_UART_CPR_SHADOW_SET_MSK 0x00000800
7674 
7675 #define ALT_UART_CPR_SHADOW_CLR_MSK 0xfffff7ff
7676 
7677 #define ALT_UART_CPR_SHADOW_RESET 0x1
7678 
7679 #define ALT_UART_CPR_SHADOW_GET(value) (((value) & 0x00000800) >> 11)
7680 
7681 #define ALT_UART_CPR_SHADOW_SET(value) (((value) << 11) & 0x00000800)
7682 
7706 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_E_END 0x1
7707 
7709 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_LSB 12
7710 
7711 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_MSB 12
7712 
7713 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_WIDTH 1
7714 
7715 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_SET_MSK 0x00001000
7716 
7717 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_CLR_MSK 0xffffefff
7718 
7719 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_RESET 0x1
7720 
7721 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_GET(value) (((value) & 0x00001000) >> 12)
7722 
7723 #define ALT_UART_CPR_UART_ADD_ENC_PARAM_SET(value) (((value) << 12) & 0x00001000)
7724 
7748 #define ALT_UART_CPR_DMA_EXTRA_E_END 0x1
7749 
7751 #define ALT_UART_CPR_DMA_EXTRA_LSB 13
7752 
7753 #define ALT_UART_CPR_DMA_EXTRA_MSB 13
7754 
7755 #define ALT_UART_CPR_DMA_EXTRA_WIDTH 1
7756 
7757 #define ALT_UART_CPR_DMA_EXTRA_SET_MSK 0x00002000
7758 
7759 #define ALT_UART_CPR_DMA_EXTRA_CLR_MSK 0xffffdfff
7760 
7761 #define ALT_UART_CPR_DMA_EXTRA_RESET 0x1
7762 
7763 #define ALT_UART_CPR_DMA_EXTRA_GET(value) (((value) & 0x00002000) >> 13)
7764 
7765 #define ALT_UART_CPR_DMA_EXTRA_SET(value) (((value) << 13) & 0x00002000)
7766 
7776 #define ALT_UART_CPR_RSVD_CPR_15TO14_LSB 14
7777 
7778 #define ALT_UART_CPR_RSVD_CPR_15TO14_MSB 15
7779 
7780 #define ALT_UART_CPR_RSVD_CPR_15TO14_WIDTH 2
7781 
7782 #define ALT_UART_CPR_RSVD_CPR_15TO14_SET_MSK 0x0000c000
7783 
7784 #define ALT_UART_CPR_RSVD_CPR_15TO14_CLR_MSK 0xffff3fff
7785 
7786 #define ALT_UART_CPR_RSVD_CPR_15TO14_RESET 0x0
7787 
7788 #define ALT_UART_CPR_RSVD_CPR_15TO14_GET(value) (((value) & 0x0000c000) >> 14)
7789 
7790 #define ALT_UART_CPR_RSVD_CPR_15TO14_SET(value) (((value) << 14) & 0x0000c000)
7791 
7823 #define ALT_UART_CPR_FIFO_MOD_E_FIFO128BYTES 0x80
7824 
7826 #define ALT_UART_CPR_FIFO_MOD_LSB 16
7827 
7828 #define ALT_UART_CPR_FIFO_MOD_MSB 23
7829 
7830 #define ALT_UART_CPR_FIFO_MOD_WIDTH 8
7831 
7832 #define ALT_UART_CPR_FIFO_MOD_SET_MSK 0x00ff0000
7833 
7834 #define ALT_UART_CPR_FIFO_MOD_CLR_MSK 0xff00ffff
7835 
7836 #define ALT_UART_CPR_FIFO_MOD_RESET 0x8
7837 
7838 #define ALT_UART_CPR_FIFO_MOD_GET(value) (((value) & 0x00ff0000) >> 16)
7839 
7840 #define ALT_UART_CPR_FIFO_MOD_SET(value) (((value) << 16) & 0x00ff0000)
7841 
7851 #define ALT_UART_CPR_RSVD_CPR_31TO24_LSB 24
7852 
7853 #define ALT_UART_CPR_RSVD_CPR_31TO24_MSB 31
7854 
7855 #define ALT_UART_CPR_RSVD_CPR_31TO24_WIDTH 8
7856 
7857 #define ALT_UART_CPR_RSVD_CPR_31TO24_SET_MSK 0xff000000
7858 
7859 #define ALT_UART_CPR_RSVD_CPR_31TO24_CLR_MSK 0x00ffffff
7860 
7861 #define ALT_UART_CPR_RSVD_CPR_31TO24_RESET 0x0
7862 
7863 #define ALT_UART_CPR_RSVD_CPR_31TO24_GET(value) (((value) & 0xff000000) >> 24)
7864 
7865 #define ALT_UART_CPR_RSVD_CPR_31TO24_SET(value) (((value) << 24) & 0xff000000)
7866 
7867 #ifndef __ASSEMBLY__
7868 
7879 {
7880  const uint32_t apbdatawidth : 2;
7881  const uint32_t rsvd_cpr_3to2 : 2;
7882  const uint32_t afce_mode : 1;
7883  const uint32_t thre_mode : 1;
7884  const uint32_t sir_mode : 1;
7885  const uint32_t sir_lp_mode : 1;
7886  const uint32_t additional_feat : 1;
7887  const uint32_t fifo_access : 1;
7888  const uint32_t fifo_stat : 1;
7889  const uint32_t shadow : 1;
7890  const uint32_t uart_add_encoded_param : 1;
7891  const uint32_t dma_extra : 1;
7892  const uint32_t rsvd_cpr_15to14 : 2;
7893  const uint32_t fifo_mode : 8;
7894  const uint32_t rsvd_cpr_31to24 : 8;
7895 };
7896 
7898 typedef volatile struct ALT_UART_CPR_s ALT_UART_CPR_t;
7899 #endif /* __ASSEMBLY__ */
7900 
7902 #define ALT_UART_CPR_RESET 0x00083f32
7903 
7904 #define ALT_UART_CPR_OFST 0xf4
7905 
7906 #define ALT_UART_CPR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_CPR_OFST))
7907 
7931 #define ALT_UART_UCV_UART_COMPONENT_VER_LSB 0
7932 
7933 #define ALT_UART_UCV_UART_COMPONENT_VER_MSB 31
7934 
7935 #define ALT_UART_UCV_UART_COMPONENT_VER_WIDTH 32
7936 
7937 #define ALT_UART_UCV_UART_COMPONENT_VER_SET_MSK 0xffffffff
7938 
7939 #define ALT_UART_UCV_UART_COMPONENT_VER_CLR_MSK 0x00000000
7940 
7941 #define ALT_UART_UCV_UART_COMPONENT_VER_RESET 0x3331342a
7942 
7943 #define ALT_UART_UCV_UART_COMPONENT_VER_GET(value) (((value) & 0xffffffff) >> 0)
7944 
7945 #define ALT_UART_UCV_UART_COMPONENT_VER_SET(value) (((value) << 0) & 0xffffffff)
7946 
7947 #ifndef __ASSEMBLY__
7948 
7959 {
7960  const uint32_t uart_component_version : 32;
7961 };
7962 
7964 typedef volatile struct ALT_UART_UCV_s ALT_UART_UCV_t;
7965 #endif /* __ASSEMBLY__ */
7966 
7968 #define ALT_UART_UCV_RESET 0x3331342a
7969 
7970 #define ALT_UART_UCV_OFST 0xf8
7971 
7972 #define ALT_UART_UCV_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_UCV_OFST))
7973 
7995 #define ALT_UART_CTR_PERIPHERAL_ID_LSB 0
7996 
7997 #define ALT_UART_CTR_PERIPHERAL_ID_MSB 31
7998 
7999 #define ALT_UART_CTR_PERIPHERAL_ID_WIDTH 32
8000 
8001 #define ALT_UART_CTR_PERIPHERAL_ID_SET_MSK 0xffffffff
8002 
8003 #define ALT_UART_CTR_PERIPHERAL_ID_CLR_MSK 0x00000000
8004 
8005 #define ALT_UART_CTR_PERIPHERAL_ID_RESET 0x44570110
8006 
8007 #define ALT_UART_CTR_PERIPHERAL_ID_GET(value) (((value) & 0xffffffff) >> 0)
8008 
8009 #define ALT_UART_CTR_PERIPHERAL_ID_SET(value) (((value) << 0) & 0xffffffff)
8010 
8011 #ifndef __ASSEMBLY__
8012 
8023 {
8024  const uint32_t peripheral_id : 32;
8025 };
8026 
8028 typedef volatile struct ALT_UART_CTR_s ALT_UART_CTR_t;
8029 #endif /* __ASSEMBLY__ */
8030 
8032 #define ALT_UART_CTR_RESET 0x44570110
8033 
8034 #define ALT_UART_CTR_OFST 0xfc
8035 
8036 #define ALT_UART_CTR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_CTR_OFST))
8037 
8038 #ifndef __ASSEMBLY__
8039 
8050 {
8054  union
8055  {
8056  volatile ALT_UART_IIR_t iir;
8057  volatile ALT_UART_FCR_t fcr;
8058  } _u_0x8;
8059  volatile ALT_UART_LCR_t lcr;
8060  volatile ALT_UART_MCR_t mcr;
8061  volatile ALT_UART_LSR_t lsr;
8062  volatile ALT_UART_MSR_t msr;
8063  volatile ALT_UART_SCR_t scr;
8064  volatile uint32_t _pad_0x20_0x2f[4];
8081  volatile ALT_UART_FAR_t far;
8082  volatile ALT_UART_TFR_t tfr;
8083  volatile ALT_UART_RFW_t rfw;
8084  volatile ALT_UART_USR_t usr;
8085  volatile ALT_UART_TFL_t tfl;
8086  volatile ALT_UART_RFL_t rfl;
8087  volatile ALT_UART_SRR_t srr;
8091  volatile ALT_UART_SFE_t sfe;
8092  volatile ALT_UART_SRT_t srt;
8094  volatile ALT_UART_HTX_t htx;
8096  volatile uint32_t _pad_0xac_0xf3[18];
8097  volatile ALT_UART_CPR_t cpr;
8098  volatile ALT_UART_UCV_t ucv;
8099  volatile ALT_UART_CTR_t ctr;
8100 };
8101 
8103 typedef volatile struct ALT_UART_s ALT_UART_t;
8106 {
8107  volatile uint32_t rbr_thr_dll;
8108  volatile uint32_t ier_dlh;
8110  union
8111  {
8112  volatile uint32_t iir;
8113  volatile uint32_t fcr;
8114  } _u_0x8;
8115  volatile uint32_t lcr;
8116  volatile uint32_t mcr;
8117  volatile uint32_t lsr;
8118  volatile uint32_t msr;
8119  volatile uint32_t scr;
8120  volatile uint32_t _pad_0x20_0x2f[4];
8121  volatile uint32_t srbr_sthr_0;
8122  volatile uint32_t srbr_sthr_1;
8123  volatile uint32_t srbr_sthr_2;
8124  volatile uint32_t srbr_sthr_3;
8125  volatile uint32_t srbr_sthr_4;
8126  volatile uint32_t srbr_sthr_5;
8127  volatile uint32_t srbr_sthr_6;
8128  volatile uint32_t srbr_sthr_7;
8129  volatile uint32_t srbr_sthr_8;
8130  volatile uint32_t srbr_sthr_9;
8131  volatile uint32_t srbr_sthr_10;
8132  volatile uint32_t srbr_sthr_11;
8133  volatile uint32_t srbr_sthr_12;
8134  volatile uint32_t srbr_sthr_13;
8135  volatile uint32_t srbr_sthr_14;
8136  volatile uint32_t srbr_sthr_15;
8137  volatile uint32_t far;
8138  volatile uint32_t tfr;
8139  volatile uint32_t rfw;
8140  volatile uint32_t usr;
8141  volatile uint32_t tfl;
8142  volatile uint32_t rfl;
8143  volatile uint32_t srr;
8144  volatile uint32_t srts;
8145  volatile uint32_t sbcr;
8146  volatile uint32_t sdmam;
8147  volatile uint32_t sfe;
8148  volatile uint32_t srt;
8149  volatile uint32_t stet;
8150  volatile uint32_t htx;
8151  volatile uint32_t dmasa;
8152  volatile uint32_t _pad_0xac_0xf3[18];
8153  volatile uint32_t cpr;
8154  volatile uint32_t ucv;
8155  volatile uint32_t ctr;
8156 };
8157 
8159 typedef volatile struct ALT_UART_raw_s ALT_UART_raw_t;
8160 #endif /* __ASSEMBLY__ */
8161 
8163 #ifdef __cplusplus
8164 }
8165 #endif /* __cplusplus */
8166 #endif /* __ALT_SOCAL_UART_H__ */
8167